1279377Simp/* 2279377Simp * DTS file for SPEAr320 SoC 3279377Simp * 4279377Simp * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com> 5279377Simp * 6279377Simp * The code contained herein is licensed under the GNU General Public 7279377Simp * License. You may obtain a copy of the GNU General Public License 8279377Simp * Version 2 or later at the following locations: 9279377Simp * 10279377Simp * http://www.opensource.org/licenses/gpl-license.html 11279377Simp * http://www.gnu.org/copyleft/gpl.html 12279377Simp */ 13279377Simp 14279377Simp/include/ "spear3xx.dtsi" 15279377Simp 16279377Simp/ { 17279377Simp ahb { 18279377Simp #address-cells = <1>; 19279377Simp #size-cells = <1>; 20279377Simp compatible = "simple-bus"; 21279377Simp ranges = <0x40000000 0x40000000 0x80000000 22279377Simp 0xd0000000 0xd0000000 0x30000000>; 23279377Simp 24279377Simp pinmux: pinmux@b3000000 { 25279377Simp compatible = "st,spear320-pinmux"; 26279377Simp reg = <0xb3000000 0x1000>; 27279377Simp #gpio-range-cells = <3>; 28279377Simp }; 29279377Simp 30279377Simp clcd@90000000 { 31279377Simp compatible = "arm,pl110", "arm,primecell"; 32279377Simp reg = <0x90000000 0x1000>; 33279377Simp interrupts = <8>; 34279377Simp interrupt-parent = <&shirq>; 35279377Simp status = "disabled"; 36279377Simp }; 37279377Simp 38279377Simp fsmc: flash@4c000000 { 39279377Simp compatible = "st,spear600-fsmc-nand"; 40279377Simp #address-cells = <1>; 41279377Simp #size-cells = <1>; 42279377Simp reg = <0x4c000000 0x1000 /* FSMC Register */ 43279377Simp 0x50000000 0x0010 /* NAND Base DATA */ 44279377Simp 0x50020000 0x0010 /* NAND Base ADDR */ 45279377Simp 0x50010000 0x0010>; /* NAND Base CMD */ 46279377Simp reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; 47279377Simp status = "disabled"; 48279377Simp }; 49279377Simp 50279377Simp sdhci@70000000 { 51279377Simp compatible = "st,sdhci-spear"; 52279377Simp reg = <0x70000000 0x100>; 53279377Simp interrupts = <10>; 54279377Simp interrupt-parent = <&shirq>; 55279377Simp status = "disabled"; 56279377Simp }; 57279377Simp 58279377Simp shirq: interrupt-controller@0xb3000000 { 59279377Simp compatible = "st,spear320-shirq"; 60279377Simp reg = <0xb3000000 0x1000>; 61279377Simp interrupts = <30 28 29 1>; 62279377Simp #interrupt-cells = <1>; 63279377Simp interrupt-controller; 64279377Simp }; 65279377Simp 66279377Simp spi1: spi@a5000000 { 67279377Simp compatible = "arm,pl022", "arm,primecell"; 68279377Simp reg = <0xa5000000 0x1000>; 69279377Simp interrupts = <15>; 70279377Simp interrupt-parent = <&shirq>; 71279377Simp #address-cells = <1>; 72279377Simp #size-cells = <0>; 73279377Simp status = "disabled"; 74279377Simp }; 75279377Simp 76279377Simp spi2: spi@a6000000 { 77279377Simp compatible = "arm,pl022", "arm,primecell"; 78279377Simp reg = <0xa6000000 0x1000>; 79279377Simp interrupts = <16>; 80279377Simp interrupt-parent = <&shirq>; 81279377Simp #address-cells = <1>; 82279377Simp #size-cells = <0>; 83279377Simp status = "disabled"; 84279377Simp }; 85279377Simp 86279377Simp pwm: pwm@a8000000 { 87279377Simp compatible ="st,spear-pwm"; 88279377Simp reg = <0xa8000000 0x1000>; 89279377Simp #pwm-cells = <2>; 90279377Simp status = "disabled"; 91279377Simp }; 92279377Simp 93279377Simp apb { 94279377Simp #address-cells = <1>; 95279377Simp #size-cells = <1>; 96279377Simp compatible = "simple-bus"; 97279377Simp ranges = <0xa0000000 0xa0000000 0x20000000 98279377Simp 0xd0000000 0xd0000000 0x30000000>; 99279377Simp 100279377Simp i2c1: i2c@a7000000 { 101279377Simp #address-cells = <1>; 102279377Simp #size-cells = <0>; 103279377Simp compatible = "snps,designware-i2c"; 104279377Simp reg = <0xa7000000 0x1000>; 105279377Simp interrupts = <21>; 106279377Simp interrupt-parent = <&shirq>; 107279377Simp status = "disabled"; 108279377Simp }; 109279377Simp 110279377Simp serial@a3000000 { 111279377Simp compatible = "arm,pl011", "arm,primecell"; 112279377Simp reg = <0xa3000000 0x1000>; 113279377Simp interrupts = <13>; 114279377Simp interrupt-parent = <&shirq>; 115279377Simp status = "disabled"; 116279377Simp }; 117279377Simp 118279377Simp serial@a4000000 { 119279377Simp compatible = "arm,pl011", "arm,primecell"; 120279377Simp reg = <0xa4000000 0x1000>; 121279377Simp interrupts = <14>; 122279377Simp interrupt-parent = <&shirq>; 123279377Simp status = "disabled"; 124279377Simp }; 125279377Simp 126279377Simp gpiopinctrl: gpio@b3000000 { 127279377Simp compatible = "st,spear-plgpio"; 128279377Simp reg = <0xb3000000 0x1000>; 129279377Simp #interrupt-cells = <1>; 130279377Simp interrupt-controller; 131279377Simp gpio-controller; 132279377Simp #gpio-cells = <2>; 133279377Simp gpio-ranges = <&pinmux 0 0 102>; 134279377Simp status = "disabled"; 135279377Simp 136279377Simp st-plgpio,ngpio = <102>; 137279377Simp st-plgpio,enb-reg = <0x24>; 138279377Simp st-plgpio,wdata-reg = <0x34>; 139279377Simp st-plgpio,dir-reg = <0x44>; 140279377Simp st-plgpio,ie-reg = <0x64>; 141279377Simp st-plgpio,rdata-reg = <0x54>; 142279377Simp st-plgpio,mis-reg = <0x84>; 143279377Simp st-plgpio,eit-reg = <0x94>; 144279377Simp }; 145279377Simp }; 146279377Simp }; 147279377Simp}; 148