1279377Simp/* The pxa3xx skeleton simply augments the 2xx version */ 2279377Simp/include/ "pxa2xx.dtsi" 3279377Simp 4279377Simp/ { 5279377Simp model = "Marvell PXA3xx familiy SoC"; 6279377Simp compatible = "marvell,pxa3xx"; 7279377Simp 8279377Simp pxabus { 9279377Simp pwri2c: i2c@40f500c0 { 10279377Simp compatible = "mrvl,pwri2c"; 11279377Simp reg = <0x40f500c0 0x30>; 12279377Simp interrupts = <6>; 13279377Simp #address-cells = <0x1>; 14279377Simp #size-cells = <0>; 15279377Simp status = "disabled"; 16279377Simp }; 17279377Simp 18279377Simp nand0: nand@43100000 { 19279377Simp compatible = "marvell,pxa3xx-nand"; 20279377Simp reg = <0x43100000 90>; 21279377Simp interrupts = <45>; 22279377Simp #address-cells = <1>; 23279377Simp #size-cells = <1>; 24279377Simp status = "disabled"; 25279377Simp }; 26279377Simp 27279377Simp pxairq: interrupt-controller@40d00000 { 28279377Simp marvell,intc-priority; 29279377Simp marvell,intc-nr-irqs = <56>; 30279377Simp }; 31279377Simp 32279377Simp gpio: gpio@40e00000 { 33279377Simp compatible = "intel,pxa3xx-gpio"; 34279377Simp reg = <0x40e00000 0x10000>; 35279377Simp interrupt-names = "gpio0", "gpio1", "gpio_mux"; 36279377Simp interrupts = <8 9 10>; 37279377Simp gpio-controller; 38279377Simp #gpio-cells = <0x2>; 39279377Simp interrupt-controller; 40279377Simp #interrupt-cells = <0x2>; 41279377Simp }; 42279377Simp }; 43279377Simp}; 44