at91sam9x5_usart3.dtsi revision 284090 
1/*
2 * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * 4 USART.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14	aliases {
15		serial4 = &usart3;
16	};
17
18	ahb {
19		apb {
20			pinctrl@fffff400 {
21				usart3 {
22					pinctrl_usart3: usart3-0 {
23						atmel,pins =
24							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PC22 periph B with pullup */
25							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC23 periph B */
26					};
27
28					pinctrl_usart3_rts: usart3_rts-0 {
29						atmel,pins =
30							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC24 periph B */
31					};
32
33					pinctrl_usart3_cts: usart3_cts-0 {
34						atmel,pins =
35							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC25 periph B */
36					};
37
38					pinctrl_usart3_sck: usart3_sck-0 {
39						atmel,pins =
40							<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC26 periph B */
41					};
42				};
43			};
44
45			pmc: pmc@fffffc00 {
46				periphck {
47					usart3_clk: usart3_clk {
48						#clock-cells = <0>;
49						reg = <8>;
50					};
51				};
52			};
53
54			usart3: serial@f8028000 {
55				compatible = "atmel,at91sam9260-usart";
56				reg = <0xf8028000 0x200>;
57				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
58				pinctrl-names = "default";
59				pinctrl-0 = <&pinctrl_usart3>;
60				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
61				       <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
62				dma-names = "tx", "rx";
63				clocks = <&usart3_clk>;
64				clock-names = "usart";
65				status = "disabled";
66			};
67		};
68	};
69};
70