1139749Simp/*- 2119853Scg * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 350724Scg * All rights reserved. 450724Scg * 550724Scg * Redistribution and use in source and binary forms, with or without 650724Scg * modification, are permitted provided that the following conditions 750724Scg * are met: 850724Scg * 1. Redistributions of source code must retain the above copyright 950724Scg * notice, this list of conditions and the following disclaimer. 1050724Scg * 2. Redistributions in binary form must reproduce the above copyright 1150724Scg * notice, this list of conditions and the following disclaimer in the 1250724Scg * documentation and/or other materials provided with the distribution. 1350724Scg * 1450724Scg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1550724Scg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1650724Scg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1750724Scg * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1850724Scg * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1950724Scg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2050724Scg * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2150724Scg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2250724Scg * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2350724Scg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2450724Scg * SUCH DAMAGE. 2550724Scg * 2650733Speter * $FreeBSD$ 2750724Scg */ 2850724Scg 2950724Scg#ifndef _T4DWAVE_REG_H 3050724Scg#define _T4DWAVE_REG_H 3150724Scg 3250724Scg#define TR_REG_CIR 0xa0 3350724Scg#define TR_CIR_MASK 0x0000003f 3450724Scg#define TR_CIR_ADDRENA 0x00001000 3550724Scg#define TR_CIR_MIDENA 0x00002000 3650724Scg#define TR_REG_MISCINT 0xb0 3750724Scg#define TR_INT_ADDR 0x00000020 3850724Scg#define TR_INT_SB 0x00000004 3950724Scg 4050724Scg#define TR_REG_DMAR0 0x00 4150724Scg#define TR_REG_DMAR4 0x04 4250724Scg#define TR_REG_DMAR11 0x0b 4350724Scg#define TR_REG_DMAR15 0x0f 4450724Scg#define TR_REG_SBR4 0x14 4550724Scg#define TR_REG_SBR5 0x15 4650724Scg#define TR_SB_INTSTATUS 0x82 4750724Scg#define TR_REG_SBR9 0x1e 4850724Scg#define TR_REG_SBR10 0x1f 4950724Scg#define TR_REG_SBBL 0xc0 5050724Scg#define TR_REG_SBCTRL 0xc4 5150724Scg#define TR_REG_SBDELTA 0xac 5250724Scg 5350724Scg#define TR_CDC_DATA 16 5450724Scg#define TDX_REG_CODECWR 0x40 5550724Scg#define TDX_REG_CODECRD 0x44 5650724Scg#define TDX_CDC_RWSTAT 0x00008000 5750724Scg#define TDX_REG_CODECST 0x48 5850724Scg#define TDX_CDC_SBCTRL 0x40 5950724Scg#define TDX_CDC_ACTIVE 0x20 6050724Scg#define TDX_CDC_READY 0x10 6150724Scg#define TDX_CDC_ADCON 0x08 6250724Scg#define TDX_CDC_DACON 0x02 6350724Scg#define TDX_CDC_RESET 0x01 6450724Scg#define TDX_CDC_ON (TDX_CDC_ADCON|TDX_CDC_DACON) 6550724Scg 6682363Sgreid#define SPA_REG_CODECRD 0x44 6782363Sgreid#define SPA_REG_CODECWR 0x40 6882363Sgreid#define SPA_REG_CODECST 0x48 6982363Sgreid#define SPA_RST_OFF 0x0f0000 7082363Sgreid#define SPA_REG_GPIO 0x48 7182363Sgreid#define SPA_CDC_RWSTAT 0x00008000 7282363Sgreid 7350724Scg#define TNX_REG_CODECWR 0x44 7450724Scg#define TNX_REG_CODEC1RD 0x48 7550724Scg#define TNX_REG_CODEC2RD 0x4c 7650724Scg#define TNX_CDC_RWSTAT 0x00000c00 7750724Scg#define TNX_CDC_SEC 0x00000100 7850724Scg#define TNX_REG_CODECST 0x40 7950724Scg#define TNX_CDC_READY2 0x40 8050724Scg#define TNX_CDC_ADC2ON 0x20 8150724Scg#define TNX_CDC_DAC2ON 0x10 8250724Scg#define TNX_CDC_READY1 0x08 8350724Scg#define TNX_CDC_ADC1ON 0x04 8450724Scg#define TNX_CDC_DAC1ON 0x02 8550724Scg#define TNX_CDC_RESET 0x01 8650724Scg#define TNX_CDC_ON (TNX_CDC_ADC1ON|TNX_CDC_DAC1ON) 8750724Scg 8850724Scg 8950724Scg#define TR_REG_STARTA 0x80 9050724Scg#define TR_REG_STOPA 0x84 9171503Scg#define TR_REG_CSPF_A 0x90 9250724Scg#define TR_REG_ADDRINTA 0x98 9350724Scg#define TR_REG_INTENA 0xa4 9450724Scg 9550724Scg#define TR_REG_STARTB 0xb4 9650724Scg#define TR_REG_STOPB 0xb8 9771503Scg#define TR_REG_CSPF_B 0xbc 9850724Scg#define TR_REG_ADDRINTB 0xd8 9950724Scg#define TR_REG_INTENB 0xdc 10050724Scg 10150724Scg#define TR_REG_CHNBASE 0xe0 10250724Scg#define TR_CHN_REGS 5 10350724Scg 10450724Scg#endif 105