if_sn.c revision 111119
1/* 2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Gardner Buchanan. 16 * 4. The name of Gardner Buchanan may not be used to endorse or promote 17 * products derived from this software without specific prior written 18 * permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: head/sys/dev/sn/if_sn.c 111119 2003-02-19 05:47:46Z imp $ 32 */ 33 34/* 35 * This is a driver for SMC's 9000 series of Ethernet adapters. 36 * 37 * This FreeBSD driver is derived from the smc9194 Linux driver by 38 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman. 39 * This driver also shamelessly borrows from the FreeBSD ep driver 40 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca> 41 * All rights reserved. 42 * 43 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded 44 * PC. It is adapted from Erik Stahlman's Linux driver which worked 45 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook, 46 * it will work for the entire SMC 9xxx series. (Ha Ha) 47 * 48 * "Features" of the SMC chip: 49 * 4608 byte packet memory. (for the 91C92. Others have more) 50 * EEPROM for configuration 51 * AUI/TP selection 52 * 53 * Authors: 54 * Erik Stahlman erik@vt.edu 55 * Herb Peyerl hpeyerl@novatel.ca 56 * Andres Vega Garcia avega@sophia.inria.fr 57 * Serge Babkin babkin@hq.icb.chel.su 58 * Gardner Buchanan gbuchanan@shl.com 59 * 60 * Sources: 61 * o SMC databook 62 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)" 63 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp" 64 * 65 * Known Bugs: 66 * o The hardware multicast filter isn't used yet. 67 * o Setting of the hardware address isn't supported. 68 * o Hardware padding isn't used. 69 */ 70 71/* 72 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT) 73 * 74 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org> 75 * BSD-nomads, Tokyo, Japan. 76 */ 77/* 78 * Multicast support by Kei TANAKA <kei@pal.xerox.com> 79 * Special thanks to itojun@itojun.org 80 */ 81 82#include <sys/param.h> 83#include <sys/systm.h> 84#include <sys/errno.h> 85#include <sys/sockio.h> 86#include <sys/mbuf.h> 87#include <sys/socket.h> 88#include <sys/syslog.h> 89 90#include <sys/module.h> 91#include <sys/bus.h> 92 93#include <machine/bus.h> 94#include <machine/resource.h> 95#include <sys/rman.h> 96 97#include <net/ethernet.h> 98#include <net/if.h> 99#include <net/if_arp.h> 100#include <net/if_dl.h> 101#include <net/if_types.h> 102#include <net/if_mib.h> 103 104#ifdef INET 105#include <netinet/in.h> 106#include <netinet/in_systm.h> 107#include <netinet/in_var.h> 108#include <netinet/ip.h> 109#endif 110 111#ifdef NS 112#include <netns/ns.h> 113#include <netns/ns_if.h> 114#endif 115 116#include <net/bpf.h> 117#include <net/bpfdesc.h> 118 119 120#include <dev/sn/if_snreg.h> 121#include <dev/sn/if_snvar.h> 122 123/* Exported variables */ 124devclass_t sn_devclass; 125 126static int snioctl(struct ifnet * ifp, u_long, caddr_t); 127 128static void snresume(struct ifnet *); 129 130void sninit(void *); 131void snread(struct ifnet *); 132void snreset(struct sn_softc *); 133void snstart(struct ifnet *); 134void snstop(struct sn_softc *); 135void snwatchdog(struct ifnet *); 136 137static void sn_setmcast(struct sn_softc *); 138static int sn_getmcf(struct arpcom *ac, u_char *mcf); 139static u_int smc_crc(u_char *); 140 141/* I (GB) have been unlucky getting the hardware padding 142 * to work properly. 143 */ 144#define SW_PAD 145 146static const char *chip_ids[15] = { 147 NULL, NULL, NULL, 148 /* 3 */ "SMC91C90/91C92", 149 /* 4 */ "SMC91C94", 150 /* 5 */ "SMC91C95", 151 NULL, 152 /* 7 */ "SMC91C100", 153 /* 8 */ "SMC91C100FD", 154 NULL, NULL, NULL, 155 NULL, NULL, NULL 156}; 157 158int 159sn_attach(device_t dev) 160{ 161 struct sn_softc *sc = device_get_softc(dev); 162 struct ifnet *ifp = &sc->arpcom.ac_if; 163 u_short i; 164 u_char *p; 165 struct ifaddr *ifa; 166 struct sockaddr_dl *sdl; 167 int rev; 168 u_short address; 169 int j; 170 171 sn_activate(dev); 172 173 snstop(sc); 174 175 sc->dev = dev; 176 sc->pages_wanted = -1; 177 178 device_printf(dev, " "); 179 180 SMC_SELECT_BANK(3); 181 rev = inw(BASE + REVISION_REG_W); 182 if (chip_ids[(rev >> 4) & 0xF]) 183 printf("%s ", chip_ids[(rev >> 4) & 0xF]); 184 185 SMC_SELECT_BANK(1); 186 i = inw(BASE + CONFIG_REG_W); 187 printf(i & CR_AUI_SELECT ? "AUI" : "UTP"); 188 189 if (sc->pccard_enaddr) 190 for (j = 0; j < 3; j++) { 191 u_short w; 192 193 w = (u_short)sc->arpcom.ac_enaddr[j * 2] | 194 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8); 195 outw(BASE + IAR_ADDR0_REG_W + j * 2, w); 196 } 197 198 /* 199 * Read the station address from the chip. The MAC address is bank 1, 200 * regs 4 - 9 201 */ 202 SMC_SELECT_BANK(1); 203 p = (u_char *) & sc->arpcom.ac_enaddr; 204 for (i = 0; i < 6; i += 2) { 205 address = inw(BASE + IAR_ADDR0_REG_W + i); 206 p[i + 1] = address >> 8; 207 p[i] = address & 0xFF; 208 } 209 printf(" MAC address %6D\n", sc->arpcom.ac_enaddr, ":"); 210 ifp->if_softc = sc; 211 ifp->if_unit = device_get_unit(dev); 212 ifp->if_name = "sn"; 213 ifp->if_mtu = ETHERMTU; 214 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 215 ifp->if_output = ether_output; 216 ifp->if_start = snstart; 217 ifp->if_ioctl = snioctl; 218 ifp->if_watchdog = snwatchdog; 219 ifp->if_init = sninit; 220 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 221 ifp->if_timer = 0; 222 223 ether_ifattach(ifp, sc->arpcom.ac_enaddr); 224 225 /* 226 * Fill the hardware address into ifa_addr if we find an AF_LINK 227 * entry. We need to do this so bpf's can get the hardware addr of 228 * this card. netstat likes this too! 229 */ 230 ifa = TAILQ_FIRST(&ifp->if_addrhead); 231 while ((ifa != 0) && (ifa->ifa_addr != 0) && 232 (ifa->ifa_addr->sa_family != AF_LINK)) 233 ifa = TAILQ_NEXT(ifa, ifa_link); 234 235 if ((ifa != 0) && (ifa->ifa_addr != 0)) { 236 sdl = (struct sockaddr_dl *) ifa->ifa_addr; 237 sdl->sdl_type = IFT_ETHER; 238 sdl->sdl_alen = ETHER_ADDR_LEN; 239 sdl->sdl_slen = 0; 240 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); 241 } 242 243 return 0; 244} 245 246 247int 248sn_detach(device_t dev) 249{ 250 struct sn_softc *sc = device_get_softc(dev); 251 252 sc->arpcom.ac_if.if_flags &= ~IFF_RUNNING; 253 ether_ifdetach(&sc->arpcom.ac_if); 254 sn_deactivate(dev); 255 return 0; 256} 257 258/* 259 * Reset and initialize the chip 260 */ 261void 262sninit(void *xsc) 263{ 264 register struct sn_softc *sc = xsc; 265 register struct ifnet *ifp = &sc->arpcom.ac_if; 266 int s; 267 int flags; 268 int mask; 269 270 s = splimp(); 271 272 /* 273 * This resets the registers mostly to defaults, but doesn't affect 274 * EEPROM. After the reset cycle, we pause briefly for the chip to 275 * be happy. 276 */ 277 SMC_SELECT_BANK(0); 278 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET); 279 SMC_DELAY(); 280 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 281 SMC_DELAY(); 282 SMC_DELAY(); 283 284 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 285 286 /* 287 * Set the control register to automatically release succesfully 288 * transmitted packets (making the best use out of our limited 289 * memory) and to enable the EPH interrupt on certain TX errors. 290 */ 291 SMC_SELECT_BANK(1); 292 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE | 293 CTR_CR_ENABLE | CTR_LE_ENABLE)); 294 295 /* Set squelch level to 240mV (default 480mV) */ 296 flags = inw(BASE + CONFIG_REG_W); 297 flags |= CR_SET_SQLCH; 298 outw(BASE + CONFIG_REG_W, flags); 299 300 /* 301 * Reset the MMU and wait for it to be un-busy. 302 */ 303 SMC_SELECT_BANK(2); 304 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET); 305 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 306 ; 307 308 /* 309 * Disable all interrupts 310 */ 311 outb(BASE + INTR_MASK_REG_B, 0x00); 312 313 sn_setmcast(sc); 314 315 /* 316 * Set the transmitter control. We want it enabled. 317 */ 318 flags = TCR_ENABLE; 319 320#ifndef SW_PAD 321 /* 322 * I (GB) have been unlucky getting this to work. 323 */ 324 flags |= TCR_PAD_ENABLE; 325#endif /* SW_PAD */ 326 327 outw(BASE + TXMIT_CONTROL_REG_W, flags); 328 329 330 /* 331 * Now, enable interrupts 332 */ 333 SMC_SELECT_BANK(2); 334 335 mask = IM_EPH_INT | 336 IM_RX_OVRN_INT | 337 IM_RCV_INT | 338 IM_TX_INT; 339 340 outb(BASE + INTR_MASK_REG_B, mask); 341 sc->intr_mask = mask; 342 sc->pages_wanted = -1; 343 344 345 /* 346 * Mark the interface running but not active. 347 */ 348 ifp->if_flags |= IFF_RUNNING; 349 ifp->if_flags &= ~IFF_OACTIVE; 350 351 /* 352 * Attempt to push out any waiting packets. 353 */ 354 snstart(ifp); 355 356 splx(s); 357} 358 359 360void 361snstart(struct ifnet *ifp) 362{ 363 register struct sn_softc *sc = ifp->if_softc; 364 register u_int len; 365 register struct mbuf *m; 366 struct mbuf *top; 367 int s, pad; 368 int mask; 369 u_short length; 370 u_short numPages; 371 u_char packet_no; 372 int time_out; 373 int junk = 0; 374 375 s = splimp(); 376 377 if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) { 378 splx(s); 379 return; 380 } 381 if (sc->pages_wanted != -1) { 382 splx(s); 383 if_printf(ifp, "snstart() while memory allocation pending\n"); 384 return; 385 } 386startagain: 387 388 /* 389 * Sneak a peek at the next packet 390 */ 391 m = sc->arpcom.ac_if.if_snd.ifq_head; 392 if (m == 0) { 393 splx(s); 394 return; 395 } 396 /* 397 * Compute the frame length and set pad to give an overall even 398 * number of bytes. Below we assume that the packet length is even. 399 */ 400 for (len = 0, top = m; m; m = m->m_next) 401 len += m->m_len; 402 403 pad = (len & 1); 404 405 /* 406 * We drop packets that are too large. Perhaps we should truncate 407 * them instead? 408 */ 409 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 410 if_printf(ifp, "large packet discarded (A)\n"); 411 ++sc->arpcom.ac_if.if_oerrors; 412 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 413 m_freem(m); 414 goto readcheck; 415 } 416#ifdef SW_PAD 417 418 /* 419 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 420 */ 421 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 422 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 423 424#endif /* SW_PAD */ 425 426 length = pad + len; 427 428 /* 429 * The MMU wants the number of pages to be the number of 256 byte 430 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 431 * include space for the status word, byte count and control bytes in 432 * the allocation request. 433 */ 434 numPages = (length + 6) >> 8; 435 436 437 /* 438 * Now, try to allocate the memory 439 */ 440 SMC_SELECT_BANK(2); 441 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages); 442 443 /* 444 * Wait a short amount of time to see if the allocation request 445 * completes. Otherwise, I enable the interrupt and wait for 446 * completion asyncronously. 447 */ 448 449 time_out = MEMORY_WAIT_TIME; 450 do { 451 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT) 452 break; 453 } while (--time_out); 454 455 if (!time_out || junk > 10) { 456 457 /* 458 * No memory now. Oh well, wait until the chip finds memory 459 * later. Remember how many pages we were asking for and 460 * enable the allocation completion interrupt. Also set a 461 * watchdog in case we miss the interrupt. We mark the 462 * interface active since there is no point in attempting an 463 * snstart() until after the memory is available. 464 */ 465 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT; 466 outb(BASE + INTR_MASK_REG_B, mask); 467 sc->intr_mask = mask; 468 469 sc->arpcom.ac_if.if_timer = 1; 470 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 471 sc->pages_wanted = numPages; 472 473 splx(s); 474 return; 475 } 476 /* 477 * The memory allocation completed. Check the results. 478 */ 479 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 480 if (packet_no & ARR_FAILED) { 481 if (junk++ > 10) 482 if_printf(ifp, "Memory allocation failed\n"); 483 goto startagain; 484 } 485 /* 486 * We have a packet number, so tell the card to use it. 487 */ 488 outb(BASE + PACKET_NUM_REG_B, packet_no); 489 490 /* 491 * Point to the beginning of the packet 492 */ 493 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 494 495 /* 496 * Send the packet length (+6 for status, length and control byte) 497 * and the status word (set to zeros) 498 */ 499 outw(BASE + DATA_REG_W, 0); 500 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 501 outb(BASE + DATA_REG_B, (length + 6) >> 8); 502 503 /* 504 * Get the packet from the kernel. This will include the Ethernet 505 * frame header, MAC Addresses etc. 506 */ 507 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 508 509 /* 510 * Push out the data to the card. 511 */ 512 for (top = m; m != 0; m = m->m_next) { 513 514 /* 515 * Push out words. 516 */ 517 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 518 519 /* 520 * Push out remaining byte. 521 */ 522 if (m->m_len & 1) 523 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 524 } 525 526 /* 527 * Push out padding. 528 */ 529 while (pad > 1) { 530 outw(BASE + DATA_REG_W, 0); 531 pad -= 2; 532 } 533 if (pad) 534 outb(BASE + DATA_REG_B, 0); 535 536 /* 537 * Push out control byte and unused packet byte The control byte is 0 538 * meaning the packet is even lengthed and no special CRC handling is 539 * desired. 540 */ 541 outw(BASE + DATA_REG_W, 0); 542 543 /* 544 * Enable the interrupts and let the chipset deal with it Also set a 545 * watchdog in case we miss the interrupt. 546 */ 547 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 548 outb(BASE + INTR_MASK_REG_B, mask); 549 sc->intr_mask = mask; 550 551 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 552 553 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 554 sc->arpcom.ac_if.if_timer = 1; 555 556 BPF_MTAP(ifp, top); 557 558 sc->arpcom.ac_if.if_opackets++; 559 m_freem(top); 560 561 562readcheck: 563 564 /* 565 * Is another packet coming in? We don't want to overflow the tiny 566 * RX FIFO. If nothing has arrived then attempt to queue another 567 * transmit packet. 568 */ 569 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY) 570 goto startagain; 571 572 splx(s); 573 return; 574} 575 576 577 578/* Resume a packet transmit operation after a memory allocation 579 * has completed. 580 * 581 * This is basically a hacked up copy of snstart() which handles 582 * a completed memory allocation the same way snstart() does. 583 * It then passes control to snstart to handle any other queued 584 * packets. 585 */ 586static void 587snresume(struct ifnet *ifp) 588{ 589 register struct sn_softc *sc = ifp->if_softc; 590 register u_int len; 591 register struct mbuf *m; 592 struct mbuf *top; 593 int pad; 594 int mask; 595 u_short length; 596 u_short numPages; 597 u_short pages_wanted; 598 u_char packet_no; 599 600 if (sc->pages_wanted < 0) 601 return; 602 603 pages_wanted = sc->pages_wanted; 604 sc->pages_wanted = -1; 605 606 /* 607 * Sneak a peek at the next packet 608 */ 609 m = sc->arpcom.ac_if.if_snd.ifq_head; 610 if (m == 0) { 611 if_printf(ifp, "snresume() with nothing to send\n"); 612 return; 613 } 614 /* 615 * Compute the frame length and set pad to give an overall even 616 * number of bytes. Below we assume that the packet length is even. 617 */ 618 for (len = 0, top = m; m; m = m->m_next) 619 len += m->m_len; 620 621 pad = (len & 1); 622 623 /* 624 * We drop packets that are too large. Perhaps we should truncate 625 * them instead? 626 */ 627 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 628 if_printf(ifp, "large packet discarded (B)\n"); 629 ++sc->arpcom.ac_if.if_oerrors; 630 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 631 m_freem(m); 632 return; 633 } 634#ifdef SW_PAD 635 636 /* 637 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 638 */ 639 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 640 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 641 642#endif /* SW_PAD */ 643 644 length = pad + len; 645 646 647 /* 648 * The MMU wants the number of pages to be the number of 256 byte 649 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 650 * include space for the status word, byte count and control bytes in 651 * the allocation request. 652 */ 653 numPages = (length + 6) >> 8; 654 655 656 SMC_SELECT_BANK(2); 657 658 /* 659 * The memory allocation completed. Check the results. If it failed, 660 * we simply set a watchdog timer and hope for the best. 661 */ 662 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 663 if (packet_no & ARR_FAILED) { 664 if_printf(ifp, "Memory allocation failed. Weird.\n"); 665 sc->arpcom.ac_if.if_timer = 1; 666 goto try_start; 667 } 668 /* 669 * We have a packet number, so tell the card to use it. 670 */ 671 outb(BASE + PACKET_NUM_REG_B, packet_no); 672 673 /* 674 * Now, numPages should match the pages_wanted recorded when the 675 * memory allocation was initiated. 676 */ 677 if (pages_wanted != numPages) { 678 if_printf(ifp, "memory allocation wrong size. Weird.\n"); 679 /* 680 * If the allocation was the wrong size we simply release the 681 * memory once it is granted. Wait for the MMU to be un-busy. 682 */ 683 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 684 ; 685 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 686 687 return; 688 } 689 /* 690 * Point to the beginning of the packet 691 */ 692 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 693 694 /* 695 * Send the packet length (+6 for status, length and control byte) 696 * and the status word (set to zeros) 697 */ 698 outw(BASE + DATA_REG_W, 0); 699 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 700 outb(BASE + DATA_REG_B, (length + 6) >> 8); 701 702 /* 703 * Get the packet from the kernel. This will include the Ethernet 704 * frame header, MAC Addresses etc. 705 */ 706 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 707 708 /* 709 * Push out the data to the card. 710 */ 711 for (top = m; m != 0; m = m->m_next) { 712 713 /* 714 * Push out words. 715 */ 716 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 717 718 /* 719 * Push out remaining byte. 720 */ 721 if (m->m_len & 1) 722 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 723 } 724 725 /* 726 * Push out padding. 727 */ 728 while (pad > 1) { 729 outw(BASE + DATA_REG_W, 0); 730 pad -= 2; 731 } 732 if (pad) 733 outb(BASE + DATA_REG_B, 0); 734 735 /* 736 * Push out control byte and unused packet byte The control byte is 0 737 * meaning the packet is even lengthed and no special CRC handling is 738 * desired. 739 */ 740 outw(BASE + DATA_REG_W, 0); 741 742 /* 743 * Enable the interrupts and let the chipset deal with it Also set a 744 * watchdog in case we miss the interrupt. 745 */ 746 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 747 outb(BASE + INTR_MASK_REG_B, mask); 748 sc->intr_mask = mask; 749 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 750 751 BPF_MTAP(ifp, top); 752 753 sc->arpcom.ac_if.if_opackets++; 754 m_freem(top); 755 756try_start: 757 758 /* 759 * Now pass control to snstart() to queue any additional packets 760 */ 761 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 762 snstart(ifp); 763 764 /* 765 * We've sent something, so we're active. Set a watchdog in case the 766 * TX_EMPTY interrupt is lost. 767 */ 768 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE; 769 sc->arpcom.ac_if.if_timer = 1; 770 771 return; 772} 773 774 775void 776sn_intr(void *arg) 777{ 778 int status, interrupts; 779 register struct sn_softc *sc = (struct sn_softc *) arg; 780 struct ifnet *ifp = &sc->arpcom.ac_if; 781 int x; 782 783 /* 784 * Chip state registers 785 */ 786 u_char mask; 787 u_char packet_no; 788 u_short tx_status; 789 u_short card_stats; 790 791 /* 792 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder... 793 */ 794 x = splbio(); 795 796 /* 797 * Clear the watchdog. 798 */ 799 ifp->if_timer = 0; 800 801 SMC_SELECT_BANK(2); 802 803 /* 804 * Obtain the current interrupt mask and clear the hardware mask 805 * while servicing interrupts. 806 */ 807 mask = inb(BASE + INTR_MASK_REG_B); 808 outb(BASE + INTR_MASK_REG_B, 0x00); 809 810 /* 811 * Get the set of interrupts which occurred and eliminate any which 812 * are masked. 813 */ 814 interrupts = inb(BASE + INTR_STAT_REG_B); 815 status = interrupts & mask; 816 817 /* 818 * Now, process each of the interrupt types. 819 */ 820 821 /* 822 * Receive Overrun. 823 */ 824 if (status & IM_RX_OVRN_INT) { 825 /* 826 * Acknowlege Interrupt 827 */ 828 SMC_SELECT_BANK(2); 829 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT); 830 831 ++sc->arpcom.ac_if.if_ierrors; 832 } 833 /* 834 * Got a packet. 835 */ 836 if (status & IM_RCV_INT) { 837 int packet_number; 838 839 SMC_SELECT_BANK(2); 840 packet_number = inw(BASE + FIFO_PORTS_REG_W); 841 842 if (packet_number & FIFO_REMPTY) { 843 /* 844 * we got called , but nothing was on the FIFO 845 */ 846 printf("sn: Receive interrupt with nothing on FIFO\n"); 847 goto out; 848 } 849 snread(ifp); 850 } 851 /* 852 * An on-card memory allocation came through. 853 */ 854 if (status & IM_ALLOC_INT) { 855 /* 856 * Disable this interrupt. 857 */ 858 mask &= ~IM_ALLOC_INT; 859 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 860 snresume(&sc->arpcom.ac_if); 861 } 862 /* 863 * TX Completion. Handle a transmit error message. This will only be 864 * called when there is an error, because of the AUTO_RELEASE mode. 865 */ 866 if (status & IM_TX_INT) { 867 /* 868 * Acknowlege Interrupt 869 */ 870 SMC_SELECT_BANK(2); 871 outb(BASE + INTR_ACK_REG_B, IM_TX_INT); 872 873 packet_no = inw(BASE + FIFO_PORTS_REG_W); 874 packet_no &= FIFO_TX_MASK; 875 876 /* 877 * select this as the packet to read from 878 */ 879 outb(BASE + PACKET_NUM_REG_B, packet_no); 880 881 /* 882 * Position the pointer to the first word from this packet 883 */ 884 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000); 885 886 /* 887 * Fetch the TX status word. The value found here will be a 888 * copy of the EPH_STATUS_REG_W at the time the transmit 889 * failed. 890 */ 891 tx_status = inw(BASE + DATA_REG_W); 892 893 if (tx_status & EPHSR_TX_SUC) { 894 device_printf(sc->dev, 895 "Successful packet caused interrupt\n"); 896 } else { 897 ++sc->arpcom.ac_if.if_oerrors; 898 } 899 900 if (tx_status & EPHSR_LATCOL) 901 ++sc->arpcom.ac_if.if_collisions; 902 903 /* 904 * Some of these errors will have disabled transmit. 905 * Re-enable transmit now. 906 */ 907 SMC_SELECT_BANK(0); 908 909#ifdef SW_PAD 910 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE); 911#else 912 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE); 913#endif /* SW_PAD */ 914 915 /* 916 * kill the failed packet. Wait for the MMU to be un-busy. 917 */ 918 SMC_SELECT_BANK(2); 919 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 920 ; 921 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 922 923 /* 924 * Attempt to queue more transmits. 925 */ 926 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 927 snstart(&sc->arpcom.ac_if); 928 } 929 /* 930 * Transmit underrun. We use this opportunity to update transmit 931 * statistics from the card. 932 */ 933 if (status & IM_TX_EMPTY_INT) { 934 935 /* 936 * Acknowlege Interrupt 937 */ 938 SMC_SELECT_BANK(2); 939 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT); 940 941 /* 942 * Disable this interrupt. 943 */ 944 mask &= ~IM_TX_EMPTY_INT; 945 946 SMC_SELECT_BANK(0); 947 card_stats = inw(BASE + COUNTER_REG_W); 948 949 /* 950 * Single collisions 951 */ 952 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK; 953 954 /* 955 * Multiple collisions 956 */ 957 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 958 959 SMC_SELECT_BANK(2); 960 961 /* 962 * Attempt to enqueue some more stuff. 963 */ 964 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 965 snstart(&sc->arpcom.ac_if); 966 } 967 /* 968 * Some other error. Try to fix it by resetting the adapter. 969 */ 970 if (status & IM_EPH_INT) { 971 snstop(sc); 972 sninit(sc); 973 } 974 975out: 976 /* 977 * Handled all interrupt sources. 978 */ 979 980 SMC_SELECT_BANK(2); 981 982 /* 983 * Reestablish interrupts from mask which have not been deselected 984 * during this interrupt. Note that the hardware mask, which was set 985 * to 0x00 at the start of this service routine, may have been 986 * updated by one or more of the interrupt handers and we must let 987 * those new interrupts stay enabled here. 988 */ 989 mask |= inb(BASE + INTR_MASK_REG_B); 990 outb(BASE + INTR_MASK_REG_B, mask); 991 sc->intr_mask = mask; 992 993 splx(x); 994} 995 996void 997snread(register struct ifnet *ifp) 998{ 999 struct sn_softc *sc = ifp->if_softc; 1000 struct ether_header *eh; 1001 struct mbuf *m; 1002 short status; 1003 int packet_number; 1004 u_short packet_length; 1005 u_char *data; 1006 1007 SMC_SELECT_BANK(2); 1008#if 0 1009 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1010 1011 if (packet_number & FIFO_REMPTY) { 1012 1013 /* 1014 * we got called , but nothing was on the FIFO 1015 */ 1016 printf("sn: Receive interrupt with nothing on FIFO\n"); 1017 return; 1018 } 1019#endif 1020read_another: 1021 1022 /* 1023 * Start reading from the start of the packet. Since PTR_RCV is set, 1024 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK. 1025 */ 1026 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000); 1027 1028 /* 1029 * First two words are status and packet_length 1030 */ 1031 status = inw(BASE + DATA_REG_W); 1032 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK; 1033 1034 /* 1035 * The packet length contains 3 extra words: status, length, and a 1036 * extra word with the control byte. 1037 */ 1038 packet_length -= 6; 1039 1040 /* 1041 * Account for receive errors and discard. 1042 */ 1043 if (status & RS_ERRORS) { 1044 ++sc->arpcom.ac_if.if_ierrors; 1045 goto out; 1046 } 1047 /* 1048 * A packet is received. 1049 */ 1050 1051 /* 1052 * Adjust for odd-length packet. 1053 */ 1054 if (status & RS_ODDFRAME) 1055 packet_length++; 1056 1057 /* 1058 * Allocate a header mbuf from the kernel. 1059 */ 1060 MGETHDR(m, M_DONTWAIT, MT_DATA); 1061 if (m == NULL) 1062 goto out; 1063 1064 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 1065 m->m_pkthdr.len = m->m_len = packet_length; 1066 1067 /* 1068 * Attach an mbuf cluster 1069 */ 1070 MCLGET(m, M_DONTWAIT); 1071 1072 /* 1073 * Insist on getting a cluster 1074 */ 1075 if ((m->m_flags & M_EXT) == 0) { 1076 m_freem(m); 1077 ++sc->arpcom.ac_if.if_ierrors; 1078 printf("sn: snread() kernel memory allocation problem\n"); 1079 goto out; 1080 } 1081 eh = mtod(m, struct ether_header *); 1082 1083 /* 1084 * Get packet, including link layer address, from interface. 1085 */ 1086 1087 data = (u_char *) eh; 1088 insw(BASE + DATA_REG_W, data, packet_length >> 1); 1089 if (packet_length & 1) { 1090 data += packet_length & ~1; 1091 *data = inb(BASE + DATA_REG_B); 1092 } 1093 ++sc->arpcom.ac_if.if_ipackets; 1094 1095 /* 1096 * Remove link layer addresses and whatnot. 1097 */ 1098 m->m_pkthdr.len = m->m_len = packet_length; 1099 1100 (*ifp->if_input)(ifp, m); 1101 1102out: 1103 1104 /* 1105 * Error or good, tell the card to get rid of this packet Wait for 1106 * the MMU to be un-busy. 1107 */ 1108 SMC_SELECT_BANK(2); 1109 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 1110 ; 1111 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE); 1112 1113 /* 1114 * Check whether another packet is ready 1115 */ 1116 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1117 if (packet_number & FIFO_REMPTY) { 1118 return; 1119 } 1120 goto read_another; 1121} 1122 1123 1124/* 1125 * Handle IOCTLS. This function is completely stolen from if_ep.c 1126 * As with its progenitor, it does not handle hardware address 1127 * changes. 1128 */ 1129static int 1130snioctl(register struct ifnet *ifp, u_long cmd, caddr_t data) 1131{ 1132 struct sn_softc *sc = ifp->if_softc; 1133 int s, error = 0; 1134 1135 s = splimp(); 1136 1137 switch (cmd) { 1138 case SIOCSIFFLAGS: 1139 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) { 1140 ifp->if_flags &= ~IFF_RUNNING; 1141 snstop(sc); 1142 break; 1143 } else { 1144 /* reinitialize card on any parameter change */ 1145 sninit(sc); 1146 break; 1147 } 1148 break; 1149 1150#ifdef notdef 1151 case SIOCGHWADDR: 1152 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data, 1153 sizeof(sc->sc_addr)); 1154 break; 1155#endif 1156 1157 case SIOCADDMULTI: 1158 /* update multicast filter list. */ 1159 sn_setmcast(sc); 1160 error = 0; 1161 break; 1162 case SIOCDELMULTI: 1163 /* update multicast filter list. */ 1164 sn_setmcast(sc); 1165 error = 0; 1166 break; 1167 default: 1168 error = EINVAL; 1169 error = ether_ioctl(ifp, cmd, data); 1170 break; 1171 } 1172 1173 splx(s); 1174 1175 return (error); 1176} 1177 1178void 1179snreset(struct sn_softc *sc) 1180{ 1181 int s; 1182 1183 s = splimp(); 1184 snstop(sc); 1185 sninit(sc); 1186 1187 splx(s); 1188} 1189 1190void 1191snwatchdog(struct ifnet *ifp) 1192{ 1193 int s; 1194 s = splimp(); 1195 sn_intr(ifp->if_softc); 1196 splx(s); 1197} 1198 1199 1200/* 1. zero the interrupt mask 1201 * 2. clear the enable receive flag 1202 * 3. clear the enable xmit flags 1203 */ 1204void 1205snstop(struct sn_softc *sc) 1206{ 1207 1208 struct ifnet *ifp = &sc->arpcom.ac_if; 1209 1210 /* 1211 * Clear interrupt mask; disable all interrupts. 1212 */ 1213 SMC_SELECT_BANK(2); 1214 outb(BASE + INTR_MASK_REG_B, 0x00); 1215 1216 /* 1217 * Disable transmitter and Receiver 1218 */ 1219 SMC_SELECT_BANK(0); 1220 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 1221 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 1222 1223 /* 1224 * Cancel watchdog. 1225 */ 1226 ifp->if_timer = 0; 1227} 1228 1229 1230int 1231sn_activate(device_t dev) 1232{ 1233 struct sn_softc *sc = device_get_softc(dev); 1234 int err; 1235 1236 sc->port_rid = 0; 1237 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid, 1238 0, ~0, SMC_IO_EXTENT, RF_ACTIVE); 1239 if (!sc->port_res) { 1240 if (bootverbose) 1241 device_printf(dev, "Cannot allocate ioport\n"); 1242 return ENOMEM; 1243 } 1244 1245 sc->irq_rid = 0; 1246 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid, 1247 0, ~0, 1, RF_ACTIVE); 1248 if (!sc->irq_res) { 1249 if (bootverbose) 1250 device_printf(dev, "Cannot allocate irq\n"); 1251 sn_deactivate(dev); 1252 return ENOMEM; 1253 } 1254 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc, 1255 &sc->intrhand)) != 0) { 1256 sn_deactivate(dev); 1257 return err; 1258 } 1259 1260 sc->sn_io_addr = rman_get_start(sc->port_res); 1261 return (0); 1262} 1263 1264void 1265sn_deactivate(device_t dev) 1266{ 1267 struct sn_softc *sc = device_get_softc(dev); 1268 1269 if (sc->intrhand) 1270 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 1271 sc->intrhand = 0; 1272 if (sc->port_res) 1273 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 1274 sc->port_res); 1275 sc->port_res = 0; 1276 if (sc->irq_res) 1277 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 1278 sc->irq_res); 1279 sc->irq_res = 0; 1280 return; 1281} 1282 1283/* 1284 * Function: sn_probe( device_t dev, int pccard ) 1285 * 1286 * Purpose: 1287 * Tests to see if a given ioaddr points to an SMC9xxx chip. 1288 * Tries to cause as little damage as possible if it's not a SMC chip. 1289 * Returns a 0 on success 1290 * 1291 * Algorithm: 1292 * (1) see if the high byte of BANK_SELECT is 0x33 1293 * (2) compare the ioaddr with the base register's address 1294 * (3) see if I recognize the chip ID in the appropriate register 1295 * 1296 * 1297 */ 1298int 1299sn_probe(device_t dev, int pccard) 1300{ 1301 struct sn_softc *sc = device_get_softc(dev); 1302 u_int bank; 1303 u_short revision_register; 1304 u_short base_address_register; 1305 u_short ioaddr; 1306 int err; 1307 1308 if ((err = sn_activate(dev)) != 0) 1309 return err; 1310 1311 ioaddr = sc->sn_io_addr; 1312#ifdef SN_DEBUG 1313 device_printf(dev, "ioaddr is 0x%x\n", ioaddr); 1314#endif 1315 /* 1316 * First, see if the high byte is 0x33 1317 */ 1318 bank = inw(ioaddr + BANK_SELECT_REG_W); 1319 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1320#ifdef SN_DEBUG 1321 device_printf(dev, "test1 failed\n"); 1322#endif 1323 goto error; 1324 } 1325 /* 1326 * The above MIGHT indicate a device, but I need to write to further 1327 * test this. Go to bank 0, then test that the register still 1328 * reports the high byte is 0x33. 1329 */ 1330 outw(ioaddr + BANK_SELECT_REG_W, 0x0000); 1331 bank = inw(ioaddr + BANK_SELECT_REG_W); 1332 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1333#ifdef SN_DEBUG 1334 device_printf(dev, "test2 failed\n"); 1335#endif 1336 goto error; 1337 } 1338 /* 1339 * well, we've already written once, so hopefully another time won't 1340 * hurt. This time, I need to switch the bank register to bank 1, so 1341 * I can access the base address register. The contents of the 1342 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected 1343 * to match the I/O port address where the adapter is being probed. 1344 */ 1345 outw(ioaddr + BANK_SELECT_REG_W, 0x0001); 1346 base_address_register = inw(ioaddr + BASE_ADDR_REG_W); 1347 1348 /* 1349 * This test is nonsence on PC-card architecture, so if 1350 * pccard == 1, skip this test. (hosokawa) 1351 */ 1352 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) { 1353 1354 /* 1355 * Well, the base address register didn't match. Must not 1356 * have been a SMC chip after all. 1357 */ 1358#ifdef SN_DEBUG 1359 device_printf(dev, "test3 failed ioaddr = 0x%x, " 1360 "base_address_register = 0x%x\n", ioaddr, 1361 base_address_register >> 3 & 0x3E0); 1362#endif 1363 goto error; 1364 } 1365 1366 /* 1367 * Check if the revision register is something that I recognize. 1368 * These might need to be added to later, as future revisions could 1369 * be added. 1370 */ 1371 outw(ioaddr + BANK_SELECT_REG_W, 0x3); 1372 revision_register = inw(ioaddr + REVISION_REG_W); 1373 if (!chip_ids[(revision_register >> 4) & 0xF]) { 1374 1375 /* 1376 * I don't regonize this chip, so... 1377 */ 1378#ifdef SN_DEBUG 1379 device_printf(dev, "test4 failed\n"); 1380#endif 1381 goto error; 1382 } 1383 1384 /* 1385 * at this point I'll assume that the chip is an SMC9xxx. It might be 1386 * prudent to check a listing of MAC addresses against the hardware 1387 * address, or do some other tests. 1388 */ 1389 sn_deactivate(dev); 1390 return 0; 1391 error: 1392 sn_deactivate(dev); 1393 return ENXIO; 1394} 1395 1396#define MCFSZ 8 1397 1398static void 1399sn_setmcast(struct sn_softc *sc) 1400{ 1401 struct ifnet *ifp = (struct ifnet *)sc; 1402 int flags; 1403 1404 /* 1405 * Set the receiver filter. We want receive enabled and auto strip 1406 * of CRC from received packet. If we are promiscuous then set that 1407 * bit too. 1408 */ 1409 flags = RCR_ENABLE | RCR_STRIP_CRC; 1410 1411 if (ifp->if_flags & IFF_PROMISC) { 1412 flags |= RCR_PROMISC | RCR_ALMUL; 1413 } else if (ifp->if_flags & IFF_ALLMULTI) { 1414 flags |= RCR_ALMUL; 1415 } else { 1416 u_char mcf[MCFSZ]; 1417 if (sn_getmcf(&sc->arpcom, mcf)) { 1418 /* set filter */ 1419 SMC_SELECT_BANK(3); 1420 outw(BASE + MULTICAST1_REG_W, 1421 ((u_short)mcf[1] << 8) | mcf[0]); 1422 outw(BASE + MULTICAST2_REG_W, 1423 ((u_short)mcf[3] << 8) | mcf[2]); 1424 outw(BASE + MULTICAST3_REG_W, 1425 ((u_short)mcf[5] << 8) | mcf[4]); 1426 outw(BASE + MULTICAST4_REG_W, 1427 ((u_short)mcf[7] << 8) | mcf[6]); 1428 } else { 1429 flags |= RCR_ALMUL; 1430 } 1431 } 1432 SMC_SELECT_BANK(0); 1433 outw(BASE + RECV_CONTROL_REG_W, flags); 1434} 1435 1436static int 1437sn_getmcf(struct arpcom *ac, u_char *mcf) 1438{ 1439 int i; 1440 register u_int index, index2; 1441 register u_char *af = (u_char *) mcf; 1442 struct ifmultiaddr *ifma; 1443 1444 bzero(mcf, MCFSZ); 1445 1446 TAILQ_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) { 1447 if (ifma->ifma_addr->sa_family != AF_LINK) 1448 return 0; 1449 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f; 1450 index2 = 0; 1451 for (i = 0; i < 6; i++) { 1452 index2 <<= 1; 1453 index2 |= (index & 0x01); 1454 index >>= 1; 1455 } 1456 af[index2 >> 3] |= 1 << (index2 & 7); 1457 } 1458 return 1; /* use multicast filter */ 1459} 1460 1461static u_int 1462smc_crc(u_char *s) 1463{ 1464 int perByte; 1465 int perBit; 1466 const u_int poly = 0xedb88320; 1467 u_int v = 0xffffffff; 1468 u_char c; 1469 1470 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) { 1471 c = s[perByte]; 1472 for (perBit = 0; perBit < 8; perBit++) { 1473 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0); 1474 c >>= 1; 1475 } 1476 } 1477 return v; 1478} 1479