1293734Sarybchik/*- 2301388Sarybchik * Copyright (c) 2015-2016 Solarflare Communications Inc. 3293734Sarybchik * All rights reserved. 4293734Sarybchik * 5293734Sarybchik * Redistribution and use in source and binary forms, with or without 6293734Sarybchik * modification, are permitted provided that the following conditions are met: 7293734Sarybchik * 8293734Sarybchik * 1. Redistributions of source code must retain the above copyright notice, 9293734Sarybchik * this list of conditions and the following disclaimer. 10293734Sarybchik * 2. Redistributions in binary form must reproduce the above copyright notice, 11293734Sarybchik * this list of conditions and the following disclaimer in the documentation 12293734Sarybchik * and/or other materials provided with the distribution. 13293734Sarybchik * 14293734Sarybchik * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15293734Sarybchik * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16293734Sarybchik * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17293734Sarybchik * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18293734Sarybchik * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19293734Sarybchik * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20293734Sarybchik * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21293734Sarybchik * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22293734Sarybchik * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23293734Sarybchik * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24293734Sarybchik * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25293734Sarybchik * 26293734Sarybchik * The views and conclusions contained in the software and documentation are 27293734Sarybchik * those of the authors and should not be interpreted as representing official 28293734Sarybchik * policies, either expressed or implied, of the FreeBSD Project. 29293734Sarybchik */ 30293734Sarybchik 31293734Sarybchik#include <sys/cdefs.h> 32293734Sarybchik__FBSDID("$FreeBSD: stable/10/sys/dev/sfxge/common/medford_nic.c 342516 2018-12-26 10:25:01Z arybchik $"); 33293734Sarybchik 34293734Sarybchik#include "efx.h" 35293734Sarybchik#include "efx_impl.h" 36293734Sarybchik 37301329Sarybchik 38293734Sarybchik#if EFSYS_OPT_MEDFORD 39293734Sarybchik 40294396Sarybchikstatic __checkReturn efx_rc_t 41294396Sarybchikefx_mcdi_get_rxdp_config( 42294396Sarybchik __in efx_nic_t *enp, 43294396Sarybchik __out uint32_t *end_paddingp) 44294396Sarybchik{ 45294396Sarybchik efx_mcdi_req_t req; 46342516Sarybchik EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_RXDP_CONFIG_IN_LEN, 47342516Sarybchik MC_CMD_GET_RXDP_CONFIG_OUT_LEN); 48294396Sarybchik uint32_t end_padding; 49294396Sarybchik efx_rc_t rc; 50294396Sarybchik 51294396Sarybchik req.emr_cmd = MC_CMD_GET_RXDP_CONFIG; 52294396Sarybchik req.emr_in_buf = payload; 53294396Sarybchik req.emr_in_length = MC_CMD_GET_RXDP_CONFIG_IN_LEN; 54294396Sarybchik req.emr_out_buf = payload; 55294396Sarybchik req.emr_out_length = MC_CMD_GET_RXDP_CONFIG_OUT_LEN; 56294396Sarybchik 57294396Sarybchik efx_mcdi_execute(enp, &req); 58294396Sarybchik if (req.emr_rc != 0) { 59294396Sarybchik rc = req.emr_rc; 60294396Sarybchik goto fail1; 61294396Sarybchik } 62294396Sarybchik 63294396Sarybchik if (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, 64294396Sarybchik GET_RXDP_CONFIG_OUT_PAD_HOST_DMA) == 0) { 65294396Sarybchik /* RX DMA end padding is disabled */ 66294396Sarybchik end_padding = 0; 67294396Sarybchik } else { 68311063Sarybchik switch (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, 69294396Sarybchik GET_RXDP_CONFIG_OUT_PAD_HOST_LEN)) { 70294396Sarybchik case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64: 71294396Sarybchik end_padding = 64; 72294396Sarybchik break; 73294396Sarybchik case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128: 74294396Sarybchik end_padding = 128; 75294396Sarybchik break; 76294396Sarybchik case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256: 77294396Sarybchik end_padding = 256; 78294396Sarybchik break; 79294396Sarybchik default: 80294396Sarybchik rc = ENOTSUP; 81294396Sarybchik goto fail2; 82294396Sarybchik } 83294396Sarybchik } 84294396Sarybchik 85294396Sarybchik *end_paddingp = end_padding; 86294396Sarybchik 87294396Sarybchik return (0); 88294396Sarybchik 89294396Sarybchikfail2: 90294396Sarybchik EFSYS_PROBE(fail2); 91294396Sarybchikfail1: 92294396Sarybchik EFSYS_PROBE1(fail1, efx_rc_t, rc); 93294396Sarybchik 94294396Sarybchik return (rc); 95294396Sarybchik} 96294396Sarybchik 97301365Sarybchikstatic __checkReturn efx_rc_t 98301365Sarybchikmedford_nic_get_required_pcie_bandwidth( 99301365Sarybchik __in efx_nic_t *enp, 100301365Sarybchik __out uint32_t *bandwidth_mbpsp) 101301365Sarybchik{ 102301365Sarybchik uint32_t port_modes; 103301365Sarybchik uint32_t current_mode; 104301365Sarybchik uint32_t bandwidth; 105301365Sarybchik efx_rc_t rc; 106301365Sarybchik 107301365Sarybchik if ((rc = efx_mcdi_get_port_modes(enp, &port_modes, 108301365Sarybchik ¤t_mode)) != 0) { 109301365Sarybchik /* No port mode info available. */ 110301365Sarybchik bandwidth = 0; 111301365Sarybchik goto out; 112301365Sarybchik } 113301365Sarybchik 114301365Sarybchik if ((rc = ef10_nic_get_port_mode_bandwidth(current_mode, 115301365Sarybchik &bandwidth)) != 0) 116301365Sarybchik goto fail1; 117301365Sarybchik 118301365Sarybchikout: 119301365Sarybchik *bandwidth_mbpsp = bandwidth; 120301365Sarybchik 121301365Sarybchik return (0); 122301365Sarybchik 123301365Sarybchikfail1: 124301365Sarybchik EFSYS_PROBE1(fail1, efx_rc_t, rc); 125301365Sarybchik 126301365Sarybchik return (rc); 127301365Sarybchik} 128301365Sarybchik 129294377Sarybchik __checkReturn efx_rc_t 130294377Sarybchikmedford_board_cfg( 131294377Sarybchik __in efx_nic_t *enp) 132294377Sarybchik{ 133294377Sarybchik efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 134294377Sarybchik efx_nic_cfg_t *encp = &(enp->en_nic_cfg); 135294377Sarybchik uint8_t mac_addr[6] = { 0 }; 136294377Sarybchik uint32_t board_type = 0; 137294388Sarybchik ef10_link_state_t els; 138294377Sarybchik efx_port_t *epp = &(enp->en_port); 139294377Sarybchik uint32_t port; 140294377Sarybchik uint32_t pf; 141294377Sarybchik uint32_t vf; 142294377Sarybchik uint32_t mask; 143301381Sarybchik uint32_t sysclk, dpcpu_clk; 144294377Sarybchik uint32_t base, nvec; 145294396Sarybchik uint32_t end_padding; 146301365Sarybchik uint32_t bandwidth; 147294377Sarybchik efx_rc_t rc; 148293734Sarybchik 149294377Sarybchik /* 150294377Sarybchik * FIXME: Likely to be incomplete and incorrect. 151294377Sarybchik * Parts of this should be shared with Huntington. 152294377Sarybchik */ 153293734Sarybchik 154294377Sarybchik if ((rc = efx_mcdi_get_port_assignment(enp, &port)) != 0) 155294377Sarybchik goto fail1; 156293734Sarybchik 157294377Sarybchik /* 158294377Sarybchik * NOTE: The MCDI protocol numbers ports from zero. 159294377Sarybchik * The common code MCDI interface numbers ports from one. 160294377Sarybchik */ 161294377Sarybchik emip->emi_port = port + 1; 162294377Sarybchik 163294377Sarybchik if ((rc = ef10_external_port_mapping(enp, port, 164294377Sarybchik &encp->enc_external_port)) != 0) 165294377Sarybchik goto fail2; 166294377Sarybchik 167294377Sarybchik /* 168294377Sarybchik * Get PCIe function number from firmware (used for 169294377Sarybchik * per-function privilege and dynamic config info). 170294377Sarybchik * - PCIe PF: pf = PF number, vf = 0xffff. 171294377Sarybchik * - PCIe VF: pf = parent PF, vf = VF number. 172294377Sarybchik */ 173294377Sarybchik if ((rc = efx_mcdi_get_function_info(enp, &pf, &vf)) != 0) 174294377Sarybchik goto fail3; 175294377Sarybchik 176294377Sarybchik encp->enc_pf = pf; 177294377Sarybchik encp->enc_vf = vf; 178294377Sarybchik 179294377Sarybchik /* MAC address for this function */ 180294377Sarybchik if (EFX_PCI_FUNCTION_IS_PF(encp)) { 181294377Sarybchik rc = efx_mcdi_get_mac_address_pf(enp, mac_addr); 182301387Sarybchik#if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 183301387Sarybchik /* Disable static config checking for Medford NICs, ONLY 184301387Sarybchik * for manufacturing test and setup at the factory, to 185301387Sarybchik * allow the static config to be installed. 186301387Sarybchik */ 187301387Sarybchik#else /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */ 188294377Sarybchik if ((rc == 0) && (mac_addr[0] & 0x02)) { 189294377Sarybchik /* 190294377Sarybchik * If the static config does not include a global MAC 191294377Sarybchik * address pool then the board may return a locally 192294377Sarybchik * administered MAC address (this should only happen on 193294377Sarybchik * incorrectly programmed boards). 194294377Sarybchik */ 195294377Sarybchik rc = EINVAL; 196294377Sarybchik } 197301387Sarybchik#endif /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */ 198294377Sarybchik } else { 199294377Sarybchik rc = efx_mcdi_get_mac_address_vf(enp, mac_addr); 200294377Sarybchik } 201294377Sarybchik if (rc != 0) 202294377Sarybchik goto fail4; 203294377Sarybchik 204294377Sarybchik EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr); 205294377Sarybchik 206294377Sarybchik /* Board configuration */ 207294377Sarybchik rc = efx_mcdi_get_board_cfg(enp, &board_type, NULL, NULL); 208294377Sarybchik if (rc != 0) { 209294377Sarybchik /* Unprivileged functions may not be able to read board cfg */ 210294377Sarybchik if (rc == EACCES) 211294377Sarybchik board_type = 0; 212294377Sarybchik else 213294377Sarybchik goto fail5; 214294377Sarybchik } 215294377Sarybchik 216294377Sarybchik encp->enc_board_type = board_type; 217294377Sarybchik encp->enc_clk_mult = 1; /* not used for Medford */ 218294377Sarybchik 219294377Sarybchik /* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */ 220294377Sarybchik if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0) 221294377Sarybchik goto fail6; 222294377Sarybchik 223294377Sarybchik /* Obtain the default PHY advertised capabilities */ 224294394Sarybchik if ((rc = ef10_phy_get_link(enp, &els)) != 0) 225294377Sarybchik goto fail7; 226294388Sarybchik epp->ep_default_adv_cap_mask = els.els_adv_cap_mask; 227294388Sarybchik epp->ep_adv_cap_mask = els.els_adv_cap_mask; 228294377Sarybchik 229301983Sarybchik /* 230301983Sarybchik * Enable firmware workarounds for hardware errata. 231301983Sarybchik * Expected responses are: 232301983Sarybchik * - 0 (zero): 233301983Sarybchik * Success: workaround enabled or disabled as requested. 234301983Sarybchik * - MC_CMD_ERR_ENOSYS (reported as ENOTSUP): 235301983Sarybchik * Firmware does not support the MC_CMD_WORKAROUND request. 236301983Sarybchik * (assume that the workaround is not supported). 237301983Sarybchik * - MC_CMD_ERR_ENOENT (reported as ENOENT): 238301983Sarybchik * Firmware does not support the requested workaround. 239301983Sarybchik * - MC_CMD_ERR_EPERM (reported as EACCES): 240301983Sarybchik * Unprivileged function cannot enable/disable workarounds. 241301983Sarybchik * 242301983Sarybchik * See efx_mcdi_request_errcode() for MCDI error translations. 243301983Sarybchik */ 244301983Sarybchik 245301983Sarybchik 246294377Sarybchik if (EFX_PCI_FUNCTION_IS_VF(encp)) { 247294377Sarybchik /* 248294377Sarybchik * Interrupt testing does not work for VFs. See bug50084. 249294377Sarybchik * FIXME: Does this still apply to Medford? 250294377Sarybchik */ 251294377Sarybchik encp->enc_bug41750_workaround = B_TRUE; 252294377Sarybchik } 253294377Sarybchik 254294377Sarybchik /* Chained multicast is always enabled on Medford */ 255294377Sarybchik encp->enc_bug26807_workaround = B_TRUE; 256294377Sarybchik 257301983Sarybchik /* 258301983Sarybchik * If the bug61265 workaround is enabled, then interrupt holdoff timers 259301983Sarybchik * cannot be controlled by timer table writes, so MCDI must be used 260301983Sarybchik * (timer table writes can still be used for wakeup timers). 261301983Sarybchik */ 262301983Sarybchik rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG61265, B_TRUE, 263301983Sarybchik NULL); 264301983Sarybchik if ((rc == 0) || (rc == EACCES)) 265301983Sarybchik encp->enc_bug61265_workaround = B_TRUE; 266301983Sarybchik else if ((rc == ENOTSUP) || (rc == ENOENT)) 267301983Sarybchik encp->enc_bug61265_workaround = B_FALSE; 268301983Sarybchik else 269301983Sarybchik goto fail8; 270301983Sarybchik 271301381Sarybchik /* Get clock frequencies (in MHz). */ 272301381Sarybchik if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0) 273301983Sarybchik goto fail9; 274294377Sarybchik 275294377Sarybchik /* 276301381Sarybchik * The Medford timer quantum is 1536 dpcpu_clk cycles, documented for 277301381Sarybchik * the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units. 278294377Sarybchik */ 279301381Sarybchik encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */ 280294377Sarybchik encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns << 281294377Sarybchik FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000; 282294377Sarybchik 283294377Sarybchik /* Check capabilities of running datapath firmware */ 284294377Sarybchik if ((rc = ef10_get_datapath_caps(enp)) != 0) 285311056Sarybchik goto fail10; 286294377Sarybchik 287294377Sarybchik /* Alignment for receive packet DMA buffers */ 288294377Sarybchik encp->enc_rx_buf_align_start = 1; 289294377Sarybchik 290294396Sarybchik /* Get the RX DMA end padding alignment configuration */ 291311072Sarybchik if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) { 292311072Sarybchik if (rc != EACCES) 293311072Sarybchik goto fail11; 294311072Sarybchik 295311072Sarybchik /* Assume largest tail padding size supported by hardware */ 296311072Sarybchik end_padding = 256; 297311072Sarybchik } 298294396Sarybchik encp->enc_rx_buf_align_end = end_padding; 299294377Sarybchik 300294377Sarybchik /* Alignment for WPTR updates */ 301294377Sarybchik encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN; 302294377Sarybchik 303311768Sarybchik encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT); 304311768Sarybchik /* No boundary crossing limits */ 305311768Sarybchik encp->enc_tx_dma_desc_boundary = 0; 306311768Sarybchik 307294377Sarybchik /* 308294377Sarybchik * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use 309294377Sarybchik * MC_CMD_GET_RESOURCE_LIMITS here as that reports the available 310294377Sarybchik * resources (allocated to this PCIe function), which is zero until 311294377Sarybchik * after we have allocated VIs. 312294377Sarybchik */ 313294377Sarybchik encp->enc_evq_limit = 1024; 314294377Sarybchik encp->enc_rxq_limit = EFX_RXQ_LIMIT_TARGET; 315294377Sarybchik encp->enc_txq_limit = EFX_TXQ_LIMIT_TARGET; 316294377Sarybchik 317342480Sarybchik /* 318342480Sarybchik * The maximum supported transmit queue size is 2048. TXQs with 4096 319342480Sarybchik * descriptors are not supported as the top bit is used for vfifo 320342480Sarybchik * stuffing. 321342480Sarybchik */ 322342480Sarybchik encp->enc_txq_max_ndescs = 2048; 323342480Sarybchik 324294377Sarybchik encp->enc_buftbl_limit = 0xFFFFFFFF; 325294377Sarybchik 326294377Sarybchik encp->enc_piobuf_limit = MEDFORD_PIOBUF_NBUFS; 327294377Sarybchik encp->enc_piobuf_size = MEDFORD_PIOBUF_SIZE; 328294377Sarybchik encp->enc_piobuf_min_alloc_size = MEDFORD_MIN_PIO_ALLOC_SIZE; 329294377Sarybchik 330294377Sarybchik /* 331294377Sarybchik * Get the current privilege mask. Note that this may be modified 332294377Sarybchik * dynamically, so this value is informational only. DO NOT use 333294377Sarybchik * the privilege mask to check for sufficient privileges, as that 334294377Sarybchik * can result in time-of-check/time-of-use bugs. 335294377Sarybchik */ 336294392Sarybchik if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0) 337301983Sarybchik goto fail12; 338294377Sarybchik encp->enc_privilege_mask = mask; 339294377Sarybchik 340294377Sarybchik /* Get interrupt vector limits */ 341294377Sarybchik if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) { 342294377Sarybchik if (EFX_PCI_FUNCTION_IS_PF(encp)) 343301983Sarybchik goto fail13; 344294377Sarybchik 345294377Sarybchik /* Ignore error (cannot query vector limits from a VF). */ 346294377Sarybchik base = 0; 347294377Sarybchik nvec = 1024; 348294377Sarybchik } 349294377Sarybchik encp->enc_intr_vec_base = base; 350294377Sarybchik encp->enc_intr_limit = nvec; 351294377Sarybchik 352294377Sarybchik /* 353294377Sarybchik * Maximum number of bytes into the frame the TCP header can start for 354294377Sarybchik * firmware assisted TSO to work. 355294377Sarybchik */ 356294377Sarybchik encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT; 357294377Sarybchik 358294391Sarybchik /* 359294391Sarybchik * Medford stores a single global copy of VPD, not per-PF as on 360294391Sarybchik * Huntington. 361294391Sarybchik */ 362294391Sarybchik encp->enc_vpd_is_global = B_TRUE; 363294391Sarybchik 364301365Sarybchik rc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth); 365301365Sarybchik if (rc != 0) 366301983Sarybchik goto fail14; 367301365Sarybchik encp->enc_required_pcie_bandwidth_mbps = bandwidth; 368301365Sarybchik encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3; 369301365Sarybchik 370294377Sarybchik return (0); 371294377Sarybchik 372301983Sarybchikfail14: 373301983Sarybchik EFSYS_PROBE(fail14); 374301365Sarybchikfail13: 375301365Sarybchik EFSYS_PROBE(fail13); 376294396Sarybchikfail12: 377294396Sarybchik EFSYS_PROBE(fail12); 378294377Sarybchikfail11: 379294377Sarybchik EFSYS_PROBE(fail11); 380294377Sarybchikfail10: 381294377Sarybchik EFSYS_PROBE(fail10); 382294377Sarybchikfail9: 383294377Sarybchik EFSYS_PROBE(fail9); 384294377Sarybchikfail8: 385294377Sarybchik EFSYS_PROBE(fail8); 386294377Sarybchikfail7: 387294377Sarybchik EFSYS_PROBE(fail7); 388294377Sarybchikfail6: 389294377Sarybchik EFSYS_PROBE(fail6); 390294377Sarybchikfail5: 391294377Sarybchik EFSYS_PROBE(fail5); 392294377Sarybchikfail4: 393294377Sarybchik EFSYS_PROBE(fail4); 394294377Sarybchikfail3: 395294377Sarybchik EFSYS_PROBE(fail3); 396294377Sarybchikfail2: 397294377Sarybchik EFSYS_PROBE(fail2); 398294377Sarybchikfail1: 399294377Sarybchik EFSYS_PROBE1(fail1, efx_rc_t, rc); 400294377Sarybchik 401294377Sarybchik return (rc); 402294377Sarybchik} 403294377Sarybchik 404293734Sarybchik#endif /* EFSYS_OPT_MEDFORD */ 405