ql_os.c revision 284982
1/* 2 * Copyright (c) 2013-2016 Qlogic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28/* 29 * File: ql_os.c 30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: stable/10/sys/dev/qlxgbe/ql_os.c 284982 2015-06-30 20:59:07Z davidcs $"); 35 36 37#include "ql_os.h" 38#include "ql_hw.h" 39#include "ql_def.h" 40#include "ql_inline.h" 41#include "ql_ver.h" 42#include "ql_glbl.h" 43#include "ql_dbg.h" 44#include <sys/smp.h> 45 46/* 47 * Some PCI Configuration Space Related Defines 48 */ 49 50#ifndef PCI_VENDOR_QLOGIC 51#define PCI_VENDOR_QLOGIC 0x1077 52#endif 53 54#ifndef PCI_PRODUCT_QLOGIC_ISP8030 55#define PCI_PRODUCT_QLOGIC_ISP8030 0x8030 56#endif 57 58#define PCI_QLOGIC_ISP8030 \ 59 ((PCI_PRODUCT_QLOGIC_ISP8030 << 16) | PCI_VENDOR_QLOGIC) 60 61/* 62 * static functions 63 */ 64static int qla_alloc_parent_dma_tag(qla_host_t *ha); 65static void qla_free_parent_dma_tag(qla_host_t *ha); 66static int qla_alloc_xmt_bufs(qla_host_t *ha); 67static void qla_free_xmt_bufs(qla_host_t *ha); 68static int qla_alloc_rcv_bufs(qla_host_t *ha); 69static void qla_free_rcv_bufs(qla_host_t *ha); 70static void qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb); 71 72static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74static int qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS); 75static void qla_release(qla_host_t *ha); 76static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 77 int error); 78static void qla_stop(qla_host_t *ha); 79static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 80static void qla_tx_done(void *context, int pending); 81static void qla_get_peer(qla_host_t *ha); 82static void qla_error_recovery(void *context, int pending); 83static void qla_async_event(void *context, int pending); 84 85/* 86 * Hooks to the Operating Systems 87 */ 88static int qla_pci_probe (device_t); 89static int qla_pci_attach (device_t); 90static int qla_pci_detach (device_t); 91 92static void qla_init(void *arg); 93static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 94static int qla_media_change(struct ifnet *ifp); 95static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 96static void qla_start(struct ifnet *ifp); 97 98static device_method_t qla_pci_methods[] = { 99 /* Device interface */ 100 DEVMETHOD(device_probe, qla_pci_probe), 101 DEVMETHOD(device_attach, qla_pci_attach), 102 DEVMETHOD(device_detach, qla_pci_detach), 103 { 0, 0 } 104}; 105 106static driver_t qla_pci_driver = { 107 "ql", qla_pci_methods, sizeof (qla_host_t), 108}; 109 110static devclass_t qla83xx_devclass; 111 112DRIVER_MODULE(qla83xx, pci, qla_pci_driver, qla83xx_devclass, 0, 0); 113 114MODULE_DEPEND(qla83xx, pci, 1, 1, 1); 115MODULE_DEPEND(qla83xx, ether, 1, 1, 1); 116 117MALLOC_DEFINE(M_QLA83XXBUF, "qla83xxbuf", "Buffers for qla83xx driver"); 118 119#define QL_STD_REPLENISH_THRES 0 120#define QL_JUMBO_REPLENISH_THRES 32 121 122 123static char dev_str[64]; 124static char ver_str[64]; 125 126/* 127 * Name: qla_pci_probe 128 * Function: Validate the PCI device to be a QLA80XX device 129 */ 130static int 131qla_pci_probe(device_t dev) 132{ 133 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 134 case PCI_QLOGIC_ISP8030: 135 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 136 "Qlogic ISP 83xx PCI CNA Adapter-Ethernet Function", 137 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 138 QLA_VERSION_BUILD); 139 snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d", 140 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 141 QLA_VERSION_BUILD); 142 device_set_desc(dev, dev_str); 143 break; 144 default: 145 return (ENXIO); 146 } 147 148 if (bootverbose) 149 printf("%s: %s\n ", __func__, dev_str); 150 151 return (BUS_PROBE_DEFAULT); 152} 153 154static void 155qla_add_sysctls(qla_host_t *ha) 156{ 157 device_t dev = ha->pci_dev; 158 159 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 160 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 161 OID_AUTO, "version", CTLFLAG_RD, 162 ver_str, 0, "Driver Version"); 163 164 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 165 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 166 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW, 167 (void *)ha, 0, 168 qla_sysctl_get_stats, "I", "Statistics"); 169 170 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 171 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 172 OID_AUTO, "fw_version", CTLFLAG_RD, 173 ha->fw_ver_str, 0, "firmware version"); 174 175 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 176 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 177 OID_AUTO, "link_status", CTLTYPE_INT | CTLFLAG_RW, 178 (void *)ha, 0, 179 qla_sysctl_get_link_status, "I", "Link Status"); 180 181 ha->dbg_level = 0; 182 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 183 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 184 OID_AUTO, "debug", CTLFLAG_RW, 185 &ha->dbg_level, ha->dbg_level, "Debug Level"); 186 187 ha->std_replenish = QL_STD_REPLENISH_THRES; 188 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 189 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 190 OID_AUTO, "std_replenish", CTLFLAG_RW, 191 &ha->std_replenish, ha->std_replenish, 192 "Threshold for Replenishing Standard Frames"); 193 194 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 195 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 196 OID_AUTO, "ipv4_lro", 197 CTLFLAG_RD, &ha->ipv4_lro, 198 "number of ipv4 lro completions"); 199 200 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 201 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 202 OID_AUTO, "ipv6_lro", 203 CTLFLAG_RD, &ha->ipv6_lro, 204 "number of ipv6 lro completions"); 205 206 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 207 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 208 OID_AUTO, "tx_tso_frames", 209 CTLFLAG_RD, &ha->tx_tso_frames, 210 "number of Tx TSO Frames"); 211 212 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 213 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 214 OID_AUTO, "hw_vlan_tx_frames", 215 CTLFLAG_RD, &ha->hw_vlan_tx_frames, 216 "number of Tx VLAN Frames"); 217 218 return; 219} 220 221static void 222qla_watchdog(void *arg) 223{ 224 qla_host_t *ha = arg; 225 qla_hw_t *hw; 226 struct ifnet *ifp; 227 uint32_t i; 228 qla_hw_tx_cntxt_t *hw_tx_cntxt; 229 230 hw = &ha->hw; 231 ifp = ha->ifp; 232 233 if (ha->flags.qla_watchdog_exit) { 234 ha->qla_watchdog_exited = 1; 235 return; 236 } 237 ha->qla_watchdog_exited = 0; 238 239 if (!ha->flags.qla_watchdog_pause) { 240 if (ql_hw_check_health(ha) || ha->qla_initiate_recovery || 241 (ha->msg_from_peer == QL_PEER_MSG_RESET)) { 242 ha->qla_watchdog_paused = 1; 243 ha->flags.qla_watchdog_pause = 1; 244 ha->qla_initiate_recovery = 0; 245 ha->err_inject = 0; 246 taskqueue_enqueue(ha->err_tq, &ha->err_task); 247 } else { 248 249 if (ha->async_event) { 250 ha->async_event = 0; 251 taskqueue_enqueue(ha->async_event_tq, 252 &ha->async_event_task); 253 } 254 255 for (i = 0; i < ha->hw.num_tx_rings; i++) { 256 hw_tx_cntxt = &hw->tx_cntxt[i]; 257 if (qla_le32_to_host(*(hw_tx_cntxt->tx_cons)) != 258 hw_tx_cntxt->txr_comp) { 259 taskqueue_enqueue(ha->tx_tq, 260 &ha->tx_task); 261 break; 262 } 263 } 264 265 if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 266 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 267 } 268 ha->qla_watchdog_paused = 0; 269 } 270 271 } else { 272 ha->qla_watchdog_paused = 1; 273 } 274 275 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000; 276 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 277 qla_watchdog, ha); 278} 279 280/* 281 * Name: qla_pci_attach 282 * Function: attaches the device to the operating system 283 */ 284static int 285qla_pci_attach(device_t dev) 286{ 287 qla_host_t *ha = NULL; 288 uint32_t rsrc_len; 289 int i; 290 uint32_t num_rcvq = 0; 291 292 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 293 294 if ((ha = device_get_softc(dev)) == NULL) { 295 device_printf(dev, "cannot get softc\n"); 296 return (ENOMEM); 297 } 298 299 memset(ha, 0, sizeof (qla_host_t)); 300 301 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8030) { 302 device_printf(dev, "device is not ISP8030\n"); 303 return (ENXIO); 304 } 305 306 ha->pci_func = pci_get_function(dev); 307 308 ha->pci_dev = dev; 309 310 pci_enable_busmaster(dev); 311 312 ha->reg_rid = PCIR_BAR(0); 313 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 314 RF_ACTIVE); 315 316 if (ha->pci_reg == NULL) { 317 device_printf(dev, "unable to map any ports\n"); 318 goto qla_pci_attach_err; 319 } 320 321 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 322 ha->reg_rid); 323 324 mtx_init(&ha->hw_lock, "qla83xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 325 326 mtx_init(&ha->tx_lock, "qla83xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 327 328 qla_add_sysctls(ha); 329 ql_hw_add_sysctls(ha); 330 331 ha->flags.lock_init = 1; 332 333 ha->reg_rid1 = PCIR_BAR(2); 334 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 335 &ha->reg_rid1, RF_ACTIVE); 336 337 ha->msix_count = pci_msix_count(dev); 338 339 if (ha->msix_count < (ha->hw.num_sds_rings + 1)) { 340 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 341 ha->msix_count); 342 goto qla_pci_attach_err; 343 } 344 345 QL_DPRINT2(ha, (dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 346 " msix_count 0x%x pci_reg %p\n", __func__, ha, 347 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 348 349 /* initialize hardware */ 350 if (ql_init_hw(ha)) { 351 device_printf(dev, "%s: ql_init_hw failed\n", __func__); 352 goto qla_pci_attach_err; 353 } 354 355 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 356 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 357 ha->fw_ver_build); 358 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 359 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 360 ha->fw_ver_build); 361 362 if (qla_get_nic_partition(ha, NULL, &num_rcvq)) { 363 device_printf(dev, "%s: qla_get_nic_partition failed\n", 364 __func__); 365 goto qla_pci_attach_err; 366 } 367 device_printf(dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 368 " msix_count 0x%x pci_reg %p num_rcvq = %d\n", __func__, ha, 369 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg, num_rcvq); 370 371 372#ifdef QL_ENABLE_ISCSI_TLV 373 if ((ha->msix_count < 64) || (num_rcvq != 32)) { 374 ha->hw.num_sds_rings = 15; 375 ha->hw.num_tx_rings = 32; 376 } 377#endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 378 ha->hw.num_rds_rings = ha->hw.num_sds_rings; 379 380 ha->msix_count = ha->hw.num_sds_rings + 1; 381 382 if (pci_alloc_msix(dev, &ha->msix_count)) { 383 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 384 ha->msix_count); 385 ha->msix_count = 0; 386 goto qla_pci_attach_err; 387 } 388 389 ha->mbx_irq_rid = 1; 390 ha->mbx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 391 &ha->mbx_irq_rid, 392 (RF_ACTIVE | RF_SHAREABLE)); 393 if (ha->mbx_irq == NULL) { 394 device_printf(dev, "could not allocate mbx interrupt\n"); 395 goto qla_pci_attach_err; 396 } 397 if (bus_setup_intr(dev, ha->mbx_irq, (INTR_TYPE_NET | INTR_MPSAFE), 398 NULL, ql_mbx_isr, ha, &ha->mbx_handle)) { 399 device_printf(dev, "could not setup mbx interrupt\n"); 400 goto qla_pci_attach_err; 401 } 402 403 404 for (i = 0; i < ha->hw.num_sds_rings; i++) { 405 ha->irq_vec[i].sds_idx = i; 406 ha->irq_vec[i].ha = ha; 407 ha->irq_vec[i].irq_rid = 2 + i; 408 409 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 410 &ha->irq_vec[i].irq_rid, 411 (RF_ACTIVE | RF_SHAREABLE)); 412 413 if (ha->irq_vec[i].irq == NULL) { 414 device_printf(dev, "could not allocate interrupt\n"); 415 goto qla_pci_attach_err; 416 } 417 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 418 (INTR_TYPE_NET | INTR_MPSAFE), 419 NULL, ql_isr, &ha->irq_vec[i], 420 &ha->irq_vec[i].handle)) { 421 device_printf(dev, "could not setup interrupt\n"); 422 goto qla_pci_attach_err; 423 } 424 } 425 426 printf("%s: mp__ncpus %d sds %d rds %d msi-x %d\n", __func__, mp_ncpus, 427 ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count); 428 429 ql_read_mac_addr(ha); 430 431 /* allocate parent dma tag */ 432 if (qla_alloc_parent_dma_tag(ha)) { 433 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 434 __func__); 435 goto qla_pci_attach_err; 436 } 437 438 /* alloc all dma buffers */ 439 if (ql_alloc_dma(ha)) { 440 device_printf(dev, "%s: ql_alloc_dma failed\n", __func__); 441 goto qla_pci_attach_err; 442 } 443 qla_get_peer(ha); 444 445 /* create the o.s ethernet interface */ 446 qla_init_ifnet(dev, ha); 447 448 ha->flags.qla_watchdog_active = 1; 449 ha->flags.qla_watchdog_pause = 1; 450 451 452 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 453 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 454 taskqueue_thread_enqueue, &ha->tx_tq); 455 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 456 device_get_nameunit(ha->pci_dev)); 457 458 callout_init(&ha->tx_callout, TRUE); 459 ha->flags.qla_callout_init = 1; 460 461 /* create ioctl device interface */ 462 if (ql_make_cdev(ha)) { 463 device_printf(dev, "%s: ql_make_cdev failed\n", __func__); 464 goto qla_pci_attach_err; 465 } 466 467 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 468 qla_watchdog, ha); 469 470 TASK_INIT(&ha->err_task, 0, qla_error_recovery, ha); 471 ha->err_tq = taskqueue_create_fast("qla_errq", M_NOWAIT, 472 taskqueue_thread_enqueue, &ha->err_tq); 473 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq", 474 device_get_nameunit(ha->pci_dev)); 475 476 TASK_INIT(&ha->async_event_task, 0, qla_async_event, ha); 477 ha->async_event_tq = taskqueue_create_fast("qla_asyncq", M_NOWAIT, 478 taskqueue_thread_enqueue, &ha->async_event_tq); 479 taskqueue_start_threads(&ha->async_event_tq, 1, PI_NET, "%s asyncq", 480 device_get_nameunit(ha->pci_dev)); 481 482 QL_DPRINT2(ha, (dev, "%s: exit 0\n", __func__)); 483 return (0); 484 485qla_pci_attach_err: 486 487 qla_release(ha); 488 489 QL_DPRINT2(ha, (dev, "%s: exit ENXIO\n", __func__)); 490 return (ENXIO); 491} 492 493/* 494 * Name: qla_pci_detach 495 * Function: Unhooks the device from the operating system 496 */ 497static int 498qla_pci_detach(device_t dev) 499{ 500 qla_host_t *ha = NULL; 501 struct ifnet *ifp; 502 503 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 504 505 if ((ha = device_get_softc(dev)) == NULL) { 506 device_printf(dev, "cannot get softc\n"); 507 return (ENOMEM); 508 } 509 510 ifp = ha->ifp; 511 512 (void)QLA_LOCK(ha, __func__, 0); 513 qla_stop(ha); 514 QLA_UNLOCK(ha, __func__); 515 516 qla_release(ha); 517 518 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 519 520 return (0); 521} 522 523/* 524 * SYSCTL Related Callbacks 525 */ 526static int 527qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 528{ 529 int err, ret = 0; 530 qla_host_t *ha; 531 532 err = sysctl_handle_int(oidp, &ret, 0, req); 533 534 if (err || !req->newptr) 535 return (err); 536 537 if (ret == 1) { 538 ha = (qla_host_t *)arg1; 539 ql_get_stats(ha); 540 } 541 return (err); 542} 543static int 544qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS) 545{ 546 int err, ret = 0; 547 qla_host_t *ha; 548 549 err = sysctl_handle_int(oidp, &ret, 0, req); 550 551 if (err || !req->newptr) 552 return (err); 553 554 if (ret == 1) { 555 ha = (qla_host_t *)arg1; 556 ql_hw_link_status(ha); 557 } 558 return (err); 559} 560 561/* 562 * Name: qla_release 563 * Function: Releases the resources allocated for the device 564 */ 565static void 566qla_release(qla_host_t *ha) 567{ 568 device_t dev; 569 int i; 570 571 dev = ha->pci_dev; 572 573 if (ha->async_event_tq) { 574 taskqueue_drain(ha->async_event_tq, &ha->async_event_task); 575 taskqueue_free(ha->async_event_tq); 576 } 577 578 if (ha->err_tq) { 579 taskqueue_drain(ha->err_tq, &ha->err_task); 580 taskqueue_free(ha->err_tq); 581 } 582 583 if (ha->tx_tq) { 584 taskqueue_drain(ha->tx_tq, &ha->tx_task); 585 taskqueue_free(ha->tx_tq); 586 } 587 588 ql_del_cdev(ha); 589 590 if (ha->flags.qla_watchdog_active) { 591 ha->flags.qla_watchdog_exit = 1; 592 593 while (ha->qla_watchdog_exited == 0) 594 qla_mdelay(__func__, 1); 595 } 596 597 if (ha->flags.qla_callout_init) 598 callout_stop(&ha->tx_callout); 599 600 if (ha->ifp != NULL) 601 ether_ifdetach(ha->ifp); 602 603 ql_free_dma(ha); 604 qla_free_parent_dma_tag(ha); 605 606 if (ha->mbx_handle) 607 (void)bus_teardown_intr(dev, ha->mbx_irq, ha->mbx_handle); 608 609 if (ha->mbx_irq) 610 (void) bus_release_resource(dev, SYS_RES_IRQ, ha->mbx_irq_rid, 611 ha->mbx_irq); 612 613 for (i = 0; i < ha->hw.num_sds_rings; i++) { 614 615 if (ha->irq_vec[i].handle) { 616 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 617 ha->irq_vec[i].handle); 618 } 619 620 if (ha->irq_vec[i].irq) { 621 (void)bus_release_resource(dev, SYS_RES_IRQ, 622 ha->irq_vec[i].irq_rid, 623 ha->irq_vec[i].irq); 624 } 625 } 626 627 if (ha->msix_count) 628 pci_release_msi(dev); 629 630 if (ha->flags.lock_init) { 631 mtx_destroy(&ha->tx_lock); 632 mtx_destroy(&ha->hw_lock); 633 } 634 635 if (ha->pci_reg) 636 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 637 ha->pci_reg); 638 639 if (ha->pci_reg1) 640 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1, 641 ha->pci_reg1); 642} 643 644/* 645 * DMA Related Functions 646 */ 647 648static void 649qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 650{ 651 *((bus_addr_t *)arg) = 0; 652 653 if (error) { 654 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 655 return; 656 } 657 658 *((bus_addr_t *)arg) = segs[0].ds_addr; 659 660 return; 661} 662 663int 664ql_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 665{ 666 int ret = 0; 667 device_t dev; 668 bus_addr_t b_addr; 669 670 dev = ha->pci_dev; 671 672 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 673 674 ret = bus_dma_tag_create( 675 ha->parent_tag,/* parent */ 676 dma_buf->alignment, 677 ((bus_size_t)(1ULL << 32)),/* boundary */ 678 BUS_SPACE_MAXADDR, /* lowaddr */ 679 BUS_SPACE_MAXADDR, /* highaddr */ 680 NULL, NULL, /* filter, filterarg */ 681 dma_buf->size, /* maxsize */ 682 1, /* nsegments */ 683 dma_buf->size, /* maxsegsize */ 684 0, /* flags */ 685 NULL, NULL, /* lockfunc, lockarg */ 686 &dma_buf->dma_tag); 687 688 if (ret) { 689 device_printf(dev, "%s: could not create dma tag\n", __func__); 690 goto ql_alloc_dmabuf_exit; 691 } 692 ret = bus_dmamem_alloc(dma_buf->dma_tag, 693 (void **)&dma_buf->dma_b, 694 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 695 &dma_buf->dma_map); 696 if (ret) { 697 bus_dma_tag_destroy(dma_buf->dma_tag); 698 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 699 goto ql_alloc_dmabuf_exit; 700 } 701 702 ret = bus_dmamap_load(dma_buf->dma_tag, 703 dma_buf->dma_map, 704 dma_buf->dma_b, 705 dma_buf->size, 706 qla_dmamap_callback, 707 &b_addr, BUS_DMA_NOWAIT); 708 709 if (ret || !b_addr) { 710 bus_dma_tag_destroy(dma_buf->dma_tag); 711 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 712 dma_buf->dma_map); 713 ret = -1; 714 goto ql_alloc_dmabuf_exit; 715 } 716 717 dma_buf->dma_addr = b_addr; 718 719ql_alloc_dmabuf_exit: 720 QL_DPRINT2(ha, (dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 721 __func__, ret, (void *)dma_buf->dma_tag, 722 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 723 dma_buf->size)); 724 725 return ret; 726} 727 728void 729ql_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 730{ 731 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 732 bus_dma_tag_destroy(dma_buf->dma_tag); 733} 734 735static int 736qla_alloc_parent_dma_tag(qla_host_t *ha) 737{ 738 int ret; 739 device_t dev; 740 741 dev = ha->pci_dev; 742 743 /* 744 * Allocate parent DMA Tag 745 */ 746 ret = bus_dma_tag_create( 747 bus_get_dma_tag(dev), /* parent */ 748 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 749 BUS_SPACE_MAXADDR, /* lowaddr */ 750 BUS_SPACE_MAXADDR, /* highaddr */ 751 NULL, NULL, /* filter, filterarg */ 752 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 753 0, /* nsegments */ 754 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 755 0, /* flags */ 756 NULL, NULL, /* lockfunc, lockarg */ 757 &ha->parent_tag); 758 759 if (ret) { 760 device_printf(dev, "%s: could not create parent dma tag\n", 761 __func__); 762 return (-1); 763 } 764 765 ha->flags.parent_tag = 1; 766 767 return (0); 768} 769 770static void 771qla_free_parent_dma_tag(qla_host_t *ha) 772{ 773 if (ha->flags.parent_tag) { 774 bus_dma_tag_destroy(ha->parent_tag); 775 ha->flags.parent_tag = 0; 776 } 777} 778 779/* 780 * Name: qla_init_ifnet 781 * Function: Creates the Network Device Interface and Registers it with the O.S 782 */ 783 784static void 785qla_init_ifnet(device_t dev, qla_host_t *ha) 786{ 787 struct ifnet *ifp; 788 789 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 790 791 ifp = ha->ifp = if_alloc(IFT_ETHER); 792 793 if (ifp == NULL) 794 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 795 796 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 797 798#if __FreeBSD_version >= 1000000 799 if_initbaudrate(ifp, IF_Gbps(10)); 800 ifp->if_capabilities = IFCAP_LINKSTATE; 801#else 802 ifp->if_mtu = ETHERMTU; 803 ifp->if_baudrate = (1 * 1000 * 1000 *1000); 804 805#endif /* #if __FreeBSD_version >= 1000000 */ 806 807 ifp->if_init = qla_init; 808 ifp->if_softc = ha; 809 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 810 ifp->if_ioctl = qla_ioctl; 811 ifp->if_start = qla_start; 812 813 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 814 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 815 IFQ_SET_READY(&ifp->if_snd); 816 817 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 818 819 ether_ifattach(ifp, qla_get_mac_addr(ha)); 820 821 ifp->if_capabilities = IFCAP_HWCSUM | 822 IFCAP_TSO4 | 823 IFCAP_JUMBO_MTU; 824 825 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 826 ifp->if_capabilities |= IFCAP_VLAN_HWTSO; 827 828 ifp->if_capenable = ifp->if_capabilities; 829 830 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 831 832 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 833 834 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 835 NULL); 836 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 837 838 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 839 840 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 841 842 return; 843} 844 845static void 846qla_init_locked(qla_host_t *ha) 847{ 848 struct ifnet *ifp = ha->ifp; 849 850 qla_stop(ha); 851 852 if (qla_alloc_xmt_bufs(ha) != 0) 853 return; 854 855 qla_confirm_9kb_enable(ha); 856 857 if (qla_alloc_rcv_bufs(ha) != 0) 858 return; 859 860 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 861 862 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 863 864 ha->flags.stop_rcv = 0; 865 if (ql_init_hw_if(ha) == 0) { 866 ifp = ha->ifp; 867 ifp->if_drv_flags |= IFF_DRV_RUNNING; 868 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 869 ha->flags.qla_watchdog_pause = 0; 870 ha->hw_vlan_tx_frames = 0; 871 ha->tx_tso_frames = 0; 872 } 873 874 return; 875} 876 877static void 878qla_init(void *arg) 879{ 880 qla_host_t *ha; 881 882 ha = (qla_host_t *)arg; 883 884 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 885 886 (void)QLA_LOCK(ha, __func__, 0); 887 qla_init_locked(ha); 888 QLA_UNLOCK(ha, __func__); 889 890 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 891} 892 893static int 894qla_set_multi(qla_host_t *ha, uint32_t add_multi) 895{ 896 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 897 struct ifmultiaddr *ifma; 898 int mcnt = 0; 899 struct ifnet *ifp = ha->ifp; 900 int ret = 0; 901 902 if_maddr_rlock(ifp); 903 904 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 905 906 if (ifma->ifma_addr->sa_family != AF_LINK) 907 continue; 908 909 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 910 break; 911 912 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 913 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 914 915 mcnt++; 916 } 917 918 if_maddr_runlock(ifp); 919 920 if (QLA_LOCK(ha, __func__, 1) == 0) { 921 ret = ql_hw_set_multi(ha, mta, mcnt, add_multi); 922 QLA_UNLOCK(ha, __func__); 923 } 924 925 return (ret); 926} 927 928static int 929qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 930{ 931 int ret = 0; 932 struct ifreq *ifr = (struct ifreq *)data; 933 struct ifaddr *ifa = (struct ifaddr *)data; 934 qla_host_t *ha; 935 936 ha = (qla_host_t *)ifp->if_softc; 937 938 switch (cmd) { 939 case SIOCSIFADDR: 940 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 941 __func__, cmd)); 942 943 if (ifa->ifa_addr->sa_family == AF_INET) { 944 ifp->if_flags |= IFF_UP; 945 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 946 (void)QLA_LOCK(ha, __func__, 0); 947 qla_init_locked(ha); 948 QLA_UNLOCK(ha, __func__); 949 } 950 QL_DPRINT4(ha, (ha->pci_dev, 951 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 952 __func__, cmd, 953 ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 954 955 arp_ifinit(ifp, ifa); 956 } else { 957 ether_ioctl(ifp, cmd, data); 958 } 959 break; 960 961 case SIOCSIFMTU: 962 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 963 __func__, cmd)); 964 965 if (ifr->ifr_mtu > QLA_MAX_MTU) { 966 ret = EINVAL; 967 } else { 968 (void) QLA_LOCK(ha, __func__, 0); 969 ifp->if_mtu = ifr->ifr_mtu; 970 ha->max_frame_size = 971 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 972 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 973 ret = ql_set_max_mtu(ha, ha->max_frame_size, 974 ha->hw.rcv_cntxt_id); 975 } 976 977 if (ifp->if_mtu > ETHERMTU) 978 ha->std_replenish = QL_JUMBO_REPLENISH_THRES; 979 else 980 ha->std_replenish = QL_STD_REPLENISH_THRES; 981 982 983 QLA_UNLOCK(ha, __func__); 984 985 if (ret) 986 ret = EINVAL; 987 } 988 989 break; 990 991 case SIOCSIFFLAGS: 992 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 993 __func__, cmd)); 994 995 (void)QLA_LOCK(ha, __func__, 0); 996 997 if (ifp->if_flags & IFF_UP) { 998 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 999 if ((ifp->if_flags ^ ha->if_flags) & 1000 IFF_PROMISC) { 1001 ret = ql_set_promisc(ha); 1002 } else if ((ifp->if_flags ^ ha->if_flags) & 1003 IFF_ALLMULTI) { 1004 ret = ql_set_allmulti(ha); 1005 } 1006 } else { 1007 qla_init_locked(ha); 1008 ha->max_frame_size = ifp->if_mtu + 1009 ETHER_HDR_LEN + ETHER_CRC_LEN; 1010 ret = ql_set_max_mtu(ha, ha->max_frame_size, 1011 ha->hw.rcv_cntxt_id); 1012 } 1013 } else { 1014 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1015 qla_stop(ha); 1016 ha->if_flags = ifp->if_flags; 1017 } 1018 1019 QLA_UNLOCK(ha, __func__); 1020 break; 1021 1022 case SIOCADDMULTI: 1023 QL_DPRINT4(ha, (ha->pci_dev, 1024 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 1025 1026 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1027 if (qla_set_multi(ha, 1)) 1028 ret = EINVAL; 1029 } 1030 break; 1031 1032 case SIOCDELMULTI: 1033 QL_DPRINT4(ha, (ha->pci_dev, 1034 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 1035 1036 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1037 if (qla_set_multi(ha, 0)) 1038 ret = EINVAL; 1039 } 1040 break; 1041 1042 case SIOCSIFMEDIA: 1043 case SIOCGIFMEDIA: 1044 QL_DPRINT4(ha, (ha->pci_dev, 1045 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 1046 __func__, cmd)); 1047 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 1048 break; 1049 1050 case SIOCSIFCAP: 1051 { 1052 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1053 1054 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 1055 __func__, cmd)); 1056 1057 if (mask & IFCAP_HWCSUM) 1058 ifp->if_capenable ^= IFCAP_HWCSUM; 1059 if (mask & IFCAP_TSO4) 1060 ifp->if_capenable ^= IFCAP_TSO4; 1061 if (mask & IFCAP_VLAN_HWTAGGING) 1062 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 1063 if (mask & IFCAP_VLAN_HWTSO) 1064 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 1065 1066 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1067 qla_init(ha); 1068 1069 VLAN_CAPABILITIES(ifp); 1070 break; 1071 } 1072 1073 default: 1074 QL_DPRINT4(ha, (ha->pci_dev, "%s: default (0x%lx)\n", 1075 __func__, cmd)); 1076 ret = ether_ioctl(ifp, cmd, data); 1077 break; 1078 } 1079 1080 return (ret); 1081} 1082 1083static int 1084qla_media_change(struct ifnet *ifp) 1085{ 1086 qla_host_t *ha; 1087 struct ifmedia *ifm; 1088 int ret = 0; 1089 1090 ha = (qla_host_t *)ifp->if_softc; 1091 1092 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1093 1094 ifm = &ha->media; 1095 1096 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1097 ret = EINVAL; 1098 1099 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1100 1101 return (ret); 1102} 1103 1104static void 1105qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1106{ 1107 qla_host_t *ha; 1108 1109 ha = (qla_host_t *)ifp->if_softc; 1110 1111 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1112 1113 ifmr->ifm_status = IFM_AVALID; 1114 ifmr->ifm_active = IFM_ETHER; 1115 1116 ql_update_link_state(ha); 1117 if (ha->hw.link_up) { 1118 ifmr->ifm_status |= IFM_ACTIVE; 1119 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 1120 } 1121 1122 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit (%s)\n", __func__,\ 1123 (ha->hw.link_up ? "link_up" : "link_down"))); 1124 1125 return; 1126} 1127 1128static void 1129qla_start(struct ifnet *ifp) 1130{ 1131 struct mbuf *m_head; 1132 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 1133 1134 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1135 1136 if (!mtx_trylock(&ha->tx_lock)) { 1137 QL_DPRINT8(ha, (ha->pci_dev, 1138 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 1139 return; 1140 } 1141 1142 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1143 IFF_DRV_RUNNING) { 1144 QL_DPRINT8(ha, 1145 (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1146 QLA_TX_UNLOCK(ha); 1147 return; 1148 } 1149 1150 if (!ha->hw.link_up || !ha->watchdog_ticks) 1151 ql_update_link_state(ha); 1152 1153 if (!ha->hw.link_up) { 1154 QL_DPRINT8(ha, (ha->pci_dev, "%s: link down\n", __func__)); 1155 QLA_TX_UNLOCK(ha); 1156 return; 1157 } 1158 1159 while (ifp->if_snd.ifq_head != NULL) { 1160 IF_DEQUEUE(&ifp->if_snd, m_head); 1161 1162 if (m_head == NULL) { 1163 QL_DPRINT8(ha, (ha->pci_dev, "%s: m_head == NULL\n", 1164 __func__)); 1165 break; 1166 } 1167 1168 if (qla_send(ha, &m_head)) { 1169 if (m_head == NULL) 1170 break; 1171 QL_DPRINT8(ha, (ha->pci_dev, "%s: PREPEND\n", __func__)); 1172 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1173 IF_PREPEND(&ifp->if_snd, m_head); 1174 break; 1175 } 1176 /* Send a copy of the frame to the BPF listener */ 1177 ETHER_BPF_MTAP(ifp, m_head); 1178 } 1179 QLA_TX_UNLOCK(ha); 1180 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1181 return; 1182} 1183 1184static int 1185qla_send(qla_host_t *ha, struct mbuf **m_headp) 1186{ 1187 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1188 bus_dmamap_t map; 1189 int nsegs; 1190 int ret = -1; 1191 uint32_t tx_idx; 1192 struct mbuf *m_head = *m_headp; 1193 uint32_t txr_idx = ha->txr_idx; 1194 uint32_t iscsi_pdu = 0; 1195 1196 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1197 1198 /* check if flowid is set */ 1199 1200 if (M_HASHTYPE_GET(m_head) != M_HASHTYPE_NONE) { 1201#ifdef QL_ENABLE_ISCSI_TLV 1202 if (qla_iscsi_pdu(ha, m_head) == 0) { 1203 iscsi_pdu = 1; 1204 txr_idx = m_head->m_pkthdr.flowid & 1205 ((ha->hw.num_tx_rings >> 1) - 1); 1206 } else { 1207 txr_idx = m_head->m_pkthdr.flowid & 1208 (ha->hw.num_tx_rings - 1); 1209 } 1210#else 1211 txr_idx = m_head->m_pkthdr.flowid & (ha->hw.num_tx_rings - 1); 1212#endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 1213 } 1214 1215 1216 tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next; 1217 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; 1218 1219 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1220 BUS_DMA_NOWAIT); 1221 1222 if (ret == EFBIG) { 1223 1224 struct mbuf *m; 1225 1226 QL_DPRINT8(ha, (ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1227 m_head->m_pkthdr.len)); 1228 1229 m = m_defrag(m_head, M_NOWAIT); 1230 if (m == NULL) { 1231 ha->err_tx_defrag++; 1232 m_freem(m_head); 1233 *m_headp = NULL; 1234 device_printf(ha->pci_dev, 1235 "%s: m_defrag() = NULL [%d]\n", 1236 __func__, ret); 1237 return (ENOBUFS); 1238 } 1239 m_head = m; 1240 *m_headp = m_head; 1241 1242 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1243 segs, &nsegs, BUS_DMA_NOWAIT))) { 1244 1245 ha->err_tx_dmamap_load++; 1246 1247 device_printf(ha->pci_dev, 1248 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1249 __func__, ret, m_head->m_pkthdr.len); 1250 1251 if (ret != ENOMEM) { 1252 m_freem(m_head); 1253 *m_headp = NULL; 1254 } 1255 return (ret); 1256 } 1257 1258 } else if (ret) { 1259 1260 ha->err_tx_dmamap_load++; 1261 1262 device_printf(ha->pci_dev, 1263 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1264 __func__, ret, m_head->m_pkthdr.len); 1265 1266 if (ret != ENOMEM) { 1267 m_freem(m_head); 1268 *m_headp = NULL; 1269 } 1270 return (ret); 1271 } 1272 1273 QL_ASSERT(ha, (nsegs != 0), ("qla_send: empty packet")); 1274 1275 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1276 1277 if (!(ret = ql_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx, 1278 iscsi_pdu))) { 1279 ha->tx_ring[txr_idx].count++; 1280 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head; 1281 } else { 1282 if (ret == EINVAL) { 1283 if (m_head) 1284 m_freem(m_head); 1285 *m_headp = NULL; 1286 } 1287 } 1288 1289 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1290 return (ret); 1291} 1292 1293static void 1294qla_stop(qla_host_t *ha) 1295{ 1296 struct ifnet *ifp = ha->ifp; 1297 device_t dev; 1298 1299 dev = ha->pci_dev; 1300 1301 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1302 1303 ha->flags.qla_watchdog_pause = 1; 1304 1305 while (!ha->qla_watchdog_paused) 1306 qla_mdelay(__func__, 1); 1307 1308 ha->flags.stop_rcv = 1; 1309 ql_hw_stop_rcv(ha); 1310 1311 ql_del_hw_if(ha); 1312 1313 qla_free_xmt_bufs(ha); 1314 qla_free_rcv_bufs(ha); 1315 1316 return; 1317} 1318 1319/* 1320 * Buffer Management Functions for Transmit and Receive Rings 1321 */ 1322static int 1323qla_alloc_xmt_bufs(qla_host_t *ha) 1324{ 1325 int ret = 0; 1326 uint32_t i, j; 1327 qla_tx_buf_t *txb; 1328 1329 if (bus_dma_tag_create(NULL, /* parent */ 1330 1, 0, /* alignment, bounds */ 1331 BUS_SPACE_MAXADDR, /* lowaddr */ 1332 BUS_SPACE_MAXADDR, /* highaddr */ 1333 NULL, NULL, /* filter, filterarg */ 1334 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1335 QLA_MAX_SEGMENTS, /* nsegments */ 1336 PAGE_SIZE, /* maxsegsize */ 1337 BUS_DMA_ALLOCNOW, /* flags */ 1338 NULL, /* lockfunc */ 1339 NULL, /* lockfuncarg */ 1340 &ha->tx_tag)) { 1341 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1342 __func__); 1343 return (ENOMEM); 1344 } 1345 1346 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1347 bzero((void *)ha->tx_ring[i].tx_buf, 1348 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1349 } 1350 1351 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1352 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) { 1353 1354 txb = &ha->tx_ring[j].tx_buf[i]; 1355 1356 if ((ret = bus_dmamap_create(ha->tx_tag, 1357 BUS_DMA_NOWAIT, &txb->map))) { 1358 1359 ha->err_tx_dmamap_create++; 1360 device_printf(ha->pci_dev, 1361 "%s: bus_dmamap_create failed[%d]\n", 1362 __func__, ret); 1363 1364 qla_free_xmt_bufs(ha); 1365 1366 return (ret); 1367 } 1368 } 1369 } 1370 1371 return 0; 1372} 1373 1374/* 1375 * Release mbuf after it sent on the wire 1376 */ 1377static void 1378qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1379{ 1380 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1381 1382 if (txb->m_head && txb->map) { 1383 1384 bus_dmamap_unload(ha->tx_tag, txb->map); 1385 1386 m_freem(txb->m_head); 1387 txb->m_head = NULL; 1388 } 1389 1390 if (txb->map) 1391 bus_dmamap_destroy(ha->tx_tag, txb->map); 1392 1393 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1394} 1395 1396static void 1397qla_free_xmt_bufs(qla_host_t *ha) 1398{ 1399 int i, j; 1400 1401 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1402 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1403 qla_clear_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]); 1404 } 1405 1406 if (ha->tx_tag != NULL) { 1407 bus_dma_tag_destroy(ha->tx_tag); 1408 ha->tx_tag = NULL; 1409 } 1410 1411 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1412 bzero((void *)ha->tx_ring[i].tx_buf, 1413 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1414 } 1415 return; 1416} 1417 1418 1419static int 1420qla_alloc_rcv_std(qla_host_t *ha) 1421{ 1422 int i, j, k, r, ret = 0; 1423 qla_rx_buf_t *rxb; 1424 qla_rx_ring_t *rx_ring; 1425 1426 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1427 1428 rx_ring = &ha->rx_ring[r]; 1429 1430 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1431 1432 rxb = &rx_ring->rx_buf[i]; 1433 1434 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, 1435 &rxb->map); 1436 1437 if (ret) { 1438 device_printf(ha->pci_dev, 1439 "%s: dmamap[%d, %d] failed\n", 1440 __func__, r, i); 1441 1442 for (k = 0; k < r; k++) { 1443 for (j = 0; j < NUM_RX_DESCRIPTORS; 1444 j++) { 1445 rxb = &ha->rx_ring[k].rx_buf[j]; 1446 bus_dmamap_destroy(ha->rx_tag, 1447 rxb->map); 1448 } 1449 } 1450 1451 for (j = 0; j < i; j++) { 1452 bus_dmamap_destroy(ha->rx_tag, 1453 rx_ring->rx_buf[j].map); 1454 } 1455 goto qla_alloc_rcv_std_err; 1456 } 1457 } 1458 } 1459 1460 qla_init_hw_rcv_descriptors(ha); 1461 1462 1463 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1464 1465 rx_ring = &ha->rx_ring[r]; 1466 1467 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1468 rxb = &rx_ring->rx_buf[i]; 1469 rxb->handle = i; 1470 if (!(ret = ql_get_mbuf(ha, rxb, NULL))) { 1471 /* 1472 * set the physical address in the 1473 * corresponding descriptor entry in the 1474 * receive ring/queue for the hba 1475 */ 1476 qla_set_hw_rcv_desc(ha, r, i, rxb->handle, 1477 rxb->paddr, 1478 (rxb->m_head)->m_pkthdr.len); 1479 } else { 1480 device_printf(ha->pci_dev, 1481 "%s: ql_get_mbuf [%d, %d] failed\n", 1482 __func__, r, i); 1483 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1484 goto qla_alloc_rcv_std_err; 1485 } 1486 } 1487 } 1488 return 0; 1489 1490qla_alloc_rcv_std_err: 1491 return (-1); 1492} 1493 1494static void 1495qla_free_rcv_std(qla_host_t *ha) 1496{ 1497 int i, r; 1498 qla_rx_buf_t *rxb; 1499 1500 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1501 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1502 rxb = &ha->rx_ring[r].rx_buf[i]; 1503 if (rxb->m_head != NULL) { 1504 bus_dmamap_unload(ha->rx_tag, rxb->map); 1505 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1506 m_freem(rxb->m_head); 1507 rxb->m_head = NULL; 1508 } 1509 } 1510 } 1511 return; 1512} 1513 1514static int 1515qla_alloc_rcv_bufs(qla_host_t *ha) 1516{ 1517 int i, ret = 0; 1518 1519 if (bus_dma_tag_create(NULL, /* parent */ 1520 1, 0, /* alignment, bounds */ 1521 BUS_SPACE_MAXADDR, /* lowaddr */ 1522 BUS_SPACE_MAXADDR, /* highaddr */ 1523 NULL, NULL, /* filter, filterarg */ 1524 MJUM9BYTES, /* maxsize */ 1525 1, /* nsegments */ 1526 MJUM9BYTES, /* maxsegsize */ 1527 BUS_DMA_ALLOCNOW, /* flags */ 1528 NULL, /* lockfunc */ 1529 NULL, /* lockfuncarg */ 1530 &ha->rx_tag)) { 1531 1532 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1533 __func__); 1534 1535 return (ENOMEM); 1536 } 1537 1538 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1539 1540 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1541 ha->hw.sds[i].sdsr_next = 0; 1542 ha->hw.sds[i].rxb_free = NULL; 1543 ha->hw.sds[i].rx_free = 0; 1544 } 1545 1546 ret = qla_alloc_rcv_std(ha); 1547 1548 return (ret); 1549} 1550 1551static void 1552qla_free_rcv_bufs(qla_host_t *ha) 1553{ 1554 int i; 1555 1556 qla_free_rcv_std(ha); 1557 1558 if (ha->rx_tag != NULL) { 1559 bus_dma_tag_destroy(ha->rx_tag); 1560 ha->rx_tag = NULL; 1561 } 1562 1563 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1564 1565 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1566 ha->hw.sds[i].sdsr_next = 0; 1567 ha->hw.sds[i].rxb_free = NULL; 1568 ha->hw.sds[i].rx_free = 0; 1569 } 1570 1571 return; 1572} 1573 1574int 1575ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp) 1576{ 1577 register struct mbuf *mp = nmp; 1578 struct ifnet *ifp; 1579 int ret = 0; 1580 uint32_t offset; 1581 bus_dma_segment_t segs[1]; 1582 int nsegs, mbuf_size; 1583 1584 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1585 1586 ifp = ha->ifp; 1587 1588 if (ha->hw.enable_9kb) 1589 mbuf_size = MJUM9BYTES; 1590 else 1591 mbuf_size = MCLBYTES; 1592 1593 if (mp == NULL) { 1594 1595 if (ha->hw.enable_9kb) 1596 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, mbuf_size); 1597 else 1598 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1599 1600 if (mp == NULL) { 1601 ha->err_m_getcl++; 1602 ret = ENOBUFS; 1603 device_printf(ha->pci_dev, 1604 "%s: m_getcl failed\n", __func__); 1605 goto exit_ql_get_mbuf; 1606 } 1607 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1608 } else { 1609 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1610 mp->m_data = mp->m_ext.ext_buf; 1611 mp->m_next = NULL; 1612 } 1613 1614 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1615 if (offset) { 1616 offset = 8 - offset; 1617 m_adj(mp, offset); 1618 } 1619 1620 /* 1621 * Using memory from the mbuf cluster pool, invoke the bus_dma 1622 * machinery to arrange the memory mapping. 1623 */ 1624 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map, 1625 mp, segs, &nsegs, BUS_DMA_NOWAIT); 1626 rxb->paddr = segs[0].ds_addr; 1627 1628 if (ret || !rxb->paddr || (nsegs != 1)) { 1629 m_free(mp); 1630 rxb->m_head = NULL; 1631 device_printf(ha->pci_dev, 1632 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n", 1633 __func__, ret, (long long unsigned int)rxb->paddr, 1634 nsegs); 1635 ret = -1; 1636 goto exit_ql_get_mbuf; 1637 } 1638 rxb->m_head = mp; 1639 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1640 1641exit_ql_get_mbuf: 1642 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1643 return (ret); 1644} 1645 1646static void 1647qla_tx_done(void *context, int pending) 1648{ 1649 qla_host_t *ha = context; 1650 struct ifnet *ifp; 1651 1652 ifp = ha->ifp; 1653 1654 if (!ifp) 1655 return; 1656 1657 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1658 QL_DPRINT8(ha, (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1659 return; 1660 } 1661 ql_hw_tx_done(ha); 1662 1663 qla_start(ha->ifp); 1664} 1665 1666static void 1667qla_get_peer(qla_host_t *ha) 1668{ 1669 device_t *peers; 1670 int count, i, slot; 1671 int my_slot = pci_get_slot(ha->pci_dev); 1672 1673 if (device_get_children(device_get_parent(ha->pci_dev), &peers, &count)) 1674 return; 1675 1676 for (i = 0; i < count; i++) { 1677 slot = pci_get_slot(peers[i]); 1678 1679 if ((slot >= 0) && (slot == my_slot) && 1680 (pci_get_device(peers[i]) == 1681 pci_get_device(ha->pci_dev))) { 1682 if (ha->pci_dev != peers[i]) 1683 ha->peer_dev = peers[i]; 1684 } 1685 } 1686} 1687 1688static void 1689qla_send_msg_to_peer(qla_host_t *ha, uint32_t msg_to_peer) 1690{ 1691 qla_host_t *ha_peer; 1692 1693 if (ha->peer_dev) { 1694 if ((ha_peer = device_get_softc(ha->peer_dev)) != NULL) { 1695 1696 ha_peer->msg_from_peer = msg_to_peer; 1697 } 1698 } 1699} 1700 1701static void 1702qla_error_recovery(void *context, int pending) 1703{ 1704 qla_host_t *ha = context; 1705 uint32_t msecs_100 = 100; 1706 struct ifnet *ifp = ha->ifp; 1707 1708 (void)QLA_LOCK(ha, __func__, 0); 1709 1710 ha->hw.imd_compl = 1; 1711 qla_mdelay(__func__, 300); 1712 1713 ha->flags.stop_rcv = 1; 1714 1715 ql_hw_stop_rcv(ha); 1716 1717 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1718 1719 QLA_UNLOCK(ha, __func__); 1720 1721 if ((ha->pci_func & 0x1) == 0) { 1722 1723 if (!ha->msg_from_peer) { 1724 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1725 1726 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && 1727 msecs_100--) 1728 qla_mdelay(__func__, 100); 1729 } 1730 1731 ha->msg_from_peer = 0; 1732 1733 ql_minidump(ha); 1734 1735 (void) ql_init_hw(ha); 1736 qla_free_xmt_bufs(ha); 1737 qla_free_rcv_bufs(ha); 1738 1739 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1740 1741 } else { 1742 if (ha->msg_from_peer == QL_PEER_MSG_RESET) { 1743 1744 ha->msg_from_peer = 0; 1745 1746 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1747 } else { 1748 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1749 } 1750 1751 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && msecs_100--) 1752 qla_mdelay(__func__, 100); 1753 ha->msg_from_peer = 0; 1754 1755 (void) ql_init_hw(ha); 1756 qla_free_xmt_bufs(ha); 1757 qla_free_rcv_bufs(ha); 1758 } 1759 (void)QLA_LOCK(ha, __func__, 0); 1760 1761 if (qla_alloc_xmt_bufs(ha) != 0) { 1762 QLA_UNLOCK(ha, __func__); 1763 return; 1764 } 1765 qla_confirm_9kb_enable(ha); 1766 1767 if (qla_alloc_rcv_bufs(ha) != 0) { 1768 QLA_UNLOCK(ha, __func__); 1769 return; 1770 } 1771 1772 ha->flags.stop_rcv = 0; 1773 if (ql_init_hw_if(ha) == 0) { 1774 ifp = ha->ifp; 1775 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1776 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1777 ha->flags.qla_watchdog_pause = 0; 1778 } 1779 1780 QLA_UNLOCK(ha, __func__); 1781} 1782 1783static void 1784qla_async_event(void *context, int pending) 1785{ 1786 qla_host_t *ha = context; 1787 1788 (void)QLA_LOCK(ha, __func__, 0); 1789 qla_hw_async_event(ha); 1790 QLA_UNLOCK(ha, __func__); 1791} 1792 1793