ppi.c revision 111815
1/*- 2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/dev/ppbus/ppi.c 111815 2003-03-03 12:15:54Z phk $ 27 * 28 */ 29#include "opt_ppb_1284.h" 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/module.h> 34#include <sys/bus.h> 35#include <sys/conf.h> 36#include <sys/kernel.h> 37#include <sys/uio.h> 38#include <sys/fcntl.h> 39 40#include <machine/bus.h> 41#include <machine/resource.h> 42#include <sys/rman.h> 43 44#include <dev/ppbus/ppbconf.h> 45#include <dev/ppbus/ppb_msq.h> 46 47#ifdef PERIPH_1284 48#include <dev/ppbus/ppb_1284.h> 49#endif 50 51#include <dev/ppbus/ppi.h> 52 53#include "ppbus_if.h" 54 55#include <dev/ppbus/ppbio.h> 56 57#define BUFSIZE 512 58 59struct ppi_data { 60 61 int ppi_unit; 62 int ppi_flags; 63#define HAVE_PPBUS (1<<0) 64#define HAD_PPBUS (1<<1) 65 66 int ppi_count; 67 int ppi_mode; /* IEEE1284 mode */ 68 char ppi_buffer[BUFSIZE]; 69 70#ifdef PERIPH_1284 71 struct resource *intr_resource; /* interrupt resource */ 72 void *intr_cookie; /* interrupt registration cookie */ 73#endif /* PERIPH_1284 */ 74}; 75 76#define DEVTOSOFTC(dev) \ 77 ((struct ppi_data *)device_get_softc(dev)) 78#define UNITOSOFTC(unit) \ 79 ((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit))) 80#define UNITODEVICE(unit) \ 81 (devclass_get_device(ppi_devclass, (unit))) 82 83static devclass_t ppi_devclass; 84 85static d_open_t ppiopen; 86static d_close_t ppiclose; 87static d_ioctl_t ppiioctl; 88static d_write_t ppiwrite; 89static d_read_t ppiread; 90 91#define CDEV_MAJOR 82 92static struct cdevsw ppi_cdevsw = { 93 .d_open = ppiopen, 94 .d_close = ppiclose, 95 .d_read = ppiread, 96 .d_write = ppiwrite, 97 .d_ioctl = ppiioctl, 98 .d_name = "ppi", 99 .d_maj = CDEV_MAJOR, 100}; 101 102#ifdef PERIPH_1284 103 104static void 105ppi_enable_intr(device_t ppidev) 106{ 107 char r; 108 device_t ppbus = device_get_parent(ppidev); 109 110 r = ppb_rctr(ppbus); 111 ppb_wctr(ppbus, r | IRQENABLE); 112 113 return; 114} 115 116static void 117ppi_disable_intr(device_t ppidev) 118{ 119 char r; 120 device_t ppbus = device_get_parent(ppidev); 121 122 r = ppb_rctr(ppbus); 123 ppb_wctr(ppbus, r & ~IRQENABLE); 124 125 return; 126} 127 128#endif /* PERIPH_1284 */ 129 130static void 131ppi_identify(driver_t *driver, device_t parent) 132{ 133 134 BUS_ADD_CHILD(parent, 0, "ppi", -1); 135} 136 137/* 138 * ppi_probe() 139 */ 140static int 141ppi_probe(device_t dev) 142{ 143 struct ppi_data *ppi; 144 145 /* probe is always ok */ 146 device_set_desc(dev, "Parallel I/O"); 147 148 ppi = DEVTOSOFTC(dev); 149 bzero(ppi, sizeof(struct ppi_data)); 150 151 return (0); 152} 153 154/* 155 * ppi_attach() 156 */ 157static int 158ppi_attach(device_t dev) 159{ 160#ifdef PERIPH_1284 161 uintptr_t irq; 162 int zero = 0; 163 struct ppi_data *ppi = DEVTOSOFTC(dev); 164 165 /* retrive the irq */ 166 BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq); 167 168 /* declare our interrupt handler */ 169 ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ, 170 &zero, irq, irq, 1, RF_ACTIVE); 171#endif /* PERIPH_1284 */ 172 173 make_dev(&ppi_cdevsw, device_get_unit(dev), /* XXX cleanup */ 174 UID_ROOT, GID_WHEEL, 175 0600, "ppi%d", device_get_unit(dev)); 176 177 return (0); 178} 179 180#ifdef PERIPH_1284 181/* 182 * Cable 183 * ----- 184 * 185 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks: 186 * 187 * nStrobe <-> nAck 1 <-> 10 188 * nAutofd <-> Busy 11 <-> 14 189 * nSelectin <-> Select 17 <-> 13 190 * nInit <-> nFault 15 <-> 16 191 * 192 */ 193static void 194ppiintr(void *arg) 195{ 196 device_t ppidev = (device_t)arg; 197 device_t ppbus = device_get_parent(ppidev); 198 struct ppi_data *ppi = DEVTOSOFTC(ppidev); 199 200 ppi_disable_intr(ppidev); 201 202 switch (ppb_1284_get_state(ppbus)) { 203 204 /* accept IEEE1284 negotiation then wakeup a waiting process to 205 * continue negotiation at process level */ 206 case PPB_FORWARD_IDLE: 207 /* Event 1 */ 208 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) == 209 (SELECT | nBUSY)) { 210 /* IEEE1284 negotiation */ 211#ifdef DEBUG_1284 212 printf("N"); 213#endif 214 215 /* Event 2 - prepare for reading the ext. value */ 216 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN); 217 218 ppb_1284_set_state(ppbus, PPB_NEGOCIATION); 219 220 } else { 221#ifdef DEBUG_1284 222 printf("0x%x", ppb_rstr(ppbus)); 223#endif 224 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT); 225 break; 226 } 227 228 /* wake up any process waiting for negotiation from 229 * remote master host */ 230 231 /* XXX should set a variable to warn the process about 232 * the interrupt */ 233 234 wakeup(ppi); 235 break; 236 default: 237#ifdef DEBUG_1284 238 printf("?%d", ppb_1284_get_state(ppbus)); 239#endif 240 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE); 241 ppb_set_mode(ppbus, PPB_COMPATIBLE); 242 break; 243 } 244 245 ppi_enable_intr(ppidev); 246 247 return; 248} 249#endif /* PERIPH_1284 */ 250 251static int 252ppiopen(dev_t dev, int flags, int fmt, struct thread *td) 253{ 254 u_int unit = minor(dev); 255 struct ppi_data *ppi = UNITOSOFTC(unit); 256 device_t ppidev = UNITODEVICE(unit); 257 device_t ppbus = device_get_parent(ppidev); 258 int res; 259 260 if (!ppi) 261 return (ENXIO); 262 263 if (!(ppi->ppi_flags & HAVE_PPBUS)) { 264 if ((res = ppb_request_bus(ppbus, ppidev, 265 (flags & O_NONBLOCK) ? PPB_DONTWAIT : 266 (PPB_WAIT | PPB_INTR)))) 267 return (res); 268 269 ppi->ppi_flags |= HAVE_PPBUS; 270 271#ifdef PERIPH_1284 272 if (ppi->intr_resource) { 273 /* register our interrupt handler */ 274 BUS_SETUP_INTR(device_get_parent(ppidev), ppidev, ppi->intr_resource, 275 INTR_TYPE_TTY, ppiintr, dev, &ppi->intr_cookie); 276 } 277#endif /* PERIPH_1284 */ 278 } 279 ppi->ppi_count += 1; 280 281 return (0); 282} 283 284static int 285ppiclose(dev_t dev, int flags, int fmt, struct thread *td) 286{ 287 u_int unit = minor(dev); 288 struct ppi_data *ppi = UNITOSOFTC(unit); 289 device_t ppidev = UNITODEVICE(unit); 290 device_t ppbus = device_get_parent(ppidev); 291 292 ppi->ppi_count --; 293 if (!ppi->ppi_count) { 294 295#ifdef PERIPH_1284 296 switch (ppb_1284_get_state(ppbus)) { 297 case PPB_PERIPHERAL_IDLE: 298 ppb_peripheral_terminate(ppbus, 0); 299 break; 300 case PPB_REVERSE_IDLE: 301 case PPB_EPP_IDLE: 302 case PPB_ECP_FORWARD_IDLE: 303 default: 304 ppb_1284_terminate(ppbus); 305 break; 306 } 307#endif /* PERIPH_1284 */ 308 309 /* unregistration of interrupt forced by release */ 310 ppb_release_bus(ppbus, ppidev); 311 312 ppi->ppi_flags &= ~HAVE_PPBUS; 313 } 314 315 return (0); 316} 317 318/* 319 * ppiread() 320 * 321 * IEEE1284 compliant read. 322 * 323 * First, try negotiation to BYTE then NIBBLE mode 324 * If no data is available, wait for it otherwise transfer as much as possible 325 */ 326static int 327ppiread(dev_t dev, struct uio *uio, int ioflag) 328{ 329#ifdef PERIPH_1284 330 u_int unit = minor(dev); 331 struct ppi_data *ppi = UNITOSOFTC(unit); 332 device_t ppidev = UNITODEVICE(unit); 333 device_t ppbus = device_get_parent(ppidev); 334 int len, error = 0; 335 336 switch (ppb_1284_get_state(ppbus)) { 337 case PPB_PERIPHERAL_IDLE: 338 ppb_peripheral_terminate(ppbus, 0); 339 /* FALLTHROUGH */ 340 341 case PPB_FORWARD_IDLE: 342 /* if can't negotiate NIBBLE mode then try BYTE mode, 343 * the peripheral may be a computer 344 */ 345 if ((ppb_1284_negociate(ppbus, 346 ppi->ppi_mode = PPB_NIBBLE, 0))) { 347 348 /* XXX Wait 2 seconds to let the remote host some 349 * time to terminate its interrupt 350 */ 351 tsleep(ppi, PPBPRI, "ppiread", 2*hz); 352 353 if ((error = ppb_1284_negociate(ppbus, 354 ppi->ppi_mode = PPB_BYTE, 0))) 355 return (error); 356 } 357 break; 358 359 case PPB_REVERSE_IDLE: 360 case PPB_EPP_IDLE: 361 case PPB_ECP_FORWARD_IDLE: 362 default: 363 break; 364 } 365 366#ifdef DEBUG_1284 367 printf("N"); 368#endif 369 /* read data */ 370 len = 0; 371 while (uio->uio_resid) { 372 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode, 373 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid), 374 &len))) { 375 goto error; 376 } 377 378 if (!len) 379 goto error; /* no more data */ 380 381#ifdef DEBUG_1284 382 printf("d"); 383#endif 384 if ((error = uiomove(ppi->ppi_buffer, len, uio))) 385 goto error; 386 } 387 388error: 389 390#else /* PERIPH_1284 */ 391 int error = ENODEV; 392#endif 393 394 return (error); 395} 396 397/* 398 * ppiwrite() 399 * 400 * IEEE1284 compliant write 401 * 402 * Actually, this is the peripheral side of a remote IEEE1284 read 403 * 404 * The first part of the negotiation (IEEE1284 device detection) is 405 * done at interrupt level, then the remaining is done by the writing 406 * process 407 * 408 * Once negotiation done, transfer data 409 */ 410static int 411ppiwrite(dev_t dev, struct uio *uio, int ioflag) 412{ 413#ifdef PERIPH_1284 414 u_int unit = minor(dev); 415 struct ppi_data *ppi = UNITOSOFTC(unit); 416 device_t ppidev = UNITODEVICE(unit); 417 device_t ppbus = device_get_parent(ppidev); 418 int len, error = 0, sent; 419 420#if 0 421 int ret; 422 423 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR) 424 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT) 425 426 struct ppb_microseq msq[] = { 427 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } }, 428 MS_RET(0) 429 }; 430 431 /* negotiate ECP mode */ 432 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) { 433 printf("ppiwrite: ECP negotiation failed\n"); 434 } 435 436 while (!error && (len = min(uio->uio_resid, BUFSIZE))) { 437 uiomove(ppi->ppi_buffer, len, uio); 438 439 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len); 440 441 error = ppb_MS_microseq(ppbus, msq, &ret); 442 } 443#endif 444 445 /* we have to be peripheral to be able to send data, so 446 * wait for the appropriate state 447 */ 448 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION) 449 ppb_1284_terminate(ppbus); 450 451 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) { 452 /* XXX should check a variable before sleeping */ 453#ifdef DEBUG_1284 454 printf("s"); 455#endif 456 457 ppi_enable_intr(ppidev); 458 459 /* sleep until IEEE1284 negotiation starts */ 460 error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0); 461 462 switch (error) { 463 case 0: 464 /* negotiate peripheral side with BYTE mode */ 465 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0); 466 break; 467 case EWOULDBLOCK: 468 break; 469 default: 470 goto error; 471 } 472 } 473#ifdef DEBUG_1284 474 printf("N"); 475#endif 476 477 /* negotiation done, write bytes to master host */ 478 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) { 479 uiomove(ppi->ppi_buffer, len, uio); 480 if ((error = byte_peripheral_write(ppbus, 481 ppi->ppi_buffer, len, &sent))) 482 goto error; 483#ifdef DEBUG_1284 484 printf("d"); 485#endif 486 } 487 488error: 489 490#else /* PERIPH_1284 */ 491 int error = ENODEV; 492#endif 493 494 return (error); 495} 496 497static int 498ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct thread *td) 499{ 500 u_int unit = minor(dev); 501 device_t ppidev = UNITODEVICE(unit); 502 device_t ppbus = device_get_parent(ppidev); 503 int error = 0; 504 u_int8_t *val = (u_int8_t *)data; 505 506 switch (cmd) { 507 508 case PPIGDATA: /* get data register */ 509 *val = ppb_rdtr(ppbus); 510 break; 511 case PPIGSTATUS: /* get status bits */ 512 *val = ppb_rstr(ppbus); 513 break; 514 case PPIGCTRL: /* get control bits */ 515 *val = ppb_rctr(ppbus); 516 break; 517 case PPIGEPPD: /* get EPP data bits */ 518 *val = ppb_repp_D(ppbus); 519 break; 520 case PPIGECR: /* get ECP bits */ 521 *val = ppb_recr(ppbus); 522 break; 523 case PPIGFIFO: /* read FIFO */ 524 *val = ppb_rfifo(ppbus); 525 break; 526 case PPISDATA: /* set data register */ 527 ppb_wdtr(ppbus, *val); 528 break; 529 case PPISSTATUS: /* set status bits */ 530 ppb_wstr(ppbus, *val); 531 break; 532 case PPISCTRL: /* set control bits */ 533 ppb_wctr(ppbus, *val); 534 break; 535 case PPISEPPD: /* set EPP data bits */ 536 ppb_wepp_D(ppbus, *val); 537 break; 538 case PPISECR: /* set ECP bits */ 539 ppb_wecr(ppbus, *val); 540 break; 541 case PPISFIFO: /* write FIFO */ 542 ppb_wfifo(ppbus, *val); 543 break; 544 case PPIGEPPA: /* get EPP address bits */ 545 *val = ppb_repp_A(ppbus); 546 break; 547 case PPISEPPA: /* set EPP address bits */ 548 ppb_wepp_A(ppbus, *val); 549 break; 550 default: 551 error = ENOTTY; 552 break; 553 } 554 555 return (error); 556} 557 558static device_method_t ppi_methods[] = { 559 /* device interface */ 560 DEVMETHOD(device_identify, ppi_identify), 561 DEVMETHOD(device_probe, ppi_probe), 562 DEVMETHOD(device_attach, ppi_attach), 563 564 { 0, 0 } 565}; 566 567static driver_t ppi_driver = { 568 "ppi", 569 ppi_methods, 570 sizeof(struct ppi_data), 571}; 572DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0); 573