if_pcn.c revision 144981
1/*- 2 * Copyright (c) 2000 Berkeley Software Design, Inc. 3 * Copyright (c) 1997, 1998, 1999, 2000 4 * Bill Paul <wpaul@osd.bsdi.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include <sys/cdefs.h> 35__FBSDID("$FreeBSD: head/sys/pci/if_pcn.c 144981 2005-04-13 01:32:06Z mdodd $"); 36 37/* 38 * AMD Am79c972 fast ethernet PCI NIC driver. Datasheets are available 39 * from http://www.amd.com. 40 * 41 * The AMD PCnet/PCI controllers are more advanced and functional 42 * versions of the venerable 7990 LANCE. The PCnet/PCI chips retain 43 * backwards compatibility with the LANCE and thus can be made 44 * to work with older LANCE drivers. This is in fact how the 45 * PCnet/PCI chips were supported in FreeBSD originally. The trouble 46 * is that the PCnet/PCI devices offer several performance enhancements 47 * which can't be exploited in LANCE compatibility mode. Chief among 48 * these enhancements is the ability to perform PCI DMA operations 49 * using 32-bit addressing (which eliminates the need for ISA 50 * bounce-buffering), and special receive buffer alignment (which 51 * allows the receive handler to pass packets to the upper protocol 52 * layers without copying on both the x86 and alpha platforms). 53 */ 54 55#include <sys/param.h> 56#include <sys/systm.h> 57#include <sys/sockio.h> 58#include <sys/mbuf.h> 59#include <sys/malloc.h> 60#include <sys/kernel.h> 61#include <sys/module.h> 62#include <sys/socket.h> 63 64#include <net/if.h> 65#include <net/if_arp.h> 66#include <net/ethernet.h> 67#include <net/if_dl.h> 68#include <net/if_media.h> 69 70#include <net/bpf.h> 71 72#include <vm/vm.h> /* for vtophys */ 73#include <vm/pmap.h> /* for vtophys */ 74#include <machine/bus_pio.h> 75#include <machine/bus_memio.h> 76#include <machine/bus.h> 77#include <machine/resource.h> 78#include <sys/bus.h> 79#include <sys/rman.h> 80 81#include <dev/mii/mii.h> 82#include <dev/mii/miivar.h> 83 84#include <dev/pci/pcireg.h> 85#include <dev/pci/pcivar.h> 86 87#define PCN_USEIOSPACE 88 89#include <pci/if_pcnreg.h> 90 91MODULE_DEPEND(pcn, pci, 1, 1, 1); 92MODULE_DEPEND(pcn, ether, 1, 1, 1); 93MODULE_DEPEND(pcn, miibus, 1, 1, 1); 94 95/* "controller miibus0" required. See GENERIC if you get errors here. */ 96#include "miibus_if.h" 97 98/* 99 * Various supported device vendors/types and their names. 100 */ 101static struct pcn_type pcn_devs[] = { 102 { PCN_VENDORID, PCN_DEVICEID_PCNET, "AMD PCnet/PCI 10/100BaseTX" }, 103 { PCN_VENDORID, PCN_DEVICEID_HOME, "AMD PCnet/Home HomePNA" }, 104 { 0, 0, NULL } 105}; 106 107static struct pcn_chipid { 108 u_int32_t id; 109 char * name; 110} pcn_chipid[] = { 111 { Am79C960, "Am79C960" }, 112 { Am79C961, "Am79C961" }, 113 { Am79C961A, "Am79C961A" }, 114 { Am79C965, "Am79C965" }, 115 { Am79C970, "Am79C970" }, 116 { Am79C970A, "Am79C970A" }, 117 { Am79C971, "Am79C971" }, 118 { Am79C972, "Am79C972" }, 119 { Am79C973, "Am79C973" }, 120 { Am79C978, "Am79C978" }, 121 { Am79C975, "Am79C975" }, 122 { Am79C976, "Am79C976" }, 123 { 0, NULL }, 124}; 125 126static char * pcn_chipid_name(u_int32_t); 127static u_int32_t pcn_chip_id(device_t); 128 129static u_int32_t pcn_csr_read(struct pcn_softc *, int); 130static u_int16_t pcn_csr_read16(struct pcn_softc *, int); 131static u_int16_t pcn_bcr_read16(struct pcn_softc *, int); 132static void pcn_csr_write(struct pcn_softc *, int, int); 133static u_int32_t pcn_bcr_read(struct pcn_softc *, int); 134static void pcn_bcr_write(struct pcn_softc *, int, int); 135 136static int pcn_probe(device_t); 137static int pcn_attach(device_t); 138static int pcn_detach(device_t); 139 140static int pcn_newbuf(struct pcn_softc *, int, struct mbuf *); 141static int pcn_encap(struct pcn_softc *, struct mbuf *, u_int32_t *); 142static void pcn_rxeof(struct pcn_softc *); 143static void pcn_txeof(struct pcn_softc *); 144static void pcn_intr(void *); 145static void pcn_tick(void *); 146static void pcn_start(struct ifnet *); 147static int pcn_ioctl(struct ifnet *, u_long, caddr_t); 148static void pcn_init(void *); 149static void pcn_stop(struct pcn_softc *); 150static void pcn_watchdog(struct ifnet *); 151static void pcn_shutdown(device_t); 152static int pcn_ifmedia_upd(struct ifnet *); 153static void pcn_ifmedia_sts(struct ifnet *, struct ifmediareq *); 154 155static int pcn_miibus_readreg(device_t, int, int); 156static int pcn_miibus_writereg(device_t, int, int, int); 157static void pcn_miibus_statchg(device_t); 158 159static void pcn_setfilt(struct ifnet *); 160static void pcn_setmulti(struct pcn_softc *); 161static void pcn_reset(struct pcn_softc *); 162static int pcn_list_rx_init(struct pcn_softc *); 163static int pcn_list_tx_init(struct pcn_softc *); 164 165#ifdef PCN_USEIOSPACE 166#define PCN_RES SYS_RES_IOPORT 167#define PCN_RID PCN_PCI_LOIO 168#else 169#define PCN_RES SYS_RES_MEMORY 170#define PCN_RID PCN_PCI_LOMEM 171#endif 172 173static device_method_t pcn_methods[] = { 174 /* Device interface */ 175 DEVMETHOD(device_probe, pcn_probe), 176 DEVMETHOD(device_attach, pcn_attach), 177 DEVMETHOD(device_detach, pcn_detach), 178 DEVMETHOD(device_shutdown, pcn_shutdown), 179 180 /* bus interface */ 181 DEVMETHOD(bus_print_child, bus_generic_print_child), 182 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 183 184 /* MII interface */ 185 DEVMETHOD(miibus_readreg, pcn_miibus_readreg), 186 DEVMETHOD(miibus_writereg, pcn_miibus_writereg), 187 DEVMETHOD(miibus_statchg, pcn_miibus_statchg), 188 189 { 0, 0 } 190}; 191 192static driver_t pcn_driver = { 193 "pcn", 194 pcn_methods, 195 sizeof(struct pcn_softc) 196}; 197 198static devclass_t pcn_devclass; 199 200DRIVER_MODULE(pcn, pci, pcn_driver, pcn_devclass, 0, 0); 201DRIVER_MODULE(miibus, pcn, miibus_driver, miibus_devclass, 0, 0); 202 203#define PCN_CSR_SETBIT(sc, reg, x) \ 204 pcn_csr_write(sc, reg, pcn_csr_read(sc, reg) | (x)) 205 206#define PCN_CSR_CLRBIT(sc, reg, x) \ 207 pcn_csr_write(sc, reg, pcn_csr_read(sc, reg) & ~(x)) 208 209#define PCN_BCR_SETBIT(sc, reg, x) \ 210 pcn_bcr_write(sc, reg, pcn_bcr_read(sc, reg) | (x)) 211 212#define PCN_BCR_CLRBIT(sc, reg, x) \ 213 pcn_bcr_write(sc, reg, pcn_bcr_read(sc, reg) & ~(x)) 214 215static u_int32_t 216pcn_csr_read(sc, reg) 217 struct pcn_softc *sc; 218 int reg; 219{ 220 CSR_WRITE_4(sc, PCN_IO32_RAP, reg); 221 return(CSR_READ_4(sc, PCN_IO32_RDP)); 222} 223 224static u_int16_t 225pcn_csr_read16(sc, reg) 226 struct pcn_softc *sc; 227 int reg; 228{ 229 CSR_WRITE_2(sc, PCN_IO16_RAP, reg); 230 return(CSR_READ_2(sc, PCN_IO16_RDP)); 231} 232 233static void 234pcn_csr_write(sc, reg, val) 235 struct pcn_softc *sc; 236 int reg; 237 int val; 238{ 239 CSR_WRITE_4(sc, PCN_IO32_RAP, reg); 240 CSR_WRITE_4(sc, PCN_IO32_RDP, val); 241 return; 242} 243 244static u_int32_t 245pcn_bcr_read(sc, reg) 246 struct pcn_softc *sc; 247 int reg; 248{ 249 CSR_WRITE_4(sc, PCN_IO32_RAP, reg); 250 return(CSR_READ_4(sc, PCN_IO32_BDP)); 251} 252 253static u_int16_t 254pcn_bcr_read16(sc, reg) 255 struct pcn_softc *sc; 256 int reg; 257{ 258 CSR_WRITE_2(sc, PCN_IO16_RAP, reg); 259 return(CSR_READ_2(sc, PCN_IO16_BDP)); 260} 261 262static void 263pcn_bcr_write(sc, reg, val) 264 struct pcn_softc *sc; 265 int reg; 266 int val; 267{ 268 CSR_WRITE_4(sc, PCN_IO32_RAP, reg); 269 CSR_WRITE_4(sc, PCN_IO32_BDP, val); 270 return; 271} 272 273static int 274pcn_miibus_readreg(dev, phy, reg) 275 device_t dev; 276 int phy, reg; 277{ 278 struct pcn_softc *sc; 279 int val; 280 281 sc = device_get_softc(dev); 282 283 if (sc->pcn_phyaddr && phy > sc->pcn_phyaddr) 284 return(0); 285 286 pcn_bcr_write(sc, PCN_BCR_MIIADDR, reg | (phy << 5)); 287 val = pcn_bcr_read(sc, PCN_BCR_MIIDATA) & 0xFFFF; 288 if (val == 0xFFFF) 289 return(0); 290 291 sc->pcn_phyaddr = phy; 292 293 return(val); 294} 295 296static int 297pcn_miibus_writereg(dev, phy, reg, data) 298 device_t dev; 299 int phy, reg, data; 300{ 301 struct pcn_softc *sc; 302 303 sc = device_get_softc(dev); 304 305 pcn_bcr_write(sc, PCN_BCR_MIIADDR, reg | (phy << 5)); 306 pcn_bcr_write(sc, PCN_BCR_MIIDATA, data); 307 308 return(0); 309} 310 311static void 312pcn_miibus_statchg(dev) 313 device_t dev; 314{ 315 struct pcn_softc *sc; 316 struct mii_data *mii; 317 318 sc = device_get_softc(dev); 319 mii = device_get_softc(sc->pcn_miibus); 320 321 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) { 322 PCN_BCR_SETBIT(sc, PCN_BCR_DUPLEX, PCN_DUPLEX_FDEN); 323 } else { 324 PCN_BCR_CLRBIT(sc, PCN_BCR_DUPLEX, PCN_DUPLEX_FDEN); 325 } 326 327 return; 328} 329 330static void 331pcn_setmulti(sc) 332 struct pcn_softc *sc; 333{ 334 struct ifnet *ifp; 335 struct ifmultiaddr *ifma; 336 u_int32_t h, i; 337 u_int16_t hashes[4] = { 0, 0, 0, 0 }; 338 339 ifp = &sc->arpcom.ac_if; 340 341 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND); 342 343 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 344 for (i = 0; i < 4; i++) 345 pcn_csr_write(sc, PCN_CSR_MAR0 + i, 0xFFFF); 346 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND); 347 return; 348 } 349 350 /* first, zot all the existing hash bits */ 351 for (i = 0; i < 4; i++) 352 pcn_csr_write(sc, PCN_CSR_MAR0 + i, 0); 353 354 /* now program new ones */ 355 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 356 if (ifma->ifma_addr->sa_family != AF_LINK) 357 continue; 358 h = ether_crc32_le(LLADDR((struct sockaddr_dl *) 359 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 360 hashes[h >> 4] |= 1 << (h & 0xF); 361 } 362 363 for (i = 0; i < 4; i++) 364 pcn_csr_write(sc, PCN_CSR_MAR0 + i, hashes[i]); 365 366 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND); 367 368 return; 369} 370 371static void 372pcn_reset(sc) 373 struct pcn_softc *sc; 374{ 375 /* 376 * Issue a reset by reading from the RESET register. 377 * Note that we don't know if the chip is operating in 378 * 16-bit or 32-bit mode at this point, so we attempt 379 * to reset the chip both ways. If one fails, the other 380 * will succeed. 381 */ 382 CSR_READ_2(sc, PCN_IO16_RESET); 383 CSR_READ_4(sc, PCN_IO32_RESET); 384 385 /* Wait a little while for the chip to get its brains in order. */ 386 DELAY(1000); 387 388 /* Select 32-bit (DWIO) mode */ 389 CSR_WRITE_4(sc, PCN_IO32_RDP, 0); 390 391 /* Select software style 3. */ 392 pcn_bcr_write(sc, PCN_BCR_SSTYLE, PCN_SWSTYLE_PCNETPCI_BURST); 393 394 return; 395} 396 397static char * 398pcn_chipid_name (u_int32_t id) 399{ 400 struct pcn_chipid *p = pcn_chipid; 401 402 while (p->name) { 403 if (id == p->id) 404 return (p->name); 405 p++; 406 } 407 return ("Unknown"); 408} 409 410static u_int32_t 411pcn_chip_id (device_t dev) 412{ 413 struct pcn_softc *sc; 414 u_int32_t chip_id; 415 416 sc = device_get_softc(dev); 417 /* 418 * Note: we can *NOT* put the chip into 419 * 32-bit mode yet. The lnc driver will only 420 * work in 16-bit mode, and once the chip 421 * goes into 32-bit mode, the only way to 422 * get it out again is with a hardware reset. 423 * So if pcn_probe() is called before the 424 * lnc driver's probe routine, the chip will 425 * be locked into 32-bit operation and the lnc 426 * driver will be unable to attach to it. 427 * Note II: if the chip happens to already 428 * be in 32-bit mode, we still need to check 429 * the chip ID, but first we have to detect 430 * 32-bit mode using only 16-bit operations. 431 * The safest way to do this is to read the 432 * PCI subsystem ID from BCR23/24 and compare 433 * that with the value read from PCI config 434 * space. 435 */ 436 chip_id = pcn_bcr_read16(sc, PCN_BCR_PCISUBSYSID); 437 chip_id <<= 16; 438 chip_id |= pcn_bcr_read16(sc, PCN_BCR_PCISUBVENID); 439 /* 440 * Note III: the test for 0x10001000 is a hack to 441 * pacify VMware, who's pseudo-PCnet interface is 442 * broken. Reading the subsystem register from PCI 443 * config space yields 0x00000000 while reading the 444 * same value from I/O space yields 0x10001000. It's 445 * not supposed to be that way. 446 */ 447 if (chip_id == pci_read_config(dev, 448 PCIR_SUBVEND_0, 4) || chip_id == 0x10001000) { 449 /* We're in 16-bit mode. */ 450 chip_id = pcn_csr_read16(sc, PCN_CSR_CHIPID1); 451 chip_id <<= 16; 452 chip_id |= pcn_csr_read16(sc, PCN_CSR_CHIPID0); 453 } else { 454 /* We're in 32-bit mode. */ 455 chip_id = pcn_csr_read(sc, PCN_CSR_CHIPID1); 456 chip_id <<= 16; 457 chip_id |= pcn_csr_read(sc, PCN_CSR_CHIPID0); 458 } 459 460 return (chip_id); 461} 462 463static struct pcn_type * 464pcn_match (u_int16_t vid, u_int16_t did) 465{ 466 struct pcn_type *t; 467 t = pcn_devs; 468 469 while(t->pcn_name != NULL) { 470 if ((vid == t->pcn_vid) && (did == t->pcn_did)) 471 return (t); 472 t++; 473 } 474 return (NULL); 475} 476 477/* 478 * Probe for an AMD chip. Check the PCI vendor and device 479 * IDs against our list and return a device name if we find a match. 480 */ 481static int 482pcn_probe(dev) 483 device_t dev; 484{ 485 struct pcn_type *t; 486 struct pcn_softc *sc; 487 int rid; 488 u_int32_t chip_id; 489 490 t = pcn_match(pci_get_vendor(dev), pci_get_device(dev)); 491 if (t == NULL) 492 return (ENXIO); 493 sc = device_get_softc(dev); 494 495 /* 496 * Temporarily map the I/O space so we can read the chip ID register. 497 */ 498 rid = PCN_RID; 499 sc->pcn_res = bus_alloc_resource_any(dev, PCN_RES, &rid, RF_ACTIVE); 500 if (sc->pcn_res == NULL) { 501 device_printf(dev, "couldn't map ports/memory\n"); 502 return(ENXIO); 503 } 504 sc->pcn_btag = rman_get_bustag(sc->pcn_res); 505 sc->pcn_bhandle = rman_get_bushandle(sc->pcn_res); 506 507 chip_id = pcn_chip_id(dev); 508 509 bus_release_resource(dev, PCN_RES, PCN_RID, sc->pcn_res); 510 511 switch((chip_id >> 12) & PART_MASK) { 512 case Am79C971: 513 case Am79C972: 514 case Am79C973: 515 case Am79C975: 516 case Am79C976: 517 case Am79C978: 518 break; 519 default: 520 return(ENXIO); 521 } 522 device_set_desc(dev, t->pcn_name); 523 return(BUS_PROBE_DEFAULT); 524} 525 526/* 527 * Attach the interface. Allocate softc structures, do ifmedia 528 * setup and ethernet/BPF attach. 529 */ 530static int 531pcn_attach(dev) 532 device_t dev; 533{ 534 u_int32_t eaddr[2]; 535 struct pcn_softc *sc; 536 struct ifnet *ifp; 537 int unit, error = 0, rid; 538 539 sc = device_get_softc(dev); 540 unit = device_get_unit(dev); 541 542 /* Initialize our mutex. */ 543 mtx_init(&sc->pcn_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 544 MTX_DEF | MTX_RECURSE); 545 /* 546 * Map control/status registers. 547 */ 548 pci_enable_busmaster(dev); 549 550 /* Retrieve the chip ID */ 551 sc->pcn_type = (pcn_chip_id(dev) >> 12) & PART_MASK; 552 device_printf(dev, "Chip ID %04x (%s)\n", 553 sc->pcn_type, pcn_chipid_name(sc->pcn_type)); 554 555 rid = PCN_RID; 556 sc->pcn_res = bus_alloc_resource_any(dev, PCN_RES, &rid, RF_ACTIVE); 557 558 if (sc->pcn_res == NULL) { 559 printf("pcn%d: couldn't map ports/memory\n", unit); 560 error = ENXIO; 561 goto fail; 562 } 563 564 sc->pcn_btag = rman_get_bustag(sc->pcn_res); 565 sc->pcn_bhandle = rman_get_bushandle(sc->pcn_res); 566 567 /* Allocate interrupt */ 568 rid = 0; 569 sc->pcn_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 570 RF_SHAREABLE | RF_ACTIVE); 571 572 if (sc->pcn_irq == NULL) { 573 printf("pcn%d: couldn't map interrupt\n", unit); 574 error = ENXIO; 575 goto fail; 576 } 577 578 /* Reset the adapter. */ 579 pcn_reset(sc); 580 581 /* 582 * Get station address from the EEPROM. 583 */ 584 eaddr[0] = CSR_READ_4(sc, PCN_IO32_APROM00); 585 eaddr[1] = CSR_READ_4(sc, PCN_IO32_APROM01); 586 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); 587 588 sc->pcn_unit = unit; 589 callout_handle_init(&sc->pcn_stat_ch); 590 591 sc->pcn_ldata = contigmalloc(sizeof(struct pcn_list_data), M_DEVBUF, 592 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 593 594 if (sc->pcn_ldata == NULL) { 595 printf("pcn%d: no memory for list buffers!\n", unit); 596 error = ENXIO; 597 goto fail; 598 } 599 bzero(sc->pcn_ldata, sizeof(struct pcn_list_data)); 600 601 ifp = &sc->arpcom.ac_if; 602 ifp->if_softc = sc; 603 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 604 ifp->if_mtu = ETHERMTU; 605 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | 606 IFF_NEEDSGIANT; 607 ifp->if_ioctl = pcn_ioctl; 608 ifp->if_start = pcn_start; 609 ifp->if_watchdog = pcn_watchdog; 610 ifp->if_init = pcn_init; 611 ifp->if_baudrate = 10000000; 612 ifp->if_snd.ifq_maxlen = PCN_TX_LIST_CNT - 1; 613 614 /* 615 * Do MII setup. 616 */ 617 if (mii_phy_probe(dev, &sc->pcn_miibus, 618 pcn_ifmedia_upd, pcn_ifmedia_sts)) { 619 printf("pcn%d: MII without any PHY!\n", sc->pcn_unit); 620 error = ENXIO; 621 goto fail; 622 } 623 624 /* 625 * Call MI attach routine. 626 */ 627 ether_ifattach(ifp, (u_int8_t *) eaddr); 628 629 /* Hook interrupt last to avoid having to lock softc */ 630 error = bus_setup_intr(dev, sc->pcn_irq, INTR_TYPE_NET, 631 pcn_intr, sc, &sc->pcn_intrhand); 632 633 if (error) { 634 printf("pcn%d: couldn't set up irq\n", unit); 635 ether_ifdetach(ifp); 636 goto fail; 637 } 638 639fail: 640 if (error) 641 pcn_detach(dev); 642 643 return(error); 644} 645 646/* 647 * Shutdown hardware and free up resources. This can be called any 648 * time after the mutex has been initialized. It is called in both 649 * the error case in attach and the normal detach case so it needs 650 * to be careful about only freeing resources that have actually been 651 * allocated. 652 */ 653static int 654pcn_detach(dev) 655 device_t dev; 656{ 657 struct pcn_softc *sc; 658 struct ifnet *ifp; 659 660 sc = device_get_softc(dev); 661 ifp = &sc->arpcom.ac_if; 662 663 KASSERT(mtx_initialized(&sc->pcn_mtx), ("pcn mutex not initialized")); 664 PCN_LOCK(sc); 665 666 /* These should only be active if attach succeeded */ 667 if (device_is_attached(dev)) { 668 pcn_reset(sc); 669 pcn_stop(sc); 670 ether_ifdetach(ifp); 671 } 672 if (sc->pcn_miibus) 673 device_delete_child(dev, sc->pcn_miibus); 674 bus_generic_detach(dev); 675 676 if (sc->pcn_intrhand) 677 bus_teardown_intr(dev, sc->pcn_irq, sc->pcn_intrhand); 678 if (sc->pcn_irq) 679 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->pcn_irq); 680 if (sc->pcn_res) 681 bus_release_resource(dev, PCN_RES, PCN_RID, sc->pcn_res); 682 683 if (sc->pcn_ldata) { 684 contigfree(sc->pcn_ldata, sizeof(struct pcn_list_data), 685 M_DEVBUF); 686 } 687 PCN_UNLOCK(sc); 688 689 mtx_destroy(&sc->pcn_mtx); 690 691 return(0); 692} 693 694/* 695 * Initialize the transmit descriptors. 696 */ 697static int 698pcn_list_tx_init(sc) 699 struct pcn_softc *sc; 700{ 701 struct pcn_list_data *ld; 702 struct pcn_ring_data *cd; 703 int i; 704 705 cd = &sc->pcn_cdata; 706 ld = sc->pcn_ldata; 707 708 for (i = 0; i < PCN_TX_LIST_CNT; i++) { 709 cd->pcn_tx_chain[i] = NULL; 710 ld->pcn_tx_list[i].pcn_tbaddr = 0; 711 ld->pcn_tx_list[i].pcn_txctl = 0; 712 ld->pcn_tx_list[i].pcn_txstat = 0; 713 } 714 715 cd->pcn_tx_prod = cd->pcn_tx_cons = cd->pcn_tx_cnt = 0; 716 717 return(0); 718} 719 720 721/* 722 * Initialize the RX descriptors and allocate mbufs for them. 723 */ 724static int 725pcn_list_rx_init(sc) 726 struct pcn_softc *sc; 727{ 728 struct pcn_ring_data *cd; 729 int i; 730 731 cd = &sc->pcn_cdata; 732 733 for (i = 0; i < PCN_RX_LIST_CNT; i++) { 734 if (pcn_newbuf(sc, i, NULL) == ENOBUFS) 735 return(ENOBUFS); 736 } 737 738 cd->pcn_rx_prod = 0; 739 740 return(0); 741} 742 743/* 744 * Initialize an RX descriptor and attach an MBUF cluster. 745 */ 746static int 747pcn_newbuf(sc, idx, m) 748 struct pcn_softc *sc; 749 int idx; 750 struct mbuf *m; 751{ 752 struct mbuf *m_new = NULL; 753 struct pcn_rx_desc *c; 754 755 c = &sc->pcn_ldata->pcn_rx_list[idx]; 756 757 if (m == NULL) { 758 MGETHDR(m_new, M_DONTWAIT, MT_DATA); 759 if (m_new == NULL) 760 return(ENOBUFS); 761 762 MCLGET(m_new, M_DONTWAIT); 763 if (!(m_new->m_flags & M_EXT)) { 764 m_freem(m_new); 765 return(ENOBUFS); 766 } 767 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 768 } else { 769 m_new = m; 770 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 771 m_new->m_data = m_new->m_ext.ext_buf; 772 } 773 774 m_adj(m_new, ETHER_ALIGN); 775 776 sc->pcn_cdata.pcn_rx_chain[idx] = m_new; 777 c->pcn_rbaddr = vtophys(mtod(m_new, caddr_t)); 778 c->pcn_bufsz = (~(PCN_RXLEN) + 1) & PCN_RXLEN_BUFSZ; 779 c->pcn_bufsz |= PCN_RXLEN_MBO; 780 c->pcn_rxstat = PCN_RXSTAT_STP|PCN_RXSTAT_ENP|PCN_RXSTAT_OWN; 781 782 return(0); 783} 784 785/* 786 * A frame has been uploaded: pass the resulting mbuf chain up to 787 * the higher level protocols. 788 */ 789static void 790pcn_rxeof(sc) 791 struct pcn_softc *sc; 792{ 793 struct mbuf *m; 794 struct ifnet *ifp; 795 struct pcn_rx_desc *cur_rx; 796 int i; 797 798 PCN_LOCK_ASSERT(sc); 799 800 ifp = &sc->arpcom.ac_if; 801 i = sc->pcn_cdata.pcn_rx_prod; 802 803 while(PCN_OWN_RXDESC(&sc->pcn_ldata->pcn_rx_list[i])) { 804 cur_rx = &sc->pcn_ldata->pcn_rx_list[i]; 805 m = sc->pcn_cdata.pcn_rx_chain[i]; 806 sc->pcn_cdata.pcn_rx_chain[i] = NULL; 807 808 /* 809 * If an error occurs, update stats, clear the 810 * status word and leave the mbuf cluster in place: 811 * it should simply get re-used next time this descriptor 812 * comes up in the ring. 813 */ 814 if (cur_rx->pcn_rxstat & PCN_RXSTAT_ERR) { 815 ifp->if_ierrors++; 816 pcn_newbuf(sc, i, m); 817 PCN_INC(i, PCN_RX_LIST_CNT); 818 continue; 819 } 820 821 if (pcn_newbuf(sc, i, NULL)) { 822 /* Ran out of mbufs; recycle this one. */ 823 pcn_newbuf(sc, i, m); 824 ifp->if_ierrors++; 825 PCN_INC(i, PCN_RX_LIST_CNT); 826 continue; 827 } 828 829 PCN_INC(i, PCN_RX_LIST_CNT); 830 831 /* No errors; receive the packet. */ 832 ifp->if_ipackets++; 833 m->m_len = m->m_pkthdr.len = 834 cur_rx->pcn_rxlen - ETHER_CRC_LEN; 835 m->m_pkthdr.rcvif = ifp; 836 837 PCN_UNLOCK(sc); 838 (*ifp->if_input)(ifp, m); 839 PCN_LOCK(sc); 840 } 841 842 sc->pcn_cdata.pcn_rx_prod = i; 843 844 return; 845} 846 847/* 848 * A frame was downloaded to the chip. It's safe for us to clean up 849 * the list buffers. 850 */ 851 852static void 853pcn_txeof(sc) 854 struct pcn_softc *sc; 855{ 856 struct pcn_tx_desc *cur_tx = NULL; 857 struct ifnet *ifp; 858 u_int32_t idx; 859 860 ifp = &sc->arpcom.ac_if; 861 862 /* 863 * Go through our tx list and free mbufs for those 864 * frames that have been transmitted. 865 */ 866 idx = sc->pcn_cdata.pcn_tx_cons; 867 while (idx != sc->pcn_cdata.pcn_tx_prod) { 868 cur_tx = &sc->pcn_ldata->pcn_tx_list[idx]; 869 870 if (!PCN_OWN_TXDESC(cur_tx)) 871 break; 872 873 if (!(cur_tx->pcn_txctl & PCN_TXCTL_ENP)) { 874 sc->pcn_cdata.pcn_tx_cnt--; 875 PCN_INC(idx, PCN_TX_LIST_CNT); 876 continue; 877 } 878 879 if (cur_tx->pcn_txctl & PCN_TXCTL_ERR) { 880 ifp->if_oerrors++; 881 if (cur_tx->pcn_txstat & PCN_TXSTAT_EXDEF) 882 ifp->if_collisions++; 883 if (cur_tx->pcn_txstat & PCN_TXSTAT_RTRY) 884 ifp->if_collisions++; 885 } 886 887 ifp->if_collisions += 888 cur_tx->pcn_txstat & PCN_TXSTAT_TRC; 889 890 ifp->if_opackets++; 891 if (sc->pcn_cdata.pcn_tx_chain[idx] != NULL) { 892 m_freem(sc->pcn_cdata.pcn_tx_chain[idx]); 893 sc->pcn_cdata.pcn_tx_chain[idx] = NULL; 894 } 895 896 sc->pcn_cdata.pcn_tx_cnt--; 897 PCN_INC(idx, PCN_TX_LIST_CNT); 898 } 899 900 if (idx != sc->pcn_cdata.pcn_tx_cons) { 901 /* Some buffers have been freed. */ 902 sc->pcn_cdata.pcn_tx_cons = idx; 903 ifp->if_flags &= ~IFF_OACTIVE; 904 } 905 ifp->if_timer = (sc->pcn_cdata.pcn_tx_cnt == 0) ? 0 : 5; 906 907 return; 908} 909 910static void 911pcn_tick(xsc) 912 void *xsc; 913{ 914 struct pcn_softc *sc; 915 struct mii_data *mii; 916 struct ifnet *ifp; 917 918 sc = xsc; 919 ifp = &sc->arpcom.ac_if; 920 PCN_LOCK(sc); 921 922 mii = device_get_softc(sc->pcn_miibus); 923 mii_tick(mii); 924 925 /* link just died */ 926 if (sc->pcn_link & !(mii->mii_media_status & IFM_ACTIVE)) 927 sc->pcn_link = 0; 928 929 /* link just came up, restart */ 930 if (!sc->pcn_link && mii->mii_media_status & IFM_ACTIVE && 931 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 932 sc->pcn_link++; 933 if (ifp->if_snd.ifq_head != NULL) 934 pcn_start(ifp); 935 } 936 937 sc->pcn_stat_ch = timeout(pcn_tick, sc, hz); 938 939 PCN_UNLOCK(sc); 940 941 return; 942} 943 944static void 945pcn_intr(arg) 946 void *arg; 947{ 948 struct pcn_softc *sc; 949 struct ifnet *ifp; 950 u_int32_t status; 951 952 sc = arg; 953 ifp = &sc->arpcom.ac_if; 954 955 /* Suppress unwanted interrupts */ 956 if (!(ifp->if_flags & IFF_UP)) { 957 pcn_stop(sc); 958 return; 959 } 960 961 PCN_LOCK(sc); 962 963 CSR_WRITE_4(sc, PCN_IO32_RAP, PCN_CSR_CSR); 964 965 while ((status = CSR_READ_4(sc, PCN_IO32_RDP)) & PCN_CSR_INTR) { 966 CSR_WRITE_4(sc, PCN_IO32_RDP, status); 967 968 if (status & PCN_CSR_RINT) 969 pcn_rxeof(sc); 970 971 if (status & PCN_CSR_TINT) 972 pcn_txeof(sc); 973 974 if (status & PCN_CSR_ERR) { 975 pcn_init(sc); 976 break; 977 } 978 } 979 980 if (ifp->if_snd.ifq_head != NULL) 981 pcn_start(ifp); 982 983 PCN_UNLOCK(sc); 984 return; 985} 986 987/* 988 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data 989 * pointers to the fragment pointers. 990 */ 991static int 992pcn_encap(sc, m_head, txidx) 993 struct pcn_softc *sc; 994 struct mbuf *m_head; 995 u_int32_t *txidx; 996{ 997 struct pcn_tx_desc *f = NULL; 998 struct mbuf *m; 999 int frag, cur, cnt = 0; 1000 1001 /* 1002 * Start packing the mbufs in this chain into 1003 * the fragment pointers. Stop when we run out 1004 * of fragments or hit the end of the mbuf chain. 1005 */ 1006 m = m_head; 1007 cur = frag = *txidx; 1008 1009 for (m = m_head; m != NULL; m = m->m_next) { 1010 if (m->m_len == 0) 1011 continue; 1012 1013 if ((PCN_TX_LIST_CNT - (sc->pcn_cdata.pcn_tx_cnt + cnt)) < 2) 1014 return(ENOBUFS); 1015 f = &sc->pcn_ldata->pcn_tx_list[frag]; 1016 f->pcn_txctl = (~(m->m_len) + 1) & PCN_TXCTL_BUFSZ; 1017 f->pcn_txctl |= PCN_TXCTL_MBO; 1018 f->pcn_tbaddr = vtophys(mtod(m, vm_offset_t)); 1019 if (cnt == 0) 1020 f->pcn_txctl |= PCN_TXCTL_STP; 1021 else 1022 f->pcn_txctl |= PCN_TXCTL_OWN; 1023 cur = frag; 1024 PCN_INC(frag, PCN_TX_LIST_CNT); 1025 cnt++; 1026 } 1027 1028 if (m != NULL) 1029 return(ENOBUFS); 1030 1031 sc->pcn_cdata.pcn_tx_chain[cur] = m_head; 1032 sc->pcn_ldata->pcn_tx_list[cur].pcn_txctl |= 1033 PCN_TXCTL_ENP|PCN_TXCTL_ADD_FCS|PCN_TXCTL_MORE_LTINT; 1034 sc->pcn_ldata->pcn_tx_list[*txidx].pcn_txctl |= PCN_TXCTL_OWN; 1035 sc->pcn_cdata.pcn_tx_cnt += cnt; 1036 *txidx = frag; 1037 1038 return(0); 1039} 1040 1041/* 1042 * Main transmit routine. To avoid having to do mbuf copies, we put pointers 1043 * to the mbuf data regions directly in the transmit lists. We also save a 1044 * copy of the pointers since the transmit list fragment pointers are 1045 * physical addresses. 1046 */ 1047static void 1048pcn_start(ifp) 1049 struct ifnet *ifp; 1050{ 1051 struct pcn_softc *sc; 1052 struct mbuf *m_head = NULL; 1053 u_int32_t idx; 1054 1055 sc = ifp->if_softc; 1056 1057 PCN_LOCK(sc); 1058 1059 if (!sc->pcn_link) { 1060 PCN_UNLOCK(sc); 1061 return; 1062 } 1063 1064 idx = sc->pcn_cdata.pcn_tx_prod; 1065 1066 if (ifp->if_flags & IFF_OACTIVE) { 1067 PCN_UNLOCK(sc); 1068 return; 1069 } 1070 1071 while(sc->pcn_cdata.pcn_tx_chain[idx] == NULL) { 1072 IF_DEQUEUE(&ifp->if_snd, m_head); 1073 if (m_head == NULL) 1074 break; 1075 1076 if (pcn_encap(sc, m_head, &idx)) { 1077 IF_PREPEND(&ifp->if_snd, m_head); 1078 ifp->if_flags |= IFF_OACTIVE; 1079 break; 1080 } 1081 1082 /* 1083 * If there's a BPF listener, bounce a copy of this frame 1084 * to him. 1085 */ 1086 BPF_MTAP(ifp, m_head); 1087 1088 } 1089 1090 /* Transmit */ 1091 sc->pcn_cdata.pcn_tx_prod = idx; 1092 pcn_csr_write(sc, PCN_CSR_CSR, PCN_CSR_TX|PCN_CSR_INTEN); 1093 1094 /* 1095 * Set a timeout in case the chip goes out to lunch. 1096 */ 1097 ifp->if_timer = 5; 1098 1099 PCN_UNLOCK(sc); 1100 1101 return; 1102} 1103 1104static void 1105pcn_setfilt(ifp) 1106 struct ifnet *ifp; 1107{ 1108 struct pcn_softc *sc; 1109 1110 sc = ifp->if_softc; 1111 1112 /* If we want promiscuous mode, set the allframes bit. */ 1113 if (ifp->if_flags & IFF_PROMISC) { 1114 PCN_CSR_SETBIT(sc, PCN_CSR_MODE, PCN_MODE_PROMISC); 1115 } else { 1116 PCN_CSR_CLRBIT(sc, PCN_CSR_MODE, PCN_MODE_PROMISC); 1117 } 1118 1119 /* Set the capture broadcast bit to capture broadcast frames. */ 1120 if (ifp->if_flags & IFF_BROADCAST) { 1121 PCN_CSR_CLRBIT(sc, PCN_CSR_MODE, PCN_MODE_RXNOBROAD); 1122 } else { 1123 PCN_CSR_SETBIT(sc, PCN_CSR_MODE, PCN_MODE_RXNOBROAD); 1124 } 1125 1126 return; 1127} 1128 1129static void 1130pcn_init(xsc) 1131 void *xsc; 1132{ 1133 struct pcn_softc *sc = xsc; 1134 struct ifnet *ifp = &sc->arpcom.ac_if; 1135 struct mii_data *mii = NULL; 1136 1137 PCN_LOCK(sc); 1138 1139 /* 1140 * Cancel pending I/O and free all RX/TX buffers. 1141 */ 1142 pcn_stop(sc); 1143 pcn_reset(sc); 1144 1145 mii = device_get_softc(sc->pcn_miibus); 1146 1147 /* Set MAC address */ 1148 pcn_csr_write(sc, PCN_CSR_PAR0, 1149 ((u_int16_t *)sc->arpcom.ac_enaddr)[0]); 1150 pcn_csr_write(sc, PCN_CSR_PAR1, 1151 ((u_int16_t *)sc->arpcom.ac_enaddr)[1]); 1152 pcn_csr_write(sc, PCN_CSR_PAR2, 1153 ((u_int16_t *)sc->arpcom.ac_enaddr)[2]); 1154 1155 /* Init circular RX list. */ 1156 if (pcn_list_rx_init(sc) == ENOBUFS) { 1157 printf("pcn%d: initialization failed: no " 1158 "memory for rx buffers\n", sc->pcn_unit); 1159 pcn_stop(sc); 1160 PCN_UNLOCK(sc); 1161 return; 1162 } 1163 1164 /* 1165 * Init tx descriptors. 1166 */ 1167 pcn_list_tx_init(sc); 1168 1169 /* Set up the mode register. */ 1170 pcn_csr_write(sc, PCN_CSR_MODE, PCN_PORT_MII); 1171 1172 /* Set up RX filter. */ 1173 pcn_setfilt(ifp); 1174 1175 /* 1176 * Load the multicast filter. 1177 */ 1178 pcn_setmulti(sc); 1179 1180 /* 1181 * Load the addresses of the RX and TX lists. 1182 */ 1183 pcn_csr_write(sc, PCN_CSR_RXADDR0, 1184 vtophys(&sc->pcn_ldata->pcn_rx_list[0]) & 0xFFFF); 1185 pcn_csr_write(sc, PCN_CSR_RXADDR1, 1186 (vtophys(&sc->pcn_ldata->pcn_rx_list[0]) >> 16) & 0xFFFF); 1187 pcn_csr_write(sc, PCN_CSR_TXADDR0, 1188 vtophys(&sc->pcn_ldata->pcn_tx_list[0]) & 0xFFFF); 1189 pcn_csr_write(sc, PCN_CSR_TXADDR1, 1190 (vtophys(&sc->pcn_ldata->pcn_tx_list[0]) >> 16) & 0xFFFF); 1191 1192 /* Set the RX and TX ring sizes. */ 1193 pcn_csr_write(sc, PCN_CSR_RXRINGLEN, (~PCN_RX_LIST_CNT) + 1); 1194 pcn_csr_write(sc, PCN_CSR_TXRINGLEN, (~PCN_TX_LIST_CNT) + 1); 1195 1196 /* We're not using the initialization block. */ 1197 pcn_csr_write(sc, PCN_CSR_IAB1, 0); 1198 1199 /* Enable fast suspend mode. */ 1200 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL2, PCN_EXTCTL2_FASTSPNDE); 1201 1202 /* 1203 * Enable burst read and write. Also set the no underflow 1204 * bit. This will avoid transmit underruns in certain 1205 * conditions while still providing decent performance. 1206 */ 1207 PCN_BCR_SETBIT(sc, PCN_BCR_BUSCTL, PCN_BUSCTL_NOUFLOW| 1208 PCN_BUSCTL_BREAD|PCN_BUSCTL_BWRITE); 1209 1210 /* Enable graceful recovery from underflow. */ 1211 PCN_CSR_SETBIT(sc, PCN_CSR_IMR, PCN_IMR_DXSUFLO); 1212 1213 /* Enable auto-padding of short TX frames. */ 1214 PCN_CSR_SETBIT(sc, PCN_CSR_TFEAT, PCN_TFEAT_PAD_TX); 1215 1216 /* Disable MII autoneg (we handle this ourselves). */ 1217 PCN_BCR_SETBIT(sc, PCN_BCR_MIICTL, PCN_MIICTL_DANAS); 1218 1219 if (sc->pcn_type == Am79C978) 1220 pcn_bcr_write(sc, PCN_BCR_PHYSEL, 1221 PCN_PHYSEL_PCNET|PCN_PHY_HOMEPNA); 1222 1223 /* Enable interrupts and start the controller running. */ 1224 pcn_csr_write(sc, PCN_CSR_CSR, PCN_CSR_INTEN|PCN_CSR_START); 1225 1226 mii_mediachg(mii); 1227 1228 ifp->if_flags |= IFF_RUNNING; 1229 ifp->if_flags &= ~IFF_OACTIVE; 1230 1231 sc->pcn_stat_ch = timeout(pcn_tick, sc, hz); 1232 PCN_UNLOCK(sc); 1233 1234 return; 1235} 1236 1237/* 1238 * Set media options. 1239 */ 1240static int 1241pcn_ifmedia_upd(ifp) 1242 struct ifnet *ifp; 1243{ 1244 struct pcn_softc *sc; 1245 struct mii_data *mii; 1246 1247 sc = ifp->if_softc; 1248 mii = device_get_softc(sc->pcn_miibus); 1249 1250 sc->pcn_link = 0; 1251 if (mii->mii_instance) { 1252 struct mii_softc *miisc; 1253 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1254 mii_phy_reset(miisc); 1255 } 1256 mii_mediachg(mii); 1257 1258 return(0); 1259} 1260 1261/* 1262 * Report current media status. 1263 */ 1264static void 1265pcn_ifmedia_sts(ifp, ifmr) 1266 struct ifnet *ifp; 1267 struct ifmediareq *ifmr; 1268{ 1269 struct pcn_softc *sc; 1270 struct mii_data *mii; 1271 1272 sc = ifp->if_softc; 1273 1274 mii = device_get_softc(sc->pcn_miibus); 1275 mii_pollstat(mii); 1276 ifmr->ifm_active = mii->mii_media_active; 1277 ifmr->ifm_status = mii->mii_media_status; 1278 1279 return; 1280} 1281 1282static int 1283pcn_ioctl(ifp, command, data) 1284 struct ifnet *ifp; 1285 u_long command; 1286 caddr_t data; 1287{ 1288 struct pcn_softc *sc = ifp->if_softc; 1289 struct ifreq *ifr = (struct ifreq *) data; 1290 struct mii_data *mii = NULL; 1291 int error = 0; 1292 1293 PCN_LOCK(sc); 1294 1295 switch(command) { 1296 case SIOCSIFFLAGS: 1297 if (ifp->if_flags & IFF_UP) { 1298 if (ifp->if_flags & IFF_RUNNING && 1299 ifp->if_flags & IFF_PROMISC && 1300 !(sc->pcn_if_flags & IFF_PROMISC)) { 1301 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1, 1302 PCN_EXTCTL1_SPND); 1303 pcn_setfilt(ifp); 1304 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1, 1305 PCN_EXTCTL1_SPND); 1306 pcn_csr_write(sc, PCN_CSR_CSR, 1307 PCN_CSR_INTEN|PCN_CSR_START); 1308 } else if (ifp->if_flags & IFF_RUNNING && 1309 !(ifp->if_flags & IFF_PROMISC) && 1310 sc->pcn_if_flags & IFF_PROMISC) { 1311 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1, 1312 PCN_EXTCTL1_SPND); 1313 pcn_setfilt(ifp); 1314 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1, 1315 PCN_EXTCTL1_SPND); 1316 pcn_csr_write(sc, PCN_CSR_CSR, 1317 PCN_CSR_INTEN|PCN_CSR_START); 1318 } else if (!(ifp->if_flags & IFF_RUNNING)) 1319 pcn_init(sc); 1320 } else { 1321 if (ifp->if_flags & IFF_RUNNING) 1322 pcn_stop(sc); 1323 } 1324 sc->pcn_if_flags = ifp->if_flags; 1325 error = 0; 1326 break; 1327 case SIOCADDMULTI: 1328 case SIOCDELMULTI: 1329 pcn_setmulti(sc); 1330 error = 0; 1331 break; 1332 case SIOCGIFMEDIA: 1333 case SIOCSIFMEDIA: 1334 mii = device_get_softc(sc->pcn_miibus); 1335 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); 1336 break; 1337 default: 1338 error = ether_ioctl(ifp, command, data); 1339 break; 1340 } 1341 1342 PCN_UNLOCK(sc); 1343 1344 return(error); 1345} 1346 1347static void 1348pcn_watchdog(ifp) 1349 struct ifnet *ifp; 1350{ 1351 struct pcn_softc *sc; 1352 1353 sc = ifp->if_softc; 1354 1355 PCN_LOCK(sc); 1356 1357 ifp->if_oerrors++; 1358 printf("pcn%d: watchdog timeout\n", sc->pcn_unit); 1359 1360 pcn_stop(sc); 1361 pcn_reset(sc); 1362 pcn_init(sc); 1363 1364 if (ifp->if_snd.ifq_head != NULL) 1365 pcn_start(ifp); 1366 1367 PCN_UNLOCK(sc); 1368 1369 return; 1370} 1371 1372/* 1373 * Stop the adapter and free any mbufs allocated to the 1374 * RX and TX lists. 1375 */ 1376static void 1377pcn_stop(sc) 1378 struct pcn_softc *sc; 1379{ 1380 register int i; 1381 struct ifnet *ifp; 1382 1383 ifp = &sc->arpcom.ac_if; 1384 PCN_LOCK(sc); 1385 ifp->if_timer = 0; 1386 1387 untimeout(pcn_tick, sc, sc->pcn_stat_ch); 1388 1389 /* Turn off interrupts */ 1390 PCN_CSR_CLRBIT(sc, PCN_CSR_CSR, PCN_CSR_INTEN); 1391 /* Stop adapter */ 1392 PCN_CSR_SETBIT(sc, PCN_CSR_CSR, PCN_CSR_STOP); 1393 sc->pcn_link = 0; 1394 1395 /* 1396 * Free data in the RX lists. 1397 */ 1398 for (i = 0; i < PCN_RX_LIST_CNT; i++) { 1399 if (sc->pcn_cdata.pcn_rx_chain[i] != NULL) { 1400 m_freem(sc->pcn_cdata.pcn_rx_chain[i]); 1401 sc->pcn_cdata.pcn_rx_chain[i] = NULL; 1402 } 1403 } 1404 bzero((char *)&sc->pcn_ldata->pcn_rx_list, 1405 sizeof(sc->pcn_ldata->pcn_rx_list)); 1406 1407 /* 1408 * Free the TX list buffers. 1409 */ 1410 for (i = 0; i < PCN_TX_LIST_CNT; i++) { 1411 if (sc->pcn_cdata.pcn_tx_chain[i] != NULL) { 1412 m_freem(sc->pcn_cdata.pcn_tx_chain[i]); 1413 sc->pcn_cdata.pcn_tx_chain[i] = NULL; 1414 } 1415 } 1416 1417 bzero((char *)&sc->pcn_ldata->pcn_tx_list, 1418 sizeof(sc->pcn_ldata->pcn_tx_list)); 1419 1420 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1421 PCN_UNLOCK(sc); 1422 1423 return; 1424} 1425 1426/* 1427 * Stop all chip I/O so that the kernel's probe routines don't 1428 * get confused by errant DMAs when rebooting. 1429 */ 1430static void 1431pcn_shutdown(dev) 1432 device_t dev; 1433{ 1434 struct pcn_softc *sc; 1435 1436 sc = device_get_softc(dev); 1437 1438 PCN_LOCK(sc); 1439 pcn_reset(sc); 1440 pcn_stop(sc); 1441 PCN_UNLOCK(sc); 1442 1443 return; 1444} 1445