1101704Smjacob/* $FreeBSD$ */ 2139749Simp/*- 3233425Smarius * Copyright (c) 2000-2010, LSI Logic Corporation and its contributors. 4147883Sscottl * All rights reserved. 5147883Sscottl * 6102599Smjacob * Redistribution and use in source and binary forms, with or without 7147883Sscottl * modification, are permitted provided that the following conditions are 8147883Sscottl * met: 9102599Smjacob * 1. Redistributions of source code must retain the above copyright 10147883Sscottl * notice, this list of conditions and the following disclaimer. 11147883Sscottl * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12147883Sscottl * substantially similar to the "NO WARRANTY" disclaimer below 13147883Sscottl * ("Disclaimer") and any redistribution must be conditioned upon including 14147883Sscottl * a substantially similar Disclaimer requirement for further binary 15147883Sscottl * redistribution. 16147883Sscottl * 3. Neither the name of the LSI Logic Corporation nor the names of its 17147883Sscottl * contributors may be used to endorse or promote products derived from 18147883Sscottl * this software without specific prior written permission. 19147883Sscottl * 20147883Sscottl * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21147883Sscottl * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22102599Smjacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23147883Sscottl * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24147883Sscottl * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25147883Sscottl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26147883Sscottl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27147883Sscottl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28147883Sscottl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29147883Sscottl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 30147883Sscottl * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31102599Smjacob * 32154603Smjacob * Name: mpi_cnfg.h 33101704Smjacob * Title: MPI Config message, structures, and Pages 34101704Smjacob * Creation Date: July 27, 2000 35101704Smjacob * 36233425Smarius * mpi_cnfg.h Version: 01.05.19 37101704Smjacob * 38101704Smjacob * Version History 39101704Smjacob * --------------- 40101704Smjacob * 41101704Smjacob * Date Version Description 42101704Smjacob * -------- -------- ------------------------------------------------------ 43101704Smjacob * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 44101704Smjacob * 06-06-00 01.00.01 Update version number for 1.0 release. 45101704Smjacob * 06-08-00 01.00.02 Added _PAGEVERSION definitions for all pages. 46101704Smjacob * Added FcPhLowestVersion, FcPhHighestVersion, Reserved2 47101704Smjacob * fields to FC_DEVICE_0 page, updated the page version. 48101704Smjacob * Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in 49101704Smjacob * SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages 50101704Smjacob * and updated the page versions. 51101704Smjacob * Added _RESPONSE_ID_MASK definition to SCSI_PORT_1 52101704Smjacob * page and updated the page version. 53101704Smjacob * Added Information field and _INFO_PARAMS_NEGOTIATED 54101704Smjacob * definitionto SCSI_DEVICE_0 page. 55101704Smjacob * 06-22-00 01.00.03 Removed batch controls from LAN_0 page and updated the 56101704Smjacob * page version. 57101704Smjacob * Added BucketsRemaining to LAN_1 page, redefined the 58101704Smjacob * state values, and updated the page version. 59101704Smjacob * Revised bus width definitions in SCSI_PORT_0, 60101704Smjacob * SCSI_DEVICE_0 and SCSI_DEVICE_1 pages. 61101704Smjacob * 06-30-00 01.00.04 Added MaxReplySize to LAN_1 page and updated the page 62101704Smjacob * version. 63101704Smjacob * Moved FC_DEVICE_0 PageAddress description to spec. 64101704Smjacob * 07-27-00 01.00.05 Corrected the SubsystemVendorID and SubsystemID field 65101704Smjacob * widths in IOC_0 page and updated the page version. 66101704Smjacob * 11-02-00 01.01.01 Original release for post 1.0 work 67101704Smjacob * Added Manufacturing pages, IO Unit Page 2, SCSI SPI 68101704Smjacob * Port Page 2, FC Port Page 4, FC Port Page 5 69101704Smjacob * 11-15-00 01.01.02 Interim changes to match proposals 70101704Smjacob * 12-04-00 01.01.03 Config page changes to match MPI rev 1.00.01. 71101704Smjacob * 12-05-00 01.01.04 Modified config page actions. 72101704Smjacob * 01-09-01 01.01.05 Added defines for page address formats. 73101704Smjacob * Data size for Manufacturing pages 2 and 3 no longer 74101704Smjacob * defined here. 75101704Smjacob * Io Unit Page 2 size is fixed at 4 adapters and some 76101704Smjacob * flags were changed. 77101704Smjacob * SCSI Port Page 2 Device Settings modified. 78101704Smjacob * New fields added to FC Port Page 0 and some flags 79101704Smjacob * cleaned up. 80101704Smjacob * Removed impedance flash from FC Port Page 1. 81101704Smjacob * Added FC Port pages 6 and 7. 82101704Smjacob * 01-25-01 01.01.06 Added MaxInitiators field to FcPortPage0. 83101704Smjacob * 01-29-01 01.01.07 Changed some defines to make them 32 character unique. 84101704Smjacob * Added some LinkType defines for FcPortPage0. 85101704Smjacob * 02-20-01 01.01.08 Started using MPI_POINTER. 86101704Smjacob * 02-27-01 01.01.09 Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with 87101704Smjacob * MPI_CONFIG_PAGETYPE_RAID_VOLUME. 88101704Smjacob * Added definitions and structures for IOC Page 2 and 89101704Smjacob * RAID Volume Page 2. 90101704Smjacob * 03-27-01 01.01.10 Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9. 91101704Smjacob * CONFIG_PAGE_FC_PORT_3 now supports persistent by DID. 92101704Smjacob * Added VendorId and ProductRevLevel fields to 93101704Smjacob * RAIDVOL2_IM_PHYS_ID struct. 94101704Smjacob * Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_ 95101704Smjacob * defines to make them compatible to MPI version 1.0. 96101704Smjacob * Added structure offset comments. 97101704Smjacob * 04-09-01 01.01.11 Added some new defines for the PageAddress field and 98101704Smjacob * removed some obsolete ones. 99101704Smjacob * Added IO Unit Page 3. 100101704Smjacob * Modified defines for Scsi Port Page 2. 101101704Smjacob * Modified RAID Volume Pages. 102101704Smjacob * 08-08-01 01.02.01 Original release for v1.2 work. 103101704Smjacob * Added SepID and SepBus to RVP2 IMPhysicalDisk struct. 104101704Smjacob * Added defines for the SEP bits in RVP2 VolumeSettings. 105101704Smjacob * Modified the DeviceSettings field in RVP2 to use the 106101704Smjacob * proper structure. 107101704Smjacob * Added defines for SES, SAF-TE, and cross channel for 108101704Smjacob * IOCPage2 CapabilitiesFlags. 109101704Smjacob * Removed define for MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE. 110101704Smjacob * Removed define for 111101704Smjacob * MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE. 112101704Smjacob * Added define for MPI_CONFIG_PAGEATTR_RO_PERSISTENT. 113101704Smjacob * 08-29-01 01.02.02 Fixed value for MPI_MANUFACTPAGE_DEVID_53C1035. 114101704Smjacob * Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY 115101704Smjacob * and MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY. 116101704Smjacob * Removed MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS, 117101704Smjacob * MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS, and 118101704Smjacob * MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS, and 119101704Smjacob * MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED. 120101704Smjacob * Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED 121101704Smjacob * and MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED. 122101704Smjacob * Added OnBusTimerValue to CONFIG_PAGE_SCSI_PORT_1. 123101704Smjacob * Added rejected bits to SCSI Device Page 0 Information. 124101704Smjacob * Increased size of ALPA array in FC Port Page 2 by one 125101704Smjacob * and removed a one byte reserved field. 126101704Smjacob * 09-28-01 01.02.03 Swapped NegWireSpeedLow and NegWireSpeedLow in 127101704Smjacob * CONFIG_PAGE_LAN_1 to match preferred 64-bit ordering. 128101704Smjacob * Added structures for Manufacturing Page 4, IO Unit 129101704Smjacob * Page 3, IOC Page 3, IOC Page 4, RAID Volume Page 0, and 130101704Smjacob * RAID PhysDisk Page 0. 131101704Smjacob * 10-04-01 01.02.04 Added define for MPI_CONFIG_PAGETYPE_RAID_PHYSDISK. 132101704Smjacob * Modified some of the new defines to make them 32 133101704Smjacob * character unique. 134101704Smjacob * Modified how variable length pages (arrays) are defined. 135101704Smjacob * Added generic defines for hot spare pools and RAID 136101704Smjacob * volume types. 137101704Smjacob * 11-01-01 01.02.05 Added define for MPI_IOUNITPAGE1_DISABLE_IR. 138115778Smjacob * 03-14-02 01.02.06 Added PCISlotNum field to CONFIG_PAGE_IOC_1 along with 139115778Smjacob * related define, and bumped the page version define. 140115778Smjacob * 05-31-02 01.02.07 Added a Flags field to CONFIG_PAGE_IOC_2_RAID_VOL in a 141115778Smjacob * reserved byte and added a define. 142115778Smjacob * Added define for 143115778Smjacob * MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE. 144115778Smjacob * Added new config page: CONFIG_PAGE_IOC_5. 145115778Smjacob * Added MaxAliases, MaxHardAliases, and NumCurrentAliases 146115778Smjacob * fields to CONFIG_PAGE_FC_PORT_0. 147115778Smjacob * Added AltConnector and NumRequestedAliases fields to 148115778Smjacob * CONFIG_PAGE_FC_PORT_1. 149115778Smjacob * Added new config page: CONFIG_PAGE_FC_PORT_10. 150115778Smjacob * 07-12-02 01.02.08 Added more MPI_MANUFACTPAGE_DEVID_ defines. 151115778Smjacob * Added additional MPI_SCSIDEVPAGE0_NP_ defines. 152115778Smjacob * Added more MPI_SCSIDEVPAGE1_RP_ defines. 153115778Smjacob * Added define for 154115778Smjacob * MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE. 155115778Smjacob * Added new config page: CONFIG_PAGE_SCSI_DEVICE_3. 156115778Smjacob * Modified MPI_FCPORTPAGE5_FLAGS_ defines. 157115778Smjacob * 09-16-02 01.02.09 Added MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG define. 158115778Smjacob * 11-15-02 01.02.10 Added ConnectedID defines for CONFIG_PAGE_SCSI_PORT_0. 159115778Smjacob * Added more Flags defines for CONFIG_PAGE_FC_PORT_1. 160115778Smjacob * Added more Flags defines for CONFIG_PAGE_FC_DEVICE_0. 161115778Smjacob * 04-01-03 01.02.11 Added RR_TOV field and additional Flags defines for 162115778Smjacob * CONFIG_PAGE_FC_PORT_1. 163115778Smjacob * Added define MPI_FCPORTPAGE5_FLAGS_DISABLE to disable 164115778Smjacob * an alias. 165115778Smjacob * Added more device id defines. 166147883Sscottl * 06-26-03 01.02.12 Added MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID define. 167147883Sscottl * Added TargetConfig and IDConfig fields to 168147883Sscottl * CONFIG_PAGE_SCSI_PORT_1. 169147883Sscottl * Added more PortFlags defines for CONFIG_PAGE_SCSI_PORT_2 170147883Sscottl * to control DV. 171147883Sscottl * Added more Flags defines for CONFIG_PAGE_FC_PORT_1. 172147883Sscottl * In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field 173147883Sscottl * with ADISCHardALPA. 174147883Sscottl * Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define. 175147883Sscottl * 01-16-04 01.02.13 Added InitiatorDeviceTimeout and InitiatorIoPendTimeout 176147883Sscottl * fields and related defines to CONFIG_PAGE_FC_PORT_1. 177147883Sscottl * Added define for 178147883Sscottl * MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK. 179147883Sscottl * Added new fields to the substructures of 180147883Sscottl * CONFIG_PAGE_FC_PORT_10. 181154603Smjacob * 04-29-04 01.02.14 Added define for IDP bit for CONFIG_PAGE_SCSI_PORT_0, 182154603Smjacob * CONFIG_PAGE_SCSI_DEVICE_0, and 183154603Smjacob * CONFIG_PAGE_SCSI_DEVICE_1. Also bumped Page Version for 184154603Smjacob * these pages. 185154603Smjacob * 05-11-04 01.03.01 Added structure for CONFIG_PAGE_INBAND_0. 186154603Smjacob * 08-19-04 01.05.01 Modified MSG_CONFIG request to support extended config 187154603Smjacob * pages. 188154603Smjacob * Added a new structure for extended config page header. 189154603Smjacob * Added new extended config pages types and structures for 190154603Smjacob * SAS IO Unit, SAS Expander, SAS Device, and SAS PHY. 191154603Smjacob * Replaced a reserved byte in CONFIG_PAGE_MANUFACTURING_4 192154603Smjacob * to add a Flags field. 193154603Smjacob * Two new Manufacturing config pages (5 and 6). 194154603Smjacob * Two new bits defined for IO Unit Page 1 Flags field. 195154603Smjacob * Modified CONFIG_PAGE_IO_UNIT_2 to add three new fields 196154603Smjacob * to specify the BIOS boot device. 197154603Smjacob * Four new Flags bits defined for IO Unit Page 2. 198154603Smjacob * Added IO Unit Page 4. 199154603Smjacob * Added EEDP Flags settings to IOC Page 1. 200154603Smjacob * Added new BIOS Page 1 config page. 201154603Smjacob * 10-05-04 01.05.02 Added define for 202154603Smjacob * MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE. 203154603Smjacob * Added new Flags field to CONFIG_PAGE_MANUFACTURING_5 and 204154603Smjacob * associated defines. 205154603Smjacob * Added more defines for SAS IO Unit Page 0 206154603Smjacob * DiscoveryStatus field. 207154603Smjacob * Added define for MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK 208154603Smjacob * and MPI_SAS_IOUNIT0_DS_TABLE_LINK. 209154603Smjacob * Added defines for Physical Mapping Modes to SAS IO Unit 210154603Smjacob * Page 2. 211154603Smjacob * Added define for 212154603Smjacob * MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH. 213154603Smjacob * 10-27-04 01.05.03 Added defines for new SAS PHY page addressing mode. 214154603Smjacob * Added defines for MaxTargetSpinUp to BIOS Page 1. 215154603Smjacob * Added 5 new ControlFlags defines for SAS IO Unit 216154603Smjacob * Page 1. 217154603Smjacob * Added MaxNumPhysicalMappedIDs field to SAS IO Unit 218154603Smjacob * Page 2. 219154603Smjacob * Added AccessStatus field to SAS Device Page 0 and added 220154603Smjacob * new Flags bits for supported SATA features. 221154603Smjacob * 12-07-04 01.05.04 Added config page structures for BIOS Page 2, RAID 222154603Smjacob * Volume Page 1, and RAID Physical Disk Page 1. 223154603Smjacob * Replaced IO Unit Page 1 BootTargetID,BootBus, and 224154603Smjacob * BootAdapterNum with reserved field. 225154603Smjacob * Added DataScrubRate and ResyncRate to RAID Volume 226154603Smjacob * Page 0. 227154603Smjacob * Added MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT 228154603Smjacob * define. 229154603Smjacob * 12-09-04 01.05.05 Added Target Mode Large CDB Enable to FC Port Page 1 230154603Smjacob * Flags field. 231154603Smjacob * Added Auto Port Config flag define for SAS IOUNIT 232154603Smjacob * Page 1 ControlFlags. 233154603Smjacob * Added Disabled bad Phy define to Expander Page 1 234154603Smjacob * Discovery Info field. 235154603Smjacob * Added SAS/SATA device support to SAS IOUnit Page 1 236154603Smjacob * ControlFlags. 237154603Smjacob * Added Unsupported device to SAS Dev Page 0 Flags field 238154603Smjacob * Added disable use SATA Hash Address for SAS IOUNIT 239154603Smjacob * page 1 in ControlFields. 240154603Smjacob * 01-15-05 01.05.06 Added defaults for data scrub rate and resync rate to 241154603Smjacob * Manufacturing Page 4. 242154603Smjacob * Added new defines for BIOS Page 1 IOCSettings field. 243154603Smjacob * Added ExtDiskIdentifier field to RAID Physical Disk 244154603Smjacob * Page 0. 245154603Smjacob * Added new defines for SAS IO Unit Page 1 ControlFlags 246154603Smjacob * and to SAS Device Page 0 Flags to control SATA devices. 247154603Smjacob * Added defines and structures for the new Log Page 0, a 248154603Smjacob * new type of configuration page. 249154603Smjacob * 02-09-05 01.05.07 Added InactiveStatus field to RAID Volume Page 0. 250154603Smjacob * Added WWID field to RAID Volume Page 1. 251154603Smjacob * Added PhysicalPort field to SAS Expander pages 0 and 1. 252154603Smjacob * 03-11-05 01.05.08 Removed the EEDP flags from IOC Page 1. 253154603Smjacob * Added Enclosure/Slot boot device format to BIOS Page 2. 254154603Smjacob * New status value for RAID Volume Page 0 VolumeStatus 255154603Smjacob * (VolumeState subfield). 256154603Smjacob * New value for RAID Physical Page 0 InactiveStatus. 257154603Smjacob * Added Inactive Volume Member flag RAID Physical Disk 258154603Smjacob * Page 0 PhysDiskStatus field. 259154603Smjacob * New physical mapping mode in SAS IO Unit Page 2. 260154603Smjacob * Added CONFIG_PAGE_SAS_ENCLOSURE_0. 261154603Smjacob * Added Slot and Enclosure fields to SAS Device Page 0. 262154603Smjacob * 06-24-05 01.05.09 Added EEDP defines to IOC Page 1. 263154603Smjacob * Added more RAID type defines to IOC Page 2. 264154603Smjacob * Added Port Enable Delay settings to BIOS Page 1. 265154603Smjacob * Added Bad Block Table Full define to RAID Volume Page 0. 266154603Smjacob * Added Previous State defines to RAID Physical Disk 267154603Smjacob * Page 0. 268154603Smjacob * Added Max Sata Targets define for DiscoveryStatus field 269154603Smjacob * of SAS IO Unit Page 0. 270154603Smjacob * Added Device Self Test to Control Flags of SAS IO Unit 271154603Smjacob * Page 1. 272154603Smjacob * Added Direct Attach Starting Slot Number define for SAS 273154603Smjacob * IO Unit Page 2. 274154603Smjacob * Added new fields in SAS Device Page 2 for enclosure 275154603Smjacob * mapping. 276154603Smjacob * Added OwnerDevHandle and Flags field to SAS PHY Page 0. 277154603Smjacob * Added IOC GPIO Flags define to SAS Enclosure Page 0. 278154603Smjacob * Fixed the value for MPI_SAS_IOUNIT1_CONTROL_DEV_SATA_SUPPORT. 279154603Smjacob * 08-03-05 01.05.10 Removed ISDataScrubRate and ISResyncRate from 280154603Smjacob * Manufacturing Page 4. 281154603Smjacob * Added MPI_IOUNITPAGE1_SATA_WRITE_CACHE_DISABLE bit. 282154603Smjacob * Added NumDevsPerEnclosure field to SAS IO Unit page 2. 283154603Smjacob * Added MPI_SAS_IOUNIT2_FLAGS_HOST_ASSIGNED_PHYS_MAP 284154603Smjacob * define. 285154603Smjacob * Added EnclosureHandle field to SAS Expander page 0. 286154603Smjacob * Removed redundant NumTableEntriesProg field from SAS 287154603Smjacob * Expander Page 1. 288156000Smjacob * 08-30-05 01.05.11 Added DeviceID for FC949E and changed the DeviceID for 289156000Smjacob * SAS1078. 290156000Smjacob * Added more defines for Manufacturing Page 4 Flags field. 291156000Smjacob * Added more defines for IOCSettings and added 292156000Smjacob * ExpanderSpinup field to Bios Page 1. 293156000Smjacob * Added postpone SATA Init bit to SAS IO Unit Page 1 294156000Smjacob * ControlFlags. 295156000Smjacob * Changed LogEntry format for Log Page 0. 296170251Sscottl * 03-27-06 01.05.12 Added two new Flags defines for Manufacturing Page 4. 297170251Sscottl * Added Manufacturing Page 7. 298170251Sscottl * Added MPI_IOCPAGE2_CAP_FLAGS_RAID_64_BIT_ADDRESSING. 299170251Sscottl * Added IOC Page 6. 300170251Sscottl * Added PrevBootDeviceForm field to CONFIG_PAGE_BIOS_2. 301170251Sscottl * Added MaxLBAHigh field to RAID Volume Page 0. 302170251Sscottl * Added Nvdata version fields to SAS IO Unit Page 0. 303170251Sscottl * Added AdditionalControlFlags, MaxTargetPortConnectTime, 304170251Sscottl * ReportDeviceMissingDelay, and IODeviceMissingDelay 305170251Sscottl * fields to SAS IO Unit Page 1. 306170251Sscottl * 10-11-06 01.05.13 Added NumForceWWID field and ForceWWID array to 307170251Sscottl * Manufacturing Page 5. 308170251Sscottl * Added Manufacturing pages 8 through 10. 309170251Sscottl * Added defines for supported metadata size bits in 310170251Sscottl * CapabilitiesFlags field of IOC Page 6. 311170251Sscottl * Added defines for metadata size bits in VolumeSettings 312170251Sscottl * field of RAID Volume Page 0. 313170251Sscottl * Added SATA Link Reset settings, Enable SATA Asynchronous 314170251Sscottl * Notification bit, and HideNonZeroAttachedPhyIdentifiers 315170251Sscottl * bit to AdditionalControlFlags field of SAS IO Unit 316170251Sscottl * Page 1. 317170251Sscottl * Added defines for Enclosure Devices Unmapped and 318170251Sscottl * Device Limit Exceeded bits in Status field of SAS IO 319170251Sscottl * Unit Page 2. 320170251Sscottl * Added more AccessStatus values for SAS Device Page 0. 321170251Sscottl * Added bit for SATA Asynchronous Notification Support in 322170251Sscottl * Flags field of SAS Device Page 0. 323170251Sscottl * 02-28-07 01.05.14 Added ExtFlags field to Manufacturing Page 4. 324170251Sscottl * Added Disable SMART Polling for CapabilitiesFlags of 325170251Sscottl * IOC Page 6. 326170251Sscottl * Added Disable SMART Polling to DeviceSettings of BIOS 327170251Sscottl * Page 1. 328170251Sscottl * Added Multi-Port Domain bit for DiscoveryStatus field 329170251Sscottl * of SAS IO Unit Page. 330170251Sscottl * Added Multi-Port Domain Illegal flag for SAS IO Unit 331170251Sscottl * Page 1 AdditionalControlFlags field. 332170251Sscottl * 05-24-07 01.05.15 Added Hide Physical Disks with Non-Integrated RAID 333170251Sscottl * Metadata bit to Manufacturing Page 4 ExtFlags field. 334170251Sscottl * Added Internal Connector to End Device Present bit to 335170251Sscottl * Expander Page 0 Flags field. 336170251Sscottl * Fixed define for 337170251Sscottl * MPI_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED. 338233425Smarius * 08-07-07 01.05.16 Added MPI_IOCPAGE6_CAP_FLAGS_MULTIPORT_DRIVE_SUPPORT 339233425Smarius * define. 340233425Smarius * Added BIOS Page 4 structure. 341233425Smarius * Added MPI_RAID_PHYS_DISK1_PATH_MAX define for RAID 342233425Smarius * Physcial Disk Page 1. 343233425Smarius * 01-15-07 01.05.17 Added additional bit defines for ExtFlags field of 344233425Smarius * Manufacturing Page 4. 345233425Smarius * Added Solid State Drives Supported bit to IOC Page 6 346233425Smarius * Capabilities Flags. 347233425Smarius * Added new value for AccessStatus field of SAS Device 348233425Smarius * Page 0 (_SATA_NEEDS_INITIALIZATION). 349233425Smarius * 03-28-08 01.05.18 Defined new bits in Manufacturing Page 4 ExtFlags field 350233425Smarius * to control coercion size and the mixing of SAS and SATA 351233425Smarius * SSD drives. 352233425Smarius * 07-11-08 01.05.19 Added defines MPI_MANPAGE4_EXTFLAGS_RAID0_SINGLE_DRIVE 353233425Smarius * and MPI_MANPAGE4_EXTFLAGS_SSD_SCRUB_DISABLE for ExtFlags 354233425Smarius * field of Manufacturing Page 4. 355233425Smarius * Added defines for a new bit in BIOS Page 1 BiosOptions 356233425Smarius * field to control adapter scan order. 357233425Smarius * Added BootDeviceWaitTime field to SAS IO Unit Page 2. 358233425Smarius * Added MPI_SAS_PHY0_PHYINFO_PHY_VACANT for use in PhyInfo 359233425Smarius * field of SAS Expander Page 1. 360101704Smjacob * -------------------------------------------------------------------------- 361101704Smjacob */ 362101704Smjacob 363101704Smjacob#ifndef MPI_CNFG_H 364101704Smjacob#define MPI_CNFG_H 365101704Smjacob 366101704Smjacob 367101704Smjacob/***************************************************************************** 368101704Smjacob* 369101704Smjacob* C o n f i g M e s s a g e a n d S t r u c t u r e s 370101704Smjacob* 371101704Smjacob*****************************************************************************/ 372101704Smjacob 373101704Smjacobtypedef struct _CONFIG_PAGE_HEADER 374101704Smjacob{ 375101704Smjacob U8 PageVersion; /* 00h */ 376101704Smjacob U8 PageLength; /* 01h */ 377101704Smjacob U8 PageNumber; /* 02h */ 378101704Smjacob U8 PageType; /* 03h */ 379115778Smjacob} CONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER, 380101704Smjacob ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t; 381101704Smjacob 382101704Smjacobtypedef union _CONFIG_PAGE_HEADER_UNION 383101704Smjacob{ 384101704Smjacob ConfigPageHeader_t Struct; 385101704Smjacob U8 Bytes[4]; 386101704Smjacob U16 Word16[2]; 387101704Smjacob U32 Word32; 388101704Smjacob} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion, 389115778Smjacob CONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION; 390101704Smjacob 391154603Smjacobtypedef struct _CONFIG_EXTENDED_PAGE_HEADER 392154603Smjacob{ 393154603Smjacob U8 PageVersion; /* 00h */ 394154603Smjacob U8 Reserved1; /* 01h */ 395154603Smjacob U8 PageNumber; /* 02h */ 396154603Smjacob U8 PageType; /* 03h */ 397154603Smjacob U16 ExtPageLength; /* 04h */ 398154603Smjacob U8 ExtPageType; /* 06h */ 399154603Smjacob U8 Reserved2; /* 07h */ 400154603Smjacob} CONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER, 401154603Smjacob ConfigExtendedPageHeader_t, MPI_POINTER pConfigExtendedPageHeader_t; 402101704Smjacob 403154603Smjacob 404154603Smjacob 405101704Smjacob/**************************************************************************** 406101704Smjacob* PageType field values 407101704Smjacob****************************************************************************/ 408101704Smjacob#define MPI_CONFIG_PAGEATTR_READ_ONLY (0x00) 409101704Smjacob#define MPI_CONFIG_PAGEATTR_CHANGEABLE (0x10) 410101704Smjacob#define MPI_CONFIG_PAGEATTR_PERSISTENT (0x20) 411101704Smjacob#define MPI_CONFIG_PAGEATTR_RO_PERSISTENT (0x30) 412101704Smjacob#define MPI_CONFIG_PAGEATTR_MASK (0xF0) 413101704Smjacob 414101704Smjacob#define MPI_CONFIG_PAGETYPE_IO_UNIT (0x00) 415101704Smjacob#define MPI_CONFIG_PAGETYPE_IOC (0x01) 416101704Smjacob#define MPI_CONFIG_PAGETYPE_BIOS (0x02) 417101704Smjacob#define MPI_CONFIG_PAGETYPE_SCSI_PORT (0x03) 418101704Smjacob#define MPI_CONFIG_PAGETYPE_SCSI_DEVICE (0x04) 419101704Smjacob#define MPI_CONFIG_PAGETYPE_FC_PORT (0x05) 420101704Smjacob#define MPI_CONFIG_PAGETYPE_FC_DEVICE (0x06) 421101704Smjacob#define MPI_CONFIG_PAGETYPE_LAN (0x07) 422101704Smjacob#define MPI_CONFIG_PAGETYPE_RAID_VOLUME (0x08) 423101704Smjacob#define MPI_CONFIG_PAGETYPE_MANUFACTURING (0x09) 424101704Smjacob#define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A) 425154603Smjacob#define MPI_CONFIG_PAGETYPE_INBAND (0x0B) 426154603Smjacob#define MPI_CONFIG_PAGETYPE_EXTENDED (0x0F) 427101704Smjacob#define MPI_CONFIG_PAGETYPE_MASK (0x0F) 428101704Smjacob 429101704Smjacob#define MPI_CONFIG_TYPENUM_MASK (0x0FFF) 430101704Smjacob 431101704Smjacob 432101704Smjacob/**************************************************************************** 433154603Smjacob* ExtPageType field values 434154603Smjacob****************************************************************************/ 435154603Smjacob#define MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10) 436154603Smjacob#define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11) 437154603Smjacob#define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12) 438154603Smjacob#define MPI_CONFIG_EXTPAGETYPE_SAS_PHY (0x13) 439154603Smjacob#define MPI_CONFIG_EXTPAGETYPE_LOG (0x14) 440154603Smjacob#define MPI_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15) 441154603Smjacob 442154603Smjacob 443154603Smjacob/**************************************************************************** 444101704Smjacob* PageAddress field values 445101704Smjacob****************************************************************************/ 446101704Smjacob#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF) 447101704Smjacob 448154603Smjacob#define MPI_SCSI_DEVICE_FORM_MASK (0xF0000000) 449154603Smjacob#define MPI_SCSI_DEVICE_FORM_BUS_TID (0x00000000) 450101704Smjacob#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF) 451101704Smjacob#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0) 452101704Smjacob#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00) 453101704Smjacob#define MPI_SCSI_DEVICE_BUS_SHIFT (8) 454154603Smjacob#define MPI_SCSI_DEVICE_FORM_TARGET_MODE (0x10000000) 455154603Smjacob#define MPI_SCSI_DEVICE_TM_RESPOND_ID_MASK (0x000000FF) 456154603Smjacob#define MPI_SCSI_DEVICE_TM_RESPOND_ID_SHIFT (0) 457154603Smjacob#define MPI_SCSI_DEVICE_TM_BUS_MASK (0x0000FF00) 458154603Smjacob#define MPI_SCSI_DEVICE_TM_BUS_SHIFT (8) 459154603Smjacob#define MPI_SCSI_DEVICE_TM_INIT_ID_MASK (0x00FF0000) 460154603Smjacob#define MPI_SCSI_DEVICE_TM_INIT_ID_SHIFT (16) 461101704Smjacob 462101704Smjacob#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000) 463101704Smjacob#define MPI_FC_PORT_PGAD_PORT_SHIFT (28) 464101704Smjacob#define MPI_FC_PORT_PGAD_FORM_MASK (0x0F000000) 465101704Smjacob#define MPI_FC_PORT_PGAD_FORM_INDEX (0x01000000) 466101704Smjacob#define MPI_FC_PORT_PGAD_INDEX_MASK (0x0000FFFF) 467101704Smjacob#define MPI_FC_PORT_PGAD_INDEX_SHIFT (0) 468101704Smjacob 469101704Smjacob#define MPI_FC_DEVICE_PGAD_PORT_MASK (0xF0000000) 470101704Smjacob#define MPI_FC_DEVICE_PGAD_PORT_SHIFT (28) 471101704Smjacob#define MPI_FC_DEVICE_PGAD_FORM_MASK (0x0F000000) 472101704Smjacob#define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID (0x00000000) 473101704Smjacob#define MPI_FC_DEVICE_PGAD_ND_PORT_MASK (0xF0000000) 474101704Smjacob#define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT (28) 475101704Smjacob#define MPI_FC_DEVICE_PGAD_ND_DID_MASK (0x00FFFFFF) 476101704Smjacob#define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT (0) 477101704Smjacob#define MPI_FC_DEVICE_PGAD_FORM_BUS_TID (0x01000000) 478101704Smjacob#define MPI_FC_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00) 479101704Smjacob#define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT (8) 480101704Smjacob#define MPI_FC_DEVICE_PGAD_BT_TID_MASK (0x000000FF) 481101704Smjacob#define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT (0) 482101704Smjacob 483101704Smjacob#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF) 484101704Smjacob#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0) 485101704Smjacob 486154603Smjacob#define MPI_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000) 487154603Smjacob#define MPI_SAS_EXPAND_PGAD_FORM_SHIFT (28) 488154603Smjacob#define MPI_SAS_EXPAND_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 489154603Smjacob#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE_PHY_NUM (0x00000001) 490154603Smjacob#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE (0x00000002) 491154603Smjacob#define MPI_SAS_EXPAND_PGAD_GNH_MASK_HANDLE (0x0000FFFF) 492154603Smjacob#define MPI_SAS_EXPAND_PGAD_GNH_SHIFT_HANDLE (0) 493154603Smjacob#define MPI_SAS_EXPAND_PGAD_HPN_MASK_PHY (0x00FF0000) 494154603Smjacob#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_PHY (16) 495154603Smjacob#define MPI_SAS_EXPAND_PGAD_HPN_MASK_HANDLE (0x0000FFFF) 496154603Smjacob#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_HANDLE (0) 497154603Smjacob#define MPI_SAS_EXPAND_PGAD_H_MASK_HANDLE (0x0000FFFF) 498154603Smjacob#define MPI_SAS_EXPAND_PGAD_H_SHIFT_HANDLE (0) 499101704Smjacob 500154603Smjacob#define MPI_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000) 501154603Smjacob#define MPI_SAS_DEVICE_PGAD_FORM_SHIFT (28) 502154603Smjacob#define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 503154603Smjacob#define MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID (0x00000001) 504154603Smjacob#define MPI_SAS_DEVICE_PGAD_FORM_HANDLE (0x00000002) 505154603Smjacob#define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_MASK (0x0000FFFF) 506154603Smjacob#define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_SHIFT (0) 507154603Smjacob#define MPI_SAS_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00) 508154603Smjacob#define MPI_SAS_DEVICE_PGAD_BT_BUS_SHIFT (8) 509154603Smjacob#define MPI_SAS_DEVICE_PGAD_BT_TID_MASK (0x000000FF) 510154603Smjacob#define MPI_SAS_DEVICE_PGAD_BT_TID_SHIFT (0) 511154603Smjacob#define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK (0x0000FFFF) 512154603Smjacob#define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT (0) 513101704Smjacob 514154603Smjacob#define MPI_SAS_PHY_PGAD_FORM_MASK (0xF0000000) 515154603Smjacob#define MPI_SAS_PHY_PGAD_FORM_SHIFT (28) 516154603Smjacob#define MPI_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x0) 517154603Smjacob#define MPI_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x1) 518154603Smjacob#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF) 519154603Smjacob#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (0) 520154603Smjacob#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF) 521154603Smjacob#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_SHIFT (0) 522154603Smjacob 523154603Smjacob#define MPI_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000) 524154603Smjacob#define MPI_SAS_ENCLOS_PGAD_FORM_SHIFT (28) 525154603Smjacob#define MPI_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 526154603Smjacob#define MPI_SAS_ENCLOS_PGAD_FORM_HANDLE (0x00000001) 527154603Smjacob#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_MASK (0x0000FFFF) 528154603Smjacob#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_SHIFT (0) 529154603Smjacob#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_MASK (0x0000FFFF) 530154603Smjacob#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_SHIFT (0) 531154603Smjacob 532154603Smjacob 533154603Smjacob 534101704Smjacob/**************************************************************************** 535101704Smjacob* Config Request Message 536101704Smjacob****************************************************************************/ 537101704Smjacobtypedef struct _MSG_CONFIG 538101704Smjacob{ 539101704Smjacob U8 Action; /* 00h */ 540101704Smjacob U8 Reserved; /* 01h */ 541101704Smjacob U8 ChainOffset; /* 02h */ 542101704Smjacob U8 Function; /* 03h */ 543154603Smjacob U16 ExtPageLength; /* 04h */ 544154603Smjacob U8 ExtPageType; /* 06h */ 545101704Smjacob U8 MsgFlags; /* 07h */ 546101704Smjacob U32 MsgContext; /* 08h */ 547101704Smjacob U8 Reserved2[8]; /* 0Ch */ 548115778Smjacob CONFIG_PAGE_HEADER Header; /* 14h */ 549101704Smjacob U32 PageAddress; /* 18h */ 550101704Smjacob SGE_IO_UNION PageBufferSGE; /* 1Ch */ 551101704Smjacob} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG, 552101704Smjacob Config_t, MPI_POINTER pConfig_t; 553101704Smjacob 554101704Smjacob 555101704Smjacob/**************************************************************************** 556101704Smjacob* Action field values 557101704Smjacob****************************************************************************/ 558101704Smjacob#define MPI_CONFIG_ACTION_PAGE_HEADER (0x00) 559101704Smjacob#define MPI_CONFIG_ACTION_PAGE_READ_CURRENT (0x01) 560101704Smjacob#define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02) 561101704Smjacob#define MPI_CONFIG_ACTION_PAGE_DEFAULT (0x03) 562101704Smjacob#define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04) 563101704Smjacob#define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05) 564101704Smjacob#define MPI_CONFIG_ACTION_PAGE_READ_NVRAM (0x06) 565101704Smjacob 566101704Smjacob 567101704Smjacob/* Config Reply Message */ 568101704Smjacobtypedef struct _MSG_CONFIG_REPLY 569101704Smjacob{ 570101704Smjacob U8 Action; /* 00h */ 571101704Smjacob U8 Reserved; /* 01h */ 572101704Smjacob U8 MsgLength; /* 02h */ 573101704Smjacob U8 Function; /* 03h */ 574154603Smjacob U16 ExtPageLength; /* 04h */ 575154603Smjacob U8 ExtPageType; /* 06h */ 576101704Smjacob U8 MsgFlags; /* 07h */ 577101704Smjacob U32 MsgContext; /* 08h */ 578101704Smjacob U8 Reserved2[2]; /* 0Ch */ 579101704Smjacob U16 IOCStatus; /* 0Eh */ 580101704Smjacob U32 IOCLogInfo; /* 10h */ 581115778Smjacob CONFIG_PAGE_HEADER Header; /* 14h */ 582101704Smjacob} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY, 583101704Smjacob ConfigReply_t, MPI_POINTER pConfigReply_t; 584101704Smjacob 585101704Smjacob 586101704Smjacob 587101704Smjacob/***************************************************************************** 588101704Smjacob* 589101704Smjacob* C o n f i g u r a t i o n P a g e s 590101704Smjacob* 591101704Smjacob*****************************************************************************/ 592101704Smjacob 593101704Smjacob/**************************************************************************** 594101704Smjacob* Manufacturing Config pages 595101704Smjacob****************************************************************************/ 596115778Smjacob#define MPI_MANUFACTPAGE_VENDORID_LSILOGIC (0x1000) 597154603Smjacob/* Fibre Channel */ 598101704Smjacob#define MPI_MANUFACTPAGE_DEVICEID_FC909 (0x0621) 599101704Smjacob#define MPI_MANUFACTPAGE_DEVICEID_FC919 (0x0624) 600101704Smjacob#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622) 601101704Smjacob#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628) 602101704Smjacob#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626) 603154603Smjacob#define MPI_MANUFACTPAGE_DEVICEID_FC939X (0x0642) 604154603Smjacob#define MPI_MANUFACTPAGE_DEVICEID_FC949X (0x0640) 605156000Smjacob#define MPI_MANUFACTPAGE_DEVICEID_FC949E (0x0646) 606154603Smjacob/* SCSI */ 607101704Smjacob#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030) 608101704Smjacob#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031) 609101704Smjacob#define MPI_MANUFACTPAGE_DEVID_1030_53C1035 (0x0032) 610101704Smjacob#define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 (0x0033) 611101704Smjacob#define MPI_MANUFACTPAGE_DEVID_53C1035 (0x0040) 612101704Smjacob#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041) 613154603Smjacob/* SAS */ 614154603Smjacob#define MPI_MANUFACTPAGE_DEVID_SAS1064 (0x0050) 615154603Smjacob#define MPI_MANUFACTPAGE_DEVID_SAS1064A (0x005C) 616154603Smjacob#define MPI_MANUFACTPAGE_DEVID_SAS1064E (0x0056) 617154603Smjacob#define MPI_MANUFACTPAGE_DEVID_SAS1066 (0x005E) 618154603Smjacob#define MPI_MANUFACTPAGE_DEVID_SAS1066E (0x005A) 619154603Smjacob#define MPI_MANUFACTPAGE_DEVID_SAS1068 (0x0054) 620154603Smjacob#define MPI_MANUFACTPAGE_DEVID_SAS1068E (0x0058) 621156000Smjacob#define MPI_MANUFACTPAGE_DEVID_SAS1078 (0x0062) 622101704Smjacob 623115778Smjacob 624101704Smjacobtypedef struct _CONFIG_PAGE_MANUFACTURING_0 625101704Smjacob{ 626115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 627101704Smjacob U8 ChipName[16]; /* 04h */ 628101704Smjacob U8 ChipRevision[8]; /* 14h */ 629101704Smjacob U8 BoardName[16]; /* 1Ch */ 630101704Smjacob U8 BoardAssembly[16]; /* 2Ch */ 631101704Smjacob U8 BoardTracerNumber[16]; /* 3Ch */ 632101704Smjacob 633115778Smjacob} CONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0, 634101704Smjacob ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t; 635101704Smjacob 636101704Smjacob#define MPI_MANUFACTURING0_PAGEVERSION (0x00) 637101704Smjacob 638101704Smjacob 639101704Smjacobtypedef struct _CONFIG_PAGE_MANUFACTURING_1 640101704Smjacob{ 641115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 642101704Smjacob U8 VPD[256]; /* 04h */ 643115778Smjacob} CONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1, 644101704Smjacob ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t; 645101704Smjacob 646101704Smjacob#define MPI_MANUFACTURING1_PAGEVERSION (0x00) 647101704Smjacob 648101704Smjacob 649101704Smjacobtypedef struct _MPI_CHIP_REVISION_ID 650101704Smjacob{ 651101704Smjacob U16 DeviceID; /* 00h */ 652101704Smjacob U8 PCIRevisionID; /* 02h */ 653101704Smjacob U8 Reserved; /* 03h */ 654101704Smjacob} MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID, 655101704Smjacob MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t; 656101704Smjacob 657101704Smjacob 658101704Smjacob/* 659101704Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 660101704Smjacob * one and check Header.PageLength at runtime. 661101704Smjacob */ 662101704Smjacob#ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS 663101704Smjacob#define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS (1) 664101704Smjacob#endif 665101704Smjacob 666101704Smjacobtypedef struct _CONFIG_PAGE_MANUFACTURING_2 667101704Smjacob{ 668115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 669101704Smjacob MPI_CHIP_REVISION_ID ChipId; /* 04h */ 670101704Smjacob U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */ 671115778Smjacob} CONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2, 672101704Smjacob ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t; 673101704Smjacob 674101704Smjacob#define MPI_MANUFACTURING2_PAGEVERSION (0x00) 675101704Smjacob 676101704Smjacob 677101704Smjacob/* 678101704Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 679101704Smjacob * one and check Header.PageLength at runtime. 680101704Smjacob */ 681101704Smjacob#ifndef MPI_MAN_PAGE_3_INFO_WORDS 682101704Smjacob#define MPI_MAN_PAGE_3_INFO_WORDS (1) 683101704Smjacob#endif 684101704Smjacob 685101704Smjacobtypedef struct _CONFIG_PAGE_MANUFACTURING_3 686101704Smjacob{ 687115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 688101704Smjacob MPI_CHIP_REVISION_ID ChipId; /* 04h */ 689101704Smjacob U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */ 690115778Smjacob} CONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3, 691101704Smjacob ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t; 692101704Smjacob 693101704Smjacob#define MPI_MANUFACTURING3_PAGEVERSION (0x00) 694101704Smjacob 695101704Smjacob 696101704Smjacobtypedef struct _CONFIG_PAGE_MANUFACTURING_4 697101704Smjacob{ 698115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 699101704Smjacob U32 Reserved1; /* 04h */ 700101704Smjacob U8 InfoOffset0; /* 08h */ 701101704Smjacob U8 InfoSize0; /* 09h */ 702101704Smjacob U8 InfoOffset1; /* 0Ah */ 703101704Smjacob U8 InfoSize1; /* 0Bh */ 704101704Smjacob U8 InquirySize; /* 0Ch */ 705154603Smjacob U8 Flags; /* 0Dh */ 706170251Sscottl U16 ExtFlags; /* 0Eh */ 707101704Smjacob U8 InquiryData[56]; /* 10h */ 708101704Smjacob U32 ISVolumeSettings; /* 48h */ 709101704Smjacob U32 IMEVolumeSettings; /* 4Ch */ 710101704Smjacob U32 IMVolumeSettings; /* 50h */ 711154603Smjacob U32 Reserved3; /* 54h */ 712154603Smjacob U32 Reserved4; /* 58h */ 713154603Smjacob U32 Reserved5; /* 5Ch */ 714154603Smjacob U8 IMEDataScrubRate; /* 60h */ 715154603Smjacob U8 IMEResyncRate; /* 61h */ 716154603Smjacob U16 Reserved6; /* 62h */ 717154603Smjacob U8 IMDataScrubRate; /* 64h */ 718154603Smjacob U8 IMResyncRate; /* 65h */ 719154603Smjacob U16 Reserved7; /* 66h */ 720154603Smjacob U32 Reserved8; /* 68h */ 721154603Smjacob U32 Reserved9; /* 6Ch */ 722115778Smjacob} CONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4, 723101704Smjacob ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t; 724101704Smjacob 725170251Sscottl#define MPI_MANUFACTURING4_PAGEVERSION (0x05) 726101704Smjacob 727154603Smjacob/* defines for the Flags field */ 728170251Sscottl#define MPI_MANPAGE4_FORCE_BAD_BLOCK_TABLE (0x80) 729170251Sscottl#define MPI_MANPAGE4_FORCE_OFFLINE_FAILOVER (0x40) 730156000Smjacob#define MPI_MANPAGE4_IME_DISABLE (0x20) 731156000Smjacob#define MPI_MANPAGE4_IM_DISABLE (0x10) 732156000Smjacob#define MPI_MANPAGE4_IS_DISABLE (0x08) 733156000Smjacob#define MPI_MANPAGE4_IR_MODEPAGE8_DISABLE (0x04) 734156000Smjacob#define MPI_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x02) 735154603Smjacob#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01) 736101704Smjacob 737170251Sscottl/* defines for the ExtFlags field */ 738233425Smarius#define MPI_MANPAGE4_EXTFLAGS_RAID0_SINGLE_DRIVE (0x0400) 739233425Smarius#define MPI_MANPAGE4_EXTFLAGS_SSD_SCRUB_DISABLE (0x0200) 740233425Smarius#define MPI_MANPAGE4_EXTFLAGS_MASK_COERCION_SIZE (0x0180) 741233425Smarius#define MPI_MANPAGE4_EXTFLAGS_SHIFT_COERCION_SIZE (7) 742233425Smarius#define MPI_MANPAGE4_EXTFLAGS_1GB_COERCION_SIZE (0) 743233425Smarius#define MPI_MANPAGE4_EXTFLAGS_128MB_COERCION_SIZE (1) 744233425Smarius 745233425Smarius#define MPI_MANPAGE4_EXTFLAGS_NO_MIX_SSD_SAS_SATA (0x0040) 746233425Smarius#define MPI_MANPAGE4_EXTFLAGS_MIX_SSD_AND_NON_SSD (0x0020) 747233425Smarius#define MPI_MANPAGE4_EXTFLAGS_DUAL_PORT_SUPPORT (0x0010) 748170251Sscottl#define MPI_MANPAGE4_EXTFLAGS_HIDE_NON_IR_METADATA (0x0008) 749170251Sscottl#define MPI_MANPAGE4_EXTFLAGS_SAS_CACHE_DISABLE (0x0004) 750170251Sscottl#define MPI_MANPAGE4_EXTFLAGS_SATA_CACHE_DISABLE (0x0002) 751170251Sscottl#define MPI_MANPAGE4_EXTFLAGS_LEGACY_MODE (0x0001) 752154603Smjacob 753170251Sscottl 754170251Sscottl#ifndef MPI_MANPAGE5_NUM_FORCEWWID 755170251Sscottl#define MPI_MANPAGE5_NUM_FORCEWWID (1) 756170251Sscottl#endif 757170251Sscottl 758154603Smjacobtypedef struct _CONFIG_PAGE_MANUFACTURING_5 759154603Smjacob{ 760154603Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 761154603Smjacob U64 BaseWWID; /* 04h */ 762154603Smjacob U8 Flags; /* 0Ch */ 763170251Sscottl U8 NumForceWWID; /* 0Dh */ 764154603Smjacob U16 Reserved2; /* 0Eh */ 765170251Sscottl U32 Reserved3; /* 10h */ 766170251Sscottl U32 Reserved4; /* 14h */ 767170251Sscottl U64 ForceWWID[MPI_MANPAGE5_NUM_FORCEWWID]; /* 18h */ 768154603Smjacob} CONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5, 769154603Smjacob ManufacturingPage5_t, MPI_POINTER pManufacturingPage5_t; 770154603Smjacob 771170251Sscottl#define MPI_MANUFACTURING5_PAGEVERSION (0x02) 772154603Smjacob 773154603Smjacob/* defines for the Flags field */ 774154603Smjacob#define MPI_MANPAGE5_TWO_WWID_PER_PHY (0x01) 775154603Smjacob 776154603Smjacob 777154603Smjacobtypedef struct _CONFIG_PAGE_MANUFACTURING_6 778154603Smjacob{ 779154603Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 780154603Smjacob U32 ProductSpecificInfo;/* 04h */ 781154603Smjacob} CONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6, 782154603Smjacob ManufacturingPage6_t, MPI_POINTER pManufacturingPage6_t; 783154603Smjacob 784154603Smjacob#define MPI_MANUFACTURING6_PAGEVERSION (0x00) 785154603Smjacob 786154603Smjacob 787170251Sscottltypedef struct _MPI_MANPAGE7_CONNECTOR_INFO 788170251Sscottl{ 789170251Sscottl U32 Pinout; /* 00h */ 790170251Sscottl U8 Connector[16]; /* 04h */ 791170251Sscottl U8 Location; /* 14h */ 792170251Sscottl U8 Reserved1; /* 15h */ 793170251Sscottl U16 Slot; /* 16h */ 794170251Sscottl U32 Reserved2; /* 18h */ 795170251Sscottl} MPI_MANPAGE7_CONNECTOR_INFO, MPI_POINTER PTR_MPI_MANPAGE7_CONNECTOR_INFO, 796170251Sscottl MpiManPage7ConnectorInfo_t, MPI_POINTER pMpiManPage7ConnectorInfo_t; 797170251Sscottl 798170251Sscottl/* defines for the Pinout field */ 799170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8484_L4 (0x00080000) 800170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8484_L3 (0x00040000) 801170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8484_L2 (0x00020000) 802170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8484_L1 (0x00010000) 803170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8470_L4 (0x00000800) 804170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8470_L3 (0x00000400) 805170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8470_L2 (0x00000200) 806170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8470_L1 (0x00000100) 807170251Sscottl#define MPI_MANPAGE7_PINOUT_SFF_8482 (0x00000002) 808170251Sscottl#define MPI_MANPAGE7_PINOUT_CONNECTION_UNKNOWN (0x00000001) 809170251Sscottl 810170251Sscottl/* defines for the Location field */ 811170251Sscottl#define MPI_MANPAGE7_LOCATION_UNKNOWN (0x01) 812170251Sscottl#define MPI_MANPAGE7_LOCATION_INTERNAL (0x02) 813170251Sscottl#define MPI_MANPAGE7_LOCATION_EXTERNAL (0x04) 814170251Sscottl#define MPI_MANPAGE7_LOCATION_SWITCHABLE (0x08) 815170251Sscottl#define MPI_MANPAGE7_LOCATION_AUTO (0x10) 816170251Sscottl#define MPI_MANPAGE7_LOCATION_NOT_PRESENT (0x20) 817170251Sscottl#define MPI_MANPAGE7_LOCATION_NOT_CONNECTED (0x80) 818170251Sscottl 819170251Sscottl/* 820170251Sscottl * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 821170251Sscottl * one and check NumPhys at runtime. 822170251Sscottl */ 823170251Sscottl#ifndef MPI_MANPAGE7_CONNECTOR_INFO_MAX 824170251Sscottl#define MPI_MANPAGE7_CONNECTOR_INFO_MAX (1) 825170251Sscottl#endif 826170251Sscottl 827170251Sscottltypedef struct _CONFIG_PAGE_MANUFACTURING_7 828170251Sscottl{ 829170251Sscottl CONFIG_PAGE_HEADER Header; /* 00h */ 830170251Sscottl U32 Reserved1; /* 04h */ 831170251Sscottl U32 Reserved2; /* 08h */ 832170251Sscottl U32 Flags; /* 0Ch */ 833170251Sscottl U8 EnclosureName[16]; /* 10h */ 834170251Sscottl U8 NumPhys; /* 20h */ 835170251Sscottl U8 Reserved3; /* 21h */ 836170251Sscottl U16 Reserved4; /* 22h */ 837170251Sscottl MPI_MANPAGE7_CONNECTOR_INFO ConnectorInfo[MPI_MANPAGE7_CONNECTOR_INFO_MAX]; /* 24h */ 838170251Sscottl} CONFIG_PAGE_MANUFACTURING_7, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_7, 839170251Sscottl ManufacturingPage7_t, MPI_POINTER pManufacturingPage7_t; 840170251Sscottl 841170251Sscottl#define MPI_MANUFACTURING7_PAGEVERSION (0x00) 842170251Sscottl 843170251Sscottl/* defines for the Flags field */ 844170251Sscottl#define MPI_MANPAGE7_FLAG_USE_SLOT_INFO (0x00000001) 845170251Sscottl 846170251Sscottl 847170251Sscottltypedef struct _CONFIG_PAGE_MANUFACTURING_8 848170251Sscottl{ 849170251Sscottl CONFIG_PAGE_HEADER Header; /* 00h */ 850170251Sscottl U32 ProductSpecificInfo;/* 04h */ 851170251Sscottl} CONFIG_PAGE_MANUFACTURING_8, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_8, 852170251Sscottl ManufacturingPage8_t, MPI_POINTER pManufacturingPage8_t; 853170251Sscottl 854170251Sscottl#define MPI_MANUFACTURING8_PAGEVERSION (0x00) 855170251Sscottl 856170251Sscottl 857170251Sscottltypedef struct _CONFIG_PAGE_MANUFACTURING_9 858170251Sscottl{ 859170251Sscottl CONFIG_PAGE_HEADER Header; /* 00h */ 860170251Sscottl U32 ProductSpecificInfo;/* 04h */ 861170251Sscottl} CONFIG_PAGE_MANUFACTURING_9, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_9, 862170251Sscottl ManufacturingPage9_t, MPI_POINTER pManufacturingPage9_t; 863170251Sscottl 864170251Sscottl#define MPI_MANUFACTURING9_PAGEVERSION (0x00) 865170251Sscottl 866170251Sscottl 867170251Sscottltypedef struct _CONFIG_PAGE_MANUFACTURING_10 868170251Sscottl{ 869170251Sscottl CONFIG_PAGE_HEADER Header; /* 00h */ 870170251Sscottl U32 ProductSpecificInfo;/* 04h */ 871170251Sscottl} CONFIG_PAGE_MANUFACTURING_10, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_10, 872170251Sscottl ManufacturingPage10_t, MPI_POINTER pManufacturingPage10_t; 873170251Sscottl 874170251Sscottl#define MPI_MANUFACTURING10_PAGEVERSION (0x00) 875170251Sscottl 876170251Sscottl 877101704Smjacob/**************************************************************************** 878101704Smjacob* IO Unit Config Pages 879101704Smjacob****************************************************************************/ 880101704Smjacob 881101704Smjacobtypedef struct _CONFIG_PAGE_IO_UNIT_0 882101704Smjacob{ 883115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 884101704Smjacob U64 UniqueValue; /* 04h */ 885115778Smjacob} CONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0, 886101704Smjacob IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t; 887101704Smjacob 888101704Smjacob#define MPI_IOUNITPAGE0_PAGEVERSION (0x00) 889101704Smjacob 890101704Smjacob 891101704Smjacobtypedef struct _CONFIG_PAGE_IO_UNIT_1 892101704Smjacob{ 893115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 894101704Smjacob U32 Flags; /* 04h */ 895115778Smjacob} CONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1, 896101704Smjacob IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t; 897101704Smjacob 898154603Smjacob#define MPI_IOUNITPAGE1_PAGEVERSION (0x02) 899101704Smjacob 900101704Smjacob/* IO Unit Page 1 Flags defines */ 901101704Smjacob#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000) 902101704Smjacob#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001) 903101704Smjacob#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002) 904101704Smjacob#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000) 905147883Sscottl#define MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004) 906154603Smjacob#define MPI_IOUNITPAGE1_DISABLE_QUEUE_FULL_HANDLING (0x00000020) 907101704Smjacob#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040) 908101704Smjacob#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080) 909154603Smjacob#define MPI_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100) 910154603Smjacob#define MPI_IOUNITPAGE1_SATA_WRITE_CACHE_DISABLE (0x00000200) 911101704Smjacob 912101704Smjacobtypedef struct _MPI_ADAPTER_INFO 913101704Smjacob{ 914101704Smjacob U8 PciBusNumber; /* 00h */ 915101704Smjacob U8 PciDeviceAndFunctionNumber; /* 01h */ 916101704Smjacob U16 AdapterFlags; /* 02h */ 917101704Smjacob} MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO, 918101704Smjacob MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t; 919101704Smjacob 920101704Smjacob#define MPI_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001) 921101704Smjacob#define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002) 922101704Smjacob 923101704Smjacobtypedef struct _CONFIG_PAGE_IO_UNIT_2 924101704Smjacob{ 925115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 926101704Smjacob U32 Flags; /* 04h */ 927101704Smjacob U32 BiosVersion; /* 08h */ 928101704Smjacob MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */ 929154603Smjacob U32 Reserved1; /* 1Ch */ 930115778Smjacob} CONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2, 931101704Smjacob IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t; 932101704Smjacob 933154603Smjacob#define MPI_IOUNITPAGE2_PAGEVERSION (0x02) 934101704Smjacob 935101704Smjacob#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002) 936101704Smjacob#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004) 937101704Smjacob#define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008) 938101704Smjacob#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010) 939101704Smjacob 940154603Smjacob#define MPI_IOUNITPAGE2_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0) 941154603Smjacob#define MPI_IOUNITPAGE2_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000) 942154603Smjacob#define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DISPLAY (0x00000020) 943154603Smjacob#define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040) 944101704Smjacob 945154603Smjacob 946101704Smjacob/* 947101704Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 948101704Smjacob * one and check Header.PageLength at runtime. 949101704Smjacob */ 950101704Smjacob#ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX 951101704Smjacob#define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1) 952101704Smjacob#endif 953101704Smjacob 954101704Smjacobtypedef struct _CONFIG_PAGE_IO_UNIT_3 955101704Smjacob{ 956115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 957101704Smjacob U8 GPIOCount; /* 04h */ 958101704Smjacob U8 Reserved1; /* 05h */ 959101704Smjacob U16 Reserved2; /* 06h */ 960101704Smjacob U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */ 961115778Smjacob} CONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3, 962101704Smjacob IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t; 963101704Smjacob 964101704Smjacob#define MPI_IOUNITPAGE3_PAGEVERSION (0x01) 965101704Smjacob 966101704Smjacob#define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFC) 967101704Smjacob#define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2) 968101704Smjacob#define MPI_IOUNITPAGE3_GPIO_SETTING_OFF (0x00) 969101704Smjacob#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01) 970101704Smjacob 971101704Smjacob 972154603Smjacobtypedef struct _CONFIG_PAGE_IO_UNIT_4 973154603Smjacob{ 974154603Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 975154603Smjacob U32 Reserved1; /* 04h */ 976154603Smjacob SGE_SIMPLE_UNION FWImageSGE; /* 08h */ 977154603Smjacob} CONFIG_PAGE_IO_UNIT_4, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_4, 978154603Smjacob IOUnitPage4_t, MPI_POINTER pIOUnitPage4_t; 979154603Smjacob 980154603Smjacob#define MPI_IOUNITPAGE4_PAGEVERSION (0x00) 981154603Smjacob 982154603Smjacob 983101704Smjacob/**************************************************************************** 984101704Smjacob* IOC Config Pages 985101704Smjacob****************************************************************************/ 986101704Smjacob 987101704Smjacobtypedef struct _CONFIG_PAGE_IOC_0 988101704Smjacob{ 989115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 990101704Smjacob U32 TotalNVStore; /* 04h */ 991101704Smjacob U32 FreeNVStore; /* 08h */ 992101704Smjacob U16 VendorID; /* 0Ch */ 993101704Smjacob U16 DeviceID; /* 0Eh */ 994101704Smjacob U8 RevisionID; /* 10h */ 995101704Smjacob U8 Reserved[3]; /* 11h */ 996101704Smjacob U32 ClassCode; /* 14h */ 997101704Smjacob U16 SubsystemVendorID; /* 18h */ 998101704Smjacob U16 SubsystemID; /* 1Ah */ 999115778Smjacob} CONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0, 1000101704Smjacob IOCPage0_t, MPI_POINTER pIOCPage0_t; 1001101704Smjacob 1002101704Smjacob#define MPI_IOCPAGE0_PAGEVERSION (0x01) 1003101704Smjacob 1004101704Smjacob 1005101704Smjacobtypedef struct _CONFIG_PAGE_IOC_1 1006101704Smjacob{ 1007115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1008101704Smjacob U32 Flags; /* 04h */ 1009101704Smjacob U32 CoalescingTimeout; /* 08h */ 1010101704Smjacob U8 CoalescingDepth; /* 0Ch */ 1011115778Smjacob U8 PCISlotNum; /* 0Dh */ 1012115778Smjacob U8 Reserved[2]; /* 0Eh */ 1013115778Smjacob} CONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1, 1014101704Smjacob IOCPage1_t, MPI_POINTER pIOCPage1_t; 1015101704Smjacob 1016154603Smjacob#define MPI_IOCPAGE1_PAGEVERSION (0x03) 1017101704Smjacob 1018154603Smjacob/* defines for the Flags field */ 1019154603Smjacob#define MPI_IOCPAGE1_EEDP_MODE_MASK (0x07000000) 1020154603Smjacob#define MPI_IOCPAGE1_EEDP_MODE_OFF (0x00000000) 1021154603Smjacob#define MPI_IOCPAGE1_EEDP_MODE_T10 (0x01000000) 1022154603Smjacob#define MPI_IOCPAGE1_EEDP_MODE_LSI_1 (0x02000000) 1023154603Smjacob#define MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE (0x00000010) 1024101704Smjacob#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001) 1025101704Smjacob 1026115778Smjacob#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF) 1027101704Smjacob 1028115778Smjacob 1029101704Smjacobtypedef struct _CONFIG_PAGE_IOC_2_RAID_VOL 1030101704Smjacob{ 1031101704Smjacob U8 VolumeID; /* 00h */ 1032101704Smjacob U8 VolumeBus; /* 01h */ 1033101704Smjacob U8 VolumeIOC; /* 02h */ 1034101704Smjacob U8 VolumePageNumber; /* 03h */ 1035101704Smjacob U8 VolumeType; /* 04h */ 1036115778Smjacob U8 Flags; /* 05h */ 1037101704Smjacob U16 Reserved3; /* 06h */ 1038115778Smjacob} CONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL, 1039101704Smjacob ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t; 1040101704Smjacob 1041115778Smjacob/* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */ 1042115778Smjacob 1043115778Smjacob#define MPI_RAID_VOL_TYPE_IS (0x00) 1044115778Smjacob#define MPI_RAID_VOL_TYPE_IME (0x01) 1045115778Smjacob#define MPI_RAID_VOL_TYPE_IM (0x02) 1046154603Smjacob#define MPI_RAID_VOL_TYPE_RAID_5 (0x03) 1047154603Smjacob#define MPI_RAID_VOL_TYPE_RAID_6 (0x04) 1048154603Smjacob#define MPI_RAID_VOL_TYPE_RAID_10 (0x05) 1049154603Smjacob#define MPI_RAID_VOL_TYPE_RAID_50 (0x06) 1050154603Smjacob#define MPI_RAID_VOL_TYPE_UNKNOWN (0xFF) 1051115778Smjacob 1052115778Smjacob/* IOC Page 2 Volume Flags values */ 1053115778Smjacob 1054115778Smjacob#define MPI_IOCPAGE2_FLAG_VOLUME_INACTIVE (0x08) 1055115778Smjacob 1056101704Smjacob/* 1057101704Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1058101704Smjacob * one and check Header.PageLength at runtime. 1059101704Smjacob */ 1060101704Smjacob#ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX 1061101704Smjacob#define MPI_IOC_PAGE_2_RAID_VOLUME_MAX (1) 1062101704Smjacob#endif 1063101704Smjacob 1064101704Smjacobtypedef struct _CONFIG_PAGE_IOC_2 1065101704Smjacob{ 1066115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1067101704Smjacob U32 CapabilitiesFlags; /* 04h */ 1068101704Smjacob U8 NumActiveVolumes; /* 08h */ 1069101704Smjacob U8 MaxVolumes; /* 09h */ 1070101704Smjacob U8 NumActivePhysDisks; /* 0Ah */ 1071101704Smjacob U8 MaxPhysDisks; /* 0Bh */ 1072115778Smjacob CONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */ 1073115778Smjacob} CONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2, 1074101704Smjacob IOCPage2_t, MPI_POINTER pIOCPage2_t; 1075101704Smjacob 1076170251Sscottl#define MPI_IOCPAGE2_PAGEVERSION (0x04) 1077101704Smjacob 1078101704Smjacob/* IOC Page 2 Capabilities flags */ 1079101704Smjacob 1080101704Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT (0x00000001) 1081101704Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT (0x00000002) 1082101704Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT (0x00000004) 1083154603Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_RAID_5_SUPPORT (0x00000008) 1084154603Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_RAID_6_SUPPORT (0x00000010) 1085154603Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_RAID_10_SUPPORT (0x00000020) 1086154603Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_RAID_50_SUPPORT (0x00000040) 1087170251Sscottl#define MPI_IOCPAGE2_CAP_FLAGS_RAID_64_BIT_ADDRESSING (0x10000000) 1088101704Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT (0x20000000) 1089101704Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT (0x40000000) 1090101704Smjacob#define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT (0x80000000) 1091101704Smjacob 1092101704Smjacob 1093101704Smjacobtypedef struct _IOC_3_PHYS_DISK 1094101704Smjacob{ 1095101704Smjacob U8 PhysDiskID; /* 00h */ 1096101704Smjacob U8 PhysDiskBus; /* 01h */ 1097101704Smjacob U8 PhysDiskIOC; /* 02h */ 1098101704Smjacob U8 PhysDiskNum; /* 03h */ 1099101704Smjacob} IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK, 1100101704Smjacob Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t; 1101101704Smjacob 1102101704Smjacob/* 1103101704Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1104101704Smjacob * one and check Header.PageLength at runtime. 1105101704Smjacob */ 1106101704Smjacob#ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX 1107101704Smjacob#define MPI_IOC_PAGE_3_PHYSDISK_MAX (1) 1108101704Smjacob#endif 1109101704Smjacob 1110101704Smjacobtypedef struct _CONFIG_PAGE_IOC_3 1111101704Smjacob{ 1112115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1113101704Smjacob U8 NumPhysDisks; /* 04h */ 1114101704Smjacob U8 Reserved1; /* 05h */ 1115101704Smjacob U16 Reserved2; /* 06h */ 1116101704Smjacob IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */ 1117115778Smjacob} CONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3, 1118101704Smjacob IOCPage3_t, MPI_POINTER pIOCPage3_t; 1119101704Smjacob 1120101704Smjacob#define MPI_IOCPAGE3_PAGEVERSION (0x00) 1121101704Smjacob 1122101704Smjacob 1123101704Smjacobtypedef struct _IOC_4_SEP 1124101704Smjacob{ 1125101704Smjacob U8 SEPTargetID; /* 00h */ 1126101704Smjacob U8 SEPBus; /* 01h */ 1127101704Smjacob U16 Reserved; /* 02h */ 1128101704Smjacob} IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP, 1129101704Smjacob Ioc4Sep_t, MPI_POINTER pIoc4Sep_t; 1130101704Smjacob 1131101704Smjacob/* 1132101704Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1133101704Smjacob * one and check Header.PageLength at runtime. 1134101704Smjacob */ 1135101704Smjacob#ifndef MPI_IOC_PAGE_4_SEP_MAX 1136101704Smjacob#define MPI_IOC_PAGE_4_SEP_MAX (1) 1137101704Smjacob#endif 1138101704Smjacob 1139101704Smjacobtypedef struct _CONFIG_PAGE_IOC_4 1140101704Smjacob{ 1141115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1142101704Smjacob U8 ActiveSEP; /* 04h */ 1143101704Smjacob U8 MaxSEP; /* 05h */ 1144101704Smjacob U16 Reserved1; /* 06h */ 1145101704Smjacob IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */ 1146115778Smjacob} CONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4, 1147101704Smjacob IOCPage4_t, MPI_POINTER pIOCPage4_t; 1148101704Smjacob 1149101704Smjacob#define MPI_IOCPAGE4_PAGEVERSION (0x00) 1150101704Smjacob 1151101704Smjacob 1152115778Smjacobtypedef struct _IOC_5_HOT_SPARE 1153115778Smjacob{ 1154115778Smjacob U8 PhysDiskNum; /* 00h */ 1155115778Smjacob U8 Reserved; /* 01h */ 1156115778Smjacob U8 HotSparePool; /* 02h */ 1157115778Smjacob U8 Flags; /* 03h */ 1158115778Smjacob} IOC_5_HOT_SPARE, MPI_POINTER PTR_IOC_5_HOT_SPARE, 1159115778Smjacob Ioc5HotSpare_t, MPI_POINTER pIoc5HotSpare_t; 1160115778Smjacob 1161115778Smjacob/* IOC Page 5 HotSpare Flags */ 1162115778Smjacob#define MPI_IOC_PAGE_5_HOT_SPARE_ACTIVE (0x01) 1163115778Smjacob 1164115778Smjacob/* 1165115778Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1166115778Smjacob * one and check Header.PageLength at runtime. 1167115778Smjacob */ 1168115778Smjacob#ifndef MPI_IOC_PAGE_5_HOT_SPARE_MAX 1169115778Smjacob#define MPI_IOC_PAGE_5_HOT_SPARE_MAX (1) 1170115778Smjacob#endif 1171115778Smjacob 1172115778Smjacobtypedef struct _CONFIG_PAGE_IOC_5 1173115778Smjacob{ 1174115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1175115778Smjacob U32 Reserved1; /* 04h */ 1176115778Smjacob U8 NumHotSpares; /* 08h */ 1177115778Smjacob U8 Reserved2; /* 09h */ 1178115778Smjacob U16 Reserved3; /* 0Ah */ 1179115778Smjacob IOC_5_HOT_SPARE HotSpare[MPI_IOC_PAGE_5_HOT_SPARE_MAX]; /* 0Ch */ 1180115778Smjacob} CONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5, 1181115778Smjacob IOCPage5_t, MPI_POINTER pIOCPage5_t; 1182115778Smjacob 1183115778Smjacob#define MPI_IOCPAGE5_PAGEVERSION (0x00) 1184115778Smjacob 1185170251Sscottltypedef struct _CONFIG_PAGE_IOC_6 1186170251Sscottl{ 1187170251Sscottl CONFIG_PAGE_HEADER Header; /* 00h */ 1188170251Sscottl U32 CapabilitiesFlags; /* 04h */ 1189170251Sscottl U8 MaxDrivesIS; /* 08h */ 1190170251Sscottl U8 MaxDrivesIM; /* 09h */ 1191170251Sscottl U8 MaxDrivesIME; /* 0Ah */ 1192170251Sscottl U8 Reserved1; /* 0Bh */ 1193170251Sscottl U8 MinDrivesIS; /* 0Ch */ 1194170251Sscottl U8 MinDrivesIM; /* 0Dh */ 1195170251Sscottl U8 MinDrivesIME; /* 0Eh */ 1196170251Sscottl U8 Reserved2; /* 0Fh */ 1197170251Sscottl U8 MaxGlobalHotSpares; /* 10h */ 1198170251Sscottl U8 Reserved3; /* 11h */ 1199170251Sscottl U16 Reserved4; /* 12h */ 1200170251Sscottl U32 Reserved5; /* 14h */ 1201170251Sscottl U32 SupportedStripeSizeMapIS; /* 18h */ 1202170251Sscottl U32 SupportedStripeSizeMapIME; /* 1Ch */ 1203170251Sscottl U32 Reserved6; /* 20h */ 1204170251Sscottl U8 MetadataSize; /* 24h */ 1205170251Sscottl U8 Reserved7; /* 25h */ 1206170251Sscottl U16 Reserved8; /* 26h */ 1207170251Sscottl U16 MaxBadBlockTableEntries; /* 28h */ 1208170251Sscottl U16 Reserved9; /* 2Ah */ 1209170251Sscottl U16 IRNvsramUsage; /* 2Ch */ 1210170251Sscottl U16 Reserved10; /* 2Eh */ 1211170251Sscottl U32 IRNvsramVersion; /* 30h */ 1212170251Sscottl U32 Reserved11; /* 34h */ 1213170251Sscottl U32 Reserved12; /* 38h */ 1214170251Sscottl} CONFIG_PAGE_IOC_6, MPI_POINTER PTR_CONFIG_PAGE_IOC_6, 1215170251Sscottl IOCPage6_t, MPI_POINTER pIOCPage6_t; 1216115778Smjacob 1217170251Sscottl#define MPI_IOCPAGE6_PAGEVERSION (0x01) 1218170251Sscottl 1219170251Sscottl/* IOC Page 6 Capabilities Flags */ 1220170251Sscottl 1221233425Smarius#define MPI_IOCPAGE6_CAP_FLAGS_SSD_SUPPORT (0x00000020) 1222233425Smarius#define MPI_IOCPAGE6_CAP_FLAGS_MULTIPORT_DRIVE_SUPPORT (0x00000010) 1223170251Sscottl#define MPI_IOCPAGE6_CAP_FLAGS_DISABLE_SMART_POLLING (0x00000008) 1224170251Sscottl 1225170251Sscottl#define MPI_IOCPAGE6_CAP_FLAGS_MASK_METADATA_SIZE (0x00000006) 1226170251Sscottl#define MPI_IOCPAGE6_CAP_FLAGS_64MB_METADATA_SIZE (0x00000000) 1227170251Sscottl#define MPI_IOCPAGE6_CAP_FLAGS_512MB_METADATA_SIZE (0x00000002) 1228170251Sscottl 1229170251Sscottl#define MPI_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001) 1230170251Sscottl 1231170251Sscottl 1232154603Smjacob/**************************************************************************** 1233154603Smjacob* BIOS Config Pages 1234154603Smjacob****************************************************************************/ 1235115778Smjacob 1236154603Smjacobtypedef struct _CONFIG_PAGE_BIOS_1 1237154603Smjacob{ 1238154603Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1239154603Smjacob U32 BiosOptions; /* 04h */ 1240154603Smjacob U32 IOCSettings; /* 08h */ 1241154603Smjacob U32 Reserved1; /* 0Ch */ 1242154603Smjacob U32 DeviceSettings; /* 10h */ 1243154603Smjacob U16 NumberOfDevices; /* 14h */ 1244156000Smjacob U8 ExpanderSpinup; /* 16h */ 1245156000Smjacob U8 Reserved2; /* 17h */ 1246154603Smjacob U16 IOTimeoutBlockDevicesNonRM; /* 18h */ 1247154603Smjacob U16 IOTimeoutSequential; /* 1Ah */ 1248154603Smjacob U16 IOTimeoutOther; /* 1Ch */ 1249154603Smjacob U16 IOTimeoutBlockDevicesRM; /* 1Eh */ 1250154603Smjacob} CONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1, 1251154603Smjacob BIOSPage1_t, MPI_POINTER pBIOSPage1_t; 1252154603Smjacob 1253156000Smjacob#define MPI_BIOSPAGE1_PAGEVERSION (0x03) 1254154603Smjacob 1255154603Smjacob/* values for the BiosOptions field */ 1256154603Smjacob#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400) 1257154603Smjacob#define MPI_BIOSPAGE1_OPTIONS_FC_ENABLE (0x00000200) 1258154603Smjacob#define MPI_BIOSPAGE1_OPTIONS_SAS_ENABLE (0x00000100) 1259233425Smarius 1260233425Smarius#define MPI_BIOSPAGE1_OPTIONS_SCAN_HIGH_TO_LOW (0x00000002) 1261233425Smarius#define MPI_BIOSPAGE1_OPTIONS_SCAN_LOW_TO_HIGH (0x00000000) 1262233425Smarius 1263154603Smjacob#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001) 1264154603Smjacob 1265154603Smjacob/* values for the IOCSettings field */ 1266156000Smjacob#define MPI_BIOSPAGE1_IOCSET_MASK_INITIAL_SPINUP_DELAY (0x0F000000) 1267156000Smjacob#define MPI_BIOSPAGE1_IOCSET_SHIFT_INITIAL_SPINUP_DELAY (24) 1268156000Smjacob 1269154603Smjacob#define MPI_BIOSPAGE1_IOCSET_MASK_PORT_ENABLE_DELAY (0x00F00000) 1270154603Smjacob#define MPI_BIOSPAGE1_IOCSET_SHIFT_PORT_ENABLE_DELAY (20) 1271156000Smjacob 1272156000Smjacob#define MPI_BIOSPAGE1_IOCSET_AUTO_PORT_ENABLE (0x00080000) 1273156000Smjacob#define MPI_BIOSPAGE1_IOCSET_DIRECT_ATTACH_SPINUP_MODE (0x00040000) 1274156000Smjacob 1275154603Smjacob#define MPI_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000) 1276154603Smjacob#define MPI_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000) 1277154603Smjacob#define MPI_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000) 1278154603Smjacob 1279154603Smjacob#define MPI_BIOSPAGE1_IOCSET_MASK_MAX_TARGET_SPIN_UP (0x0000F000) 1280154603Smjacob#define MPI_BIOSPAGE1_IOCSET_SHIFT_MAX_TARGET_SPIN_UP (12) 1281154603Smjacob 1282154603Smjacob#define MPI_BIOSPAGE1_IOCSET_MASK_SPINUP_DELAY (0x00000F00) 1283154603Smjacob#define MPI_BIOSPAGE1_IOCSET_SHIFT_SPINUP_DELAY (8) 1284154603Smjacob 1285154603Smjacob#define MPI_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0) 1286154603Smjacob#define MPI_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000) 1287154603Smjacob#define MPI_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040) 1288154603Smjacob#define MPI_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080) 1289154603Smjacob 1290154603Smjacob#define MPI_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030) 1291154603Smjacob#define MPI_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000) 1292154603Smjacob#define MPI_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010) 1293154603Smjacob#define MPI_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020) 1294154603Smjacob#define MPI_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030) 1295154603Smjacob 1296154603Smjacob#define MPI_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008) 1297154603Smjacob 1298154603Smjacob/* values for the DeviceSettings field */ 1299170251Sscottl#define MPI_BIOSPAGE1_DEVSET_DISABLE_SMART_POLLING (0x00000010) 1300154603Smjacob#define MPI_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008) 1301154603Smjacob#define MPI_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004) 1302154603Smjacob#define MPI_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002) 1303154603Smjacob#define MPI_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001) 1304154603Smjacob 1305156000Smjacob/* defines for the ExpanderSpinup field */ 1306156000Smjacob#define MPI_BIOSPAGE1_EXPSPINUP_MASK_MAX_TARGET (0xF0) 1307156000Smjacob#define MPI_BIOSPAGE1_EXPSPINUP_SHIFT_MAX_TARGET (4) 1308156000Smjacob#define MPI_BIOSPAGE1_EXPSPINUP_MASK_DELAY (0x0F) 1309156000Smjacob 1310154603Smjacobtypedef struct _MPI_BOOT_DEVICE_ADAPTER_ORDER 1311154603Smjacob{ 1312154603Smjacob U32 Reserved1; /* 00h */ 1313154603Smjacob U32 Reserved2; /* 04h */ 1314154603Smjacob U32 Reserved3; /* 08h */ 1315154603Smjacob U32 Reserved4; /* 0Ch */ 1316154603Smjacob U32 Reserved5; /* 10h */ 1317154603Smjacob U32 Reserved6; /* 14h */ 1318154603Smjacob U32 Reserved7; /* 18h */ 1319154603Smjacob U32 Reserved8; /* 1Ch */ 1320154603Smjacob U32 Reserved9; /* 20h */ 1321154603Smjacob U32 Reserved10; /* 24h */ 1322154603Smjacob U32 Reserved11; /* 28h */ 1323154603Smjacob U32 Reserved12; /* 2Ch */ 1324154603Smjacob U32 Reserved13; /* 30h */ 1325154603Smjacob U32 Reserved14; /* 34h */ 1326154603Smjacob U32 Reserved15; /* 38h */ 1327154603Smjacob U32 Reserved16; /* 3Ch */ 1328154603Smjacob U32 Reserved17; /* 40h */ 1329154603Smjacob} MPI_BOOT_DEVICE_ADAPTER_ORDER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_ORDER; 1330154603Smjacob 1331154603Smjacobtypedef struct _MPI_BOOT_DEVICE_ADAPTER_NUMBER 1332154603Smjacob{ 1333154603Smjacob U8 TargetID; /* 00h */ 1334154603Smjacob U8 Bus; /* 01h */ 1335154603Smjacob U8 AdapterNumber; /* 02h */ 1336154603Smjacob U8 Reserved1; /* 03h */ 1337154603Smjacob U32 Reserved2; /* 04h */ 1338154603Smjacob U32 Reserved3; /* 08h */ 1339154603Smjacob U32 Reserved4; /* 0Ch */ 1340154603Smjacob U8 LUN[8]; /* 10h */ 1341154603Smjacob U32 Reserved5; /* 18h */ 1342154603Smjacob U32 Reserved6; /* 1Ch */ 1343154603Smjacob U32 Reserved7; /* 20h */ 1344154603Smjacob U32 Reserved8; /* 24h */ 1345154603Smjacob U32 Reserved9; /* 28h */ 1346154603Smjacob U32 Reserved10; /* 2Ch */ 1347154603Smjacob U32 Reserved11; /* 30h */ 1348154603Smjacob U32 Reserved12; /* 34h */ 1349154603Smjacob U32 Reserved13; /* 38h */ 1350154603Smjacob U32 Reserved14; /* 3Ch */ 1351154603Smjacob U32 Reserved15; /* 40h */ 1352154603Smjacob} MPI_BOOT_DEVICE_ADAPTER_NUMBER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_NUMBER; 1353154603Smjacob 1354154603Smjacobtypedef struct _MPI_BOOT_DEVICE_PCI_ADDRESS 1355154603Smjacob{ 1356154603Smjacob U8 TargetID; /* 00h */ 1357154603Smjacob U8 Bus; /* 01h */ 1358154603Smjacob U16 PCIAddress; /* 02h */ 1359154603Smjacob U32 Reserved1; /* 04h */ 1360154603Smjacob U32 Reserved2; /* 08h */ 1361154603Smjacob U32 Reserved3; /* 0Ch */ 1362154603Smjacob U8 LUN[8]; /* 10h */ 1363154603Smjacob U32 Reserved4; /* 18h */ 1364154603Smjacob U32 Reserved5; /* 1Ch */ 1365154603Smjacob U32 Reserved6; /* 20h */ 1366154603Smjacob U32 Reserved7; /* 24h */ 1367154603Smjacob U32 Reserved8; /* 28h */ 1368154603Smjacob U32 Reserved9; /* 2Ch */ 1369154603Smjacob U32 Reserved10; /* 30h */ 1370154603Smjacob U32 Reserved11; /* 34h */ 1371154603Smjacob U32 Reserved12; /* 38h */ 1372154603Smjacob U32 Reserved13; /* 3Ch */ 1373154603Smjacob U32 Reserved14; /* 40h */ 1374154603Smjacob} MPI_BOOT_DEVICE_PCI_ADDRESS, MPI_POINTER PTR_MPI_BOOT_DEVICE_PCI_ADDRESS; 1375154603Smjacob 1376154603Smjacobtypedef struct _MPI_BOOT_DEVICE_SLOT_NUMBER 1377154603Smjacob{ 1378154603Smjacob U8 TargetID; /* 00h */ 1379154603Smjacob U8 Bus; /* 01h */ 1380154603Smjacob U8 PCISlotNumber; /* 02h */ 1381154603Smjacob U8 Reserved1; /* 03h */ 1382154603Smjacob U32 Reserved2; /* 04h */ 1383154603Smjacob U32 Reserved3; /* 08h */ 1384154603Smjacob U32 Reserved4; /* 0Ch */ 1385154603Smjacob U8 LUN[8]; /* 10h */ 1386154603Smjacob U32 Reserved5; /* 18h */ 1387154603Smjacob U32 Reserved6; /* 1Ch */ 1388154603Smjacob U32 Reserved7; /* 20h */ 1389154603Smjacob U32 Reserved8; /* 24h */ 1390154603Smjacob U32 Reserved9; /* 28h */ 1391154603Smjacob U32 Reserved10; /* 2Ch */ 1392154603Smjacob U32 Reserved11; /* 30h */ 1393154603Smjacob U32 Reserved12; /* 34h */ 1394154603Smjacob U32 Reserved13; /* 38h */ 1395154603Smjacob U32 Reserved14; /* 3Ch */ 1396154603Smjacob U32 Reserved15; /* 40h */ 1397154603Smjacob} MPI_BOOT_DEVICE_PCI_SLOT_NUMBER, MPI_POINTER PTR_MPI_BOOT_DEVICE_PCI_SLOT_NUMBER; 1398154603Smjacob 1399154603Smjacobtypedef struct _MPI_BOOT_DEVICE_FC_WWN 1400154603Smjacob{ 1401154603Smjacob U64 WWPN; /* 00h */ 1402154603Smjacob U32 Reserved1; /* 08h */ 1403154603Smjacob U32 Reserved2; /* 0Ch */ 1404154603Smjacob U8 LUN[8]; /* 10h */ 1405154603Smjacob U32 Reserved3; /* 18h */ 1406154603Smjacob U32 Reserved4; /* 1Ch */ 1407154603Smjacob U32 Reserved5; /* 20h */ 1408154603Smjacob U32 Reserved6; /* 24h */ 1409154603Smjacob U32 Reserved7; /* 28h */ 1410154603Smjacob U32 Reserved8; /* 2Ch */ 1411154603Smjacob U32 Reserved9; /* 30h */ 1412154603Smjacob U32 Reserved10; /* 34h */ 1413154603Smjacob U32 Reserved11; /* 38h */ 1414154603Smjacob U32 Reserved12; /* 3Ch */ 1415154603Smjacob U32 Reserved13; /* 40h */ 1416154603Smjacob} MPI_BOOT_DEVICE_FC_WWN, MPI_POINTER PTR_MPI_BOOT_DEVICE_FC_WWN; 1417154603Smjacob 1418154603Smjacobtypedef struct _MPI_BOOT_DEVICE_SAS_WWN 1419154603Smjacob{ 1420154603Smjacob U64 SASAddress; /* 00h */ 1421154603Smjacob U32 Reserved1; /* 08h */ 1422154603Smjacob U32 Reserved2; /* 0Ch */ 1423154603Smjacob U8 LUN[8]; /* 10h */ 1424154603Smjacob U32 Reserved3; /* 18h */ 1425154603Smjacob U32 Reserved4; /* 1Ch */ 1426154603Smjacob U32 Reserved5; /* 20h */ 1427154603Smjacob U32 Reserved6; /* 24h */ 1428154603Smjacob U32 Reserved7; /* 28h */ 1429154603Smjacob U32 Reserved8; /* 2Ch */ 1430154603Smjacob U32 Reserved9; /* 30h */ 1431154603Smjacob U32 Reserved10; /* 34h */ 1432154603Smjacob U32 Reserved11; /* 38h */ 1433154603Smjacob U32 Reserved12; /* 3Ch */ 1434154603Smjacob U32 Reserved13; /* 40h */ 1435154603Smjacob} MPI_BOOT_DEVICE_SAS_WWN, MPI_POINTER PTR_MPI_BOOT_DEVICE_SAS_WWN; 1436154603Smjacob 1437154603Smjacobtypedef struct _MPI_BOOT_DEVICE_ENCLOSURE_SLOT 1438154603Smjacob{ 1439154603Smjacob U64 EnclosureLogicalID; /* 00h */ 1440154603Smjacob U32 Reserved1; /* 08h */ 1441154603Smjacob U32 Reserved2; /* 0Ch */ 1442154603Smjacob U8 LUN[8]; /* 10h */ 1443154603Smjacob U16 SlotNumber; /* 18h */ 1444154603Smjacob U16 Reserved3; /* 1Ah */ 1445154603Smjacob U32 Reserved4; /* 1Ch */ 1446154603Smjacob U32 Reserved5; /* 20h */ 1447154603Smjacob U32 Reserved6; /* 24h */ 1448154603Smjacob U32 Reserved7; /* 28h */ 1449154603Smjacob U32 Reserved8; /* 2Ch */ 1450154603Smjacob U32 Reserved9; /* 30h */ 1451154603Smjacob U32 Reserved10; /* 34h */ 1452154603Smjacob U32 Reserved11; /* 38h */ 1453154603Smjacob U32 Reserved12; /* 3Ch */ 1454154603Smjacob U32 Reserved13; /* 40h */ 1455154603Smjacob} MPI_BOOT_DEVICE_ENCLOSURE_SLOT, 1456154603Smjacob MPI_POINTER PTR_MPI_BOOT_DEVICE_ENCLOSURE_SLOT; 1457154603Smjacob 1458154603Smjacobtypedef union _MPI_BIOSPAGE2_BOOT_DEVICE 1459154603Smjacob{ 1460154603Smjacob MPI_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder; 1461154603Smjacob MPI_BOOT_DEVICE_ADAPTER_NUMBER AdapterNumber; 1462154603Smjacob MPI_BOOT_DEVICE_PCI_ADDRESS PCIAddress; 1463154603Smjacob MPI_BOOT_DEVICE_PCI_SLOT_NUMBER PCISlotNumber; 1464154603Smjacob MPI_BOOT_DEVICE_FC_WWN FcWwn; 1465154603Smjacob MPI_BOOT_DEVICE_SAS_WWN SasWwn; 1466154603Smjacob MPI_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot; 1467154603Smjacob} MPI_BIOSPAGE2_BOOT_DEVICE, MPI_POINTER PTR_MPI_BIOSPAGE2_BOOT_DEVICE; 1468154603Smjacob 1469154603Smjacobtypedef struct _CONFIG_PAGE_BIOS_2 1470154603Smjacob{ 1471154603Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1472154603Smjacob U32 Reserved1; /* 04h */ 1473154603Smjacob U32 Reserved2; /* 08h */ 1474154603Smjacob U32 Reserved3; /* 0Ch */ 1475154603Smjacob U32 Reserved4; /* 10h */ 1476154603Smjacob U32 Reserved5; /* 14h */ 1477154603Smjacob U32 Reserved6; /* 18h */ 1478154603Smjacob U8 BootDeviceForm; /* 1Ch */ 1479170251Sscottl U8 PrevBootDeviceForm; /* 1Ch */ 1480154603Smjacob U16 Reserved8; /* 1Eh */ 1481154603Smjacob MPI_BIOSPAGE2_BOOT_DEVICE BootDevice; /* 20h */ 1482154603Smjacob} CONFIG_PAGE_BIOS_2, MPI_POINTER PTR_CONFIG_PAGE_BIOS_2, 1483154603Smjacob BIOSPage2_t, MPI_POINTER pBIOSPage2_t; 1484154603Smjacob 1485170251Sscottl#define MPI_BIOSPAGE2_PAGEVERSION (0x02) 1486154603Smjacob 1487154603Smjacob#define MPI_BIOSPAGE2_FORM_MASK (0x0F) 1488154603Smjacob#define MPI_BIOSPAGE2_FORM_ADAPTER_ORDER (0x00) 1489154603Smjacob#define MPI_BIOSPAGE2_FORM_ADAPTER_NUMBER (0x01) 1490154603Smjacob#define MPI_BIOSPAGE2_FORM_PCI_ADDRESS (0x02) 1491154603Smjacob#define MPI_BIOSPAGE2_FORM_PCI_SLOT_NUMBER (0x03) 1492154603Smjacob#define MPI_BIOSPAGE2_FORM_FC_WWN (0x04) 1493154603Smjacob#define MPI_BIOSPAGE2_FORM_SAS_WWN (0x05) 1494154603Smjacob#define MPI_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06) 1495154603Smjacob 1496233425Smariustypedef struct _CONFIG_PAGE_BIOS_4 1497233425Smarius{ 1498233425Smarius CONFIG_PAGE_HEADER Header; /* 00h */ 1499233425Smarius U64 ReassignmentBaseWWID; /* 04h */ 1500233425Smarius} CONFIG_PAGE_BIOS_4, MPI_POINTER PTR_CONFIG_PAGE_BIOS_4, 1501233425Smarius BIOSPage4_t, MPI_POINTER pBIOSPage4_t; 1502154603Smjacob 1503233425Smarius#define MPI_BIOSPAGE4_PAGEVERSION (0x00) 1504233425Smarius 1505233425Smarius 1506101704Smjacob/**************************************************************************** 1507101704Smjacob* SCSI Port Config Pages 1508101704Smjacob****************************************************************************/ 1509101704Smjacob 1510101704Smjacobtypedef struct _CONFIG_PAGE_SCSI_PORT_0 1511101704Smjacob{ 1512115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1513101704Smjacob U32 Capabilities; /* 04h */ 1514101704Smjacob U32 PhysicalInterface; /* 08h */ 1515115778Smjacob} CONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0, 1516101704Smjacob SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t; 1517101704Smjacob 1518154603Smjacob#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x02) 1519101704Smjacob 1520101704Smjacob#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001) 1521101704Smjacob#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002) 1522101704Smjacob#define MPI_SCSIPORTPAGE0_CAP_QAS (0x00000004) 1523101704Smjacob#define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK (0x0000FF00) 1524154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_ASYNC (0x00) 1525154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_5 (0x32) 1526154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_10 (0x19) 1527154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_20 (0x0C) 1528154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_33_33 (0x0B) 1529154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_40 (0x0A) 1530154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_80 (0x09) 1531154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_160 (0x08) 1532154603Smjacob#define MPI_SCSIPORTPAGE0_SYNC_UNKNOWN (0xFF) 1533154603Smjacob 1534154603Smjacob#define MPI_SCSIPORTPAGE0_CAP_SHIFT_MIN_SYNC_PERIOD (8) 1535154603Smjacob#define MPI_SCSIPORTPAGE0_CAP_GET_MIN_SYNC_PERIOD(Cap) \ 1536156000Smjacob ( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK) \ 1537154603Smjacob >> MPI_SCSIPORTPAGE0_CAP_SHIFT_MIN_SYNC_PERIOD \ 1538154603Smjacob ) 1539101704Smjacob#define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK (0x00FF0000) 1540154603Smjacob#define MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET (16) 1541154603Smjacob#define MPI_SCSIPORTPAGE0_CAP_GET_MAX_SYNC_OFFSET(Cap) \ 1542156000Smjacob ( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK) \ 1543154603Smjacob >> MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET \ 1544154603Smjacob ) 1545154603Smjacob#define MPI_SCSIPORTPAGE0_CAP_IDP (0x08000000) 1546101704Smjacob#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000) 1547101704Smjacob#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000) 1548101704Smjacob 1549101704Smjacob#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK (0x00000003) 1550101704Smjacob#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD (0x01) 1551101704Smjacob#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE (0x02) 1552101704Smjacob#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD (0x03) 1553115778Smjacob#define MPI_SCSIPORTPAGE0_PHY_MASK_CONNECTED_ID (0xFF000000) 1554115778Smjacob#define MPI_SCSIPORTPAGE0_PHY_SHIFT_CONNECTED_ID (24) 1555115778Smjacob#define MPI_SCSIPORTPAGE0_PHY_BUS_FREE_CONNECTED_ID (0xFE) 1556115778Smjacob#define MPI_SCSIPORTPAGE0_PHY_UNKNOWN_CONNECTED_ID (0xFF) 1557101704Smjacob 1558101704Smjacob 1559101704Smjacobtypedef struct _CONFIG_PAGE_SCSI_PORT_1 1560101704Smjacob{ 1561115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1562101704Smjacob U32 Configuration; /* 04h */ 1563101704Smjacob U32 OnBusTimerValue; /* 08h */ 1564147883Sscottl U8 TargetConfig; /* 0Ch */ 1565147883Sscottl U8 Reserved1; /* 0Dh */ 1566147883Sscottl U16 IDConfig; /* 0Eh */ 1567115778Smjacob} CONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1, 1568101704Smjacob SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t; 1569101704Smjacob 1570147883Sscottl#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x03) 1571101704Smjacob 1572147883Sscottl/* Configuration values */ 1573101704Smjacob#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF) 1574101704Smjacob#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000) 1575154603Smjacob#define MPI_SCSIPORTPAGE1_CFG_SHIFT_PORT_RESPONSE_ID (16) 1576101704Smjacob 1577147883Sscottl/* TargetConfig values */ 1578147883Sscottl#define MPI_SCSIPORTPAGE1_TARGCONFIG_TARG_ONLY (0x01) 1579147883Sscottl#define MPI_SCSIPORTPAGE1_TARGCONFIG_INIT_TARG (0x02) 1580101704Smjacob 1581147883Sscottl 1582101704Smjacobtypedef struct _MPI_DEVICE_INFO 1583101704Smjacob{ 1584101704Smjacob U8 Timeout; /* 00h */ 1585101704Smjacob U8 SyncFactor; /* 01h */ 1586101704Smjacob U16 DeviceFlags; /* 02h */ 1587101704Smjacob} MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO, 1588101704Smjacob MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t; 1589101704Smjacob 1590101704Smjacobtypedef struct _CONFIG_PAGE_SCSI_PORT_2 1591101704Smjacob{ 1592115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1593101704Smjacob U32 PortFlags; /* 04h */ 1594101704Smjacob U32 PortSettings; /* 08h */ 1595101704Smjacob MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */ 1596115778Smjacob} CONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2, 1597101704Smjacob SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t; 1598101704Smjacob 1599147883Sscottl#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x02) 1600101704Smjacob 1601147883Sscottl/* PortFlags values */ 1602101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW (0x00000001) 1603101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET (0x00000004) 1604101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS (0x00000008) 1605101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE (0x00000010) 1606101704Smjacob 1607147883Sscottl#define MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK (0x00000060) 1608147883Sscottl#define MPI_SCSIPORTPAGE2_PORT_FLAGS_FULL_DV (0x00000000) 1609147883Sscottl#define MPI_SCSIPORTPAGE2_PORT_FLAGS_BASIC_DV_ONLY (0x00000020) 1610147883Sscottl#define MPI_SCSIPORTPAGE2_PORT_FLAGS_OFF_DV (0x00000060) 1611147883Sscottl 1612154603Smjacob 1613147883Sscottl/* PortSettings values */ 1614101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F) 1615101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030) 1616101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA (0x00000000) 1617101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA (0x00000010) 1618101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020) 1619101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030) 1620101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0) 1621154603Smjacob#define MPI_SCSIPORTPAGE2_PORT_RM_NONE (0x00000000) 1622154603Smjacob#define MPI_SCSIPORTPAGE2_PORT_RM_BOOT_ONLY (0x00000040) 1623154603Smjacob#define MPI_SCSIPORTPAGE2_PORT_RM_WITH_MEDIA (0x00000080) 1624101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00) 1625154603Smjacob#define MPI_SCSIPORTPAGE2_PORT_SHIFT_SPINUP_DELAY (8) 1626101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS (0x00003000) 1627101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS (0x00000000) 1628101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00001000) 1629101704Smjacob#define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS (0x00003000) 1630101704Smjacob 1631101704Smjacob#define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE (0x0001) 1632101704Smjacob#define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE (0x0002) 1633101704Smjacob#define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE (0x0004) 1634101704Smjacob#define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE (0x0008) 1635101704Smjacob#define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE (0x0010) 1636101704Smjacob#define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE (0x0020) 1637101704Smjacob 1638101704Smjacob 1639101704Smjacob/**************************************************************************** 1640101704Smjacob* SCSI Target Device Config Pages 1641101704Smjacob****************************************************************************/ 1642101704Smjacob 1643101704Smjacobtypedef struct _CONFIG_PAGE_SCSI_DEVICE_0 1644101704Smjacob{ 1645115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1646101704Smjacob U32 NegotiatedParameters; /* 04h */ 1647101704Smjacob U32 Information; /* 08h */ 1648115778Smjacob} CONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0, 1649101704Smjacob SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t; 1650101704Smjacob 1651154603Smjacob#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x04) 1652101704Smjacob 1653101704Smjacob#define MPI_SCSIDEVPAGE0_NP_IU (0x00000001) 1654101704Smjacob#define MPI_SCSIDEVPAGE0_NP_DT (0x00000002) 1655101704Smjacob#define MPI_SCSIDEVPAGE0_NP_QAS (0x00000004) 1656115778Smjacob#define MPI_SCSIDEVPAGE0_NP_HOLD_MCS (0x00000008) 1657115778Smjacob#define MPI_SCSIDEVPAGE0_NP_WR_FLOW (0x00000010) 1658115778Smjacob#define MPI_SCSIDEVPAGE0_NP_RD_STRM (0x00000020) 1659115778Smjacob#define MPI_SCSIDEVPAGE0_NP_RTI (0x00000040) 1660115778Smjacob#define MPI_SCSIDEVPAGE0_NP_PCOMP_EN (0x00000080) 1661101704Smjacob#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK (0x0000FF00) 1662154603Smjacob#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_PERIOD (8) 1663101704Smjacob#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000) 1664154603Smjacob#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_OFFSET (16) 1665154603Smjacob#define MPI_SCSIDEVPAGE0_NP_IDP (0x08000000) 1666101704Smjacob#define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000) 1667101704Smjacob#define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000) 1668101704Smjacob 1669101704Smjacob#define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED (0x00000001) 1670101704Smjacob#define MPI_SCSIDEVPAGE0_INFO_SDTR_REJECTED (0x00000002) 1671101704Smjacob#define MPI_SCSIDEVPAGE0_INFO_WDTR_REJECTED (0x00000004) 1672101704Smjacob#define MPI_SCSIDEVPAGE0_INFO_PPR_REJECTED (0x00000008) 1673101704Smjacob 1674101704Smjacob 1675101704Smjacobtypedef struct _CONFIG_PAGE_SCSI_DEVICE_1 1676101704Smjacob{ 1677115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1678101704Smjacob U32 RequestedParameters; /* 04h */ 1679101704Smjacob U32 Reserved; /* 08h */ 1680101704Smjacob U32 Configuration; /* 0Ch */ 1681115778Smjacob} CONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1, 1682101704Smjacob SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t; 1683101704Smjacob 1684154603Smjacob#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x05) 1685101704Smjacob 1686101704Smjacob#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001) 1687101704Smjacob#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002) 1688101704Smjacob#define MPI_SCSIDEVPAGE1_RP_QAS (0x00000004) 1689115778Smjacob#define MPI_SCSIDEVPAGE1_RP_HOLD_MCS (0x00000008) 1690115778Smjacob#define MPI_SCSIDEVPAGE1_RP_WR_FLOW (0x00000010) 1691115778Smjacob#define MPI_SCSIDEVPAGE1_RP_RD_STRM (0x00000020) 1692115778Smjacob#define MPI_SCSIDEVPAGE1_RP_RTI (0x00000040) 1693115778Smjacob#define MPI_SCSIDEVPAGE1_RP_PCOMP_EN (0x00000080) 1694101704Smjacob#define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK (0x0000FF00) 1695154603Smjacob#define MPI_SCSIDEVPAGE1_RP_SHIFT_MIN_SYNC_PERIOD (8) 1696101704Smjacob#define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000) 1697154603Smjacob#define MPI_SCSIDEVPAGE1_RP_SHIFT_MAX_SYNC_OFFSET (16) 1698154603Smjacob#define MPI_SCSIDEVPAGE1_RP_IDP (0x08000000) 1699101704Smjacob#define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000) 1700101704Smjacob#define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000) 1701101704Smjacob 1702101704Smjacob#define MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED (0x00000002) 1703101704Smjacob#define MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED (0x00000004) 1704115778Smjacob#define MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE (0x00000008) 1705115778Smjacob#define MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG (0x00000010) 1706101704Smjacob 1707101704Smjacob 1708101704Smjacobtypedef struct _CONFIG_PAGE_SCSI_DEVICE_2 1709101704Smjacob{ 1710115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1711101704Smjacob U32 DomainValidation; /* 04h */ 1712101704Smjacob U32 ParityPipeSelect; /* 08h */ 1713101704Smjacob U32 DataPipeSelect; /* 0Ch */ 1714115778Smjacob} CONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2, 1715101704Smjacob SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t; 1716101704Smjacob 1717115778Smjacob#define MPI_SCSIDEVPAGE2_PAGEVERSION (0x01) 1718101704Smjacob 1719101704Smjacob#define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE (0x00000010) 1720101704Smjacob#define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE (0x00000020) 1721101704Smjacob#define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL (0x00000380) 1722101704Smjacob#define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL (0x00001C00) 1723101704Smjacob#define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL (0x0000E000) 1724101704Smjacob#define MPI_SCSIDEVPAGE2_DV_XCLKH_ST (0x10000000) 1725101704Smjacob#define MPI_SCSIDEVPAGE2_DV_XCLKS_ST (0x20000000) 1726101704Smjacob#define MPI_SCSIDEVPAGE2_DV_XCLKH_DT (0x40000000) 1727101704Smjacob#define MPI_SCSIDEVPAGE2_DV_XCLKS_DT (0x80000000) 1728101704Smjacob 1729101704Smjacob#define MPI_SCSIDEVPAGE2_PPS_PPS_MASK (0x00000003) 1730101704Smjacob 1731101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK (0x00000003) 1732101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK (0x0000000C) 1733101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK (0x00000030) 1734101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK (0x000000C0) 1735101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK (0x00000300) 1736101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK (0x00000C00) 1737101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK (0x00003000) 1738101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK (0x0000C000) 1739101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK (0x00030000) 1740101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK (0x000C0000) 1741101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK (0x00300000) 1742101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK (0x00C00000) 1743101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK (0x03000000) 1744101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK (0x0C000000) 1745101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK (0x30000000) 1746101704Smjacob#define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK (0xC0000000) 1747101704Smjacob 1748101704Smjacob 1749115778Smjacobtypedef struct _CONFIG_PAGE_SCSI_DEVICE_3 1750115778Smjacob{ 1751115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1752115778Smjacob U16 MsgRejectCount; /* 04h */ 1753115778Smjacob U16 PhaseErrorCount; /* 06h */ 1754115778Smjacob U16 ParityErrorCount; /* 08h */ 1755115778Smjacob U16 Reserved; /* 0Ah */ 1756115778Smjacob} CONFIG_PAGE_SCSI_DEVICE_3, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_3, 1757115778Smjacob SCSIDevicePage3_t, MPI_POINTER pSCSIDevicePage3_t; 1758115778Smjacob 1759115778Smjacob#define MPI_SCSIDEVPAGE3_PAGEVERSION (0x00) 1760115778Smjacob 1761115778Smjacob#define MPI_SCSIDEVPAGE3_MAX_COUNTER (0xFFFE) 1762115778Smjacob#define MPI_SCSIDEVPAGE3_UNSUPPORTED_COUNTER (0xFFFF) 1763115778Smjacob 1764115778Smjacob 1765101704Smjacob/**************************************************************************** 1766101704Smjacob* FC Port Config Pages 1767101704Smjacob****************************************************************************/ 1768101704Smjacob 1769101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_0 1770101704Smjacob{ 1771115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1772101704Smjacob U32 Flags; /* 04h */ 1773101704Smjacob U8 MPIPortNumber; /* 08h */ 1774101704Smjacob U8 LinkType; /* 09h */ 1775101704Smjacob U8 PortState; /* 0Ah */ 1776101704Smjacob U8 Reserved; /* 0Bh */ 1777101704Smjacob U32 PortIdentifier; /* 0Ch */ 1778101704Smjacob U64 WWNN; /* 10h */ 1779101704Smjacob U64 WWPN; /* 18h */ 1780101704Smjacob U32 SupportedServiceClass; /* 20h */ 1781101704Smjacob U32 SupportedSpeeds; /* 24h */ 1782101704Smjacob U32 CurrentSpeed; /* 28h */ 1783101704Smjacob U32 MaxFrameSize; /* 2Ch */ 1784101704Smjacob U64 FabricWWNN; /* 30h */ 1785101704Smjacob U64 FabricWWPN; /* 38h */ 1786101704Smjacob U32 DiscoveredPortsCount; /* 40h */ 1787101704Smjacob U32 MaxInitiators; /* 44h */ 1788115778Smjacob U8 MaxAliasesSupported; /* 48h */ 1789115778Smjacob U8 MaxHardAliasesSupported; /* 49h */ 1790115778Smjacob U8 NumCurrentAliases; /* 4Ah */ 1791115778Smjacob U8 Reserved1; /* 4Bh */ 1792115778Smjacob} CONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0, 1793101704Smjacob FCPortPage0_t, MPI_POINTER pFCPortPage0_t; 1794101704Smjacob 1795115778Smjacob#define MPI_FCPORTPAGE0_PAGEVERSION (0x02) 1796101704Smjacob 1797101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_PROT_MASK (0x0000000F) 1798101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_INIT (MPI_PORTFACTS_PROTOCOL_INITIATOR) 1799101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_TARG (MPI_PORTFACTS_PROTOCOL_TARGET) 1800101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_PROT_LAN (MPI_PORTFACTS_PROTOCOL_LAN) 1801101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_PROT_LOGBUSADDR (MPI_PORTFACTS_PROTOCOL_LOGBUSADDR) 1802101704Smjacob 1803101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_ALIAS_ALPA_SUPPORTED (0x00000010) 1804101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED (0x00000020) 1805115778Smjacob#define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID (0x00000040) 1806101704Smjacob 1807101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK (0x00000F00) 1808101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT (0x00000000) 1809101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT (0x00000100) 1810101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP (0x00000200) 1811101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT (0x00000400) 1812101704Smjacob#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP (0x00000800) 1813101704Smjacob 1814101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_RESERVED (0x00) 1815101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_OTHER (0x01) 1816101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_UNKNOWN (0x02) 1817101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_COPPER (0x03) 1818101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_SINGLE_1300 (0x04) 1819101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_SINGLE_1500 (0x05) 1820101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_50_LASER_MULTI (0x06) 1821101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_50_LED_MULTI (0x07) 1822101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_62_LASER_MULTI (0x08) 1823101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_62_LED_MULTI (0x09) 1824101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_MULTI_LONG_WAVE (0x0A) 1825101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_MULTI_SHORT_WAVE (0x0B) 1826101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_LASER_SHORT_WAVE (0x0C) 1827101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_LED_SHORT_WAVE (0x0D) 1828101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_1300_LONG_WAVE (0x0E) 1829101704Smjacob#define MPI_FCPORTPAGE0_LTYPE_1500_LONG_WAVE (0x0F) 1830101704Smjacob 1831101704Smjacob#define MPI_FCPORTPAGE0_PORTSTATE_UNKNOWN (0x01) /*(SNIA)HBA_PORTSTATE_UNKNOWN 1 Unknown */ 1832101704Smjacob#define MPI_FCPORTPAGE0_PORTSTATE_ONLINE (0x02) /*(SNIA)HBA_PORTSTATE_ONLINE 2 Operational */ 1833101704Smjacob#define MPI_FCPORTPAGE0_PORTSTATE_OFFLINE (0x03) /*(SNIA)HBA_PORTSTATE_OFFLINE 3 User Offline */ 1834101704Smjacob#define MPI_FCPORTPAGE0_PORTSTATE_BYPASSED (0x04) /*(SNIA)HBA_PORTSTATE_BYPASSED 4 Bypassed */ 1835101704Smjacob#define MPI_FCPORTPAGE0_PORTSTATE_DIAGNOST (0x05) /*(SNIA)HBA_PORTSTATE_DIAGNOSTICS 5 In diagnostics mode */ 1836101704Smjacob#define MPI_FCPORTPAGE0_PORTSTATE_LINKDOWN (0x06) /*(SNIA)HBA_PORTSTATE_LINKDOWN 6 Link Down */ 1837101704Smjacob#define MPI_FCPORTPAGE0_PORTSTATE_ERROR (0x07) /*(SNIA)HBA_PORTSTATE_ERROR 7 Port Error */ 1838101704Smjacob#define MPI_FCPORTPAGE0_PORTSTATE_LOOPBACK (0x08) /*(SNIA)HBA_PORTSTATE_LOOPBACK 8 Loopback */ 1839101704Smjacob 1840101704Smjacob#define MPI_FCPORTPAGE0_SUPPORT_CLASS_1 (0x00000001) 1841101704Smjacob#define MPI_FCPORTPAGE0_SUPPORT_CLASS_2 (0x00000002) 1842101704Smjacob#define MPI_FCPORTPAGE0_SUPPORT_CLASS_3 (0x00000004) 1843101704Smjacob 1844154603Smjacob#define MPI_FCPORTPAGE0_SUPPORT_SPEED_UKNOWN (0x00000000) /* (SNIA)HBA_PORTSPEED_UNKNOWN 0 Unknown - transceiver incapable of reporting */ 1845170251Sscottl#define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED (0x00000001) /* (SNIA)HBA_PORTSPEED_1GBIT 1 1 GBit/sec */ 1846170251Sscottl#define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED (0x00000002) /* (SNIA)HBA_PORTSPEED_2GBIT 2 2 GBit/sec */ 1847170251Sscottl#define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED (0x00000004) /* (SNIA)HBA_PORTSPEED_10GBIT 4 10 GBit/sec */ 1848154603Smjacob#define MPI_FCPORTPAGE0_SUPPORT_4GBIT_SPEED (0x00000008) /* (SNIA)HBA_PORTSPEED_4GBIT 8 4 GBit/sec */ 1849101704Smjacob 1850154603Smjacob#define MPI_FCPORTPAGE0_CURRENT_SPEED_UKNOWN MPI_FCPORTPAGE0_SUPPORT_SPEED_UKNOWN 1851101704Smjacob#define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED 1852101704Smjacob#define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED 1853101704Smjacob#define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED 1854154603Smjacob#define MPI_FCPORTPAGE0_CURRENT_SPEED_4GBIT MPI_FCPORTPAGE0_SUPPORT_4GBIT_SPEED 1855154603Smjacob#define MPI_FCPORTPAGE0_CURRENT_SPEED_NOT_NEGOTIATED (0x00008000) /* (SNIA)HBA_PORTSPEED_NOT_NEGOTIATED (1<<15) Speed not established */ 1856101704Smjacob 1857101704Smjacob 1858101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_1 1859101704Smjacob{ 1860115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1861101704Smjacob U32 Flags; /* 04h */ 1862101704Smjacob U64 NoSEEPROMWWNN; /* 08h */ 1863101704Smjacob U64 NoSEEPROMWWPN; /* 10h */ 1864101704Smjacob U8 HardALPA; /* 18h */ 1865101704Smjacob U8 LinkConfig; /* 19h */ 1866101704Smjacob U8 TopologyConfig; /* 1Ah */ 1867115778Smjacob U8 AltConnector; /* 1Bh */ 1868115778Smjacob U8 NumRequestedAliases; /* 1Ch */ 1869115778Smjacob U8 RR_TOV; /* 1Dh */ 1870147883Sscottl U8 InitiatorDeviceTimeout; /* 1Eh */ 1871147883Sscottl U8 InitiatorIoPendTimeout; /* 1Fh */ 1872115778Smjacob} CONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1, 1873101704Smjacob FCPortPage1_t, MPI_POINTER pFCPortPage1_t; 1874101704Smjacob 1875147883Sscottl#define MPI_FCPORTPAGE1_PAGEVERSION (0x06) 1876101704Smjacob 1877101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN (0x08000000) 1878101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY (0x04000000) 1879115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_FORCE_USE_NOSEEPROM_WWNS (0x02000000) 1880115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_VERBOSE_RESCAN_EVENTS (0x01000000) 1881115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000) 1882147883Sscottl#define MPI_FCPORTPAGE1_FLAGS_PORT_OFFLINE (0x00400000) 1883147883Sscottl#define MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK (0x00200000) 1884154603Smjacob#define MPI_FCPORTPAGE1_FLAGS_TARGET_LARGE_CDB_ENABLE (0x00000080) 1885115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070) 1886147883Sscottl#define MPI_FCPORTPAGE1_FLAGS_SUPPRESS_PROT_REG (0x00000008) 1887147883Sscottl#define MPI_FCPORTPAGE1_FLAGS_PLOGI_ON_LOGO (0x00000004) 1888115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_MAINTAIN_LOGINS (0x00000002) 1889101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID (0x00000001) 1890101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN (0x00000000) 1891101704Smjacob 1892101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_PROT_MASK (0xF0000000) 1893101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT (28) 1894101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) 1895101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) 1896101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_PROT_LAN ((U32)MPI_PORTFACTS_PROTOCOL_LAN << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) 1897101704Smjacob#define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR ((U32)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) 1898101704Smjacob 1899115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_NONE_RR_TOV_UNITS (0x00000000) 1900115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_THOUSANDTH_RR_TOV_UNITS (0x00000010) 1901115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_TENTH_RR_TOV_UNITS (0x00000030) 1902115778Smjacob#define MPI_FCPORTPAGE1_FLAGS_TEN_RR_TOV_UNITS (0x00000050) 1903115778Smjacob 1904101704Smjacob#define MPI_FCPORTPAGE1_HARD_ALPA_NOT_USED (0xFF) 1905101704Smjacob 1906101704Smjacob#define MPI_FCPORTPAGE1_LCONFIG_SPEED_MASK (0x0F) 1907101704Smjacob#define MPI_FCPORTPAGE1_LCONFIG_SPEED_1GIG (0x00) 1908101704Smjacob#define MPI_FCPORTPAGE1_LCONFIG_SPEED_2GIG (0x01) 1909101704Smjacob#define MPI_FCPORTPAGE1_LCONFIG_SPEED_4GIG (0x02) 1910101704Smjacob#define MPI_FCPORTPAGE1_LCONFIG_SPEED_10GIG (0x03) 1911101704Smjacob#define MPI_FCPORTPAGE1_LCONFIG_SPEED_AUTO (0x0F) 1912101704Smjacob 1913101704Smjacob#define MPI_FCPORTPAGE1_TOPOLOGY_MASK (0x0F) 1914101704Smjacob#define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT (0x01) 1915101704Smjacob#define MPI_FCPORTPAGE1_TOPOLOGY_NPORT (0x02) 1916101704Smjacob#define MPI_FCPORTPAGE1_TOPOLOGY_AUTO (0x0F) 1917101704Smjacob 1918115778Smjacob#define MPI_FCPORTPAGE1_ALT_CONN_UNKNOWN (0x00) 1919101704Smjacob 1920147883Sscottl#define MPI_FCPORTPAGE1_INITIATOR_DEV_TIMEOUT_MASK (0x7F) 1921147883Sscottl#define MPI_FCPORTPAGE1_INITIATOR_DEV_UNIT_16 (0x80) 1922115778Smjacob 1923147883Sscottl 1924101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_2 1925101704Smjacob{ 1926115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1927101704Smjacob U8 NumberActive; /* 04h */ 1928101704Smjacob U8 ALPA[127]; /* 05h */ 1929115778Smjacob} CONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2, 1930101704Smjacob FCPortPage2_t, MPI_POINTER pFCPortPage2_t; 1931101704Smjacob 1932101704Smjacob#define MPI_FCPORTPAGE2_PAGEVERSION (0x01) 1933101704Smjacob 1934101704Smjacob 1935101704Smjacobtypedef struct _WWN_FORMAT 1936101704Smjacob{ 1937101704Smjacob U64 WWNN; /* 00h */ 1938101704Smjacob U64 WWPN; /* 08h */ 1939101704Smjacob} WWN_FORMAT, MPI_POINTER PTR_WWN_FORMAT, 1940101704Smjacob WWNFormat, MPI_POINTER pWWNFormat; 1941101704Smjacob 1942101704Smjacobtypedef union _FC_PORT_PERSISTENT_PHYSICAL_ID 1943101704Smjacob{ 1944101704Smjacob WWN_FORMAT WWN; 1945101704Smjacob U32 Did; 1946101704Smjacob} FC_PORT_PERSISTENT_PHYSICAL_ID, MPI_POINTER PTR_FC_PORT_PERSISTENT_PHYSICAL_ID, 1947101704Smjacob PersistentPhysicalId_t, MPI_POINTER pPersistentPhysicalId_t; 1948101704Smjacob 1949101704Smjacobtypedef struct _FC_PORT_PERSISTENT 1950101704Smjacob{ 1951101704Smjacob FC_PORT_PERSISTENT_PHYSICAL_ID PhysicalIdentifier; /* 00h */ 1952101704Smjacob U8 TargetID; /* 10h */ 1953101704Smjacob U8 Bus; /* 11h */ 1954101704Smjacob U16 Flags; /* 12h */ 1955101704Smjacob} FC_PORT_PERSISTENT, MPI_POINTER PTR_FC_PORT_PERSISTENT, 1956101704Smjacob PersistentData_t, MPI_POINTER pPersistentData_t; 1957101704Smjacob 1958101704Smjacob#define MPI_PERSISTENT_FLAGS_SHIFT (16) 1959101704Smjacob#define MPI_PERSISTENT_FLAGS_ENTRY_VALID (0x0001) 1960101704Smjacob#define MPI_PERSISTENT_FLAGS_SCAN_ID (0x0002) 1961101704Smjacob#define MPI_PERSISTENT_FLAGS_SCAN_LUNS (0x0004) 1962101704Smjacob#define MPI_PERSISTENT_FLAGS_BOOT_DEVICE (0x0008) 1963101704Smjacob#define MPI_PERSISTENT_FLAGS_BY_DID (0x0080) 1964101704Smjacob 1965101704Smjacob/* 1966101704Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1967101704Smjacob * one and check Header.PageLength at runtime. 1968101704Smjacob */ 1969101704Smjacob#ifndef MPI_FC_PORT_PAGE_3_ENTRY_MAX 1970101704Smjacob#define MPI_FC_PORT_PAGE_3_ENTRY_MAX (1) 1971101704Smjacob#endif 1972101704Smjacob 1973101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_3 1974101704Smjacob{ 1975115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1976101704Smjacob FC_PORT_PERSISTENT Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX]; /* 04h */ 1977115778Smjacob} CONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3, 1978101704Smjacob FCPortPage3_t, MPI_POINTER pFCPortPage3_t; 1979101704Smjacob 1980101704Smjacob#define MPI_FCPORTPAGE3_PAGEVERSION (0x01) 1981101704Smjacob 1982101704Smjacob 1983101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_4 1984101704Smjacob{ 1985115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 1986101704Smjacob U32 PortFlags; /* 04h */ 1987101704Smjacob U32 PortSettings; /* 08h */ 1988115778Smjacob} CONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4, 1989101704Smjacob FCPortPage4_t, MPI_POINTER pFCPortPage4_t; 1990101704Smjacob 1991101704Smjacob#define MPI_FCPORTPAGE4_PAGEVERSION (0x00) 1992101704Smjacob 1993101704Smjacob#define MPI_FCPORTPAGE4_PORT_FLAGS_ALTERNATE_CHS (0x00000008) 1994101704Smjacob 1995101704Smjacob#define MPI_FCPORTPAGE4_PORT_MASK_INIT_HBA (0x00000030) 1996101704Smjacob#define MPI_FCPORTPAGE4_PORT_DISABLE_INIT_HBA (0x00000000) 1997101704Smjacob#define MPI_FCPORTPAGE4_PORT_BIOS_INIT_HBA (0x00000010) 1998101704Smjacob#define MPI_FCPORTPAGE4_PORT_OS_INIT_HBA (0x00000020) 1999101704Smjacob#define MPI_FCPORTPAGE4_PORT_BIOS_OS_INIT_HBA (0x00000030) 2000101704Smjacob#define MPI_FCPORTPAGE4_PORT_REMOVABLE_MEDIA (0x000000C0) 2001101704Smjacob#define MPI_FCPORTPAGE4_PORT_SPINUP_DELAY_MASK (0x00000F00) 2002101704Smjacob 2003101704Smjacob 2004101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO 2005101704Smjacob{ 2006101704Smjacob U8 Flags; /* 00h */ 2007101704Smjacob U8 AliasAlpa; /* 01h */ 2008101704Smjacob U16 Reserved; /* 02h */ 2009101704Smjacob U64 AliasWWNN; /* 04h */ 2010101704Smjacob U64 AliasWWPN; /* 0Ch */ 2011115778Smjacob} CONFIG_PAGE_FC_PORT_5_ALIAS_INFO, 2012101704Smjacob MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO, 2013101704Smjacob FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t; 2014101704Smjacob 2015101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_5 2016101704Smjacob{ 2017115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2018115778Smjacob CONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo; /* 04h */ 2019115778Smjacob} CONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5, 2020101704Smjacob FCPortPage5_t, MPI_POINTER pFCPortPage5_t; 2021101704Smjacob 2022115778Smjacob#define MPI_FCPORTPAGE5_PAGEVERSION (0x02) 2023101704Smjacob 2024115778Smjacob#define MPI_FCPORTPAGE5_FLAGS_ALPA_ACQUIRED (0x01) 2025115778Smjacob#define MPI_FCPORTPAGE5_FLAGS_HARD_ALPA (0x02) 2026115778Smjacob#define MPI_FCPORTPAGE5_FLAGS_HARD_WWNN (0x04) 2027115778Smjacob#define MPI_FCPORTPAGE5_FLAGS_HARD_WWPN (0x08) 2028115778Smjacob#define MPI_FCPORTPAGE5_FLAGS_DISABLE (0x10) 2029101704Smjacob 2030101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_6 2031101704Smjacob{ 2032115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2033101704Smjacob U32 Reserved; /* 04h */ 2034101704Smjacob U64 TimeSinceReset; /* 08h */ 2035101704Smjacob U64 TxFrames; /* 10h */ 2036101704Smjacob U64 RxFrames; /* 18h */ 2037101704Smjacob U64 TxWords; /* 20h */ 2038101704Smjacob U64 RxWords; /* 28h */ 2039101704Smjacob U64 LipCount; /* 30h */ 2040101704Smjacob U64 NosCount; /* 38h */ 2041101704Smjacob U64 ErrorFrames; /* 40h */ 2042101704Smjacob U64 DumpedFrames; /* 48h */ 2043101704Smjacob U64 LinkFailureCount; /* 50h */ 2044101704Smjacob U64 LossOfSyncCount; /* 58h */ 2045101704Smjacob U64 LossOfSignalCount; /* 60h */ 2046101704Smjacob U64 PrimativeSeqErrCount; /* 68h */ 2047101704Smjacob U64 InvalidTxWordCount; /* 70h */ 2048101704Smjacob U64 InvalidCrcCount; /* 78h */ 2049101704Smjacob U64 FcpInitiatorIoCount; /* 80h */ 2050115778Smjacob} CONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6, 2051101704Smjacob FCPortPage6_t, MPI_POINTER pFCPortPage6_t; 2052101704Smjacob 2053101704Smjacob#define MPI_FCPORTPAGE6_PAGEVERSION (0x00) 2054101704Smjacob 2055101704Smjacob 2056101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_7 2057101704Smjacob{ 2058115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2059101704Smjacob U32 Reserved; /* 04h */ 2060101704Smjacob U8 PortSymbolicName[256]; /* 08h */ 2061115778Smjacob} CONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7, 2062101704Smjacob FCPortPage7_t, MPI_POINTER pFCPortPage7_t; 2063101704Smjacob 2064101704Smjacob#define MPI_FCPORTPAGE7_PAGEVERSION (0x00) 2065101704Smjacob 2066101704Smjacob 2067101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_8 2068101704Smjacob{ 2069115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2070101704Smjacob U32 BitVector[8]; /* 04h */ 2071115778Smjacob} CONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8, 2072101704Smjacob FCPortPage8_t, MPI_POINTER pFCPortPage8_t; 2073101704Smjacob 2074101704Smjacob#define MPI_FCPORTPAGE8_PAGEVERSION (0x00) 2075101704Smjacob 2076101704Smjacob 2077101704Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_9 2078101704Smjacob{ 2079115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2080101704Smjacob U32 Reserved; /* 04h */ 2081101704Smjacob U64 GlobalWWPN; /* 08h */ 2082101704Smjacob U64 GlobalWWNN; /* 10h */ 2083101704Smjacob U32 UnitType; /* 18h */ 2084101704Smjacob U32 PhysicalPortNumber; /* 1Ch */ 2085101704Smjacob U32 NumAttachedNodes; /* 20h */ 2086101704Smjacob U16 IPVersion; /* 24h */ 2087101704Smjacob U16 UDPPortNumber; /* 26h */ 2088101704Smjacob U8 IPAddress[16]; /* 28h */ 2089101704Smjacob U16 Reserved1; /* 38h */ 2090101704Smjacob U16 TopologyDiscoveryFlags; /* 3Ah */ 2091115778Smjacob} CONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9, 2092101704Smjacob FCPortPage9_t, MPI_POINTER pFCPortPage9_t; 2093101704Smjacob 2094101704Smjacob#define MPI_FCPORTPAGE9_PAGEVERSION (0x00) 2095101704Smjacob 2096101704Smjacob 2097115778Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA 2098115778Smjacob{ 2099115778Smjacob U8 Id; /* 10h */ 2100115778Smjacob U8 ExtId; /* 11h */ 2101115778Smjacob U8 Connector; /* 12h */ 2102115778Smjacob U8 Transceiver[8]; /* 13h */ 2103115778Smjacob U8 Encoding; /* 1Bh */ 2104115778Smjacob U8 BitRate_100mbs; /* 1Ch */ 2105115778Smjacob U8 Reserved1; /* 1Dh */ 2106115778Smjacob U8 Length9u_km; /* 1Eh */ 2107115778Smjacob U8 Length9u_100m; /* 1Fh */ 2108115778Smjacob U8 Length50u_10m; /* 20h */ 2109115778Smjacob U8 Length62p5u_10m; /* 21h */ 2110115778Smjacob U8 LengthCopper_m; /* 22h */ 2111115778Smjacob U8 Reseverved2; /* 22h */ 2112115778Smjacob U8 VendorName[16]; /* 24h */ 2113115778Smjacob U8 Reserved3; /* 34h */ 2114115778Smjacob U8 VendorOUI[3]; /* 35h */ 2115115778Smjacob U8 VendorPN[16]; /* 38h */ 2116115778Smjacob U8 VendorRev[4]; /* 48h */ 2117147883Sscottl U16 Wavelength; /* 4Ch */ 2118147883Sscottl U8 Reserved4; /* 4Eh */ 2119115778Smjacob U8 CC_BASE; /* 4Fh */ 2120115778Smjacob} CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA, 2121115778Smjacob MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA, 2122115778Smjacob FCPortPage10BaseSfpData_t, MPI_POINTER pFCPortPage10BaseSfpData_t; 2123115778Smjacob 2124115778Smjacob#define MPI_FCPORT10_BASE_ID_UNKNOWN (0x00) 2125115778Smjacob#define MPI_FCPORT10_BASE_ID_GBIC (0x01) 2126115778Smjacob#define MPI_FCPORT10_BASE_ID_FIXED (0x02) 2127115778Smjacob#define MPI_FCPORT10_BASE_ID_SFP (0x03) 2128115778Smjacob#define MPI_FCPORT10_BASE_ID_SFP_MIN (0x04) 2129115778Smjacob#define MPI_FCPORT10_BASE_ID_SFP_MAX (0x7F) 2130115778Smjacob#define MPI_FCPORT10_BASE_ID_VEND_SPEC_MASK (0x80) 2131115778Smjacob 2132115778Smjacob#define MPI_FCPORT10_BASE_EXTID_UNKNOWN (0x00) 2133115778Smjacob#define MPI_FCPORT10_BASE_EXTID_MODDEF1 (0x01) 2134115778Smjacob#define MPI_FCPORT10_BASE_EXTID_MODDEF2 (0x02) 2135115778Smjacob#define MPI_FCPORT10_BASE_EXTID_MODDEF3 (0x03) 2136115778Smjacob#define MPI_FCPORT10_BASE_EXTID_SEEPROM (0x04) 2137115778Smjacob#define MPI_FCPORT10_BASE_EXTID_MODDEF5 (0x05) 2138115778Smjacob#define MPI_FCPORT10_BASE_EXTID_MODDEF6 (0x06) 2139115778Smjacob#define MPI_FCPORT10_BASE_EXTID_MODDEF7 (0x07) 2140115778Smjacob#define MPI_FCPORT10_BASE_EXTID_VNDSPC_MASK (0x80) 2141115778Smjacob 2142115778Smjacob#define MPI_FCPORT10_BASE_CONN_UNKNOWN (0x00) 2143115778Smjacob#define MPI_FCPORT10_BASE_CONN_SC (0x01) 2144115778Smjacob#define MPI_FCPORT10_BASE_CONN_COPPER1 (0x02) 2145115778Smjacob#define MPI_FCPORT10_BASE_CONN_COPPER2 (0x03) 2146115778Smjacob#define MPI_FCPORT10_BASE_CONN_BNC_TNC (0x04) 2147115778Smjacob#define MPI_FCPORT10_BASE_CONN_COAXIAL (0x05) 2148115778Smjacob#define MPI_FCPORT10_BASE_CONN_FIBERJACK (0x06) 2149115778Smjacob#define MPI_FCPORT10_BASE_CONN_LC (0x07) 2150115778Smjacob#define MPI_FCPORT10_BASE_CONN_MT_RJ (0x08) 2151115778Smjacob#define MPI_FCPORT10_BASE_CONN_MU (0x09) 2152115778Smjacob#define MPI_FCPORT10_BASE_CONN_SG (0x0A) 2153115778Smjacob#define MPI_FCPORT10_BASE_CONN_OPT_PIGT (0x0B) 2154115778Smjacob#define MPI_FCPORT10_BASE_CONN_RSV1_MIN (0x0C) 2155115778Smjacob#define MPI_FCPORT10_BASE_CONN_RSV1_MAX (0x1F) 2156115778Smjacob#define MPI_FCPORT10_BASE_CONN_HSSDC_II (0x20) 2157115778Smjacob#define MPI_FCPORT10_BASE_CONN_CPR_PIGT (0x21) 2158115778Smjacob#define MPI_FCPORT10_BASE_CONN_RSV2_MIN (0x22) 2159115778Smjacob#define MPI_FCPORT10_BASE_CONN_RSV2_MAX (0x7F) 2160115778Smjacob#define MPI_FCPORT10_BASE_CONN_VNDSPC_MASK (0x80) 2161115778Smjacob 2162115778Smjacob#define MPI_FCPORT10_BASE_ENCODE_UNSPEC (0x00) 2163115778Smjacob#define MPI_FCPORT10_BASE_ENCODE_8B10B (0x01) 2164115778Smjacob#define MPI_FCPORT10_BASE_ENCODE_4B5B (0x02) 2165115778Smjacob#define MPI_FCPORT10_BASE_ENCODE_NRZ (0x03) 2166115778Smjacob#define MPI_FCPORT10_BASE_ENCODE_MANCHESTER (0x04) 2167115778Smjacob 2168115778Smjacob 2169115778Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA 2170115778Smjacob{ 2171115778Smjacob U8 Options[2]; /* 50h */ 2172115778Smjacob U8 BitRateMax; /* 52h */ 2173115778Smjacob U8 BitRateMin; /* 53h */ 2174115778Smjacob U8 VendorSN[16]; /* 54h */ 2175115778Smjacob U8 DateCode[8]; /* 64h */ 2176147883Sscottl U8 DiagMonitoringType; /* 6Ch */ 2177147883Sscottl U8 EnhancedOptions; /* 6Dh */ 2178147883Sscottl U8 SFF8472Compliance; /* 6Eh */ 2179115778Smjacob U8 CC_EXT; /* 6Fh */ 2180115778Smjacob} CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA, 2181115778Smjacob MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA, 2182115778Smjacob FCPortPage10ExtendedSfpData_t, MPI_POINTER pFCPortPage10ExtendedSfpData_t; 2183115778Smjacob 2184115778Smjacob#define MPI_FCPORT10_EXT_OPTION1_RATESEL (0x20) 2185115778Smjacob#define MPI_FCPORT10_EXT_OPTION1_TX_DISABLE (0x10) 2186115778Smjacob#define MPI_FCPORT10_EXT_OPTION1_TX_FAULT (0x08) 2187115778Smjacob#define MPI_FCPORT10_EXT_OPTION1_LOS_INVERT (0x04) 2188115778Smjacob#define MPI_FCPORT10_EXT_OPTION1_LOS (0x02) 2189115778Smjacob 2190115778Smjacob 2191115778Smjacobtypedef struct _CONFIG_PAGE_FC_PORT_10 2192115778Smjacob{ 2193115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2194115778Smjacob U8 Flags; /* 04h */ 2195115778Smjacob U8 Reserved1; /* 05h */ 2196115778Smjacob U16 Reserved2; /* 06h */ 2197115778Smjacob U32 HwConfig1; /* 08h */ 2198115778Smjacob U32 HwConfig2; /* 0Ch */ 2199115778Smjacob CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */ 2200115778Smjacob CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */ 2201115778Smjacob U8 VendorSpecific[32]; /* 70h */ 2202115778Smjacob} CONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10, 2203115778Smjacob FCPortPage10_t, MPI_POINTER pFCPortPage10_t; 2204115778Smjacob 2205147883Sscottl#define MPI_FCPORTPAGE10_PAGEVERSION (0x01) 2206115778Smjacob 2207115778Smjacob/* standard MODDEF pin definitions (from GBIC spec.) */ 2208115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_MASK (0x00000007) 2209115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF2 (0x00000001) 2210115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF1 (0x00000002) 2211115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF0 (0x00000004) 2212115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_NOGBIC (0x00000007) 2213115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_CPR_IEEE_CX (0x00000006) 2214115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_COPPER (0x00000005) 2215115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_OPTICAL_LW (0x00000004) 2216115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SEEPROM (0x00000003) 2217115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SW_OPTICAL (0x00000002) 2218115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_LX_IEEE_OPT_LW (0x00000001) 2219115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SX_IEEE_OPT_SW (0x00000000) 2220115778Smjacob 2221115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_CC_BASE_OK (0x00000010) 2222115778Smjacob#define MPI_FCPORTPAGE10_FLAGS_CC_EXT_OK (0x00000020) 2223115778Smjacob 2224115778Smjacob 2225101704Smjacob/**************************************************************************** 2226101704Smjacob* FC Device Config Pages 2227101704Smjacob****************************************************************************/ 2228101704Smjacob 2229101704Smjacobtypedef struct _CONFIG_PAGE_FC_DEVICE_0 2230101704Smjacob{ 2231115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2232101704Smjacob U64 WWNN; /* 04h */ 2233101704Smjacob U64 WWPN; /* 0Ch */ 2234101704Smjacob U32 PortIdentifier; /* 14h */ 2235101704Smjacob U8 Protocol; /* 18h */ 2236101704Smjacob U8 Flags; /* 19h */ 2237101704Smjacob U16 BBCredit; /* 1Ah */ 2238101704Smjacob U16 MaxRxFrameSize; /* 1Ch */ 2239147883Sscottl U8 ADISCHardALPA; /* 1Eh */ 2240101704Smjacob U8 PortNumber; /* 1Fh */ 2241101704Smjacob U8 FcPhLowestVersion; /* 20h */ 2242101704Smjacob U8 FcPhHighestVersion; /* 21h */ 2243101704Smjacob U8 CurrentTargetID; /* 22h */ 2244101704Smjacob U8 CurrentBus; /* 23h */ 2245115778Smjacob} CONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0, 2246101704Smjacob FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t; 2247101704Smjacob 2248147883Sscottl#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x03) 2249101704Smjacob 2250101704Smjacob#define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID (0x01) 2251115778Smjacob#define MPI_FC_DEVICE_PAGE0_FLAGS_PLOGI_INVALID (0x02) 2252115778Smjacob#define MPI_FC_DEVICE_PAGE0_FLAGS_PRLI_INVALID (0x04) 2253101704Smjacob 2254101704Smjacob#define MPI_FC_DEVICE_PAGE0_PROT_IP (0x01) 2255101704Smjacob#define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET (0x02) 2256101704Smjacob#define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR (0x04) 2257147883Sscottl#define MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY (0x08) 2258101704Smjacob 2259101704Smjacob#define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK (MPI_FC_DEVICE_PGAD_PORT_MASK) 2260101704Smjacob#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK (MPI_FC_DEVICE_PGAD_FORM_MASK) 2261101704Smjacob#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID) 2262101704Smjacob#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID (MPI_FC_DEVICE_PGAD_FORM_BUS_TID) 2263101704Smjacob#define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK (MPI_FC_DEVICE_PGAD_ND_DID_MASK) 2264101704Smjacob#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK (MPI_FC_DEVICE_PGAD_BT_BUS_MASK) 2265101704Smjacob#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT) 2266101704Smjacob#define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK (MPI_FC_DEVICE_PGAD_BT_TID_MASK) 2267101704Smjacob 2268147883Sscottl#define MPI_FC_DEVICE_PAGE0_HARD_ALPA_UNKNOWN (0xFF) 2269101704Smjacob 2270101704Smjacob/**************************************************************************** 2271101704Smjacob* RAID Volume Config Pages 2272101704Smjacob****************************************************************************/ 2273101704Smjacob 2274101704Smjacobtypedef struct _RAID_VOL0_PHYS_DISK 2275101704Smjacob{ 2276101704Smjacob U16 Reserved; /* 00h */ 2277101704Smjacob U8 PhysDiskMap; /* 02h */ 2278101704Smjacob U8 PhysDiskNum; /* 03h */ 2279101704Smjacob} RAID_VOL0_PHYS_DISK, MPI_POINTER PTR_RAID_VOL0_PHYS_DISK, 2280101704Smjacob RaidVol0PhysDisk_t, MPI_POINTER pRaidVol0PhysDisk_t; 2281101704Smjacob 2282101704Smjacob#define MPI_RAIDVOL0_PHYSDISK_PRIMARY (0x01) 2283101704Smjacob#define MPI_RAIDVOL0_PHYSDISK_SECONDARY (0x02) 2284101704Smjacob 2285101704Smjacobtypedef struct _RAID_VOL0_STATUS 2286101704Smjacob{ 2287101704Smjacob U8 Flags; /* 00h */ 2288101704Smjacob U8 State; /* 01h */ 2289101704Smjacob U16 Reserved; /* 02h */ 2290101704Smjacob} RAID_VOL0_STATUS, MPI_POINTER PTR_RAID_VOL0_STATUS, 2291101704Smjacob RaidVol0Status_t, MPI_POINTER pRaidVol0Status_t; 2292101704Smjacob 2293101704Smjacob/* RAID Volume Page 0 VolumeStatus defines */ 2294101704Smjacob#define MPI_RAIDVOL0_STATUS_FLAG_ENABLED (0x01) 2295101704Smjacob#define MPI_RAIDVOL0_STATUS_FLAG_QUIESCED (0x02) 2296101704Smjacob#define MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x04) 2297115778Smjacob#define MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x08) 2298154603Smjacob#define MPI_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x10) 2299101704Smjacob 2300101704Smjacob#define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00) 2301101704Smjacob#define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01) 2302101704Smjacob#define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02) 2303154603Smjacob#define MPI_RAIDVOL0_STATUS_STATE_MISSING (0x03) 2304101704Smjacob 2305101704Smjacobtypedef struct _RAID_VOL0_SETTINGS 2306101704Smjacob{ 2307101704Smjacob U16 Settings; /* 00h */ 2308101704Smjacob U8 HotSparePool; /* 01h */ /* MPI_RAID_HOT_SPARE_POOL_ */ 2309101704Smjacob U8 Reserved; /* 02h */ 2310101704Smjacob} RAID_VOL0_SETTINGS, MPI_POINTER PTR_RAID_VOL0_SETTINGS, 2311101704Smjacob RaidVol0Settings, MPI_POINTER pRaidVol0Settings; 2312101704Smjacob 2313101704Smjacob/* RAID Volume Page 0 VolumeSettings defines */ 2314101704Smjacob#define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001) 2315101704Smjacob#define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002) 2316101704Smjacob#define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004) 2317101704Smjacob#define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008) 2318154603Smjacob#define MPI_RAIDVOL0_SETTING_FAST_DATA_SCRUBBING_0102 (0x0020) /* obsolete */ 2319170251Sscottl 2320170251Sscottl#define MPI_RAIDVOL0_SETTING_MASK_METADATA_SIZE (0x00C0) 2321170251Sscottl#define MPI_RAIDVOL0_SETTING_64MB_METADATA_SIZE (0x0000) 2322170251Sscottl#define MPI_RAIDVOL0_SETTING_512MB_METADATA_SIZE (0x0040) 2323170251Sscottl 2324101704Smjacob#define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010) 2325101704Smjacob#define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000) 2326101704Smjacob 2327101704Smjacob/* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */ 2328101704Smjacob#define MPI_RAID_HOT_SPARE_POOL_0 (0x01) 2329101704Smjacob#define MPI_RAID_HOT_SPARE_POOL_1 (0x02) 2330101704Smjacob#define MPI_RAID_HOT_SPARE_POOL_2 (0x04) 2331101704Smjacob#define MPI_RAID_HOT_SPARE_POOL_3 (0x08) 2332101704Smjacob#define MPI_RAID_HOT_SPARE_POOL_4 (0x10) 2333101704Smjacob#define MPI_RAID_HOT_SPARE_POOL_5 (0x20) 2334101704Smjacob#define MPI_RAID_HOT_SPARE_POOL_6 (0x40) 2335101704Smjacob#define MPI_RAID_HOT_SPARE_POOL_7 (0x80) 2336101704Smjacob 2337101704Smjacob/* 2338101704Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2339101704Smjacob * one and check Header.PageLength at runtime. 2340101704Smjacob */ 2341101704Smjacob#ifndef MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX 2342101704Smjacob#define MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX (1) 2343101704Smjacob#endif 2344101704Smjacob 2345101704Smjacobtypedef struct _CONFIG_PAGE_RAID_VOL_0 2346101704Smjacob{ 2347115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2348101704Smjacob U8 VolumeID; /* 04h */ 2349101704Smjacob U8 VolumeBus; /* 05h */ 2350101704Smjacob U8 VolumeIOC; /* 06h */ 2351101704Smjacob U8 VolumeType; /* 07h */ /* MPI_RAID_VOL_TYPE_ */ 2352101704Smjacob RAID_VOL0_STATUS VolumeStatus; /* 08h */ 2353101704Smjacob RAID_VOL0_SETTINGS VolumeSettings; /* 0Ch */ 2354101704Smjacob U32 MaxLBA; /* 10h */ 2355170251Sscottl U32 MaxLBAHigh; /* 14h */ 2356101704Smjacob U32 StripeSize; /* 18h */ 2357101704Smjacob U32 Reserved2; /* 1Ch */ 2358101704Smjacob U32 Reserved3; /* 20h */ 2359101704Smjacob U8 NumPhysDisks; /* 24h */ 2360147883Sscottl U8 DataScrubRate; /* 25h */ 2361147883Sscottl U8 ResyncRate; /* 26h */ 2362147883Sscottl U8 InactiveStatus; /* 27h */ 2363101704Smjacob RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */ 2364115778Smjacob} CONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0, 2365101704Smjacob RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t; 2366101704Smjacob 2367170251Sscottl#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x07) 2368101704Smjacob 2369154603Smjacob/* values for RAID Volume Page 0 InactiveStatus field */ 2370154603Smjacob#define MPI_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00) 2371154603Smjacob#define MPI_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01) 2372154603Smjacob#define MPI_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02) 2373154603Smjacob#define MPI_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03) 2374154603Smjacob#define MPI_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04) 2375154603Smjacob#define MPI_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05) 2376154603Smjacob#define MPI_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06) 2377101704Smjacob 2378154603Smjacob 2379154603Smjacobtypedef struct _CONFIG_PAGE_RAID_VOL_1 2380154603Smjacob{ 2381154603Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2382170251Sscottl U8 VolumeID; /* 04h */ 2383170251Sscottl U8 VolumeBus; /* 05h */ 2384170251Sscottl U8 VolumeIOC; /* 06h */ 2385170251Sscottl U8 Reserved0; /* 07h */ 2386170251Sscottl U8 GUID[24]; /* 08h */ 2387154603Smjacob U8 Name[32]; /* 20h */ 2388154603Smjacob U64 WWID; /* 40h */ 2389154603Smjacob U32 Reserved1; /* 48h */ 2390154603Smjacob U32 Reserved2; /* 4Ch */ 2391154603Smjacob} CONFIG_PAGE_RAID_VOL_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_1, 2392154603Smjacob RaidVolumePage1_t, MPI_POINTER pRaidVolumePage1_t; 2393154603Smjacob 2394154603Smjacob#define MPI_RAIDVOLPAGE1_PAGEVERSION (0x01) 2395154603Smjacob 2396154603Smjacob 2397101704Smjacob/**************************************************************************** 2398101704Smjacob* RAID Physical Disk Config Pages 2399101704Smjacob****************************************************************************/ 2400101704Smjacob 2401101704Smjacobtypedef struct _RAID_PHYS_DISK0_ERROR_DATA 2402101704Smjacob{ 2403101704Smjacob U8 ErrorCdbByte; /* 00h */ 2404101704Smjacob U8 ErrorSenseKey; /* 01h */ 2405101704Smjacob U16 Reserved; /* 02h */ 2406101704Smjacob U16 ErrorCount; /* 04h */ 2407101704Smjacob U8 ErrorASC; /* 06h */ 2408101704Smjacob U8 ErrorASCQ; /* 07h */ 2409101704Smjacob U16 SmartCount; /* 08h */ 2410101704Smjacob U8 SmartASC; /* 0Ah */ 2411101704Smjacob U8 SmartASCQ; /* 0Bh */ 2412101704Smjacob} RAID_PHYS_DISK0_ERROR_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_ERROR_DATA, 2413101704Smjacob RaidPhysDisk0ErrorData_t, MPI_POINTER pRaidPhysDisk0ErrorData_t; 2414101704Smjacob 2415101704Smjacobtypedef struct _RAID_PHYS_DISK_INQUIRY_DATA 2416101704Smjacob{ 2417101704Smjacob U8 VendorID[8]; /* 00h */ 2418101704Smjacob U8 ProductID[16]; /* 08h */ 2419101704Smjacob U8 ProductRevLevel[4]; /* 18h */ 2420101704Smjacob U8 Info[32]; /* 1Ch */ 2421101704Smjacob} RAID_PHYS_DISK0_INQUIRY_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_INQUIRY_DATA, 2422101704Smjacob RaidPhysDisk0InquiryData, MPI_POINTER pRaidPhysDisk0InquiryData; 2423101704Smjacob 2424101704Smjacobtypedef struct _RAID_PHYS_DISK0_SETTINGS 2425101704Smjacob{ 2426101704Smjacob U8 SepID; /* 00h */ 2427101704Smjacob U8 SepBus; /* 01h */ 2428101704Smjacob U8 HotSparePool; /* 02h */ /* MPI_RAID_HOT_SPARE_POOL_ */ 2429101704Smjacob U8 PhysDiskSettings; /* 03h */ 2430101704Smjacob} RAID_PHYS_DISK0_SETTINGS, MPI_POINTER PTR_RAID_PHYS_DISK0_SETTINGS, 2431101704Smjacob RaidPhysDiskSettings_t, MPI_POINTER pRaidPhysDiskSettings_t; 2432101704Smjacob 2433101704Smjacobtypedef struct _RAID_PHYS_DISK0_STATUS 2434101704Smjacob{ 2435101704Smjacob U8 Flags; /* 00h */ 2436101704Smjacob U8 State; /* 01h */ 2437101704Smjacob U16 Reserved; /* 02h */ 2438101704Smjacob} RAID_PHYS_DISK0_STATUS, MPI_POINTER PTR_RAID_PHYS_DISK0_STATUS, 2439101704Smjacob RaidPhysDiskStatus_t, MPI_POINTER pRaidPhysDiskStatus_t; 2440101704Smjacob 2441170251Sscottl/* RAID Physical Disk PhysDiskStatus flags */ 2442101704Smjacob 2443101704Smjacob#define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01) 2444101704Smjacob#define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02) 2445154603Smjacob#define MPI_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x04) 2446154603Smjacob#define MPI_PHYSDISK0_STATUS_FLAG_OPTIMAL_PREVIOUS (0x00) 2447154603Smjacob#define MPI_PHYSDISK0_STATUS_FLAG_NOT_OPTIMAL_PREVIOUS (0x08) 2448101704Smjacob 2449101704Smjacob#define MPI_PHYSDISK0_STATUS_ONLINE (0x00) 2450101704Smjacob#define MPI_PHYSDISK0_STATUS_MISSING (0x01) 2451101704Smjacob#define MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE (0x02) 2452101704Smjacob#define MPI_PHYSDISK0_STATUS_FAILED (0x03) 2453101704Smjacob#define MPI_PHYSDISK0_STATUS_INITIALIZING (0x04) 2454101704Smjacob#define MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED (0x05) 2455101704Smjacob#define MPI_PHYSDISK0_STATUS_FAILED_REQUESTED (0x06) 2456101704Smjacob#define MPI_PHYSDISK0_STATUS_OTHER_OFFLINE (0xFF) 2457101704Smjacob 2458101704Smjacobtypedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0 2459101704Smjacob{ 2460115778Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2461101704Smjacob U8 PhysDiskID; /* 04h */ 2462101704Smjacob U8 PhysDiskBus; /* 05h */ 2463101704Smjacob U8 PhysDiskIOC; /* 06h */ 2464101704Smjacob U8 PhysDiskNum; /* 07h */ 2465101704Smjacob RAID_PHYS_DISK0_SETTINGS PhysDiskSettings; /* 08h */ 2466101704Smjacob U32 Reserved1; /* 0Ch */ 2467154603Smjacob U8 ExtDiskIdentifier[8]; /* 10h */ 2468101704Smjacob U8 DiskIdentifier[16]; /* 18h */ 2469101704Smjacob RAID_PHYS_DISK0_INQUIRY_DATA InquiryData; /* 28h */ 2470101704Smjacob RAID_PHYS_DISK0_STATUS PhysDiskStatus; /* 64h */ 2471101704Smjacob U32 MaxLBA; /* 68h */ 2472101704Smjacob RAID_PHYS_DISK0_ERROR_DATA ErrorData; /* 6Ch */ 2473115778Smjacob} CONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0, 2474101704Smjacob RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t; 2475101704Smjacob 2476154603Smjacob#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x02) 2477101704Smjacob 2478101704Smjacob 2479154603Smjacobtypedef struct _RAID_PHYS_DISK1_PATH 2480154603Smjacob{ 2481154603Smjacob U8 PhysDiskID; /* 00h */ 2482154603Smjacob U8 PhysDiskBus; /* 01h */ 2483154603Smjacob U16 Reserved1; /* 02h */ 2484154603Smjacob U64 WWID; /* 04h */ 2485154603Smjacob U64 OwnerWWID; /* 0Ch */ 2486154603Smjacob U8 OwnerIdentifier; /* 14h */ 2487154603Smjacob U8 Reserved2; /* 15h */ 2488154603Smjacob U16 Flags; /* 16h */ 2489154603Smjacob} RAID_PHYS_DISK1_PATH, MPI_POINTER PTR_RAID_PHYS_DISK1_PATH, 2490154603Smjacob RaidPhysDisk1Path_t, MPI_POINTER pRaidPhysDisk1Path_t; 2491154603Smjacob 2492154603Smjacob/* RAID Physical Disk Page 1 Flags field defines */ 2493154603Smjacob#define MPI_RAID_PHYSDISK1_FLAG_BROKEN (0x0002) 2494154603Smjacob#define MPI_RAID_PHYSDISK1_FLAG_INVALID (0x0001) 2495154603Smjacob 2496233425Smarius 2497233425Smarius/* 2498233425Smarius * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2499233425Smarius * one and check Header.PageLength or NumPhysDiskPaths at runtime. 2500233425Smarius */ 2501233425Smarius#ifndef MPI_RAID_PHYS_DISK1_PATH_MAX 2502233425Smarius#define MPI_RAID_PHYS_DISK1_PATH_MAX (1) 2503233425Smarius#endif 2504233425Smarius 2505154603Smjacobtypedef struct _CONFIG_PAGE_RAID_PHYS_DISK_1 2506154603Smjacob{ 2507154603Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2508154603Smjacob U8 NumPhysDiskPaths; /* 04h */ 2509154603Smjacob U8 PhysDiskNum; /* 05h */ 2510154603Smjacob U16 Reserved2; /* 06h */ 2511154603Smjacob U32 Reserved1; /* 08h */ 2512233425Smarius RAID_PHYS_DISK1_PATH Path[MPI_RAID_PHYS_DISK1_PATH_MAX];/* 0Ch */ 2513154603Smjacob} CONFIG_PAGE_RAID_PHYS_DISK_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_1, 2514154603Smjacob RaidPhysDiskPage1_t, MPI_POINTER pRaidPhysDiskPage1_t; 2515154603Smjacob 2516154603Smjacob#define MPI_RAIDPHYSDISKPAGE1_PAGEVERSION (0x00) 2517154603Smjacob 2518154603Smjacob 2519101704Smjacob/**************************************************************************** 2520101704Smjacob* LAN Config Pages 2521101704Smjacob****************************************************************************/ 2522101704Smjacob 2523101704Smjacobtypedef struct _CONFIG_PAGE_LAN_0 2524101704Smjacob{ 2525101704Smjacob ConfigPageHeader_t Header; /* 00h */ 2526101704Smjacob U16 TxRxModes; /* 04h */ 2527101704Smjacob U16 Reserved; /* 06h */ 2528101704Smjacob U32 PacketPrePad; /* 08h */ 2529115778Smjacob} CONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0, 2530101704Smjacob LANPage0_t, MPI_POINTER pLANPage0_t; 2531101704Smjacob 2532101704Smjacob#define MPI_LAN_PAGE0_PAGEVERSION (0x01) 2533101704Smjacob 2534101704Smjacob#define MPI_LAN_PAGE0_RETURN_LOOPBACK (0x0000) 2535101704Smjacob#define MPI_LAN_PAGE0_SUPPRESS_LOOPBACK (0x0001) 2536101704Smjacob#define MPI_LAN_PAGE0_LOOPBACK_MASK (0x0001) 2537101704Smjacob 2538101704Smjacobtypedef struct _CONFIG_PAGE_LAN_1 2539101704Smjacob{ 2540101704Smjacob ConfigPageHeader_t Header; /* 00h */ 2541101704Smjacob U16 Reserved; /* 04h */ 2542101704Smjacob U8 CurrentDeviceState; /* 06h */ 2543101704Smjacob U8 Reserved1; /* 07h */ 2544101704Smjacob U32 MinPacketSize; /* 08h */ 2545101704Smjacob U32 MaxPacketSize; /* 0Ch */ 2546101704Smjacob U32 HardwareAddressLow; /* 10h */ 2547101704Smjacob U32 HardwareAddressHigh; /* 14h */ 2548101704Smjacob U32 MaxWireSpeedLow; /* 18h */ 2549101704Smjacob U32 MaxWireSpeedHigh; /* 1Ch */ 2550101704Smjacob U32 BucketsRemaining; /* 20h */ 2551101704Smjacob U32 MaxReplySize; /* 24h */ 2552101704Smjacob U32 NegWireSpeedLow; /* 28h */ 2553101704Smjacob U32 NegWireSpeedHigh; /* 2Ch */ 2554115778Smjacob} CONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1, 2555101704Smjacob LANPage1_t, MPI_POINTER pLANPage1_t; 2556101704Smjacob 2557101704Smjacob#define MPI_LAN_PAGE1_PAGEVERSION (0x03) 2558101704Smjacob 2559101704Smjacob#define MPI_LAN_PAGE1_DEV_STATE_RESET (0x00) 2560101704Smjacob#define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL (0x01) 2561101704Smjacob 2562154603Smjacob 2563154603Smjacob/**************************************************************************** 2564154603Smjacob* Inband Config Pages 2565154603Smjacob****************************************************************************/ 2566154603Smjacob 2567154603Smjacobtypedef struct _CONFIG_PAGE_INBAND_0 2568154603Smjacob{ 2569154603Smjacob CONFIG_PAGE_HEADER Header; /* 00h */ 2570154603Smjacob MPI_VERSION_FORMAT InbandVersion; /* 04h */ 2571154603Smjacob U16 MaximumBuffers; /* 08h */ 2572154603Smjacob U16 Reserved1; /* 0Ah */ 2573154603Smjacob} CONFIG_PAGE_INBAND_0, MPI_POINTER PTR_CONFIG_PAGE_INBAND_0, 2574154603Smjacob InbandPage0_t, MPI_POINTER pInbandPage0_t; 2575154603Smjacob 2576154603Smjacob#define MPI_INBAND_PAGEVERSION (0x00) 2577154603Smjacob 2578154603Smjacob 2579154603Smjacob 2580154603Smjacob/**************************************************************************** 2581154603Smjacob* SAS IO Unit Config Pages 2582154603Smjacob****************************************************************************/ 2583154603Smjacob 2584154603Smjacobtypedef struct _MPI_SAS_IO_UNIT0_PHY_DATA 2585154603Smjacob{ 2586154603Smjacob U8 Port; /* 00h */ 2587154603Smjacob U8 PortFlags; /* 01h */ 2588154603Smjacob U8 PhyFlags; /* 02h */ 2589154603Smjacob U8 NegotiatedLinkRate; /* 03h */ 2590154603Smjacob U32 ControllerPhyDeviceInfo;/* 04h */ 2591154603Smjacob U16 AttachedDeviceHandle; /* 08h */ 2592154603Smjacob U16 ControllerDevHandle; /* 0Ah */ 2593154603Smjacob U32 DiscoveryStatus; /* 0Ch */ 2594154603Smjacob} MPI_SAS_IO_UNIT0_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT0_PHY_DATA, 2595154603Smjacob SasIOUnit0PhyData, MPI_POINTER pSasIOUnit0PhyData; 2596154603Smjacob 2597154603Smjacob/* 2598154603Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2599154603Smjacob * one and check Header.PageLength at runtime. 2600154603Smjacob */ 2601154603Smjacob#ifndef MPI_SAS_IOUNIT0_PHY_MAX 2602154603Smjacob#define MPI_SAS_IOUNIT0_PHY_MAX (1) 2603101704Smjacob#endif 2604101704Smjacob 2605154603Smjacobtypedef struct _CONFIG_PAGE_SAS_IO_UNIT_0 2606154603Smjacob{ 2607154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2608170251Sscottl U16 NvdataVersionDefault; /* 08h */ 2609170251Sscottl U16 NvdataVersionPersistent; /* 0Ah */ 2610154603Smjacob U8 NumPhys; /* 0Ch */ 2611154603Smjacob U8 Reserved2; /* 0Dh */ 2612154603Smjacob U16 Reserved3; /* 0Eh */ 2613154603Smjacob MPI_SAS_IO_UNIT0_PHY_DATA PhyData[MPI_SAS_IOUNIT0_PHY_MAX]; /* 10h */ 2614154603Smjacob} CONFIG_PAGE_SAS_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_0, 2615154603Smjacob SasIOUnitPage0_t, MPI_POINTER pSasIOUnitPage0_t; 2616154603Smjacob 2617170251Sscottl#define MPI_SASIOUNITPAGE0_PAGEVERSION (0x04) 2618154603Smjacob 2619154603Smjacob/* values for SAS IO Unit Page 0 PortFlags */ 2620154603Smjacob#define MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS (0x08) 2621154603Smjacob#define MPI_SAS_IOUNIT0_PORT_FLAGS_0_TARGET_IOC_NUM (0x00) 2622154603Smjacob#define MPI_SAS_IOUNIT0_PORT_FLAGS_1_TARGET_IOC_NUM (0x04) 2623154603Smjacob#define MPI_SAS_IOUNIT0_PORT_FLAGS_AUTO_PORT_CONFIG (0x01) 2624154603Smjacob 2625154603Smjacob/* values for SAS IO Unit Page 0 PhyFlags */ 2626154603Smjacob#define MPI_SAS_IOUNIT0_PHY_FLAGS_PHY_DISABLED (0x04) 2627154603Smjacob#define MPI_SAS_IOUNIT0_PHY_FLAGS_TX_INVERT (0x02) 2628154603Smjacob#define MPI_SAS_IOUNIT0_PHY_FLAGS_RX_INVERT (0x01) 2629154603Smjacob 2630154603Smjacob/* values for SAS IO Unit Page 0 NegotiatedLinkRate */ 2631154603Smjacob#define MPI_SAS_IOUNIT0_RATE_UNKNOWN (0x00) 2632154603Smjacob#define MPI_SAS_IOUNIT0_RATE_PHY_DISABLED (0x01) 2633154603Smjacob#define MPI_SAS_IOUNIT0_RATE_FAILED_SPEED_NEGOTIATION (0x02) 2634154603Smjacob#define MPI_SAS_IOUNIT0_RATE_SATA_OOB_COMPLETE (0x03) 2635154603Smjacob#define MPI_SAS_IOUNIT0_RATE_1_5 (0x08) 2636154603Smjacob#define MPI_SAS_IOUNIT0_RATE_3_0 (0x09) 2637233425Smarius#define MPI_SAS_IOUNIT0_RATE_6_0 (0x0A) 2638154603Smjacob 2639154603Smjacob/* see mpi_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */ 2640154603Smjacob 2641154603Smjacob/* values for SAS IO Unit Page 0 DiscoveryStatus */ 2642154603Smjacob#define MPI_SAS_IOUNIT0_DS_LOOP_DETECTED (0x00000001) 2643154603Smjacob#define MPI_SAS_IOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002) 2644154603Smjacob#define MPI_SAS_IOUNIT0_DS_MULTIPLE_PORTS (0x00000004) 2645154603Smjacob#define MPI_SAS_IOUNIT0_DS_EXPANDER_ERR (0x00000008) 2646154603Smjacob#define MPI_SAS_IOUNIT0_DS_SMP_TIMEOUT (0x00000010) 2647154603Smjacob#define MPI_SAS_IOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020) 2648154603Smjacob#define MPI_SAS_IOUNIT0_DS_INDEX_NOT_EXIST (0x00000040) 2649154603Smjacob#define MPI_SAS_IOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080) 2650154603Smjacob#define MPI_SAS_IOUNIT0_DS_SMP_CRC_ERROR (0x00000100) 2651154603Smjacob#define MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200) 2652154603Smjacob#define MPI_SAS_IOUNIT0_DS_TABLE_LINK (0x00000400) 2653154603Smjacob#define MPI_SAS_IOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800) 2654154603Smjacob#define MPI_SAS_IOUNIT0_DS_MAX_SATA_TARGETS (0x00001000) 2655170251Sscottl#define MPI_SAS_IOUNIT0_DS_MULTI_PORT_DOMAIN (0x00002000) 2656154603Smjacob 2657154603Smjacob 2658154603Smjacobtypedef struct _MPI_SAS_IO_UNIT1_PHY_DATA 2659154603Smjacob{ 2660170251Sscottl U8 Port; /* 00h */ 2661170251Sscottl U8 PortFlags; /* 01h */ 2662170251Sscottl U8 PhyFlags; /* 02h */ 2663170251Sscottl U8 MaxMinLinkRate; /* 03h */ 2664170251Sscottl U32 ControllerPhyDeviceInfo; /* 04h */ 2665170251Sscottl U16 MaxTargetPortConnectTime; /* 08h */ 2666170251Sscottl U16 Reserved1; /* 0Ah */ 2667154603Smjacob} MPI_SAS_IO_UNIT1_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT1_PHY_DATA, 2668154603Smjacob SasIOUnit1PhyData, MPI_POINTER pSasIOUnit1PhyData; 2669154603Smjacob 2670154603Smjacob/* 2671154603Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2672154603Smjacob * one and check Header.PageLength at runtime. 2673154603Smjacob */ 2674154603Smjacob#ifndef MPI_SAS_IOUNIT1_PHY_MAX 2675154603Smjacob#define MPI_SAS_IOUNIT1_PHY_MAX (1) 2676154603Smjacob#endif 2677154603Smjacob 2678154603Smjacobtypedef struct _CONFIG_PAGE_SAS_IO_UNIT_1 2679154603Smjacob{ 2680154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2681154603Smjacob U16 ControlFlags; /* 08h */ 2682154603Smjacob U16 MaxNumSATATargets; /* 0Ah */ 2683170251Sscottl U16 AdditionalControlFlags; /* 0Ch */ 2684170251Sscottl U16 Reserved1; /* 0Eh */ 2685154603Smjacob U8 NumPhys; /* 10h */ 2686154603Smjacob U8 SATAMaxQDepth; /* 11h */ 2687170251Sscottl U8 ReportDeviceMissingDelay; /* 12h */ 2688170251Sscottl U8 IODeviceMissingDelay; /* 13h */ 2689154603Smjacob MPI_SAS_IO_UNIT1_PHY_DATA PhyData[MPI_SAS_IOUNIT1_PHY_MAX]; /* 14h */ 2690154603Smjacob} CONFIG_PAGE_SAS_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_1, 2691154603Smjacob SasIOUnitPage1_t, MPI_POINTER pSasIOUnitPage1_t; 2692154603Smjacob 2693170251Sscottl#define MPI_SASIOUNITPAGE1_PAGEVERSION (0x07) 2694154603Smjacob 2695154603Smjacob/* values for SAS IO Unit Page 1 ControlFlags */ 2696154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_DEVICE_SELF_TEST (0x8000) 2697154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SATA_3_0_MAX (0x4000) 2698154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SATA_1_5_MAX (0x2000) 2699154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000) 2700154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_DISABLE_SAS_HASH (0x0800) 2701154603Smjacob 2702154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600) 2703154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9) 2704154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x00) 2705154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x01) 2706154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x02) 2707154603Smjacob 2708156000Smjacob#define MPI_SAS_IOUNIT1_CONTROL_POSTPONE_SATA_INIT (0x0100) 2709154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080) 2710154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040) 2711154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020) 2712154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010) 2713154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_PHY_ENABLE_ORDER_HIGH (0x0008) 2714154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004) 2715154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002) 2716154603Smjacob#define MPI_SAS_IOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001) 2717154603Smjacob 2718170251Sscottl/* values for SAS IO Unit Page 1 AdditionalControlFlags */ 2719170251Sscottl#define MPI_SAS_IOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080) 2720170251Sscottl#define MPI_SAS_IOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040) 2721170251Sscottl#define MPI_SAS_IOUNIT1_ACONTROL_HIDE_NONZERO_ATTACHED_PHY_IDENT (0x0020) 2722170251Sscottl#define MPI_SAS_IOUNIT1_ACONTROL_PORT_ENABLE_ONLY_SATA_LINK_RESET (0x0010) 2723170251Sscottl#define MPI_SAS_IOUNIT1_ACONTROL_OTHER_AFFILIATION_SATA_LINK_RESET (0x0008) 2724170251Sscottl#define MPI_SAS_IOUNIT1_ACONTROL_SELF_AFFILIATION_SATA_LINK_RESET (0x0004) 2725170251Sscottl#define MPI_SAS_IOUNIT1_ACONTROL_NO_AFFILIATION_SATA_LINK_RESET (0x0002) 2726170251Sscottl#define MPI_SAS_IOUNIT1_ACONTROL_ALLOW_TABLE_TO_TABLE (0x0001) 2727170251Sscottl 2728170251Sscottl/* defines for SAS IO Unit Page 1 ReportDeviceMissingDelay */ 2729170251Sscottl#define MPI_SAS_IOUNIT1_REPORT_MISSING_TIMEOUT_MASK (0x7F) 2730170251Sscottl#define MPI_SAS_IOUNIT1_REPORT_MISSING_UNIT_16 (0x80) 2731170251Sscottl 2732154603Smjacob/* values for SAS IO Unit Page 1 PortFlags */ 2733154603Smjacob#define MPI_SAS_IOUNIT1_PORT_FLAGS_0_TARGET_IOC_NUM (0x00) 2734154603Smjacob#define MPI_SAS_IOUNIT1_PORT_FLAGS_1_TARGET_IOC_NUM (0x04) 2735154603Smjacob#define MPI_SAS_IOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01) 2736154603Smjacob 2737154603Smjacob/* values for SAS IO Unit Page 0 PhyFlags */ 2738154603Smjacob#define MPI_SAS_IOUNIT1_PHY_FLAGS_PHY_DISABLE (0x04) 2739154603Smjacob#define MPI_SAS_IOUNIT1_PHY_FLAGS_TX_INVERT (0x02) 2740154603Smjacob#define MPI_SAS_IOUNIT1_PHY_FLAGS_RX_INVERT (0x01) 2741154603Smjacob 2742154603Smjacob/* values for SAS IO Unit Page 0 MaxMinLinkRate */ 2743154603Smjacob#define MPI_SAS_IOUNIT1_MAX_RATE_MASK (0xF0) 2744154603Smjacob#define MPI_SAS_IOUNIT1_MAX_RATE_1_5 (0x80) 2745154603Smjacob#define MPI_SAS_IOUNIT1_MAX_RATE_3_0 (0x90) 2746154603Smjacob#define MPI_SAS_IOUNIT1_MIN_RATE_MASK (0x0F) 2747154603Smjacob#define MPI_SAS_IOUNIT1_MIN_RATE_1_5 (0x08) 2748154603Smjacob#define MPI_SAS_IOUNIT1_MIN_RATE_3_0 (0x09) 2749154603Smjacob 2750154603Smjacob/* see mpi_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */ 2751154603Smjacob 2752154603Smjacob 2753154603Smjacobtypedef struct _CONFIG_PAGE_SAS_IO_UNIT_2 2754154603Smjacob{ 2755154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2756154603Smjacob U8 NumDevsPerEnclosure; /* 08h */ 2757233425Smarius U8 BootDeviceWaitTime; /* 09h */ 2758154603Smjacob U16 Reserved2; /* 0Ah */ 2759154603Smjacob U16 MaxPersistentIDs; /* 0Ch */ 2760154603Smjacob U16 NumPersistentIDsUsed; /* 0Eh */ 2761154603Smjacob U8 Status; /* 10h */ 2762154603Smjacob U8 Flags; /* 11h */ 2763154603Smjacob U16 MaxNumPhysicalMappedIDs;/* 12h */ 2764154603Smjacob} CONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2, 2765154603Smjacob SasIOUnitPage2_t, MPI_POINTER pSasIOUnitPage2_t; 2766154603Smjacob 2767233425Smarius#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x07) 2768154603Smjacob 2769154603Smjacob/* values for SAS IO Unit Page 2 Status field */ 2770170251Sscottl#define MPI_SAS_IOUNIT2_STATUS_DEVICE_LIMIT_EXCEEDED (0x08) 2771170251Sscottl#define MPI_SAS_IOUNIT2_STATUS_ENCLOSURE_DEVICES_UNMAPPED (0x04) 2772154603Smjacob#define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS (0x02) 2773154603Smjacob#define MPI_SAS_IOUNIT2_STATUS_FULL_PERSISTENT_MAPPINGS (0x01) 2774154603Smjacob 2775154603Smjacob/* values for SAS IO Unit Page 2 Flags field */ 2776154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_DISABLE_PERSISTENT_MAPPINGS (0x01) 2777154603Smjacob/* Physical Mapping Modes */ 2778154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_MASK_PHYS_MAP_MODE (0x0E) 2779154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_SHIFT_PHYS_MAP_MODE (1) 2780154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_NO_PHYS_MAP (0x00) 2781154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_DIRECT_ATTACH_PHYS_MAP (0x01) 2782154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_ENCLOSURE_SLOT_PHYS_MAP (0x02) 2783154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_HOST_ASSIGNED_PHYS_MAP (0x07) 2784154603Smjacob 2785154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT (0x10) 2786154603Smjacob#define MPI_SAS_IOUNIT2_FLAGS_DA_STARTING_SLOT (0x20) 2787154603Smjacob 2788154603Smjacob 2789154603Smjacobtypedef struct _CONFIG_PAGE_SAS_IO_UNIT_3 2790154603Smjacob{ 2791154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2792154603Smjacob U32 Reserved1; /* 08h */ 2793154603Smjacob U32 MaxInvalidDwordCount; /* 0Ch */ 2794154603Smjacob U32 InvalidDwordCountTime; /* 10h */ 2795154603Smjacob U32 MaxRunningDisparityErrorCount; /* 14h */ 2796154603Smjacob U32 RunningDisparityErrorTime; /* 18h */ 2797154603Smjacob U32 MaxLossDwordSynchCount; /* 1Ch */ 2798154603Smjacob U32 LossDwordSynchCountTime; /* 20h */ 2799154603Smjacob U32 MaxPhyResetProblemCount; /* 24h */ 2800154603Smjacob U32 PhyResetProblemTime; /* 28h */ 2801154603Smjacob} CONFIG_PAGE_SAS_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_3, 2802154603Smjacob SasIOUnitPage3_t, MPI_POINTER pSasIOUnitPage3_t; 2803154603Smjacob 2804154603Smjacob#define MPI_SASIOUNITPAGE3_PAGEVERSION (0x00) 2805154603Smjacob 2806154603Smjacob 2807154603Smjacob/**************************************************************************** 2808154603Smjacob* SAS Expander Config Pages 2809154603Smjacob****************************************************************************/ 2810154603Smjacob 2811154603Smjacobtypedef struct _CONFIG_PAGE_SAS_EXPANDER_0 2812154603Smjacob{ 2813154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2814154603Smjacob U8 PhysicalPort; /* 08h */ 2815154603Smjacob U8 Reserved1; /* 09h */ 2816154603Smjacob U16 EnclosureHandle; /* 0Ah */ 2817154603Smjacob U64 SASAddress; /* 0Ch */ 2818154603Smjacob U32 DiscoveryStatus; /* 14h */ 2819154603Smjacob U16 DevHandle; /* 18h */ 2820154603Smjacob U16 ParentDevHandle; /* 1Ah */ 2821154603Smjacob U16 ExpanderChangeCount; /* 1Ch */ 2822154603Smjacob U16 ExpanderRouteIndexes; /* 1Eh */ 2823154603Smjacob U8 NumPhys; /* 20h */ 2824154603Smjacob U8 SASLevel; /* 21h */ 2825154603Smjacob U8 Flags; /* 22h */ 2826154603Smjacob U8 Reserved3; /* 23h */ 2827154603Smjacob} CONFIG_PAGE_SAS_EXPANDER_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_0, 2828154603Smjacob SasExpanderPage0_t, MPI_POINTER pSasExpanderPage0_t; 2829154603Smjacob 2830154603Smjacob#define MPI_SASEXPANDER0_PAGEVERSION (0x03) 2831154603Smjacob 2832154603Smjacob/* values for SAS Expander Page 0 DiscoveryStatus field */ 2833154603Smjacob#define MPI_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001) 2834154603Smjacob#define MPI_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002) 2835154603Smjacob#define MPI_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004) 2836154603Smjacob#define MPI_SAS_EXPANDER0_DS_EXPANDER_ERR (0x00000008) 2837154603Smjacob#define MPI_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010) 2838154603Smjacob#define MPI_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020) 2839154603Smjacob#define MPI_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040) 2840154603Smjacob#define MPI_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080) 2841154603Smjacob#define MPI_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100) 2842154603Smjacob#define MPI_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200) 2843154603Smjacob#define MPI_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400) 2844154603Smjacob#define MPI_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800) 2845154603Smjacob 2846154603Smjacob/* values for SAS Expander Page 0 Flags field */ 2847170251Sscottl#define MPI_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE (0x04) 2848154603Smjacob#define MPI_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x02) 2849154603Smjacob#define MPI_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x01) 2850154603Smjacob 2851154603Smjacob 2852154603Smjacobtypedef struct _CONFIG_PAGE_SAS_EXPANDER_1 2853154603Smjacob{ 2854154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2855154603Smjacob U8 PhysicalPort; /* 08h */ 2856154603Smjacob U8 Reserved1; /* 09h */ 2857154603Smjacob U16 Reserved2; /* 0Ah */ 2858154603Smjacob U8 NumPhys; /* 0Ch */ 2859154603Smjacob U8 Phy; /* 0Dh */ 2860154603Smjacob U16 NumTableEntriesProgrammed; /* 0Eh */ 2861154603Smjacob U8 ProgrammedLinkRate; /* 10h */ 2862154603Smjacob U8 HwLinkRate; /* 11h */ 2863154603Smjacob U16 AttachedDevHandle; /* 12h */ 2864154603Smjacob U32 PhyInfo; /* 14h */ 2865154603Smjacob U32 AttachedDeviceInfo; /* 18h */ 2866154603Smjacob U16 OwnerDevHandle; /* 1Ch */ 2867154603Smjacob U8 ChangeCount; /* 1Eh */ 2868154603Smjacob U8 NegotiatedLinkRate; /* 1Fh */ 2869154603Smjacob U8 PhyIdentifier; /* 20h */ 2870154603Smjacob U8 AttachedPhyIdentifier; /* 21h */ 2871154603Smjacob U8 Reserved3; /* 22h */ 2872154603Smjacob U8 DiscoveryInfo; /* 23h */ 2873154603Smjacob U32 Reserved4; /* 24h */ 2874154603Smjacob} CONFIG_PAGE_SAS_EXPANDER_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_1, 2875154603Smjacob SasExpanderPage1_t, MPI_POINTER pSasExpanderPage1_t; 2876154603Smjacob 2877154603Smjacob#define MPI_SASEXPANDER1_PAGEVERSION (0x01) 2878154603Smjacob 2879154603Smjacob/* use MPI_SAS_PHY0_PRATE_ defines for ProgrammedLinkRate */ 2880154603Smjacob 2881154603Smjacob/* use MPI_SAS_PHY0_HWRATE_ defines for HwLinkRate */ 2882154603Smjacob 2883154603Smjacob/* use MPI_SAS_PHY0_PHYINFO_ defines for PhyInfo */ 2884154603Smjacob 2885154603Smjacob/* see mpi_sas.h for values for SAS Expander Page 1 AttachedDeviceInfo values */ 2886154603Smjacob 2887154603Smjacob/* values for SAS Expander Page 1 DiscoveryInfo field */ 2888170251Sscottl#define MPI_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED (0x04) 2889154603Smjacob#define MPI_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02) 2890154603Smjacob#define MPI_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01) 2891154603Smjacob 2892154603Smjacob/* values for SAS Expander Page 1 NegotiatedLinkRate field */ 2893154603Smjacob#define MPI_SAS_EXPANDER1_NEG_RATE_UNKNOWN (0x00) 2894154603Smjacob#define MPI_SAS_EXPANDER1_NEG_RATE_PHY_DISABLED (0x01) 2895154603Smjacob#define MPI_SAS_EXPANDER1_NEG_RATE_FAILED_NEGOTIATION (0x02) 2896154603Smjacob#define MPI_SAS_EXPANDER1_NEG_RATE_SATA_OOB_COMPLETE (0x03) 2897154603Smjacob#define MPI_SAS_EXPANDER1_NEG_RATE_1_5 (0x08) 2898154603Smjacob#define MPI_SAS_EXPANDER1_NEG_RATE_3_0 (0x09) 2899154603Smjacob 2900154603Smjacob 2901154603Smjacob/**************************************************************************** 2902154603Smjacob* SAS Device Config Pages 2903154603Smjacob****************************************************************************/ 2904154603Smjacob 2905154603Smjacobtypedef struct _CONFIG_PAGE_SAS_DEVICE_0 2906154603Smjacob{ 2907154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2908154603Smjacob U16 Slot; /* 08h */ 2909154603Smjacob U16 EnclosureHandle; /* 0Ah */ 2910154603Smjacob U64 SASAddress; /* 0Ch */ 2911154603Smjacob U16 ParentDevHandle; /* 14h */ 2912154603Smjacob U8 PhyNum; /* 16h */ 2913154603Smjacob U8 AccessStatus; /* 17h */ 2914154603Smjacob U16 DevHandle; /* 18h */ 2915154603Smjacob U8 TargetID; /* 1Ah */ 2916154603Smjacob U8 Bus; /* 1Bh */ 2917154603Smjacob U32 DeviceInfo; /* 1Ch */ 2918154603Smjacob U16 Flags; /* 20h */ 2919154603Smjacob U8 PhysicalPort; /* 22h */ 2920154603Smjacob U8 Reserved2; /* 23h */ 2921154603Smjacob} CONFIG_PAGE_SAS_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_0, 2922154603Smjacob SasDevicePage0_t, MPI_POINTER pSasDevicePage0_t; 2923154603Smjacob 2924170251Sscottl#define MPI_SASDEVICE0_PAGEVERSION (0x05) 2925154603Smjacob 2926154603Smjacob/* values for SAS Device Page 0 AccessStatus field */ 2927170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00) 2928170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01) 2929170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02) 2930170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SATA_AFFILIATION_CONFLICT (0x03) 2931233425Smarius#define MPI_SAS_DEVICE0_ASTATUS_SATA_NEEDS_INITIALIZATION (0x04) 2932170251Sscottl/* specific values for SATA Init failures */ 2933170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_UNKNOWN (0x10) 2934170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_AFFILIATION_CONFLICT (0x11) 2935170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_DIAG (0x12) 2936170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_IDENTIFICATION (0x13) 2937170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_CHECK_POWER (0x14) 2938170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_PIO_SN (0x15) 2939170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_MDMA_SN (0x16) 2940170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_UDMA_SN (0x17) 2941170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_ZONING_VIOLATION (0x18) 2942170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_NOT_ADDRESSABLE (0x19) 2943170251Sscottl#define MPI_SAS_DEVICE0_ASTATUS_SIF_MAX (0x1F) 2944154603Smjacob 2945154603Smjacob/* values for SAS Device Page 0 Flags field */ 2946170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_SATA_ASYNCHRONOUS_NOTIFY (0x0400) 2947170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200) 2948170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100) 2949170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080) 2950170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040) 2951170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020) 2952170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010) 2953170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008) 2954170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_MAPPING_PERSISTENT (0x0004) 2955170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_DEVICE_MAPPED (0x0002) 2956170251Sscottl#define MPI_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001) 2957154603Smjacob 2958154603Smjacob/* see mpi_sas.h for values for SAS Device Page 0 DeviceInfo values */ 2959154603Smjacob 2960154603Smjacob 2961154603Smjacobtypedef struct _CONFIG_PAGE_SAS_DEVICE_1 2962154603Smjacob{ 2963154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2964154603Smjacob U32 Reserved1; /* 08h */ 2965154603Smjacob U64 SASAddress; /* 0Ch */ 2966154603Smjacob U32 Reserved2; /* 14h */ 2967154603Smjacob U16 DevHandle; /* 18h */ 2968154603Smjacob U8 TargetID; /* 1Ah */ 2969154603Smjacob U8 Bus; /* 1Bh */ 2970154603Smjacob U8 InitialRegDeviceFIS[20];/* 1Ch */ 2971154603Smjacob} CONFIG_PAGE_SAS_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_1, 2972154603Smjacob SasDevicePage1_t, MPI_POINTER pSasDevicePage1_t; 2973154603Smjacob 2974154603Smjacob#define MPI_SASDEVICE1_PAGEVERSION (0x00) 2975154603Smjacob 2976154603Smjacob 2977154603Smjacobtypedef struct _CONFIG_PAGE_SAS_DEVICE_2 2978154603Smjacob{ 2979154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 2980154603Smjacob U64 PhysicalIdentifier; /* 08h */ 2981154603Smjacob U32 EnclosureMapping; /* 10h */ 2982154603Smjacob} CONFIG_PAGE_SAS_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_2, 2983154603Smjacob SasDevicePage2_t, MPI_POINTER pSasDevicePage2_t; 2984154603Smjacob 2985154603Smjacob#define MPI_SASDEVICE2_PAGEVERSION (0x01) 2986154603Smjacob 2987154603Smjacob/* defines for SAS Device Page 2 EnclosureMapping field */ 2988154603Smjacob#define MPI_SASDEVICE2_ENC_MAP_MASK_MISSING_COUNT (0x0000000F) 2989154603Smjacob#define MPI_SASDEVICE2_ENC_MAP_SHIFT_MISSING_COUNT (0) 2990154603Smjacob#define MPI_SASDEVICE2_ENC_MAP_MASK_NUM_SLOTS (0x000007F0) 2991154603Smjacob#define MPI_SASDEVICE2_ENC_MAP_SHIFT_NUM_SLOTS (4) 2992154603Smjacob#define MPI_SASDEVICE2_ENC_MAP_MASK_START_INDEX (0x001FF800) 2993154603Smjacob#define MPI_SASDEVICE2_ENC_MAP_SHIFT_START_INDEX (11) 2994154603Smjacob 2995154603Smjacob 2996154603Smjacob/**************************************************************************** 2997154603Smjacob* SAS PHY Config Pages 2998154603Smjacob****************************************************************************/ 2999154603Smjacob 3000154603Smjacobtypedef struct _CONFIG_PAGE_SAS_PHY_0 3001154603Smjacob{ 3002154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 3003154603Smjacob U16 OwnerDevHandle; /* 08h */ 3004154603Smjacob U16 Reserved1; /* 0Ah */ 3005154603Smjacob U64 SASAddress; /* 0Ch */ 3006154603Smjacob U16 AttachedDevHandle; /* 14h */ 3007154603Smjacob U8 AttachedPhyIdentifier; /* 16h */ 3008154603Smjacob U8 Reserved2; /* 17h */ 3009154603Smjacob U32 AttachedDeviceInfo; /* 18h */ 3010170251Sscottl U8 ProgrammedLinkRate; /* 1Ch */ 3011170251Sscottl U8 HwLinkRate; /* 1Dh */ 3012170251Sscottl U8 ChangeCount; /* 1Eh */ 3013170251Sscottl U8 Flags; /* 1Fh */ 3014170251Sscottl U32 PhyInfo; /* 20h */ 3015154603Smjacob} CONFIG_PAGE_SAS_PHY_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_0, 3016154603Smjacob SasPhyPage0_t, MPI_POINTER pSasPhyPage0_t; 3017154603Smjacob 3018154603Smjacob#define MPI_SASPHY0_PAGEVERSION (0x01) 3019154603Smjacob 3020154603Smjacob/* values for SAS PHY Page 0 ProgrammedLinkRate field */ 3021154603Smjacob#define MPI_SAS_PHY0_PRATE_MAX_RATE_MASK (0xF0) 3022154603Smjacob#define MPI_SAS_PHY0_PRATE_MAX_RATE_NOT_PROGRAMMABLE (0x00) 3023154603Smjacob#define MPI_SAS_PHY0_PRATE_MAX_RATE_1_5 (0x80) 3024154603Smjacob#define MPI_SAS_PHY0_PRATE_MAX_RATE_3_0 (0x90) 3025154603Smjacob#define MPI_SAS_PHY0_PRATE_MIN_RATE_MASK (0x0F) 3026154603Smjacob#define MPI_SAS_PHY0_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00) 3027154603Smjacob#define MPI_SAS_PHY0_PRATE_MIN_RATE_1_5 (0x08) 3028154603Smjacob#define MPI_SAS_PHY0_PRATE_MIN_RATE_3_0 (0x09) 3029154603Smjacob 3030154603Smjacob/* values for SAS PHY Page 0 HwLinkRate field */ 3031154603Smjacob#define MPI_SAS_PHY0_HWRATE_MAX_RATE_MASK (0xF0) 3032154603Smjacob#define MPI_SAS_PHY0_HWRATE_MAX_RATE_1_5 (0x80) 3033154603Smjacob#define MPI_SAS_PHY0_HWRATE_MAX_RATE_3_0 (0x90) 3034154603Smjacob#define MPI_SAS_PHY0_HWRATE_MIN_RATE_MASK (0x0F) 3035154603Smjacob#define MPI_SAS_PHY0_HWRATE_MIN_RATE_1_5 (0x08) 3036154603Smjacob#define MPI_SAS_PHY0_HWRATE_MIN_RATE_3_0 (0x09) 3037154603Smjacob 3038154603Smjacob/* values for SAS PHY Page 0 Flags field */ 3039154603Smjacob#define MPI_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01) 3040154603Smjacob 3041154603Smjacob/* values for SAS PHY Page 0 PhyInfo field */ 3042233425Smarius#define MPI_SAS_PHY0_PHYINFO_PHY_VACANT (0x80000000) 3043154603Smjacob#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_ACTIVE (0x00004000) 3044154603Smjacob#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_SELECTOR (0x00002000) 3045154603Smjacob#define MPI_SAS_PHY0_PHYINFO_VIRTUAL_PHY (0x00001000) 3046154603Smjacob 3047154603Smjacob#define MPI_SAS_PHY0_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00) 3048154603Smjacob#define MPI_SAS_PHY0_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8) 3049154603Smjacob 3050154603Smjacob#define MPI_SAS_PHY0_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0) 3051154603Smjacob#define MPI_SAS_PHY0_PHYINFO_DIRECT_ROUTING (0x00000000) 3052154603Smjacob#define MPI_SAS_PHY0_PHYINFO_SUBTRACTIVE_ROUTING (0x00000010) 3053154603Smjacob#define MPI_SAS_PHY0_PHYINFO_TABLE_ROUTING (0x00000020) 3054154603Smjacob 3055154603Smjacob#define MPI_SAS_PHY0_PHYINFO_MASK_LINK_RATE (0x0000000F) 3056154603Smjacob#define MPI_SAS_PHY0_PHYINFO_UNKNOWN_LINK_RATE (0x00000000) 3057154603Smjacob#define MPI_SAS_PHY0_PHYINFO_PHY_DISABLED (0x00000001) 3058154603Smjacob#define MPI_SAS_PHY0_PHYINFO_NEGOTIATION_FAILED (0x00000002) 3059154603Smjacob#define MPI_SAS_PHY0_PHYINFO_SATA_OOB_COMPLETE (0x00000003) 3060154603Smjacob#define MPI_SAS_PHY0_PHYINFO_RATE_1_5 (0x00000008) 3061154603Smjacob#define MPI_SAS_PHY0_PHYINFO_RATE_3_0 (0x00000009) 3062154603Smjacob 3063154603Smjacob 3064154603Smjacobtypedef struct _CONFIG_PAGE_SAS_PHY_1 3065154603Smjacob{ 3066154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 3067154603Smjacob U32 Reserved1; /* 08h */ 3068154603Smjacob U32 InvalidDwordCount; /* 0Ch */ 3069154603Smjacob U32 RunningDisparityErrorCount; /* 10h */ 3070154603Smjacob U32 LossDwordSynchCount; /* 14h */ 3071154603Smjacob U32 PhyResetProblemCount; /* 18h */ 3072154603Smjacob} CONFIG_PAGE_SAS_PHY_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_1, 3073154603Smjacob SasPhyPage1_t, MPI_POINTER pSasPhyPage1_t; 3074154603Smjacob 3075154603Smjacob#define MPI_SASPHY1_PAGEVERSION (0x00) 3076154603Smjacob 3077154603Smjacob 3078154603Smjacob/**************************************************************************** 3079154603Smjacob* SAS Enclosure Config Pages 3080154603Smjacob****************************************************************************/ 3081154603Smjacob 3082154603Smjacobtypedef struct _CONFIG_PAGE_SAS_ENCLOSURE_0 3083154603Smjacob{ 3084154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 3085154603Smjacob U32 Reserved1; /* 08h */ 3086154603Smjacob U64 EnclosureLogicalID; /* 0Ch */ 3087154603Smjacob U16 Flags; /* 14h */ 3088154603Smjacob U16 EnclosureHandle; /* 16h */ 3089154603Smjacob U16 NumSlots; /* 18h */ 3090154603Smjacob U16 StartSlot; /* 1Ah */ 3091154603Smjacob U8 StartTargetID; /* 1Ch */ 3092154603Smjacob U8 StartBus; /* 1Dh */ 3093154603Smjacob U8 SEPTargetID; /* 1Eh */ 3094154603Smjacob U8 SEPBus; /* 1Fh */ 3095154603Smjacob U32 Reserved2; /* 20h */ 3096154603Smjacob U32 Reserved3; /* 24h */ 3097154603Smjacob} CONFIG_PAGE_SAS_ENCLOSURE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_ENCLOSURE_0, 3098154603Smjacob SasEnclosurePage0_t, MPI_POINTER pSasEnclosurePage0_t; 3099154603Smjacob 3100154603Smjacob#define MPI_SASENCLOSURE0_PAGEVERSION (0x01) 3101154603Smjacob 3102154603Smjacob/* values for SAS Enclosure Page 0 Flags field */ 3103154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_SEP_BUS_ID_VALID (0x0020) 3104154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_START_BUS_ID_VALID (0x0010) 3105154603Smjacob 3106154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F) 3107154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000) 3108154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001) 3109154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002) 3110154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003) 3111154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004) 3112154603Smjacob#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_GPIO (0x0005) 3113154603Smjacob 3114154603Smjacob 3115154603Smjacob/**************************************************************************** 3116154603Smjacob* Log Config Pages 3117154603Smjacob****************************************************************************/ 3118154603Smjacob/* 3119154603Smjacob * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 3120154603Smjacob * one and check NumLogEntries at runtime. 3121154603Smjacob */ 3122154603Smjacob#ifndef MPI_LOG_0_NUM_LOG_ENTRIES 3123154603Smjacob#define MPI_LOG_0_NUM_LOG_ENTRIES (1) 3124154603Smjacob#endif 3125154603Smjacob 3126156000Smjacob#define MPI_LOG_0_LOG_DATA_LENGTH (0x1C) 3127154603Smjacob 3128154603Smjacobtypedef struct _MPI_LOG_0_ENTRY 3129154603Smjacob{ 3130156000Smjacob U32 TimeStamp; /* 00h */ 3131156000Smjacob U32 Reserved1; /* 04h */ 3132156000Smjacob U16 LogSequence; /* 08h */ 3133156000Smjacob U16 LogEntryQualifier; /* 0Ah */ 3134156000Smjacob U8 LogData[MPI_LOG_0_LOG_DATA_LENGTH]; /* 0Ch */ 3135154603Smjacob} MPI_LOG_0_ENTRY, MPI_POINTER PTR_MPI_LOG_0_ENTRY, 3136154603Smjacob MpiLog0Entry_t, MPI_POINTER pMpiLog0Entry_t; 3137154603Smjacob 3138154603Smjacob/* values for Log Page 0 LogEntry LogEntryQualifier field */ 3139154603Smjacob#define MPI_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000) 3140154603Smjacob#define MPI_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001) 3141154603Smjacob 3142154603Smjacobtypedef struct _CONFIG_PAGE_LOG_0 3143154603Smjacob{ 3144154603Smjacob CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */ 3145154603Smjacob U32 Reserved1; /* 08h */ 3146154603Smjacob U32 Reserved2; /* 0Ch */ 3147154603Smjacob U16 NumLogEntries; /* 10h */ 3148154603Smjacob U16 Reserved3; /* 12h */ 3149154603Smjacob MPI_LOG_0_ENTRY LogEntry[MPI_LOG_0_NUM_LOG_ENTRIES]; /* 14h */ 3150154603Smjacob} CONFIG_PAGE_LOG_0, MPI_POINTER PTR_CONFIG_PAGE_LOG_0, 3151154603Smjacob LogPage0_t, MPI_POINTER pLogPage0_t; 3152154603Smjacob 3153156000Smjacob#define MPI_LOG_0_PAGEVERSION (0x01) 3154154603Smjacob 3155154603Smjacob 3156154603Smjacob#endif 3157154603Smjacob 3158