nsgphy.c revision 164827
1224133Sdim/*-
2224133Sdim * Copyright (c) 2001 Wind River Systems
3224133Sdim * Copyright (c) 2001
4224133Sdim *	Bill Paul <wpaul@bsdi.com>.  All rights reserved.
5224133Sdim * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
6224133Sdim * All rights reserved.
7224133Sdim *
8224133Sdim * This code is derived from software contributed to The NetBSD Foundation
9224133Sdim * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10224133Sdim * NASA Ames Research Center.
11224133Sdim *
12224133Sdim * Redistribution and use in source and binary forms, with or without
13224133Sdim * modification, are permitted provided that the following conditions
14224133Sdim * are met:
15224133Sdim * 1. Redistributions of source code must retain the above copyright
16224133Sdim *    notice, this list of conditions and the following disclaimer.
17224133Sdim * 2. Redistributions in binary form must reproduce the above copyright
18224133Sdim *    notice, this list of conditions and the following disclaimer in the
19224133Sdim *    documentation and/or other materials provided with the distribution.
20224133Sdim * 3. All advertising materials mentioning features or use of this software
21224133Sdim *    must display the following acknowledgement:
22224133Sdim *	This product includes software developed by Bill Paul.
23224133Sdim * 4. Neither the name of the author nor the names of any co-contributors
24224133Sdim *    may be used to endorse or promote products derived from this software
25224133Sdim *    without specific prior written permission.
26224133Sdim *
27224133Sdim * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
28234353Sdim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29224133Sdim * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30224133Sdim * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
31224133Sdim * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32224133Sdim * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33224133Sdim * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34224133Sdim * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35224133Sdim * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36224133Sdim * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
37224133Sdim * THE POSSIBILITY OF SUCH DAMAGE.
38224133Sdim */
39224133Sdim
40224133Sdim#include <sys/cdefs.h>
41224133Sdim__FBSDID("$FreeBSD: head/sys/dev/mii/nsgphy.c 164827 2006-12-02 15:32:34Z marius $");
42224133Sdim
43224133Sdim/*
44224133Sdim * Driver for the National Semiconductor DP83891 and DP83861
45224133Sdim * 10/100/1000 PHYs.
46224133Sdim * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
47224133Sdim *
48224133Sdim * The DP83891 is the older NatSemi gigE PHY which isn't being sold
49224133Sdim * anymore. The DP83861 is its replacement, which is an 'enhanced'
50224133Sdim * firmware driven component. The major difference between the
51224133Sdim * two is that the 83891 can't generate interrupts, while the
52234353Sdim * 83861 can. (I think it wasn't originally designed to do this, but
53234353Sdim * it can now thanks to firmware updates.) The 83861 also allows
54224133Sdim * access to its internal RAM via indirect register access.
55234353Sdim */
56234353Sdim
57234353Sdim#include <sys/param.h>
58234353Sdim#include <sys/systm.h>
59234353Sdim#include <sys/kernel.h>
60224133Sdim#include <sys/module.h>
61224133Sdim#include <sys/socket.h>
62224133Sdim#include <sys/bus.h>
63224133Sdim
64234353Sdim#include <net/if.h>
65224133Sdim#include <net/if_media.h>
66224133Sdim
67224133Sdim#include <dev/mii/mii.h>
68224133Sdim#include <dev/mii/miivar.h>
69224133Sdim#include "miidevs.h"
70234353Sdim
71234353Sdim#include <dev/mii/nsgphyreg.h>
72234353Sdim
73224133Sdim#include "miibus_if.h"
74224133Sdim
75224133Sdimstatic int nsgphy_probe(device_t);
76224133Sdimstatic int nsgphy_attach(device_t);
77224133Sdim
78224133Sdimstatic device_method_t nsgphy_methods[] = {
79224133Sdim	/* device interface */
80224133Sdim	DEVMETHOD(device_probe,		nsgphy_probe),
81224133Sdim	DEVMETHOD(device_attach,	nsgphy_attach),
82224133Sdim	DEVMETHOD(device_detach,	mii_phy_detach),
83224133Sdim	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
84224133Sdim	{ 0, 0 }
85224133Sdim};
86224133Sdim
87static devclass_t nsgphy_devclass;
88
89static driver_t nsgphy_driver = {
90	"nsgphy",
91	nsgphy_methods,
92	sizeof(struct mii_softc)
93};
94
95DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0);
96
97static int	nsgphy_service(struct mii_softc *, struct mii_data *,int);
98static void	nsgphy_status(struct mii_softc *);
99
100static const struct mii_phydesc nsgphys[] = {
101	MII_PHY_DESC(NATSEMI, DP83861),
102	MII_PHY_DESC(NATSEMI, DP83891),
103	MII_PHY_END
104};
105
106static int
107nsgphy_probe(device_t dev)
108{
109
110	return (mii_phy_dev_probe(dev, nsgphys, BUS_PROBE_DEFAULT));
111}
112
113static int
114nsgphy_attach(device_t dev)
115{
116	struct mii_softc *sc;
117	struct mii_attach_args *ma;
118	struct mii_data *mii;
119
120	sc = device_get_softc(dev);
121	ma = device_get_ivars(dev);
122	if (bootverbose)
123		device_printf(dev, "<rev. %d>\n", MII_REV(ma->mii_id2));
124	device_printf(dev, " ");
125	sc->mii_dev = device_get_parent(dev);
126	mii = device_get_softc(sc->mii_dev);
127	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
128
129	sc->mii_inst = mii->mii_instance;
130	sc->mii_phy = ma->mii_phyno;
131	sc->mii_service = nsgphy_service;
132	sc->mii_pdata = mii;
133
134	mii->mii_instance++;
135
136	sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) |
137	    (BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask;
138	if (sc->mii_capabilities & BMSR_EXTSTAT)
139		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
140
141	mii_phy_add_media(sc);
142	printf("\n");
143
144	MIIBUS_MEDIAINIT(sc->mii_dev);
145	return (0);
146}
147
148static int
149nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
150{
151	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
152	int reg;
153
154	switch (cmd) {
155	case MII_POLLSTAT:
156		/*
157		 * If we're not polling our PHY instance, just return.
158		 */
159		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
160			return (0);
161		break;
162
163	case MII_MEDIACHG:
164		/*
165		 * If the media indicates a different PHY instance,
166		 * isolate ourselves.
167		 */
168		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
169			reg = PHY_READ(sc, MII_BMCR);
170			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
171			return (0);
172		}
173
174		/*
175		 * If the interface is not up, don't do anything.
176		 */
177		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
178			break;
179
180		mii_phy_setmedia(sc);
181		break;
182
183	case MII_TICK:
184		/*
185		 * If we're not currently selected, just return.
186		 */
187		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
188			return (0);
189
190		if (mii_phy_tick(sc) == EJUSTRETURN)
191			return (0);
192		break;
193	}
194
195	/* Update the media status. */
196	nsgphy_status(sc);
197
198	/* Callback if something changed. */
199	mii_phy_update(sc, cmd);
200	return (0);
201}
202
203static void
204nsgphy_status(struct mii_softc *sc)
205{
206	struct mii_data *mii = sc->mii_pdata;
207	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
208	int bmsr, bmcr, physup, gtsr;
209
210	mii->mii_media_status = IFM_AVALID;
211	mii->mii_media_active = IFM_ETHER;
212
213	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
214
215	physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
216
217	if (physup & PHY_SUP_LINK)
218		mii->mii_media_status |= IFM_ACTIVE;
219
220	bmcr = PHY_READ(sc, MII_BMCR);
221	if (bmcr & BMCR_ISO) {
222		mii->mii_media_active |= IFM_NONE;
223		mii->mii_media_status = 0;
224		return;
225	}
226
227	if (bmcr & BMCR_LOOP)
228		mii->mii_media_active |= IFM_LOOP;
229
230	if (bmcr & BMCR_AUTOEN) {
231		/*
232		 * The media status bits are only valid if autonegotiation
233		 * has completed (or it's disabled).
234		 */
235		if ((bmsr & BMSR_ACOMP) == 0) {
236			/* Erg, still trying, I guess... */
237			mii->mii_media_active |= IFM_NONE;
238			return;
239		}
240
241		switch (physup & (PHY_SUP_SPEED1|PHY_SUP_SPEED0)) {
242		case PHY_SUP_SPEED1:
243			mii->mii_media_active |= IFM_1000_T;
244			gtsr = PHY_READ(sc, MII_100T2SR);
245			if (gtsr & GTSR_MS_RES)
246				mii->mii_media_active |= IFM_ETH_MASTER;
247			break;
248
249		case PHY_SUP_SPEED0:
250			mii->mii_media_active |= IFM_100_TX;
251			break;
252
253		case 0:
254			mii->mii_media_active |= IFM_10_T;
255			break;
256
257		default:
258			mii->mii_media_active |= IFM_NONE;
259			mii->mii_media_status = 0;
260		}
261		if (physup & PHY_SUP_DUPLEX)
262			mii->mii_media_active |= IFM_FDX;
263	} else
264		mii->mii_media_active = ife->ifm_media;
265}
266