1270631Sjfv/****************************************************************************** 2270631Sjfv 3292100Ssmh Copyright (c) 2013-2015, Intel Corporation 4270631Sjfv All rights reserved. 5270631Sjfv 6270631Sjfv Redistribution and use in source and binary forms, with or without 7270631Sjfv modification, are permitted provided that the following conditions are met: 8270631Sjfv 9270631Sjfv 1. Redistributions of source code must retain the above copyright notice, 10270631Sjfv this list of conditions and the following disclaimer. 11270631Sjfv 12270631Sjfv 2. Redistributions in binary form must reproduce the above copyright 13270631Sjfv notice, this list of conditions and the following disclaimer in the 14270631Sjfv documentation and/or other materials provided with the distribution. 15270631Sjfv 16270631Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17270631Sjfv contributors may be used to endorse or promote products derived from 18270631Sjfv this software without specific prior written permission. 19270631Sjfv 20270631Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21270631Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22270631Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23270631Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24270631Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25270631Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26270631Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27270631Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28270631Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29270631Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30270631Sjfv POSSIBILITY OF SUCH DAMAGE. 31270631Sjfv 32270631Sjfv******************************************************************************/ 33270631Sjfv/*$FreeBSD$*/ 34270631Sjfv 35270631Sjfv#ifndef _I40E_OSDEP_H_ 36270631Sjfv#define _I40E_OSDEP_H_ 37270631Sjfv 38270631Sjfv#include <sys/types.h> 39270631Sjfv#include <sys/param.h> 40270631Sjfv#include <sys/systm.h> 41270631Sjfv#include <sys/endian.h> 42270631Sjfv#include <sys/mbuf.h> 43270631Sjfv#include <sys/protosw.h> 44270631Sjfv#include <sys/socket.h> 45270631Sjfv#include <sys/malloc.h> 46270631Sjfv#include <sys/kernel.h> 47270631Sjfv#include <sys/bus.h> 48270631Sjfv#include <machine/bus.h> 49270631Sjfv#include <sys/rman.h> 50270631Sjfv#include <machine/resource.h> 51270631Sjfv#include <vm/vm.h> 52270631Sjfv#include <vm/pmap.h> 53270631Sjfv#include <machine/clock.h> 54270631Sjfv#include <dev/pci/pcivar.h> 55270631Sjfv#include <dev/pci/pcireg.h> 56270631Sjfv 57270631Sjfv#define ASSERT(x) if(!(x)) panic("IXL: x") 58270631Sjfv 59270631Sjfv#define i40e_usec_delay(x) DELAY(x) 60270631Sjfv#define i40e_msec_delay(x) DELAY(1000*(x)) 61270631Sjfv 62270631Sjfv#define DBG 0 63270631Sjfv#define MSGOUT(S, A, B) printf(S "\n", A, B) 64270631Sjfv#define DEBUGFUNC(F) DEBUGOUT(F); 65270631Sjfv#if DBG 66270631Sjfv #define DEBUGOUT(S) printf(S "\n") 67270631Sjfv #define DEBUGOUT1(S,A) printf(S "\n",A) 68270631Sjfv #define DEBUGOUT2(S,A,B) printf(S "\n",A,B) 69270631Sjfv #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C) 70270631Sjfv #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G) 71270631Sjfv#else 72270631Sjfv #define DEBUGOUT(S) 73270631Sjfv #define DEBUGOUT1(S,A) 74270631Sjfv #define DEBUGOUT2(S,A,B) 75270631Sjfv #define DEBUGOUT3(S,A,B,C) 76270631Sjfv #define DEBUGOUT6(S,A,B,C,D,E,F) 77270631Sjfv #define DEBUGOUT7(S,A,B,C,D,E,F,G) 78270631Sjfv#endif 79270631Sjfv 80270631Sjfv#define UNREFERENCED_XPARAMETER 81270631Sjfv#define UNREFERENCED_PARAMETER(_p) 82270631Sjfv#define UNREFERENCED_1PARAMETER(_p) 83270631Sjfv#define UNREFERENCED_2PARAMETER(_p, _q) 84270631Sjfv#define UNREFERENCED_3PARAMETER(_p, _q, _r) 85270631Sjfv#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 86270631Sjfv 87270631Sjfv#define STATIC static 88270631Sjfv#define INLINE inline 89270631Sjfv 90270631Sjfv#define FALSE 0 91270631Sjfv#define false 0 /* shared code requires this */ 92270631Sjfv#define TRUE 1 93270631Sjfv#define true 1 94270631Sjfv#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 95270631Sjfv#define PCI_COMMAND_REGISTER PCIR_COMMAND 96270631Sjfv#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) 97270631Sjfv 98270631Sjfv#define i40e_memset(a, b, c, d) memset((a), (b), (c)) 99270631Sjfv#define i40e_memcpy(a, b, c, d) memcpy((a), (b), (c)) 100270631Sjfv 101270631Sjfv#define CPU_TO_LE16(o) htole16(o) 102270631Sjfv#define CPU_TO_LE32(s) htole32(s) 103270631Sjfv#define CPU_TO_LE64(h) htole64(h) 104270631Sjfv#define LE16_TO_CPU(a) le16toh(a) 105270631Sjfv#define LE32_TO_CPU(c) le32toh(c) 106270631Sjfv#define LE64_TO_CPU(k) le64toh(k) 107270631Sjfv 108270631Sjfv#define I40E_NTOHS(a) ntohs(a) 109270631Sjfv#define I40E_NTOHL(a) ntohl(a) 110270631Sjfv#define I40E_HTONS(a) htons(a) 111270631Sjfv#define I40E_HTONL(a) htonl(a) 112270631Sjfv 113270631Sjfv#define FIELD_SIZEOF(x, y) (sizeof(((x*)0)->y)) 114270631Sjfv 115292100Ssmh#define BIT(a) (1UL << (a)) 116292100Ssmh#define BIT_ULL(a) (1ULL << (a)) 117292100Ssmh 118270631Sjfvtypedef uint8_t u8; 119270631Sjfvtypedef int8_t s8; 120270631Sjfvtypedef uint16_t u16; 121270631Sjfvtypedef int16_t s16; 122270631Sjfvtypedef uint32_t u32; 123270631Sjfvtypedef int32_t s32; 124270631Sjfvtypedef uint64_t u64; 125270631Sjfv 126270631Sjfv/* long string relief */ 127270631Sjfvtypedef enum i40e_status_code i40e_status; 128270631Sjfv 129270631Sjfv#define __le16 u16 130270631Sjfv#define __le32 u32 131270631Sjfv#define __le64 u64 132270631Sjfv#define __be16 u16 133270631Sjfv#define __be32 u32 134270631Sjfv#define __be64 u64 135270631Sjfv 136270631Sjfv/* SW spinlock */ 137270631Sjfvstruct i40e_spinlock { 138270631Sjfv struct mtx mutex; 139270631Sjfv}; 140270631Sjfv 141270631Sjfv#define le16_to_cpu 142270631Sjfv 143270919Sjfv#if defined(__amd64__) || defined(i386) 144270631Sjfvstatic __inline 145270631Sjfvvoid prefetch(void *x) 146270631Sjfv{ 147270631Sjfv __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 148270631Sjfv} 149270919Sjfv#else 150270919Sjfv#define prefetch(x) 151270919Sjfv#endif 152270631Sjfv 153274360Sjfvstruct i40e_osdep { 154270631Sjfv bus_space_tag_t mem_bus_space_tag; 155270631Sjfv bus_space_handle_t mem_bus_space_handle; 156270631Sjfv bus_size_t mem_bus_space_size; 157274360Sjfv uint32_t flush_reg; 158270631Sjfv struct device *dev; 159270631Sjfv}; 160270631Sjfv 161270631Sjfvstruct i40e_dma_mem { 162270631Sjfv void *va; 163270631Sjfv u64 pa; 164270631Sjfv bus_dma_tag_t tag; 165270631Sjfv bus_dmamap_t map; 166270631Sjfv bus_dma_segment_t seg; 167270631Sjfv bus_size_t size; 168270631Sjfv int nseg; 169270631Sjfv int flags; 170270631Sjfv}; 171270631Sjfv 172270631Sjfvstruct i40e_hw; /* forward decl */ 173270631Sjfvu16 i40e_read_pci_cfg(struct i40e_hw *, u32); 174270631Sjfvvoid i40e_write_pci_cfg(struct i40e_hw *, u32, u16); 175270631Sjfv 176270631Sjfv#define i40e_debug(h, m, s, ...) i40e_debug_d(h, m, s, ##__VA_ARGS__) 177270631Sjfvextern void i40e_debug_d(void *hw, u32 mask, char *fmt_str, ...); 178270631Sjfv 179270631Sjfvstruct i40e_virt_mem { 180270631Sjfv void *va; 181270631Sjfv u32 size; 182270631Sjfv}; 183270631Sjfv 184270631Sjfv/* 185270631Sjfv** This hardware supports either 16 or 32 byte rx descriptors 186270631Sjfv** we default here to the larger size. 187270631Sjfv*/ 188270631Sjfv#define i40e_rx_desc i40e_32byte_rx_desc 189270631Sjfv 190270631Sjfvstatic __inline uint32_t 191270631Sjfvrd32_osdep(struct i40e_osdep *osdep, uint32_t reg) 192270631Sjfv{ 193270631Sjfv 194270631Sjfv KASSERT(reg < osdep->mem_bus_space_size, 195292100Ssmh ("ixl: register offset %#jx too large (max is %#jx)", 196270919Sjfv (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size)); 197270631Sjfv 198270631Sjfv return (bus_space_read_4(osdep->mem_bus_space_tag, 199270631Sjfv osdep->mem_bus_space_handle, reg)); 200270631Sjfv} 201270631Sjfv 202270631Sjfvstatic __inline void 203270631Sjfvwr32_osdep(struct i40e_osdep *osdep, uint32_t reg, uint32_t value) 204270631Sjfv{ 205270631Sjfv 206270631Sjfv KASSERT(reg < osdep->mem_bus_space_size, 207292100Ssmh ("ixl: register offset %#jx too large (max is %#jx)", 208270919Sjfv (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size)); 209270631Sjfv 210270631Sjfv bus_space_write_4(osdep->mem_bus_space_tag, 211270631Sjfv osdep->mem_bus_space_handle, reg, value); 212270631Sjfv} 213270631Sjfv 214274360Sjfvstatic __inline void 215274360Sjfvixl_flush_osdep(struct i40e_osdep *osdep) 216274360Sjfv{ 217274360Sjfv rd32_osdep(osdep, osdep->flush_reg); 218274360Sjfv} 219274360Sjfv 220270631Sjfv#define rd32(a, reg) rd32_osdep((a)->back, (reg)) 221270631Sjfv#define wr32(a, reg, value) wr32_osdep((a)->back, (reg), (value)) 222270631Sjfv 223270631Sjfv#define rd64(a, reg) (\ 224270631Sjfv bus_space_read_8( ((struct i40e_osdep *)(a)->back)->mem_bus_space_tag, \ 225270631Sjfv ((struct i40e_osdep *)(a)->back)->mem_bus_space_handle, \ 226270631Sjfv reg)) 227270631Sjfv 228270631Sjfv#define wr64(a, reg, value) (\ 229270631Sjfv bus_space_write_8( ((struct i40e_osdep *)(a)->back)->mem_bus_space_tag, \ 230270631Sjfv ((struct i40e_osdep *)(a)->back)->mem_bus_space_handle, \ 231270631Sjfv reg, value)) 232270631Sjfv 233274360Sjfv#define ixl_flush(a) ixl_flush_osdep((a)->back) 234270631Sjfv 235270631Sjfv#endif /* _I40E_OSDEP_H_ */ 236