ixv_sriov.h revision 315333 
1/******************************************************************************
2
3  Copyright (c) 2001-2017, Intel Corporation
4  All rights reserved.
5
6  Redistribution and use in source and binary forms, with or without
7  modification, are permitted provided that the following conditions are met:
8
9   1. Redistributions of source code must retain the above copyright notice,
10      this list of conditions and the following disclaimer.
11
12   2. Redistributions in binary form must reproduce the above copyright
13      notice, this list of conditions and the following disclaimer in the
14      documentation and/or other materials provided with the distribution.
15
16   3. Neither the name of the Intel Corporation nor the names of its
17      contributors may be used to endorse or promote products derived from
18      this software without specific prior written permission.
19
20  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: stable/10/sys/dev/ixgbe/ixv_sriov.h 315333 2017-03-15 21:20:17Z erj $*/
34
35
36#ifndef _IXGBE_SRIOV_H_
37#define _IXGBE_SRIOV_H_
38
39#ifdef PCI_IOV
40
41#include <sys/nv.h>
42#include <sys/iov_schema.h>
43#include <dev/pci/pci_iov.h>
44#include "ixv_mbx.h"
45
46#define IXGBE_VF_CTS            (1 << 0) /* VF is clear to send. */
47#define IXGBE_VF_CAP_MAC        (1 << 1) /* VF is permitted to change MAC. */
48#define IXGBE_VF_CAP_VLAN       (1 << 2) /* VF is permitted to join vlans. */
49#define IXGBE_VF_ACTIVE         (1 << 3) /* VF is active. */
50#define IXGBE_VF_INDEX(vmdq)    ((vmdq) / 32)
51#define IXGBE_VF_BIT(vmdq)      (1 << ((vmdq) % 32))
52
53#define IXGBE_VT_MSG_MASK	0xFFFF
54
55#define IXGBE_VT_MSGINFO(msg)	\
56	(((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT)
57
58#define IXGBE_VF_GET_QUEUES_RESP_LEN	5
59
60#define IXGBE_API_VER_1_0	0
61#define IXGBE_API_VER_2_0	1	/* Solaris API.  Not supported. */
62#define IXGBE_API_VER_1_1	2
63#define IXGBE_API_VER_UNKNOWN	UINT16_MAX
64
65#define IXGBE_NO_VM             0
66#define IXGBE_32_VM             32
67#define IXGBE_64_VM             64
68
69int  ixgbe_add_vf(device_t, u16, const nvlist_t *);
70int  ixgbe_init_iov(device_t, u16, const nvlist_t *);
71void ixgbe_uninit_iov(device_t);
72void ixgbe_initialize_iov(struct adapter *);
73void ixgbe_recalculate_max_frame(struct adapter *);
74void ixgbe_ping_all_vfs(struct adapter *);
75int  ixgbe_pci_iov_detach(device_t);
76void ixgbe_define_iov_schemas(device_t, int *);
77void ixgbe_align_all_queue_indices(struct adapter *);
78int  ixgbe_vf_que_index(int, int, int);
79u32  ixgbe_get_mtqc(int);
80u32  ixgbe_get_mrqc(int);
81
82/******************************************************************************/
83#else  /* PCI_IOV */
84/******************************************************************************/
85
86#define ixgbe_add_vf(_a,_b,_c)
87#define ixgbe_init_iov(_a,_b,_c)
88#define ixgbe_uninit_iov(_a)
89#define ixgbe_initialize_iov(_a)
90#define ixgbe_recalculate_max_frame(_a)
91#define ixgbe_ping_all_vfs(_a)
92#define ixgbe_pci_iov_detach(_a) 0
93#define ixgbe_define_iov_schemas(_a,_b)
94#define ixgbe_align_all_queue_indices(_a)
95#define ixgbe_vf_que_index(_a,_b,_c) (_c)
96#define ixgbe_get_mtqc(_a) IXGBE_MTQC_64Q_1PB
97#define ixgbe_get_mrqc(_a) 0
98
99#endif /* PCI_IOV */
100
101void ixgbe_handle_mbx(void *, int);
102
103#endif
104