ixv.h revision 315333
1/****************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: stable/10/sys/dev/ixgbe/ixv.h 315333 2017-03-15 21:20:17Z erj $*/ 34 35 36#ifndef _IXGBE_H_ 37#define _IXGBE_H_ 38 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/buf_ring.h> 43#include <sys/mbuf.h> 44#include <sys/protosw.h> 45#include <sys/socket.h> 46#include <sys/malloc.h> 47#include <sys/kernel.h> 48#include <sys/module.h> 49#include <sys/sockio.h> 50#include <sys/eventhandler.h> 51 52#include <net/if.h> 53#include <net/if_var.h> 54#include <net/if_arp.h> 55#include <net/bpf.h> 56#include <net/ethernet.h> 57#include <net/if_dl.h> 58#include <net/if_media.h> 59 60#include <net/bpf.h> 61#include <net/if_types.h> 62#include <net/if_vlan_var.h> 63 64#include <netinet/in_systm.h> 65#include <netinet/in.h> 66#include <netinet/if_ether.h> 67#include <netinet/ip.h> 68#include <netinet/ip6.h> 69#include <netinet/tcp.h> 70#include <netinet/tcp_lro.h> 71#include <netinet/udp.h> 72 73#include <machine/in_cksum.h> 74 75#include <sys/bus.h> 76#include <machine/bus.h> 77#include <sys/rman.h> 78#include <machine/resource.h> 79#include <vm/vm.h> 80#include <vm/pmap.h> 81#include <machine/clock.h> 82#include <dev/pci/pcivar.h> 83#include <dev/pci/pcireg.h> 84#include <sys/proc.h> 85#include <sys/sysctl.h> 86#include <sys/endian.h> 87#include <sys/taskqueue.h> 88#include <sys/pcpu.h> 89#include <sys/smp.h> 90#include <machine/smp.h> 91#include <sys/sbuf.h> 92 93#include "ixv_features.h" 94#include "ixv_vf.h" 95 96/* Tunables */ 97 98/* 99 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 100 * number of transmit descriptors allocated by the driver. Increasing this 101 * value allows the driver to queue more transmits. Each descriptor is 16 102 * bytes. Performance tests have show the 2K value to be optimal for top 103 * performance. 104 */ 105#define DEFAULT_TXD 1024 106#define PERFORM_TXD 2048 107#define MAX_TXD 4096 108#define MIN_TXD 64 109 110/* 111 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 112 * number of receive descriptors allocated for each RX queue. Increasing this 113 * value allows the driver to buffer more incoming packets. Each descriptor 114 * is 16 bytes. A receive buffer is also allocated for each descriptor. 115 * 116 * Note: with 8 rings and a dual port card, it is possible to bump up 117 * against the system mbuf pool limit, you can tune nmbclusters 118 * to adjust for this. 119 */ 120#define DEFAULT_RXD 1024 121#define PERFORM_RXD 2048 122#define MAX_RXD 4096 123#define MIN_RXD 64 124 125/* Alignment for rings */ 126#define DBA_ALIGN 128 127 128/* 129 * This is the max watchdog interval, ie. the time that can 130 * pass between any two TX clean operations, such only happening 131 * when the TX hardware is functioning. 132 */ 133#define IXGBE_WATCHDOG (10 * hz) 134 135/* 136 * This parameters control when the driver calls the routine to reclaim 137 * transmit descriptors. 138 */ 139#define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8) 140#define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32) 141 142/* These defines are used in MTU calculations */ 143#define IXGBE_MAX_FRAME_SIZE 9728 144#define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN) 145#define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \ 146 ETHER_VLAN_ENCAP_LEN) 147#define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR) 148#define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN) 149 150/* Flow control constants */ 151#define IXGBE_FC_PAUSE 0xFFFF 152#define IXGBE_FC_HI 0x20000 153#define IXGBE_FC_LO 0x10000 154 155/* 156 * Used for optimizing small rx mbufs. Effort is made to keep the copy 157 * small and aligned for the CPU L1 cache. 158 * 159 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 160 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 161 * wasted. Getting 64 byte alignment, which _should_ be ideal for 162 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 163 * in observed efficiency of the optimization, 97.9% -> 81.8%. 164 */ 165#if __FreeBSD_version < 1002000 166#define MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr)) 167#endif 168#define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) 169#define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 170#define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) 171 172/* Keep older OS drivers building... */ 173#if !defined(SYSCTL_ADD_UQUAD) 174#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 175#endif 176 177/* Defines for printing debug information */ 178#define DEBUG_INIT 0 179#define DEBUG_IOCTL 0 180#define DEBUG_HW 0 181 182#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 183#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 184#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 185#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 186#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 187#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 188#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 189#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 190#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 191 192#define MAX_NUM_MULTICAST_ADDRESSES 128 193#define IXGBE_82598_SCATTER 100 194#define IXGBE_82599_SCATTER 32 195#define MSIX_82598_BAR 3 196#define MSIX_82599_BAR 4 197#define IXGBE_TSO_SIZE 262140 198#define IXGBE_RX_HDR 128 199#define IXGBE_VFTA_SIZE 128 200#define IXGBE_BR_SIZE 4096 201#define IXGBE_QUEUE_MIN_FREE 32 202#define IXGBE_MAX_TX_BUSY 10 203#define IXGBE_QUEUE_HUNG 0x80000000 204 205#define IXGBE_EITR_DEFAULT 128 206 207/* Supported offload bits in mbuf flag */ 208#if __FreeBSD_version >= 1000000 209#define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \ 210 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \ 211 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP) 212#elif __FreeBSD_version >= 800000 213#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 214#else 215#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 216#endif 217 218/* Backward compatibility items for very old versions */ 219#ifndef pci_find_cap 220#define pci_find_cap pci_find_extcap 221#endif 222 223#ifndef DEVMETHOD_END 224#define DEVMETHOD_END { NULL, NULL } 225#endif 226 227/* 228 * Interrupt Moderation parameters 229 */ 230#define IXGBE_LOW_LATENCY 128 231#define IXGBE_AVE_LATENCY 400 232#define IXGBE_BULK_LATENCY 1200 233 234/* Using 1FF (the max value), the interval is ~1.05ms */ 235#define IXGBE_LINK_ITR_QUANTA 0x1FF 236#define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \ 237 IXGBE_EITR_ITR_INT_MASK) 238 239/* MAC type macros */ 240#define IXGBE_IS_X550VF(_adapter) \ 241 ((_adapter->hw.mac.type == ixgbe_mac_X550_vf) || \ 242 (_adapter->hw.mac.type == ixgbe_mac_X550EM_x_vf) || \ 243 (_adapter->hw.mac.type == ixgbe_mac_X550EM_a_vf)) 244 245#define IXGBE_IS_VF(_x) 1 246 247 248/************************************************************************ 249 * vendor_info_array 250 * 251 * This array contains the list of Subvendor/Subdevice IDs on 252 * which the driver should load. 253 ************************************************************************/ 254typedef struct _ixgbe_vendor_info_t { 255 unsigned int vendor_id; 256 unsigned int device_id; 257 unsigned int subvendor_id; 258 unsigned int subdevice_id; 259 unsigned int index; 260} ixgbe_vendor_info_t; 261 262struct ixgbe_bp_data { 263 u32 low; 264 u32 high; 265 u32 log; 266}; 267 268struct ixgbe_tx_buf { 269 union ixgbe_adv_tx_desc *eop; 270 struct mbuf *m_head; 271 bus_dmamap_t map; 272}; 273 274struct ixgbe_rx_buf { 275 struct mbuf *buf; 276 struct mbuf *fmp; 277 bus_dmamap_t pmap; 278 u_int flags; 279#define IXGBE_RX_COPY 0x01 280 uint64_t addr; 281}; 282 283/* 284 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free 285 */ 286struct ixgbe_dma_alloc { 287 bus_addr_t dma_paddr; 288 caddr_t dma_vaddr; 289 bus_dma_tag_t dma_tag; 290 bus_dmamap_t dma_map; 291 bus_dma_segment_t dma_seg; 292 bus_size_t dma_size; 293 int dma_nseg; 294}; 295 296struct ixgbe_mc_addr { 297 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; 298 u32 vmdq; 299}; 300 301/* 302 * Driver queue struct: this is the interrupt container 303 * for the associated tx and rx ring. 304 */ 305struct ix_queue { 306 struct adapter *adapter; 307 u32 msix; /* This queue's MSI-X vector */ 308 u32 eims; /* This queue's EIMS bit */ 309 u32 eitr_setting; 310 u32 me; 311 struct resource *res; 312 void *tag; 313 int busy; 314 struct tx_ring *txr; 315 struct rx_ring *rxr; 316 struct task que_task; 317 struct taskqueue *tq; 318 u64 irqs; 319}; 320 321/* 322 * The transmit ring, one per queue 323 */ 324struct tx_ring { 325 struct adapter *adapter; 326 struct mtx tx_mtx; 327 u32 me; 328 u32 tail; 329 int busy; 330 union ixgbe_adv_tx_desc *tx_base; 331 struct ixgbe_tx_buf *tx_buffers; 332 struct ixgbe_dma_alloc txdma; 333 volatile u16 tx_avail; 334 u16 next_avail_desc; 335 u16 next_to_clean; 336 u16 num_desc; 337 u32 txd_cmd; 338 bus_dma_tag_t txtag; 339 char mtx_name[16]; 340 struct buf_ring *br; 341 struct task txq_task; 342 343 /* Flow Director */ 344 u16 atr_sample; 345 u16 atr_count; 346 347 u32 bytes; /* used for AIM */ 348 u32 packets; 349 /* Soft Stats */ 350 unsigned long tso_tx; 351 unsigned long no_tx_map_avail; 352 unsigned long no_tx_dma_setup; 353 u64 no_desc_avail; 354 u64 total_packets; 355}; 356 357 358/* 359 * The Receive ring, one per rx queue 360 */ 361struct rx_ring { 362 struct adapter *adapter; 363 struct mtx rx_mtx; 364 u32 me; 365 u32 tail; 366 union ixgbe_adv_rx_desc *rx_base; 367 struct ixgbe_dma_alloc rxdma; 368 struct lro_ctrl lro; 369 bool lro_enabled; 370 bool hw_rsc; 371 bool vtag_strip; 372 u16 next_to_refresh; 373 u16 next_to_check; 374 u16 num_desc; 375 u16 mbuf_sz; 376 char mtx_name[16]; 377 struct ixgbe_rx_buf *rx_buffers; 378 bus_dma_tag_t ptag; 379 380 u32 bytes; /* Used for AIM calc */ 381 u32 packets; 382 383 /* Soft stats */ 384 u64 rx_irq; 385 u64 rx_copies; 386 u64 rx_packets; 387 u64 rx_bytes; 388 u64 rx_discarded; 389 u64 rsc_num; 390 391 /* Flow Director */ 392 u64 flm; 393}; 394 395#define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ 396 397struct ixgbe_vf { 398 u_int pool; 399 u_int rar_index; 400 u_int max_frame_size; 401 uint32_t flags; 402 uint8_t ether_addr[ETHER_ADDR_LEN]; 403 uint16_t mc_hash[IXGBE_MAX_VF_MC]; 404 uint16_t num_mc_hashes; 405 uint16_t default_vlan; 406 uint16_t vlan_tag; 407 uint16_t api_ver; 408}; 409 410/* Our adapter structure */ 411struct adapter { 412 struct ixgbe_hw hw; 413 struct ixgbe_osdep osdep; 414 415 struct device *dev; 416 struct ifnet *ifp; 417 418 struct resource *pci_mem; 419 struct resource *msix_mem; 420 421 /* 422 * Interrupt resources: this set is 423 * either used for legacy, or for Link 424 * when doing MSI-X 425 */ 426 void *tag; 427 struct resource *res; 428 429 struct ifmedia media; 430 struct callout timer; 431 int link_rid; 432 int if_flags; 433 434 struct mtx core_mtx; 435 436 eventhandler_tag vlan_attach; 437 eventhandler_tag vlan_detach; 438 439 u16 num_vlans; 440 u16 num_queues; 441 442 /* 443 * Shadow VFTA table, this is needed because 444 * the real vlan filter table gets cleared during 445 * a soft reset and the driver needs to be able 446 * to repopulate it. 447 */ 448 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 449 450 /* Info about the interface */ 451 int advertise; /* link speeds */ 452 bool enable_aim; /* adaptive interrupt moderation */ 453 bool link_active; 454 u16 max_frame_size; 455 u16 num_segs; 456 u32 link_speed; 457 bool link_up; 458 u32 vector; 459 u16 dmac; 460 u32 phy_layer; 461 462 /* Power management-related */ 463 bool wol_support; 464 u32 wufc; 465 466 /* Mbuf cluster size */ 467 u32 rx_mbuf_sz; 468 469 /* Support for pluggable optics */ 470 bool sfp_probe; 471 struct task link_task; /* Link tasklet */ 472 struct task mod_task; /* SFP tasklet */ 473 struct task msf_task; /* Multispeed Fiber */ 474 struct task mbx_task; /* VF -> PF mailbox interrupt */ 475 476 /* Flow Director */ 477 int fdir_reinit; 478 struct task fdir_task; 479 480 struct task phy_task; /* PHY intr tasklet */ 481 struct taskqueue *tq; 482 483 /* 484 * Queues: 485 * This is the irq holder, it has 486 * and RX/TX pair or rings associated 487 * with it. 488 */ 489 struct ix_queue *queues; 490 491 /* 492 * Transmit rings 493 * Allocated at run time, an array of rings 494 */ 495 struct tx_ring *tx_rings; 496 u32 num_tx_desc; 497 u32 tx_process_limit; 498 499 /* 500 * Receive rings 501 * Allocated at run time, an array of rings 502 */ 503 struct rx_ring *rx_rings; 504 u64 active_queues; 505 u32 num_rx_desc; 506 u32 rx_process_limit; 507 508 /* Multicast array memory */ 509 struct ixgbe_mc_addr *mta; 510 511 /* SR-IOV */ 512 int iov_mode; 513 int num_vfs; 514 int pool; 515 struct ixgbe_vf *vfs; 516 517 /* Bypass */ 518 struct ixgbe_bp_data bypass; 519 520 /* Netmap */ 521 void (*init_locked)(struct adapter *); 522 void (*stop_locked)(void *); 523 524 /* Misc stats maintained by the driver */ 525 unsigned long dropped_pkts; 526 unsigned long mbuf_defrag_failed; 527 unsigned long mbuf_header_failed; 528 unsigned long mbuf_packet_failed; 529 unsigned long watchdog_events; 530 unsigned long link_irq; 531 struct ixgbevf_hw_stats stats_vf; 532#if __FreeBSD_version >= 1100036 533 /* counter(9) stats */ 534 u64 ipackets; 535 u64 ierrors; 536 u64 opackets; 537 u64 oerrors; 538 u64 ibytes; 539 u64 obytes; 540 u64 imcasts; 541 u64 omcasts; 542 u64 iqdrops; 543 u64 noproto; 544#endif 545 /* Feature capable/enabled flags. See ixgbe_features.h */ 546 u32 feat_cap; 547 u32 feat_en; 548}; 549 550 551/* Precision Time Sync (IEEE 1588) defines */ 552#define ETHERTYPE_IEEE1588 0x88F7 553#define PICOSECS_PER_TICK 20833 554#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 555#define IXGBE_ADVTXD_TSTAMP 0x00080000 556 557 558#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 559 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 560#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 561#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 562#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 563#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 564#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 565#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 566#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 567#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 568#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 569#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 570#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 571#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 572 573/* For backward compatibility */ 574#if !defined(PCIER_LINK_STA) 575#define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA 576#endif 577 578/* Stats macros */ 579#if __FreeBSD_version >= 1100036 580#define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) 581#define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count) 582#define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count) 583#define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count) 584#define IXGBE_SET_COLLISIONS(sc, count) 585#define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count) 586#define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count) 587#define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count) 588#define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count) 589#define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count) 590#else 591#define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count) 592#define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count) 593#define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count) 594#define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count) 595#define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count) 596#define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count) 597#define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count) 598#define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count) 599#define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count) 600#define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count) 601#endif 602 603/* External PHY register addresses */ 604#define IXGBE_PHY_CURRENT_TEMP 0xC820 605#define IXGBE_PHY_OVERTEMP_STATUS 0xC830 606 607/* Sysctl help messages; displayed with sysctl -d */ 608#define IXGBE_SYSCTL_DESC_ADV_SPEED \ 609 "\nControl advertised link speed using these flags:\n" \ 610 "\t0x1 - advertise 100M\n" \ 611 "\t0x2 - advertise 1G\n" \ 612 "\t0x4 - advertise 10G\n" \ 613 "\t0x8 - advertise 10M\n\n" \ 614 "\t100M and 10M are only supported on certain adapters.\n" 615 616#define IXGBE_SYSCTL_DESC_SET_FC \ 617 "\nSet flow control mode using these values:\n" \ 618 "\t0 - off\n" \ 619 "\t1 - rx pause\n" \ 620 "\t2 - tx pause\n" \ 621 "\t3 - tx and rx pause" 622 623/* Workaround to make 8.0 buildable */ 624#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 625static __inline int 626drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 627{ 628#ifdef ALTQ 629 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 630 return (1); 631#endif 632 return (!buf_ring_empty(br)); 633} 634#endif 635 636/* 637 * Find the number of unrefreshed RX descriptors 638 */ 639static inline u16 640ixgbe_rx_unrefreshed(struct rx_ring *rxr) 641{ 642 if (rxr->next_to_check > rxr->next_to_refresh) 643 return (rxr->next_to_check - rxr->next_to_refresh - 1); 644 else 645 return ((rxr->num_desc + rxr->next_to_check) - 646 rxr->next_to_refresh - 1); 647} 648 649static inline int 650ixgbe_legacy_ring_empty(struct ifnet *ifp, struct buf_ring *dummy) 651{ 652 UNREFERENCED_1PARAMETER(dummy); 653 654 return IFQ_DRV_IS_EMPTY(&ifp->if_snd); 655} 656 657/* 658 * This checks for a zero mac addr, something that will be likely 659 * unless the Admin on the Host has created one. 660 */ 661static inline bool 662ixv_check_ether_addr(u8 *addr) 663{ 664 bool status = TRUE; 665 666 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && 667 addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) 668 status = FALSE; 669 670 return (status); 671} 672 673/* Shared Prototypes */ 674void ixv_legacy_start(struct ifnet *); 675int ixv_legacy_start_locked(struct ifnet *, struct tx_ring *); 676int ixv_mq_start(struct ifnet *, struct mbuf *); 677int ixv_mq_start_locked(struct ifnet *, struct tx_ring *); 678void ixv_qflush(struct ifnet *); 679void ixv_deferred_mq_start(void *, int); 680void ixv_init_locked(struct adapter *); 681 682int ixv_allocate_queues(struct adapter *); 683int ixv_setup_transmit_structures(struct adapter *); 684void ixv_free_transmit_structures(struct adapter *); 685int ixv_setup_receive_structures(struct adapter *); 686void ixv_free_receive_structures(struct adapter *); 687void ixv_txeof(struct tx_ring *); 688bool ixv_rxeof(struct ix_queue *); 689 690#include "ixv_rss.h" 691#include "ixv_netmap.h" 692 693#endif /* _IXGBE_H_ */ 694