ixgbe_osdep.h revision 283620 
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33/*$FreeBSD: stable/10/sys/dev/ixgbe/ixgbe_osdep.h 283620 2015-05-27 17:44:11Z erj $*/
34
35#ifndef _IXGBE_OS_H_
36#define _IXGBE_OS_H_
37
38#include <sys/types.h>
39#include <sys/param.h>
40#include <sys/endian.h>
41#include <sys/systm.h>
42#include <sys/mbuf.h>
43#include <sys/protosw.h>
44#include <sys/socket.h>
45#include <sys/malloc.h>
46#include <sys/kernel.h>
47#include <sys/bus.h>
48#include <machine/bus.h>
49#include <sys/rman.h>
50#include <machine/resource.h>
51#include <vm/vm.h>
52#include <vm/pmap.h>
53#include <machine/clock.h>
54#include <dev/pci/pcivar.h>
55#include <dev/pci/pcireg.h>
56
57#define ASSERT(x) if(!(x)) panic("IXGBE: x")
58#define EWARN(H, W, S) printf(W)
59
60/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
61#define usec_delay(x) DELAY(x)
62#define msec_delay(x) DELAY(1000*(x))
63
64#define DBG 0
65#define MSGOUT(S, A, B)     printf(S "\n", A, B)
66#define DEBUGFUNC(F)        DEBUGOUT(F);
67#if DBG
68	#define DEBUGOUT(S)         printf(S "\n")
69	#define DEBUGOUT1(S,A)      printf(S "\n",A)
70	#define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
71	#define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
72	#define DEBUGOUT4(S,A,B,C,D)  printf(S "\n",A,B,C,D)
73	#define DEBUGOUT5(S,A,B,C,D,E)  printf(S "\n",A,B,C,D,E)
74	#define DEBUGOUT6(S,A,B,C,D,E,F)  printf(S "\n",A,B,C,D,E,F)
75	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
76	#define ERROR_REPORT1(S,A)      printf(S "\n",A)
77	#define ERROR_REPORT2(S,A,B)    printf(S "\n",A,B)
78	#define ERROR_REPORT3(S,A,B,C)  printf(S "\n",A,B,C)
79#else
80	#define DEBUGOUT(S)
81	#define DEBUGOUT1(S,A)
82	#define DEBUGOUT2(S,A,B)
83	#define DEBUGOUT3(S,A,B,C)
84	#define DEBUGOUT4(S,A,B,C,D)
85	#define DEBUGOUT5(S,A,B,C,D,E)
86	#define DEBUGOUT6(S,A,B,C,D,E,F)
87	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
88
89	#define ERROR_REPORT1(S,A)
90	#define ERROR_REPORT2(S,A,B)
91	#define ERROR_REPORT3(S,A,B,C)
92#endif
93
94#define FALSE               0
95#define false               0 /* shared code requires this */
96#define TRUE                1
97#define true                1
98#define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
99#define PCI_COMMAND_REGISTER            PCIR_COMMAND
100
101/* Shared code dropped this define.. */
102#define IXGBE_INTEL_VENDOR_ID		0x8086
103
104/* Bunch of defines for shared code bogosity */
105#define UNREFERENCED_PARAMETER(_p)
106#define UNREFERENCED_1PARAMETER(_p)
107#define UNREFERENCED_2PARAMETER(_p, _q)
108#define UNREFERENCED_3PARAMETER(_p, _q, _r)
109#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
110
111#define IXGBE_NTOHL(_i)	ntohl(_i)
112#define IXGBE_NTOHS(_i)	ntohs(_i)
113
114/* XXX these need to be revisited */
115#define IXGBE_CPU_TO_LE32 htole32
116#define IXGBE_LE32_TO_CPUS(x)
117#define IXGBE_CPU_TO_BE16 htobe16
118#define IXGBE_CPU_TO_BE32 htobe32
119
120typedef uint8_t		u8;
121typedef int8_t		s8;
122typedef uint16_t	u16;
123typedef int16_t		s16;
124typedef uint32_t	u32;
125typedef int32_t		s32;
126typedef uint64_t	u64;
127#ifndef __bool_true_false_are_defined
128typedef boolean_t	bool;
129#endif
130
131/* shared code requires this */
132#define __le16  u16
133#define __le32  u32
134#define __le64  u64
135#define __be16  u16
136#define __be32  u32
137#define __be64  u64
138
139#define le16_to_cpu
140
141#if __FreeBSD_version < 800000
142#if defined(__i386__) || defined(__amd64__)
143#define mb()	__asm volatile("mfence" ::: "memory")
144#define wmb()	__asm volatile("sfence" ::: "memory")
145#define rmb()	__asm volatile("lfence" ::: "memory")
146#else
147#define mb()
148#define rmb()
149#define wmb()
150#endif
151#endif
152
153#if defined(__i386__) || defined(__amd64__)
154static __inline
155void prefetch(void *x)
156{
157	__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
158}
159#else
160#define prefetch(x)
161#endif
162
163/*
164 * Optimized bcopy thanks to Luigi Rizzo's investigative work.  Assumes
165 * non-overlapping regions and 32-byte padding on both src and dst.
166 */
167static __inline int
168ixgbe_bcopy(void *_src, void *_dst, int l)
169{
170	uint64_t *src = _src;
171	uint64_t *dst = _dst;
172
173	for (; l > 0; l -= 32) {
174		*dst++ = *src++;
175		*dst++ = *src++;
176		*dst++ = *src++;
177		*dst++ = *src++;
178	}
179	return (0);
180}
181
182struct ixgbe_osdep
183{
184	bus_space_tag_t    mem_bus_space_tag;
185	bus_space_handle_t mem_bus_space_handle;
186	struct device     *dev;
187};
188
189/* These routines are needed by the shared code */
190struct ixgbe_hw;
191extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
192#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
193
194extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
195#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
196
197#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
198
199#define IXGBE_READ_REG(a, reg) (\
200   bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
201                     ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
202                     reg))
203
204#define IXGBE_WRITE_REG(a, reg, value) (\
205   bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
206                     ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
207                     reg, value))
208
209
210#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
211   bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
212                     ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
213                     (reg + ((offset) << 2))))
214
215#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
216      bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
217                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
218                      (reg + ((offset) << 2)), value))
219
220
221#endif /* _IXGBE_OS_H_ */
222