if_ix.c revision 295524
1/****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: stable/10/sys/dev/ixgbe/if_ix.c 295524 2016-02-11 16:16:10Z sbruno $*/ 34 35 36#ifndef IXGBE_STANDALONE_BUILD 37#include "opt_inet.h" 38#include "opt_inet6.h" 39#endif 40 41#include "ixgbe.h" 42 43#ifdef RSS 44#include <net/rss_config.h> 45#include <netinet/in_rss.h> 46#endif 47 48/********************************************************************* 49 * Driver version 50 *********************************************************************/ 51char ixgbe_driver_version[] = "3.1.13-k"; 52 53 54/********************************************************************* 55 * PCI Device ID Table 56 * 57 * Used by probe to select devices to load on 58 * Last field stores an index into ixgbe_strings 59 * Last entry must be all 0s 60 * 61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 62 *********************************************************************/ 63 64static ixgbe_vendor_info_t ixgbe_vendor_info_array[] = 65{ 66 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0}, 67 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0}, 68 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0}, 69 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0}, 70 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0}, 71 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0}, 72 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0}, 73 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0}, 74 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0}, 75 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0}, 76 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0}, 77 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0}, 78 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0}, 79 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0}, 80 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0}, 81 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0}, 82 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0}, 83 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0}, 84 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0}, 85 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0}, 86 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0}, 87 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0}, 88 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0}, 89 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0}, 90 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0}, 91 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0}, 92 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0}, 93 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0}, 94 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0}, 95 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0}, 96 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0}, 97 {IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0}, 98 /* required last entry */ 99 {0, 0, 0, 0, 0} 100}; 101 102/********************************************************************* 103 * Table of branding strings 104 *********************************************************************/ 105 106static char *ixgbe_strings[] = { 107 "Intel(R) PRO/10GbE PCI-Express Network Driver" 108}; 109 110/********************************************************************* 111 * Function prototypes 112 *********************************************************************/ 113static int ixgbe_probe(device_t); 114static int ixgbe_attach(device_t); 115static int ixgbe_detach(device_t); 116static int ixgbe_shutdown(device_t); 117static int ixgbe_suspend(device_t); 118static int ixgbe_resume(device_t); 119static int ixgbe_ioctl(struct ifnet *, u_long, caddr_t); 120static void ixgbe_init(void *); 121static void ixgbe_init_locked(struct adapter *); 122static void ixgbe_stop(void *); 123#if __FreeBSD_version >= 1100036 124static uint64_t ixgbe_get_counter(struct ifnet *, ift_counter); 125#endif 126static void ixgbe_add_media_types(struct adapter *); 127static void ixgbe_media_status(struct ifnet *, struct ifmediareq *); 128static int ixgbe_media_change(struct ifnet *); 129static void ixgbe_identify_hardware(struct adapter *); 130static int ixgbe_allocate_pci_resources(struct adapter *); 131static void ixgbe_get_slot_info(struct adapter *); 132static int ixgbe_allocate_msix(struct adapter *); 133static int ixgbe_allocate_legacy(struct adapter *); 134static int ixgbe_setup_msix(struct adapter *); 135static void ixgbe_free_pci_resources(struct adapter *); 136static void ixgbe_local_timer(void *); 137static int ixgbe_setup_interface(device_t, struct adapter *); 138static void ixgbe_config_gpie(struct adapter *); 139static void ixgbe_config_dmac(struct adapter *); 140static void ixgbe_config_delay_values(struct adapter *); 141static void ixgbe_config_link(struct adapter *); 142static void ixgbe_check_wol_support(struct adapter *); 143static int ixgbe_setup_low_power_mode(struct adapter *); 144static void ixgbe_rearm_queues(struct adapter *, u64); 145 146static void ixgbe_initialize_transmit_units(struct adapter *); 147static void ixgbe_initialize_receive_units(struct adapter *); 148static void ixgbe_enable_rx_drop(struct adapter *); 149static void ixgbe_disable_rx_drop(struct adapter *); 150static void ixgbe_initialize_rss_mapping(struct adapter *); 151 152static void ixgbe_enable_intr(struct adapter *); 153static void ixgbe_disable_intr(struct adapter *); 154static void ixgbe_update_stats_counters(struct adapter *); 155static void ixgbe_set_promisc(struct adapter *); 156static void ixgbe_set_multi(struct adapter *); 157static void ixgbe_update_link_status(struct adapter *); 158static void ixgbe_set_ivar(struct adapter *, u8, u8, s8); 159static void ixgbe_configure_ivars(struct adapter *); 160static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *); 161 162static void ixgbe_setup_vlan_hw_support(struct adapter *); 163static void ixgbe_register_vlan(void *, struct ifnet *, u16); 164static void ixgbe_unregister_vlan(void *, struct ifnet *, u16); 165 166static void ixgbe_add_device_sysctls(struct adapter *); 167static void ixgbe_add_hw_stats(struct adapter *); 168 169/* Sysctl handlers */ 170static void ixgbe_set_sysctl_value(struct adapter *, const char *, 171 const char *, int *, int); 172static int ixgbe_set_flowcntl(SYSCTL_HANDLER_ARGS); 173static int ixgbe_set_advertise(SYSCTL_HANDLER_ARGS); 174static int ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS); 175static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS); 176static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS); 177static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS); 178#ifdef IXGBE_DEBUG 179static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS); 180static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS); 181#endif 182static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS); 183static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS); 184static int ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS); 185static int ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS); 186static int ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS); 187static int ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS); 188static int ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS); 189 190/* Support for pluggable optic modules */ 191static bool ixgbe_sfp_probe(struct adapter *); 192static void ixgbe_setup_optics(struct adapter *); 193 194/* Legacy (single vector interrupt handler */ 195static void ixgbe_legacy_irq(void *); 196 197/* The MSI/X Interrupt handlers */ 198static void ixgbe_msix_que(void *); 199static void ixgbe_msix_link(void *); 200 201/* Deferred interrupt tasklets */ 202static void ixgbe_handle_que(void *, int); 203static void ixgbe_handle_link(void *, int); 204static void ixgbe_handle_msf(void *, int); 205static void ixgbe_handle_mod(void *, int); 206static void ixgbe_handle_phy(void *, int); 207 208#ifdef IXGBE_FDIR 209static void ixgbe_reinit_fdir(void *, int); 210#endif 211 212#ifdef PCI_IOV 213static void ixgbe_ping_all_vfs(struct adapter *); 214static void ixgbe_handle_mbx(void *, int); 215static int ixgbe_init_iov(device_t, u16, const nvlist_t *); 216static void ixgbe_uninit_iov(device_t); 217static int ixgbe_add_vf(device_t, u16, const nvlist_t *); 218static void ixgbe_initialize_iov(struct adapter *); 219static void ixgbe_recalculate_max_frame(struct adapter *); 220static void ixgbe_init_vf(struct adapter *, struct ixgbe_vf *); 221#endif /* PCI_IOV */ 222 223 224/********************************************************************* 225 * FreeBSD Device Interface Entry Points 226 *********************************************************************/ 227 228static device_method_t ix_methods[] = { 229 /* Device interface */ 230 DEVMETHOD(device_probe, ixgbe_probe), 231 DEVMETHOD(device_attach, ixgbe_attach), 232 DEVMETHOD(device_detach, ixgbe_detach), 233 DEVMETHOD(device_shutdown, ixgbe_shutdown), 234 DEVMETHOD(device_suspend, ixgbe_suspend), 235 DEVMETHOD(device_resume, ixgbe_resume), 236#ifdef PCI_IOV 237 DEVMETHOD(pci_iov_init, ixgbe_init_iov), 238 DEVMETHOD(pci_iov_uninit, ixgbe_uninit_iov), 239 DEVMETHOD(pci_iov_add_vf, ixgbe_add_vf), 240#endif /* PCI_IOV */ 241 DEVMETHOD_END 242}; 243 244static driver_t ix_driver = { 245 "ix", ix_methods, sizeof(struct adapter), 246}; 247 248devclass_t ix_devclass; 249DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0); 250 251MODULE_DEPEND(ix, pci, 1, 1, 1); 252MODULE_DEPEND(ix, ether, 1, 1, 1); 253#ifdef DEV_NETMAP 254MODULE_DEPEND(ix, netmap, 1, 1, 1); 255#endif /* DEV_NETMAP */ 256 257/* 258** TUNEABLE PARAMETERS: 259*/ 260 261static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD, 0, 262 "IXGBE driver parameters"); 263 264/* 265** AIM: Adaptive Interrupt Moderation 266** which means that the interrupt rate 267** is varied over time based on the 268** traffic for that interrupt vector 269*/ 270static int ixgbe_enable_aim = TRUE; 271TUNABLE_INT("hw.ix.enable_aim", &ixgbe_enable_aim); 272SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 0, 273 "Enable adaptive interrupt moderation"); 274 275static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY); 276TUNABLE_INT("hw.ix.max_interrupt_rate", &ixgbe_max_interrupt_rate); 277SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN, 278 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second"); 279 280/* How many packets rxeof tries to clean at a time */ 281static int ixgbe_rx_process_limit = 256; 282TUNABLE_INT("hw.ix.rx_process_limit", &ixgbe_rx_process_limit); 283SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, 284 &ixgbe_rx_process_limit, 0, 285 "Maximum number of received packets to process at a time," 286 "-1 means unlimited"); 287 288/* How many packets txeof tries to clean at a time */ 289static int ixgbe_tx_process_limit = 256; 290TUNABLE_INT("hw.ix.tx_process_limit", &ixgbe_tx_process_limit); 291SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN, 292 &ixgbe_tx_process_limit, 0, 293 "Maximum number of sent packets to process at a time," 294 "-1 means unlimited"); 295 296/* 297** Smart speed setting, default to on 298** this only works as a compile option 299** right now as its during attach, set 300** this to 'ixgbe_smart_speed_off' to 301** disable. 302*/ 303static int ixgbe_smart_speed = ixgbe_smart_speed_on; 304 305/* 306 * MSIX should be the default for best performance, 307 * but this allows it to be forced off for testing. 308 */ 309static int ixgbe_enable_msix = 1; 310TUNABLE_INT("hw.ix.enable_msix", &ixgbe_enable_msix); 311SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0, 312 "Enable MSI-X interrupts"); 313 314/* 315 * Number of Queues, can be set to 0, 316 * it then autoconfigures based on the 317 * number of cpus with a max of 8. This 318 * can be overriden manually here. 319 */ 320static int ixgbe_num_queues = 0; 321TUNABLE_INT("hw.ix.num_queues", &ixgbe_num_queues); 322SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0, 323 "Number of queues to configure, 0 indicates autoconfigure"); 324 325/* 326** Number of TX descriptors per ring, 327** setting higher than RX as this seems 328** the better performing choice. 329*/ 330static int ixgbe_txd = PERFORM_TXD; 331TUNABLE_INT("hw.ix.txd", &ixgbe_txd); 332SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0, 333 "Number of transmit descriptors per queue"); 334 335/* Number of RX descriptors per ring */ 336static int ixgbe_rxd = PERFORM_RXD; 337TUNABLE_INT("hw.ix.rxd", &ixgbe_rxd); 338SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0, 339 "Number of receive descriptors per queue"); 340 341/* 342** Defining this on will allow the use 343** of unsupported SFP+ modules, note that 344** doing so you are on your own :) 345*/ 346static int allow_unsupported_sfp = FALSE; 347TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp); 348 349/* Keep running tab on them for sanity check */ 350static int ixgbe_total_ports; 351 352#ifdef IXGBE_FDIR 353/* 354** Flow Director actually 'steals' 355** part of the packet buffer as its 356** filter pool, this variable controls 357** how much it uses: 358** 0 = 64K, 1 = 128K, 2 = 256K 359*/ 360static int fdir_pballoc = 1; 361#endif 362 363#ifdef DEV_NETMAP 364/* 365 * The #ifdef DEV_NETMAP / #endif blocks in this file are meant to 366 * be a reference on how to implement netmap support in a driver. 367 * Additional comments are in ixgbe_netmap.h . 368 * 369 * <dev/netmap/ixgbe_netmap.h> contains functions for netmap support 370 * that extend the standard driver. 371 */ 372#include <dev/netmap/ixgbe_netmap.h> 373#endif /* DEV_NETMAP */ 374 375static MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); 376 377/********************************************************************* 378 * Device identification routine 379 * 380 * ixgbe_probe determines if the driver should be loaded on 381 * adapter based on PCI vendor/device id of the adapter. 382 * 383 * return BUS_PROBE_DEFAULT on success, positive on failure 384 *********************************************************************/ 385 386static int 387ixgbe_probe(device_t dev) 388{ 389 ixgbe_vendor_info_t *ent; 390 391 u16 pci_vendor_id = 0; 392 u16 pci_device_id = 0; 393 u16 pci_subvendor_id = 0; 394 u16 pci_subdevice_id = 0; 395 char adapter_name[256]; 396 397 INIT_DEBUGOUT("ixgbe_probe: begin"); 398 399 pci_vendor_id = pci_get_vendor(dev); 400 if (pci_vendor_id != IXGBE_INTEL_VENDOR_ID) 401 return (ENXIO); 402 403 pci_device_id = pci_get_device(dev); 404 pci_subvendor_id = pci_get_subvendor(dev); 405 pci_subdevice_id = pci_get_subdevice(dev); 406 407 ent = ixgbe_vendor_info_array; 408 while (ent->vendor_id != 0) { 409 if ((pci_vendor_id == ent->vendor_id) && 410 (pci_device_id == ent->device_id) && 411 412 ((pci_subvendor_id == ent->subvendor_id) || 413 (ent->subvendor_id == 0)) && 414 415 ((pci_subdevice_id == ent->subdevice_id) || 416 (ent->subdevice_id == 0))) { 417 sprintf(adapter_name, "%s, Version - %s", 418 ixgbe_strings[ent->index], 419 ixgbe_driver_version); 420 device_set_desc_copy(dev, adapter_name); 421 ++ixgbe_total_ports; 422 return (BUS_PROBE_DEFAULT); 423 } 424 ent++; 425 } 426 return (ENXIO); 427} 428 429/********************************************************************* 430 * Device initialization routine 431 * 432 * The attach entry point is called when the driver is being loaded. 433 * This routine identifies the type of hardware, allocates all resources 434 * and initializes the hardware. 435 * 436 * return 0 on success, positive on failure 437 *********************************************************************/ 438 439static int 440ixgbe_attach(device_t dev) 441{ 442 struct adapter *adapter; 443 struct ixgbe_hw *hw; 444 int error = 0; 445 u16 csum; 446 u32 ctrl_ext; 447 448 INIT_DEBUGOUT("ixgbe_attach: begin"); 449 450 /* Allocate, clear, and link in our adapter structure */ 451 adapter = device_get_softc(dev); 452 adapter->dev = dev; 453 hw = &adapter->hw; 454 455#ifdef DEV_NETMAP 456 adapter->init_locked = ixgbe_init_locked; 457 adapter->stop_locked = ixgbe_stop; 458#endif 459 /* Core Lock Init*/ 460 IXGBE_CORE_LOCK_INIT(adapter, device_get_nameunit(dev)); 461 462 /* Set up the timer callout */ 463 callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0); 464 465 /* Determine hardware revision */ 466 ixgbe_identify_hardware(adapter); 467 468 /* Do base PCI setup - map BAR0 */ 469 if (ixgbe_allocate_pci_resources(adapter)) { 470 device_printf(dev, "Allocation of PCI resources failed\n"); 471 error = ENXIO; 472 goto err_out; 473 } 474 475 /* Sysctls for limiting the amount of work done in the taskqueues */ 476 ixgbe_set_sysctl_value(adapter, "rx_processing_limit", 477 "max number of rx packets to process", 478 &adapter->rx_process_limit, ixgbe_rx_process_limit); 479 480 ixgbe_set_sysctl_value(adapter, "tx_processing_limit", 481 "max number of tx packets to process", 482 &adapter->tx_process_limit, ixgbe_tx_process_limit); 483 484 /* Do descriptor calc and sanity checks */ 485 if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 || 486 ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) { 487 device_printf(dev, "TXD config issue, using default!\n"); 488 adapter->num_tx_desc = DEFAULT_TXD; 489 } else 490 adapter->num_tx_desc = ixgbe_txd; 491 492 /* 493 ** With many RX rings it is easy to exceed the 494 ** system mbuf allocation. Tuning nmbclusters 495 ** can alleviate this. 496 */ 497 if (nmbclusters > 0) { 498 int s; 499 s = (ixgbe_rxd * adapter->num_queues) * ixgbe_total_ports; 500 if (s > nmbclusters) { 501 device_printf(dev, "RX Descriptors exceed " 502 "system mbuf max, using default instead!\n"); 503 ixgbe_rxd = DEFAULT_RXD; 504 } 505 } 506 507 if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 || 508 ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) { 509 device_printf(dev, "RXD config issue, using default!\n"); 510 adapter->num_rx_desc = DEFAULT_RXD; 511 } else 512 adapter->num_rx_desc = ixgbe_rxd; 513 514 /* Allocate our TX/RX Queues */ 515 if (ixgbe_allocate_queues(adapter)) { 516 error = ENOMEM; 517 goto err_out; 518 } 519 520 /* Allocate multicast array memory. */ 521 adapter->mta = malloc(sizeof(*adapter->mta) * 522 MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT); 523 if (adapter->mta == NULL) { 524 device_printf(dev, "Can not allocate multicast setup array\n"); 525 error = ENOMEM; 526 goto err_late; 527 } 528 529 /* Initialize the shared code */ 530 hw->allow_unsupported_sfp = allow_unsupported_sfp; 531 error = ixgbe_init_shared_code(hw); 532 if (error == IXGBE_ERR_SFP_NOT_PRESENT) { 533 /* 534 ** No optics in this port, set up 535 ** so the timer routine will probe 536 ** for later insertion. 537 */ 538 adapter->sfp_probe = TRUE; 539 error = 0; 540 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) { 541 device_printf(dev, "Unsupported SFP+ module detected!\n"); 542 error = EIO; 543 goto err_late; 544 } else if (error) { 545 device_printf(dev, "Unable to initialize the shared code\n"); 546 error = EIO; 547 goto err_late; 548 } 549 550 /* Make sure we have a good EEPROM before we read from it */ 551 if (ixgbe_validate_eeprom_checksum(&adapter->hw, &csum) < 0) { 552 device_printf(dev, "The EEPROM Checksum Is Not Valid\n"); 553 error = EIO; 554 goto err_late; 555 } 556 557 error = ixgbe_init_hw(hw); 558 switch (error) { 559 case IXGBE_ERR_EEPROM_VERSION: 560 device_printf(dev, "This device is a pre-production adapter/" 561 "LOM. Please be aware there may be issues associated " 562 "with your hardware.\nIf you are experiencing problems " 563 "please contact your Intel or hardware representative " 564 "who provided you with this hardware.\n"); 565 break; 566 case IXGBE_ERR_SFP_NOT_SUPPORTED: 567 device_printf(dev, "Unsupported SFP+ Module\n"); 568 error = EIO; 569 goto err_late; 570 case IXGBE_ERR_SFP_NOT_PRESENT: 571 device_printf(dev, "No SFP+ Module found\n"); 572 /* falls thru */ 573 default: 574 break; 575 } 576 577 if ((adapter->msix > 1) && (ixgbe_enable_msix)) 578 error = ixgbe_allocate_msix(adapter); 579 else 580 error = ixgbe_allocate_legacy(adapter); 581 if (error) 582 goto err_late; 583 584 /* Setup OS specific network interface */ 585 if (ixgbe_setup_interface(dev, adapter) != 0) 586 goto err_late; 587 588 /* Initialize statistics */ 589 ixgbe_update_stats_counters(adapter); 590 591 /* Register for VLAN events */ 592 adapter->vlan_attach = EVENTHANDLER_REGISTER(vlan_config, 593 ixgbe_register_vlan, adapter, EVENTHANDLER_PRI_FIRST); 594 adapter->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig, 595 ixgbe_unregister_vlan, adapter, EVENTHANDLER_PRI_FIRST); 596 597 /* Check PCIE slot type/speed/width */ 598 ixgbe_get_slot_info(adapter); 599 600 /* Set an initial default flow control & dmac value */ 601 adapter->fc = ixgbe_fc_full; 602 adapter->dmac = 0; 603 adapter->eee_enabled = 0; 604 605#ifdef PCI_IOV 606 if ((hw->mac.type != ixgbe_mac_82598EB) && (adapter->msix > 1)) { 607 nvlist_t *pf_schema, *vf_schema; 608 609 hw->mbx.ops.init_params(hw); 610 pf_schema = pci_iov_schema_alloc_node(); 611 vf_schema = pci_iov_schema_alloc_node(); 612 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); 613 pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", 614 IOV_SCHEMA_HASDEFAULT, TRUE); 615 pci_iov_schema_add_bool(vf_schema, "allow-set-mac", 616 IOV_SCHEMA_HASDEFAULT, FALSE); 617 pci_iov_schema_add_bool(vf_schema, "allow-promisc", 618 IOV_SCHEMA_HASDEFAULT, FALSE); 619 error = pci_iov_attach(dev, pf_schema, vf_schema); 620 if (error != 0) { 621 device_printf(dev, 622 "Error %d setting up SR-IOV\n", error); 623 } 624 } 625#endif /* PCI_IOV */ 626 627 /* Check for certain supported features */ 628 ixgbe_check_wol_support(adapter); 629 630 /* Add sysctls */ 631 ixgbe_add_device_sysctls(adapter); 632 ixgbe_add_hw_stats(adapter); 633 634 /* let hardware know driver is loaded */ 635 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 636 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD; 637 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 638 639#ifdef DEV_NETMAP 640 ixgbe_netmap_attach(adapter); 641#endif /* DEV_NETMAP */ 642 INIT_DEBUGOUT("ixgbe_attach: end"); 643 return (0); 644 645err_late: 646 ixgbe_free_transmit_structures(adapter); 647 ixgbe_free_receive_structures(adapter); 648err_out: 649 if (adapter->ifp != NULL) 650 if_free(adapter->ifp); 651 ixgbe_free_pci_resources(adapter); 652 free(adapter->mta, M_DEVBUF); 653 return (error); 654} 655 656/********************************************************************* 657 * Device removal routine 658 * 659 * The detach entry point is called when the driver is being removed. 660 * This routine stops the adapter and deallocates all the resources 661 * that were allocated for driver operation. 662 * 663 * return 0 on success, positive on failure 664 *********************************************************************/ 665 666static int 667ixgbe_detach(device_t dev) 668{ 669 struct adapter *adapter = device_get_softc(dev); 670 struct ix_queue *que = adapter->queues; 671 struct tx_ring *txr = adapter->tx_rings; 672 u32 ctrl_ext; 673 674 INIT_DEBUGOUT("ixgbe_detach: begin"); 675 676 /* Make sure VLANS are not using driver */ 677 if (adapter->ifp->if_vlantrunk != NULL) { 678 device_printf(dev,"Vlan in use, detach first\n"); 679 return (EBUSY); 680 } 681 682#ifdef PCI_IOV 683 if (pci_iov_detach(dev) != 0) { 684 device_printf(dev, "SR-IOV in use; detach first.\n"); 685 return (EBUSY); 686 } 687#endif /* PCI_IOV */ 688 689 ether_ifdetach(adapter->ifp); 690 /* Stop the adapter */ 691 IXGBE_CORE_LOCK(adapter); 692 ixgbe_setup_low_power_mode(adapter); 693 IXGBE_CORE_UNLOCK(adapter); 694 695 for (int i = 0; i < adapter->num_queues; i++, que++, txr++) { 696 if (que->tq) { 697#ifndef IXGBE_LEGACY_TX 698 taskqueue_drain(que->tq, &txr->txq_task); 699#endif 700 taskqueue_drain(que->tq, &que->que_task); 701 taskqueue_free(que->tq); 702 } 703 } 704 705 /* Drain the Link queue */ 706 if (adapter->tq) { 707 taskqueue_drain(adapter->tq, &adapter->link_task); 708 taskqueue_drain(adapter->tq, &adapter->mod_task); 709 taskqueue_drain(adapter->tq, &adapter->msf_task); 710#ifdef PCI_IOV 711 taskqueue_drain(adapter->tq, &adapter->mbx_task); 712#endif 713 taskqueue_drain(adapter->tq, &adapter->phy_task); 714#ifdef IXGBE_FDIR 715 taskqueue_drain(adapter->tq, &adapter->fdir_task); 716#endif 717 taskqueue_free(adapter->tq); 718 } 719 720 /* let hardware know driver is unloading */ 721 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); 722 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD; 723 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext); 724 725 /* Unregister VLAN events */ 726 if (adapter->vlan_attach != NULL) 727 EVENTHANDLER_DEREGISTER(vlan_config, adapter->vlan_attach); 728 if (adapter->vlan_detach != NULL) 729 EVENTHANDLER_DEREGISTER(vlan_unconfig, adapter->vlan_detach); 730 731 callout_drain(&adapter->timer); 732#ifdef DEV_NETMAP 733 netmap_detach(adapter->ifp); 734#endif /* DEV_NETMAP */ 735 ixgbe_free_pci_resources(adapter); 736 bus_generic_detach(dev); 737 if_free(adapter->ifp); 738 739 ixgbe_free_transmit_structures(adapter); 740 ixgbe_free_receive_structures(adapter); 741 free(adapter->mta, M_DEVBUF); 742 743 IXGBE_CORE_LOCK_DESTROY(adapter); 744 return (0); 745} 746 747/********************************************************************* 748 * 749 * Shutdown entry point 750 * 751 **********************************************************************/ 752 753static int 754ixgbe_shutdown(device_t dev) 755{ 756 struct adapter *adapter = device_get_softc(dev); 757 int error = 0; 758 759 INIT_DEBUGOUT("ixgbe_shutdown: begin"); 760 761 IXGBE_CORE_LOCK(adapter); 762 error = ixgbe_setup_low_power_mode(adapter); 763 IXGBE_CORE_UNLOCK(adapter); 764 765 return (error); 766} 767 768/** 769 * Methods for going from: 770 * D0 -> D3: ixgbe_suspend 771 * D3 -> D0: ixgbe_resume 772 */ 773static int 774ixgbe_suspend(device_t dev) 775{ 776 struct adapter *adapter = device_get_softc(dev); 777 int error = 0; 778 779 INIT_DEBUGOUT("ixgbe_suspend: begin"); 780 781 IXGBE_CORE_LOCK(adapter); 782 783 error = ixgbe_setup_low_power_mode(adapter); 784 785 IXGBE_CORE_UNLOCK(adapter); 786 787 return (error); 788} 789 790static int 791ixgbe_resume(device_t dev) 792{ 793 struct adapter *adapter = device_get_softc(dev); 794 struct ifnet *ifp = adapter->ifp; 795 struct ixgbe_hw *hw = &adapter->hw; 796 u32 wus; 797 798 INIT_DEBUGOUT("ixgbe_resume: begin"); 799 800 IXGBE_CORE_LOCK(adapter); 801 802 /* Read & clear WUS register */ 803 wus = IXGBE_READ_REG(hw, IXGBE_WUS); 804 if (wus) 805 device_printf(dev, "Woken up by (WUS): %#010x\n", 806 IXGBE_READ_REG(hw, IXGBE_WUS)); 807 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 808 /* And clear WUFC until next low-power transition */ 809 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 810 811 /* 812 * Required after D3->D0 transition; 813 * will re-advertise all previous advertised speeds 814 */ 815 if (ifp->if_flags & IFF_UP) 816 ixgbe_init_locked(adapter); 817 818 IXGBE_CORE_UNLOCK(adapter); 819 820 return (0); 821} 822 823 824/********************************************************************* 825 * Ioctl entry point 826 * 827 * ixgbe_ioctl is called when the user wants to configure the 828 * interface. 829 * 830 * return 0 on success, positive on failure 831 **********************************************************************/ 832 833static int 834ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data) 835{ 836 struct adapter *adapter = ifp->if_softc; 837 struct ifreq *ifr = (struct ifreq *) data; 838#if defined(INET) || defined(INET6) 839 struct ifaddr *ifa = (struct ifaddr *)data; 840#endif 841 int error = 0; 842 bool avoid_reset = FALSE; 843 844 switch (command) { 845 846 case SIOCSIFADDR: 847#ifdef INET 848 if (ifa->ifa_addr->sa_family == AF_INET) 849 avoid_reset = TRUE; 850#endif 851#ifdef INET6 852 if (ifa->ifa_addr->sa_family == AF_INET6) 853 avoid_reset = TRUE; 854#endif 855 /* 856 ** Calling init results in link renegotiation, 857 ** so we avoid doing it when possible. 858 */ 859 if (avoid_reset) { 860 ifp->if_flags |= IFF_UP; 861 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 862 ixgbe_init(adapter); 863#ifdef INET 864 if (!(ifp->if_flags & IFF_NOARP)) 865 arp_ifinit(ifp, ifa); 866#endif 867 } else 868 error = ether_ioctl(ifp, command, data); 869 break; 870 case SIOCSIFMTU: 871 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)"); 872 if (ifr->ifr_mtu > IXGBE_MAX_MTU) { 873 error = EINVAL; 874 } else { 875 IXGBE_CORE_LOCK(adapter); 876 ifp->if_mtu = ifr->ifr_mtu; 877 adapter->max_frame_size = 878 ifp->if_mtu + IXGBE_MTU_HDR; 879 ixgbe_init_locked(adapter); 880#ifdef PCI_IOV 881 ixgbe_recalculate_max_frame(adapter); 882#endif 883 IXGBE_CORE_UNLOCK(adapter); 884 } 885 break; 886 case SIOCSIFFLAGS: 887 IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)"); 888 IXGBE_CORE_LOCK(adapter); 889 if (ifp->if_flags & IFF_UP) { 890 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 891 if ((ifp->if_flags ^ adapter->if_flags) & 892 (IFF_PROMISC | IFF_ALLMULTI)) { 893 ixgbe_set_promisc(adapter); 894 } 895 } else 896 ixgbe_init_locked(adapter); 897 } else 898 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 899 ixgbe_stop(adapter); 900 adapter->if_flags = ifp->if_flags; 901 IXGBE_CORE_UNLOCK(adapter); 902 break; 903 case SIOCADDMULTI: 904 case SIOCDELMULTI: 905 IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI"); 906 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 907 IXGBE_CORE_LOCK(adapter); 908 ixgbe_disable_intr(adapter); 909 ixgbe_set_multi(adapter); 910 ixgbe_enable_intr(adapter); 911 IXGBE_CORE_UNLOCK(adapter); 912 } 913 break; 914 case SIOCSIFMEDIA: 915 case SIOCGIFMEDIA: 916 IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); 917 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 918 break; 919 case SIOCSIFCAP: 920 { 921 IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)"); 922 923 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 924 if (!mask) 925 break; 926 927 /* HW cannot turn these on/off separately */ 928 if (mask & (IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6)) { 929 ifp->if_capenable ^= IFCAP_RXCSUM; 930 ifp->if_capenable ^= IFCAP_RXCSUM_IPV6; 931 } 932 if (mask & IFCAP_TXCSUM) 933 ifp->if_capenable ^= IFCAP_TXCSUM; 934 if (mask & IFCAP_TXCSUM_IPV6) 935 ifp->if_capenable ^= IFCAP_TXCSUM_IPV6; 936 if (mask & IFCAP_TSO4) 937 ifp->if_capenable ^= IFCAP_TSO4; 938 if (mask & IFCAP_TSO6) 939 ifp->if_capenable ^= IFCAP_TSO6; 940 if (mask & IFCAP_LRO) 941 ifp->if_capenable ^= IFCAP_LRO; 942 if (mask & IFCAP_VLAN_HWTAGGING) 943 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 944 if (mask & IFCAP_VLAN_HWFILTER) 945 ifp->if_capenable ^= IFCAP_VLAN_HWFILTER; 946 if (mask & IFCAP_VLAN_HWTSO) 947 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 948 949 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 950 IXGBE_CORE_LOCK(adapter); 951 ixgbe_init_locked(adapter); 952 IXGBE_CORE_UNLOCK(adapter); 953 } 954 VLAN_CAPABILITIES(ifp); 955 break; 956 } 957#if __FreeBSD_version >= 1002500 958 case SIOCGI2C: 959 { 960 struct ixgbe_hw *hw = &adapter->hw; 961 struct ifi2creq i2c; 962 int i; 963 IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)"); 964 error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); 965 if (error != 0) 966 break; 967 if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) { 968 error = EINVAL; 969 break; 970 } 971 if (i2c.len > sizeof(i2c.data)) { 972 error = EINVAL; 973 break; 974 } 975 976 for (i = 0; i < i2c.len; i++) 977 hw->phy.ops.read_i2c_byte(hw, i2c.offset + i, 978 i2c.dev_addr, &i2c.data[i]); 979 error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); 980 break; 981 } 982#endif 983 default: 984 IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)\n", (int)command); 985 error = ether_ioctl(ifp, command, data); 986 break; 987 } 988 989 return (error); 990} 991 992/* 993 * Set the various hardware offload abilities. 994 * 995 * This takes the ifnet's if_capenable flags (e.g. set by the user using 996 * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what 997 * mbuf offload flags the driver will understand. 998 */ 999static void 1000ixgbe_set_if_hwassist(struct adapter *adapter) 1001{ 1002 struct ifnet *ifp = adapter->ifp; 1003 1004 ifp->if_hwassist = 0; 1005#if __FreeBSD_version >= 1000000 1006 if (ifp->if_capenable & IFCAP_TSO4) 1007 ifp->if_hwassist |= CSUM_IP_TSO; 1008 if (ifp->if_capenable & IFCAP_TSO6) 1009 ifp->if_hwassist |= CSUM_IP6_TSO; 1010 if (ifp->if_capenable & IFCAP_TXCSUM) 1011 ifp->if_hwassist |= (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | 1012 CSUM_IP_SCTP); 1013 if (ifp->if_capenable & IFCAP_TXCSUM_IPV6) 1014 ifp->if_hwassist |= (CSUM_IP6_UDP | CSUM_IP6_TCP | 1015 CSUM_IP6_SCTP); 1016#else 1017 if (ifp->if_capenable & IFCAP_TSO) 1018 ifp->if_hwassist |= CSUM_TSO; 1019 if (ifp->if_capenable & IFCAP_TXCSUM) { 1020 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP); 1021 struct ixgbe_hw *hw = &adapter->hw; 1022 if (hw->mac.type != ixgbe_mac_82598EB) 1023 ifp->if_hwassist |= CSUM_SCTP; 1024 } 1025#endif 1026} 1027 1028/********************************************************************* 1029 * Init entry point 1030 * 1031 * This routine is used in two ways. It is used by the stack as 1032 * init entry point in network interface structure. It is also used 1033 * by the driver as a hw/sw initialization routine to get to a 1034 * consistent state. 1035 * 1036 * return 0 on success, positive on failure 1037 **********************************************************************/ 1038#define IXGBE_MHADD_MFS_SHIFT 16 1039 1040static void 1041ixgbe_init_locked(struct adapter *adapter) 1042{ 1043 struct ifnet *ifp = adapter->ifp; 1044 device_t dev = adapter->dev; 1045 struct ixgbe_hw *hw = &adapter->hw; 1046 struct tx_ring *txr; 1047 struct rx_ring *rxr; 1048 u32 txdctl, mhadd; 1049 u32 rxdctl, rxctrl; 1050 int err = 0; 1051#ifdef PCI_IOV 1052 enum ixgbe_iov_mode mode; 1053#endif 1054 1055 mtx_assert(&adapter->core_mtx, MA_OWNED); 1056 INIT_DEBUGOUT("ixgbe_init_locked: begin"); 1057 1058 hw->adapter_stopped = FALSE; 1059 ixgbe_stop_adapter(hw); 1060 callout_stop(&adapter->timer); 1061 1062#ifdef PCI_IOV 1063 mode = ixgbe_get_iov_mode(adapter); 1064 adapter->pool = ixgbe_max_vfs(mode); 1065 /* Queue indices may change with IOV mode */ 1066 for (int i = 0; i < adapter->num_queues; i++) { 1067 adapter->rx_rings[i].me = ixgbe_pf_que_index(mode, i); 1068 adapter->tx_rings[i].me = ixgbe_pf_que_index(mode, i); 1069 } 1070#endif 1071 /* reprogram the RAR[0] in case user changed it. */ 1072 ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV); 1073 1074 /* Get the latest mac address, User can use a LAA */ 1075 bcopy(IF_LLADDR(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 1076 ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1); 1077 hw->addr_ctrl.rar_used_count = 1; 1078 1079 /* Set hardware offload abilities from ifnet flags */ 1080 ixgbe_set_if_hwassist(adapter); 1081 1082 /* Prepare transmit descriptors and buffers */ 1083 if (ixgbe_setup_transmit_structures(adapter)) { 1084 device_printf(dev, "Could not setup transmit structures\n"); 1085 ixgbe_stop(adapter); 1086 return; 1087 } 1088 1089 ixgbe_init_hw(hw); 1090#ifdef PCI_IOV 1091 ixgbe_initialize_iov(adapter); 1092#endif 1093 ixgbe_initialize_transmit_units(adapter); 1094 1095 /* Setup Multicast table */ 1096 ixgbe_set_multi(adapter); 1097 1098 /* Determine the correct mbuf pool, based on frame size */ 1099 if (adapter->max_frame_size <= MCLBYTES) 1100 adapter->rx_mbuf_sz = MCLBYTES; 1101 else 1102 adapter->rx_mbuf_sz = MJUMPAGESIZE; 1103 1104 /* Prepare receive descriptors and buffers */ 1105 if (ixgbe_setup_receive_structures(adapter)) { 1106 device_printf(dev, "Could not setup receive structures\n"); 1107 ixgbe_stop(adapter); 1108 return; 1109 } 1110 1111 /* Configure RX settings */ 1112 ixgbe_initialize_receive_units(adapter); 1113 1114 /* Enable SDP & MSIX interrupts based on adapter */ 1115 ixgbe_config_gpie(adapter); 1116 1117 /* Set MTU size */ 1118 if (ifp->if_mtu > ETHERMTU) { 1119 /* aka IXGBE_MAXFRS on 82599 and newer */ 1120 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 1121 mhadd &= ~IXGBE_MHADD_MFS_MASK; 1122 mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 1123 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 1124 } 1125 1126 /* Now enable all the queues */ 1127 for (int i = 0; i < adapter->num_queues; i++) { 1128 txr = &adapter->tx_rings[i]; 1129 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); 1130 txdctl |= IXGBE_TXDCTL_ENABLE; 1131 /* Set WTHRESH to 8, burst writeback */ 1132 txdctl |= (8 << 16); 1133 /* 1134 * When the internal queue falls below PTHRESH (32), 1135 * start prefetching as long as there are at least 1136 * HTHRESH (1) buffers ready. The values are taken 1137 * from the Intel linux driver 3.8.21. 1138 * Prefetching enables tx line rate even with 1 queue. 1139 */ 1140 txdctl |= (32 << 0) | (1 << 8); 1141 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); 1142 } 1143 1144 for (int i = 0, j = 0; i < adapter->num_queues; i++) { 1145 rxr = &adapter->rx_rings[i]; 1146 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 1147 if (hw->mac.type == ixgbe_mac_82598EB) { 1148 /* 1149 ** PTHRESH = 21 1150 ** HTHRESH = 4 1151 ** WTHRESH = 8 1152 */ 1153 rxdctl &= ~0x3FFFFF; 1154 rxdctl |= 0x080420; 1155 } 1156 rxdctl |= IXGBE_RXDCTL_ENABLE; 1157 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); 1158 for (; j < 10; j++) { 1159 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & 1160 IXGBE_RXDCTL_ENABLE) 1161 break; 1162 else 1163 msec_delay(1); 1164 } 1165 wmb(); 1166#ifdef DEV_NETMAP 1167 /* 1168 * In netmap mode, we must preserve the buffers made 1169 * available to userspace before the if_init() 1170 * (this is true by default on the TX side, because 1171 * init makes all buffers available to userspace). 1172 * 1173 * netmap_reset() and the device specific routines 1174 * (e.g. ixgbe_setup_receive_rings()) map these 1175 * buffers at the end of the NIC ring, so here we 1176 * must set the RDT (tail) register to make sure 1177 * they are not overwritten. 1178 * 1179 * In this driver the NIC ring starts at RDH = 0, 1180 * RDT points to the last slot available for reception (?), 1181 * so RDT = num_rx_desc - 1 means the whole ring is available. 1182 */ 1183 if (ifp->if_capenable & IFCAP_NETMAP) { 1184 struct netmap_adapter *na = NA(adapter->ifp); 1185 struct netmap_kring *kring = &na->rx_rings[i]; 1186 int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); 1187 1188 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); 1189 } else 1190#endif /* DEV_NETMAP */ 1191 IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), adapter->num_rx_desc - 1); 1192 } 1193 1194 /* Enable Receive engine */ 1195 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 1196 if (hw->mac.type == ixgbe_mac_82598EB) 1197 rxctrl |= IXGBE_RXCTRL_DMBYPS; 1198 rxctrl |= IXGBE_RXCTRL_RXEN; 1199 ixgbe_enable_rx_dma(hw, rxctrl); 1200 1201 callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter); 1202 1203 /* Set up MSI/X routing */ 1204 if (ixgbe_enable_msix) { 1205 ixgbe_configure_ivars(adapter); 1206 /* Set up auto-mask */ 1207 if (hw->mac.type == ixgbe_mac_82598EB) 1208 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 1209 else { 1210 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 1211 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 1212 } 1213 } else { /* Simple settings for Legacy/MSI */ 1214 ixgbe_set_ivar(adapter, 0, 0, 0); 1215 ixgbe_set_ivar(adapter, 0, 0, 1); 1216 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); 1217 } 1218 1219#ifdef IXGBE_FDIR 1220 /* Init Flow director */ 1221 if (hw->mac.type != ixgbe_mac_82598EB) { 1222 u32 hdrm = 32 << fdir_pballoc; 1223 1224 hw->mac.ops.setup_rxpba(hw, 0, hdrm, PBA_STRATEGY_EQUAL); 1225 ixgbe_init_fdir_signature_82599(&adapter->hw, fdir_pballoc); 1226 } 1227#endif 1228 1229 /* 1230 * Check on any SFP devices that 1231 * need to be kick-started 1232 */ 1233 if (hw->phy.type == ixgbe_phy_none) { 1234 err = hw->phy.ops.identify(hw); 1235 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 1236 device_printf(dev, 1237 "Unsupported SFP+ module type was detected.\n"); 1238 return; 1239 } 1240 } 1241 1242 /* Set moderation on the Link interrupt */ 1243 IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR); 1244 1245 /* Configure Energy Efficient Ethernet for supported devices */ 1246 if (hw->mac.ops.setup_eee) { 1247 err = hw->mac.ops.setup_eee(hw, adapter->eee_enabled); 1248 if (err) 1249 device_printf(dev, "Error setting up EEE: %d\n", err); 1250 } 1251 1252 /* Config/Enable Link */ 1253 ixgbe_config_link(adapter); 1254 1255 /* Hardware Packet Buffer & Flow Control setup */ 1256 ixgbe_config_delay_values(adapter); 1257 1258 /* Initialize the FC settings */ 1259 ixgbe_start_hw(hw); 1260 1261 /* Set up VLAN support and filter */ 1262 ixgbe_setup_vlan_hw_support(adapter); 1263 1264 /* Setup DMA Coalescing */ 1265 ixgbe_config_dmac(adapter); 1266 1267 /* And now turn on interrupts */ 1268 ixgbe_enable_intr(adapter); 1269 1270#ifdef PCI_IOV 1271 /* Enable the use of the MBX by the VF's */ 1272 { 1273 u32 reg = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 1274 reg |= IXGBE_CTRL_EXT_PFRSTD; 1275 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, reg); 1276 } 1277#endif 1278 1279 /* Now inform the stack we're ready */ 1280 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1281 1282 return; 1283} 1284 1285static void 1286ixgbe_init(void *arg) 1287{ 1288 struct adapter *adapter = arg; 1289 1290 IXGBE_CORE_LOCK(adapter); 1291 ixgbe_init_locked(adapter); 1292 IXGBE_CORE_UNLOCK(adapter); 1293 return; 1294} 1295 1296static void 1297ixgbe_config_gpie(struct adapter *adapter) 1298{ 1299 struct ixgbe_hw *hw = &adapter->hw; 1300 u32 gpie; 1301 1302 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 1303 1304 /* Fan Failure Interrupt */ 1305 if (hw->device_id == IXGBE_DEV_ID_82598AT) 1306 gpie |= IXGBE_SDP1_GPIEN; 1307 1308 /* 1309 * Module detection (SDP2) 1310 * Media ready (SDP1) 1311 */ 1312 if (hw->mac.type == ixgbe_mac_82599EB) { 1313 gpie |= IXGBE_SDP2_GPIEN; 1314 if (hw->device_id != IXGBE_DEV_ID_82599_QSFP_SF_QP) 1315 gpie |= IXGBE_SDP1_GPIEN; 1316 } 1317 1318 /* 1319 * Thermal Failure Detection (X540) 1320 * Link Detection (X552 SFP+, X552/X557-AT) 1321 */ 1322 if (hw->mac.type == ixgbe_mac_X540 || 1323 hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 1324 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 1325 gpie |= IXGBE_SDP0_GPIEN_X540; 1326 1327 if (adapter->msix > 1) { 1328 /* Enable Enhanced MSIX mode */ 1329 gpie |= IXGBE_GPIE_MSIX_MODE; 1330 gpie |= IXGBE_GPIE_EIAME | IXGBE_GPIE_PBA_SUPPORT | 1331 IXGBE_GPIE_OCD; 1332 } 1333 1334 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 1335 return; 1336} 1337 1338/* 1339 * Requires adapter->max_frame_size to be set. 1340 */ 1341static void 1342ixgbe_config_delay_values(struct adapter *adapter) 1343{ 1344 struct ixgbe_hw *hw = &adapter->hw; 1345 u32 rxpb, frame, size, tmp; 1346 1347 frame = adapter->max_frame_size; 1348 1349 /* Calculate High Water */ 1350 switch (hw->mac.type) { 1351 case ixgbe_mac_X540: 1352 case ixgbe_mac_X550: 1353 case ixgbe_mac_X550EM_x: 1354 tmp = IXGBE_DV_X540(frame, frame); 1355 break; 1356 default: 1357 tmp = IXGBE_DV(frame, frame); 1358 break; 1359 } 1360 size = IXGBE_BT2KB(tmp); 1361 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10; 1362 hw->fc.high_water[0] = rxpb - size; 1363 1364 /* Now calculate Low Water */ 1365 switch (hw->mac.type) { 1366 case ixgbe_mac_X540: 1367 case ixgbe_mac_X550: 1368 case ixgbe_mac_X550EM_x: 1369 tmp = IXGBE_LOW_DV_X540(frame); 1370 break; 1371 default: 1372 tmp = IXGBE_LOW_DV(frame); 1373 break; 1374 } 1375 hw->fc.low_water[0] = IXGBE_BT2KB(tmp); 1376 1377 hw->fc.requested_mode = adapter->fc; 1378 hw->fc.pause_time = IXGBE_FC_PAUSE; 1379 hw->fc.send_xon = TRUE; 1380} 1381 1382/* 1383** 1384** MSIX Interrupt Handlers and Tasklets 1385** 1386*/ 1387 1388static inline void 1389ixgbe_enable_queue(struct adapter *adapter, u32 vector) 1390{ 1391 struct ixgbe_hw *hw = &adapter->hw; 1392 u64 queue = (u64)(1 << vector); 1393 u32 mask; 1394 1395 if (hw->mac.type == ixgbe_mac_82598EB) { 1396 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 1397 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 1398 } else { 1399 mask = (queue & 0xFFFFFFFF); 1400 if (mask) 1401 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 1402 mask = (queue >> 32); 1403 if (mask) 1404 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); 1405 } 1406} 1407 1408static inline void 1409ixgbe_disable_queue(struct adapter *adapter, u32 vector) 1410{ 1411 struct ixgbe_hw *hw = &adapter->hw; 1412 u64 queue = (u64)(1 << vector); 1413 u32 mask; 1414 1415 if (hw->mac.type == ixgbe_mac_82598EB) { 1416 mask = (IXGBE_EIMS_RTX_QUEUE & queue); 1417 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); 1418 } else { 1419 mask = (queue & 0xFFFFFFFF); 1420 if (mask) 1421 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 1422 mask = (queue >> 32); 1423 if (mask) 1424 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask); 1425 } 1426} 1427 1428static void 1429ixgbe_handle_que(void *context, int pending) 1430{ 1431 struct ix_queue *que = context; 1432 struct adapter *adapter = que->adapter; 1433 struct tx_ring *txr = que->txr; 1434 struct ifnet *ifp = adapter->ifp; 1435 1436 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1437 ixgbe_rxeof(que); 1438 IXGBE_TX_LOCK(txr); 1439 ixgbe_txeof(txr); 1440#ifndef IXGBE_LEGACY_TX 1441 if (!drbr_empty(ifp, txr->br)) 1442 ixgbe_mq_start_locked(ifp, txr); 1443#else 1444 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1445 ixgbe_start_locked(txr, ifp); 1446#endif 1447 IXGBE_TX_UNLOCK(txr); 1448 } 1449 1450 /* Reenable this interrupt */ 1451 if (que->res != NULL) 1452 ixgbe_enable_queue(adapter, que->msix); 1453 else 1454 ixgbe_enable_intr(adapter); 1455 return; 1456} 1457 1458 1459/********************************************************************* 1460 * 1461 * Legacy Interrupt Service routine 1462 * 1463 **********************************************************************/ 1464 1465static void 1466ixgbe_legacy_irq(void *arg) 1467{ 1468 struct ix_queue *que = arg; 1469 struct adapter *adapter = que->adapter; 1470 struct ixgbe_hw *hw = &adapter->hw; 1471 struct ifnet *ifp = adapter->ifp; 1472 struct tx_ring *txr = adapter->tx_rings; 1473 bool more; 1474 u32 reg_eicr; 1475 1476 1477 reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICR); 1478 1479 ++que->irqs; 1480 if (reg_eicr == 0) { 1481 ixgbe_enable_intr(adapter); 1482 return; 1483 } 1484 1485 more = ixgbe_rxeof(que); 1486 1487 IXGBE_TX_LOCK(txr); 1488 ixgbe_txeof(txr); 1489#ifdef IXGBE_LEGACY_TX 1490 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1491 ixgbe_start_locked(txr, ifp); 1492#else 1493 if (!drbr_empty(ifp, txr->br)) 1494 ixgbe_mq_start_locked(ifp, txr); 1495#endif 1496 IXGBE_TX_UNLOCK(txr); 1497 1498 /* Check for fan failure */ 1499 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 1500 (reg_eicr & IXGBE_EICR_GPI_SDP1)) { 1501 device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " 1502 "REPLACE IMMEDIATELY!!\n"); 1503 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 1504 } 1505 1506 /* Link status change */ 1507 if (reg_eicr & IXGBE_EICR_LSC) 1508 taskqueue_enqueue(adapter->tq, &adapter->link_task); 1509 1510 /* External PHY interrupt */ 1511 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 1512 (reg_eicr & IXGBE_EICR_GPI_SDP0_X540)) 1513 taskqueue_enqueue(adapter->tq, &adapter->phy_task); 1514 1515 if (more) 1516 taskqueue_enqueue(que->tq, &que->que_task); 1517 else 1518 ixgbe_enable_intr(adapter); 1519 return; 1520} 1521 1522 1523/********************************************************************* 1524 * 1525 * MSIX Queue Interrupt Service routine 1526 * 1527 **********************************************************************/ 1528void 1529ixgbe_msix_que(void *arg) 1530{ 1531 struct ix_queue *que = arg; 1532 struct adapter *adapter = que->adapter; 1533 struct ifnet *ifp = adapter->ifp; 1534 struct tx_ring *txr = que->txr; 1535 struct rx_ring *rxr = que->rxr; 1536 bool more; 1537 u32 newitr = 0; 1538 1539 1540 /* Protect against spurious interrupts */ 1541 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1542 return; 1543 1544 ixgbe_disable_queue(adapter, que->msix); 1545 ++que->irqs; 1546 1547 more = ixgbe_rxeof(que); 1548 1549 IXGBE_TX_LOCK(txr); 1550 ixgbe_txeof(txr); 1551#ifdef IXGBE_LEGACY_TX 1552 if (!IFQ_DRV_IS_EMPTY(ifp->if_snd)) 1553 ixgbe_start_locked(txr, ifp); 1554#else 1555 if (!drbr_empty(ifp, txr->br)) 1556 ixgbe_mq_start_locked(ifp, txr); 1557#endif 1558 IXGBE_TX_UNLOCK(txr); 1559 1560 /* Do AIM now? */ 1561 1562 if (ixgbe_enable_aim == FALSE) 1563 goto no_calc; 1564 /* 1565 ** Do Adaptive Interrupt Moderation: 1566 ** - Write out last calculated setting 1567 ** - Calculate based on average size over 1568 ** the last interval. 1569 */ 1570 if (que->eitr_setting) 1571 IXGBE_WRITE_REG(&adapter->hw, 1572 IXGBE_EITR(que->msix), que->eitr_setting); 1573 1574 que->eitr_setting = 0; 1575 1576 /* Idle, do nothing */ 1577 if ((txr->bytes == 0) && (rxr->bytes == 0)) 1578 goto no_calc; 1579 1580 if ((txr->bytes) && (txr->packets)) 1581 newitr = txr->bytes/txr->packets; 1582 if ((rxr->bytes) && (rxr->packets)) 1583 newitr = max(newitr, 1584 (rxr->bytes / rxr->packets)); 1585 newitr += 24; /* account for hardware frame, crc */ 1586 1587 /* set an upper boundary */ 1588 newitr = min(newitr, 3000); 1589 1590 /* Be nice to the mid range */ 1591 if ((newitr > 300) && (newitr < 1200)) 1592 newitr = (newitr / 3); 1593 else 1594 newitr = (newitr / 2); 1595 1596 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 1597 newitr |= newitr << 16; 1598 else 1599 newitr |= IXGBE_EITR_CNT_WDIS; 1600 1601 /* save for next interrupt */ 1602 que->eitr_setting = newitr; 1603 1604 /* Reset state */ 1605 txr->bytes = 0; 1606 txr->packets = 0; 1607 rxr->bytes = 0; 1608 rxr->packets = 0; 1609 1610no_calc: 1611 if (more) 1612 taskqueue_enqueue(que->tq, &que->que_task); 1613 else 1614 ixgbe_enable_queue(adapter, que->msix); 1615 return; 1616} 1617 1618 1619static void 1620ixgbe_msix_link(void *arg) 1621{ 1622 struct adapter *adapter = arg; 1623 struct ixgbe_hw *hw = &adapter->hw; 1624 u32 reg_eicr, mod_mask; 1625 1626 ++adapter->link_irq; 1627 1628 /* Pause other interrupts */ 1629 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER); 1630 1631 /* First get the cause */ 1632 reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICS); 1633 /* Be sure the queue bits are not cleared */ 1634 reg_eicr &= ~IXGBE_EICR_RTX_QUEUE; 1635 /* Clear interrupt with write */ 1636 IXGBE_WRITE_REG(hw, IXGBE_EICR, reg_eicr); 1637 1638 /* Link status change */ 1639 if (reg_eicr & IXGBE_EICR_LSC) { 1640 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); 1641 taskqueue_enqueue(adapter->tq, &adapter->link_task); 1642 } 1643 1644 if (adapter->hw.mac.type != ixgbe_mac_82598EB) { 1645#ifdef IXGBE_FDIR 1646 if (reg_eicr & IXGBE_EICR_FLOW_DIR) { 1647 /* This is probably overkill :) */ 1648 if (!atomic_cmpset_int(&adapter->fdir_reinit, 0, 1)) 1649 return; 1650 /* Disable the interrupt */ 1651 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FLOW_DIR); 1652 taskqueue_enqueue(adapter->tq, &adapter->fdir_task); 1653 } else 1654#endif 1655 if (reg_eicr & IXGBE_EICR_ECC) { 1656 device_printf(adapter->dev, "CRITICAL: ECC ERROR!! " 1657 "Please Reboot!!\n"); 1658 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); 1659 } 1660 1661 /* Check for over temp condition */ 1662 if (reg_eicr & IXGBE_EICR_TS) { 1663 device_printf(adapter->dev, "CRITICAL: OVER TEMP!! " 1664 "PHY IS SHUT DOWN!!\n"); 1665 device_printf(adapter->dev, "System shutdown required!\n"); 1666 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS); 1667 } 1668#ifdef PCI_IOV 1669 if (reg_eicr & IXGBE_EICR_MAILBOX) 1670 taskqueue_enqueue(adapter->tq, &adapter->mbx_task); 1671#endif 1672 } 1673 1674 /* Pluggable optics-related interrupt */ 1675 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP) 1676 mod_mask = IXGBE_EICR_GPI_SDP0_X540; 1677 else 1678 mod_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); 1679 1680 if (ixgbe_is_sfp(hw)) { 1681 if (reg_eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw)) { 1682 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); 1683 taskqueue_enqueue(adapter->tq, &adapter->msf_task); 1684 } else if (reg_eicr & mod_mask) { 1685 IXGBE_WRITE_REG(hw, IXGBE_EICR, mod_mask); 1686 taskqueue_enqueue(adapter->tq, &adapter->mod_task); 1687 } 1688 } 1689 1690 /* Check for fan failure */ 1691 if ((hw->device_id == IXGBE_DEV_ID_82598AT) && 1692 (reg_eicr & IXGBE_EICR_GPI_SDP1)) { 1693 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1); 1694 device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " 1695 "REPLACE IMMEDIATELY!!\n"); 1696 } 1697 1698 /* External PHY interrupt */ 1699 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T && 1700 (reg_eicr & IXGBE_EICR_GPI_SDP0_X540)) { 1701 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540); 1702 taskqueue_enqueue(adapter->tq, &adapter->phy_task); 1703 } 1704 1705 /* Re-enable other interrupts */ 1706 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_OTHER); 1707 return; 1708} 1709 1710/********************************************************************* 1711 * 1712 * Media Ioctl callback 1713 * 1714 * This routine is called whenever the user queries the status of 1715 * the interface using ifconfig. 1716 * 1717 **********************************************************************/ 1718static void 1719ixgbe_media_status(struct ifnet * ifp, struct ifmediareq * ifmr) 1720{ 1721 struct adapter *adapter = ifp->if_softc; 1722 struct ixgbe_hw *hw = &adapter->hw; 1723 int layer; 1724 1725 INIT_DEBUGOUT("ixgbe_media_status: begin"); 1726 IXGBE_CORE_LOCK(adapter); 1727 ixgbe_update_link_status(adapter); 1728 1729 ifmr->ifm_status = IFM_AVALID; 1730 ifmr->ifm_active = IFM_ETHER; 1731 1732 if (!adapter->link_active) { 1733 IXGBE_CORE_UNLOCK(adapter); 1734 return; 1735 } 1736 1737 ifmr->ifm_status |= IFM_ACTIVE; 1738 layer = adapter->phy_layer; 1739 1740 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || 1741 layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || 1742 layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 1743 switch (adapter->link_speed) { 1744 case IXGBE_LINK_SPEED_10GB_FULL: 1745 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 1746 break; 1747 case IXGBE_LINK_SPEED_1GB_FULL: 1748 ifmr->ifm_active |= IFM_1000_T | IFM_FDX; 1749 break; 1750 case IXGBE_LINK_SPEED_100_FULL: 1751 ifmr->ifm_active |= IFM_100_TX | IFM_FDX; 1752 break; 1753 } 1754 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 1755 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 1756 switch (adapter->link_speed) { 1757 case IXGBE_LINK_SPEED_10GB_FULL: 1758 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX; 1759 break; 1760 } 1761 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) 1762 switch (adapter->link_speed) { 1763 case IXGBE_LINK_SPEED_10GB_FULL: 1764 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX; 1765 break; 1766 case IXGBE_LINK_SPEED_1GB_FULL: 1767 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1768 break; 1769 } 1770 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM) 1771 switch (adapter->link_speed) { 1772 case IXGBE_LINK_SPEED_10GB_FULL: 1773 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX; 1774 break; 1775 case IXGBE_LINK_SPEED_1GB_FULL: 1776 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX; 1777 break; 1778 } 1779 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR || 1780 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 1781 switch (adapter->link_speed) { 1782 case IXGBE_LINK_SPEED_10GB_FULL: 1783 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 1784 break; 1785 case IXGBE_LINK_SPEED_1GB_FULL: 1786 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 1787 break; 1788 } 1789 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 1790 switch (adapter->link_speed) { 1791 case IXGBE_LINK_SPEED_10GB_FULL: 1792 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 1793 break; 1794 } 1795 /* 1796 ** XXX: These need to use the proper media types once 1797 ** they're added. 1798 */ 1799#ifndef IFM_ETH_XTYPE 1800 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1801 switch (adapter->link_speed) { 1802 case IXGBE_LINK_SPEED_10GB_FULL: 1803 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX; 1804 break; 1805 case IXGBE_LINK_SPEED_2_5GB_FULL: 1806 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 1807 break; 1808 case IXGBE_LINK_SPEED_1GB_FULL: 1809 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 1810 break; 1811 } 1812 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 1813 || layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1814 switch (adapter->link_speed) { 1815 case IXGBE_LINK_SPEED_10GB_FULL: 1816 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX; 1817 break; 1818 case IXGBE_LINK_SPEED_2_5GB_FULL: 1819 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX; 1820 break; 1821 case IXGBE_LINK_SPEED_1GB_FULL: 1822 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX; 1823 break; 1824 } 1825#else 1826 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 1827 switch (adapter->link_speed) { 1828 case IXGBE_LINK_SPEED_10GB_FULL: 1829 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX; 1830 break; 1831 case IXGBE_LINK_SPEED_2_5GB_FULL: 1832 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 1833 break; 1834 case IXGBE_LINK_SPEED_1GB_FULL: 1835 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 1836 break; 1837 } 1838 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 1839 || layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 1840 switch (adapter->link_speed) { 1841 case IXGBE_LINK_SPEED_10GB_FULL: 1842 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX; 1843 break; 1844 case IXGBE_LINK_SPEED_2_5GB_FULL: 1845 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX; 1846 break; 1847 case IXGBE_LINK_SPEED_1GB_FULL: 1848 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX; 1849 break; 1850 } 1851#endif 1852 1853 /* If nothing is recognized... */ 1854 if (IFM_SUBTYPE(ifmr->ifm_active) == 0) 1855 ifmr->ifm_active |= IFM_UNKNOWN; 1856 1857#if __FreeBSD_version >= 900025 1858 /* Display current flow control setting used on link */ 1859 if (hw->fc.current_mode == ixgbe_fc_rx_pause || 1860 hw->fc.current_mode == ixgbe_fc_full) 1861 ifmr->ifm_active |= IFM_ETH_RXPAUSE; 1862 if (hw->fc.current_mode == ixgbe_fc_tx_pause || 1863 hw->fc.current_mode == ixgbe_fc_full) 1864 ifmr->ifm_active |= IFM_ETH_TXPAUSE; 1865#endif 1866 1867 IXGBE_CORE_UNLOCK(adapter); 1868 1869 return; 1870} 1871 1872/********************************************************************* 1873 * 1874 * Media Ioctl callback 1875 * 1876 * This routine is called when the user changes speed/duplex using 1877 * media/mediopt option with ifconfig. 1878 * 1879 **********************************************************************/ 1880static int 1881ixgbe_media_change(struct ifnet * ifp) 1882{ 1883 struct adapter *adapter = ifp->if_softc; 1884 struct ifmedia *ifm = &adapter->media; 1885 struct ixgbe_hw *hw = &adapter->hw; 1886 ixgbe_link_speed speed = 0; 1887 1888 INIT_DEBUGOUT("ixgbe_media_change: begin"); 1889 1890 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1891 return (EINVAL); 1892 1893 if (hw->phy.media_type == ixgbe_media_type_backplane) 1894 return (ENODEV); 1895 1896 /* 1897 ** We don't actually need to check against the supported 1898 ** media types of the adapter; ifmedia will take care of 1899 ** that for us. 1900 */ 1901#ifndef IFM_ETH_XTYPE 1902 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1903 case IFM_AUTO: 1904 case IFM_10G_T: 1905 speed |= IXGBE_LINK_SPEED_100_FULL; 1906 case IFM_10G_LRM: 1907 case IFM_10G_SR: /* KR, too */ 1908 case IFM_10G_LR: 1909 case IFM_10G_CX4: /* KX4 */ 1910 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1911 case IFM_10G_TWINAX: 1912 speed |= IXGBE_LINK_SPEED_10GB_FULL; 1913 break; 1914 case IFM_1000_T: 1915 speed |= IXGBE_LINK_SPEED_100_FULL; 1916 case IFM_1000_LX: 1917 case IFM_1000_SX: 1918 case IFM_1000_CX: /* KX */ 1919 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1920 break; 1921 case IFM_100_TX: 1922 speed |= IXGBE_LINK_SPEED_100_FULL; 1923 break; 1924 default: 1925 goto invalid; 1926 } 1927#else 1928 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1929 case IFM_AUTO: 1930 case IFM_10G_T: 1931 speed |= IXGBE_LINK_SPEED_100_FULL; 1932 case IFM_10G_LRM: 1933 case IFM_10G_KR: 1934 case IFM_10G_LR: 1935 case IFM_10G_KX4: 1936 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1937 case IFM_10G_TWINAX: 1938 speed |= IXGBE_LINK_SPEED_10GB_FULL; 1939 break; 1940 case IFM_1000_T: 1941 speed |= IXGBE_LINK_SPEED_100_FULL; 1942 case IFM_1000_LX: 1943 case IFM_1000_SX: 1944 case IFM_1000_KX: 1945 speed |= IXGBE_LINK_SPEED_1GB_FULL; 1946 break; 1947 case IFM_100_TX: 1948 speed |= IXGBE_LINK_SPEED_100_FULL; 1949 break; 1950 default: 1951 goto invalid; 1952 } 1953#endif 1954 1955 hw->mac.autotry_restart = TRUE; 1956 hw->mac.ops.setup_link(hw, speed, TRUE); 1957 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1958 adapter->advertise = 0; 1959 } else { 1960 if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0) 1961 adapter->advertise |= 1 << 2; 1962 if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0) 1963 adapter->advertise |= 1 << 1; 1964 if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0) 1965 adapter->advertise |= 1 << 0; 1966 } 1967 1968 return (0); 1969 1970invalid: 1971 device_printf(adapter->dev, "Invalid media type!\n"); 1972 return (EINVAL); 1973} 1974 1975static void 1976ixgbe_set_promisc(struct adapter *adapter) 1977{ 1978 u_int32_t reg_rctl; 1979 struct ifnet *ifp = adapter->ifp; 1980 int mcnt = 0; 1981 1982 reg_rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 1983 reg_rctl &= (~IXGBE_FCTRL_UPE); 1984 if (ifp->if_flags & IFF_ALLMULTI) 1985 mcnt = MAX_NUM_MULTICAST_ADDRESSES; 1986 else { 1987 struct ifmultiaddr *ifma; 1988#if __FreeBSD_version < 800000 1989 IF_ADDR_LOCK(ifp); 1990#else 1991 if_maddr_rlock(ifp); 1992#endif 1993 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1994 if (ifma->ifma_addr->sa_family != AF_LINK) 1995 continue; 1996 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 1997 break; 1998 mcnt++; 1999 } 2000#if __FreeBSD_version < 800000 2001 IF_ADDR_UNLOCK(ifp); 2002#else 2003 if_maddr_runlock(ifp); 2004#endif 2005 } 2006 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) 2007 reg_rctl &= (~IXGBE_FCTRL_MPE); 2008 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2009 2010 if (ifp->if_flags & IFF_PROMISC) { 2011 reg_rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2012 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2013 } else if (ifp->if_flags & IFF_ALLMULTI) { 2014 reg_rctl |= IXGBE_FCTRL_MPE; 2015 reg_rctl &= ~IXGBE_FCTRL_UPE; 2016 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_rctl); 2017 } 2018 return; 2019} 2020 2021 2022/********************************************************************* 2023 * Multicast Update 2024 * 2025 * This routine is called whenever multicast address list is updated. 2026 * 2027 **********************************************************************/ 2028#define IXGBE_RAR_ENTRIES 16 2029 2030static void 2031ixgbe_set_multi(struct adapter *adapter) 2032{ 2033 u32 fctrl; 2034 u8 *update_ptr; 2035 struct ifmultiaddr *ifma; 2036 struct ixgbe_mc_addr *mta; 2037 int mcnt = 0; 2038 struct ifnet *ifp = adapter->ifp; 2039 2040 IOCTL_DEBUGOUT("ixgbe_set_multi: begin"); 2041 2042 mta = adapter->mta; 2043 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); 2044 2045#if __FreeBSD_version < 800000 2046 IF_ADDR_LOCK(ifp); 2047#else 2048 if_maddr_rlock(ifp); 2049#endif 2050 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 2051 if (ifma->ifma_addr->sa_family != AF_LINK) 2052 continue; 2053 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 2054 break; 2055 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 2056 mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 2057 mta[mcnt].vmdq = adapter->pool; 2058 mcnt++; 2059 } 2060#if __FreeBSD_version < 800000 2061 IF_ADDR_UNLOCK(ifp); 2062#else 2063 if_maddr_runlock(ifp); 2064#endif 2065 2066 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); 2067 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2068 if (ifp->if_flags & IFF_PROMISC) 2069 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2070 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || 2071 ifp->if_flags & IFF_ALLMULTI) { 2072 fctrl |= IXGBE_FCTRL_MPE; 2073 fctrl &= ~IXGBE_FCTRL_UPE; 2074 } else 2075 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); 2076 2077 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl); 2078 2079 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { 2080 update_ptr = (u8 *)mta; 2081 ixgbe_update_mc_addr_list(&adapter->hw, 2082 update_ptr, mcnt, ixgbe_mc_array_itr, TRUE); 2083 } 2084 2085 return; 2086} 2087 2088/* 2089 * This is an iterator function now needed by the multicast 2090 * shared code. It simply feeds the shared code routine the 2091 * addresses in the array of ixgbe_set_multi() one by one. 2092 */ 2093static u8 * 2094ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) 2095{ 2096 struct ixgbe_mc_addr *mta; 2097 2098 mta = (struct ixgbe_mc_addr *)*update_ptr; 2099 *vmdq = mta->vmdq; 2100 2101 *update_ptr = (u8*)(mta + 1);; 2102 return (mta->addr); 2103} 2104 2105 2106/********************************************************************* 2107 * Timer routine 2108 * 2109 * This routine checks for link status,updates statistics, 2110 * and runs the watchdog check. 2111 * 2112 **********************************************************************/ 2113 2114static void 2115ixgbe_local_timer(void *arg) 2116{ 2117 struct adapter *adapter = arg; 2118 device_t dev = adapter->dev; 2119 struct ix_queue *que = adapter->queues; 2120 u64 queues = 0; 2121 int hung = 0; 2122 2123 mtx_assert(&adapter->core_mtx, MA_OWNED); 2124 2125 /* Check for pluggable optics */ 2126 if (adapter->sfp_probe) 2127 if (!ixgbe_sfp_probe(adapter)) 2128 goto out; /* Nothing to do */ 2129 2130 ixgbe_update_link_status(adapter); 2131 ixgbe_update_stats_counters(adapter); 2132 2133 /* 2134 ** Check the TX queues status 2135 ** - mark hung queues so we don't schedule on them 2136 ** - watchdog only if all queues show hung 2137 */ 2138 for (int i = 0; i < adapter->num_queues; i++, que++) { 2139 /* Keep track of queues with work for soft irq */ 2140 if (que->txr->busy) 2141 queues |= ((u64)1 << que->me); 2142 /* 2143 ** Each time txeof runs without cleaning, but there 2144 ** are uncleaned descriptors it increments busy. If 2145 ** we get to the MAX we declare it hung. 2146 */ 2147 if (que->busy == IXGBE_QUEUE_HUNG) { 2148 ++hung; 2149 /* Mark the queue as inactive */ 2150 adapter->active_queues &= ~((u64)1 << que->me); 2151 continue; 2152 } else { 2153 /* Check if we've come back from hung */ 2154 if ((adapter->active_queues & ((u64)1 << que->me)) == 0) 2155 adapter->active_queues |= ((u64)1 << que->me); 2156 } 2157 if (que->busy >= IXGBE_MAX_TX_BUSY) { 2158 device_printf(dev,"Warning queue %d " 2159 "appears to be hung!\n", i); 2160 que->txr->busy = IXGBE_QUEUE_HUNG; 2161 ++hung; 2162 } 2163 2164 } 2165 2166 /* Only truly watchdog if all queues show hung */ 2167 if (hung == adapter->num_queues) 2168 goto watchdog; 2169 else if (queues != 0) { /* Force an IRQ on queues with work */ 2170 ixgbe_rearm_queues(adapter, queues); 2171 } 2172 2173out: 2174 callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter); 2175 return; 2176 2177watchdog: 2178 device_printf(adapter->dev, "Watchdog timeout -- resetting\n"); 2179 adapter->ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 2180 adapter->watchdog_events++; 2181 ixgbe_init_locked(adapter); 2182} 2183 2184 2185/* 2186** Note: this routine updates the OS on the link state 2187** the real check of the hardware only happens with 2188** a link interrupt. 2189*/ 2190static void 2191ixgbe_update_link_status(struct adapter *adapter) 2192{ 2193 struct ifnet *ifp = adapter->ifp; 2194 device_t dev = adapter->dev; 2195 2196 if (adapter->link_up){ 2197 if (adapter->link_active == FALSE) { 2198 if (bootverbose) 2199 device_printf(dev,"Link is up %d Gbps %s \n", 2200 ((adapter->link_speed == 128)? 10:1), 2201 "Full Duplex"); 2202 adapter->link_active = TRUE; 2203 /* Update any Flow Control changes */ 2204 ixgbe_fc_enable(&adapter->hw); 2205 /* Update DMA coalescing config */ 2206 ixgbe_config_dmac(adapter); 2207 if_link_state_change(ifp, LINK_STATE_UP); 2208#ifdef PCI_IOV 2209 ixgbe_ping_all_vfs(adapter); 2210#endif 2211 } 2212 } else { /* Link down */ 2213 if (adapter->link_active == TRUE) { 2214 if (bootverbose) 2215 device_printf(dev,"Link is Down\n"); 2216 if_link_state_change(ifp, LINK_STATE_DOWN); 2217 adapter->link_active = FALSE; 2218#ifdef PCI_IOV 2219 ixgbe_ping_all_vfs(adapter); 2220#endif 2221 } 2222 } 2223 2224 return; 2225} 2226 2227 2228/********************************************************************* 2229 * 2230 * This routine disables all traffic on the adapter by issuing a 2231 * global reset on the MAC and deallocates TX/RX buffers. 2232 * 2233 **********************************************************************/ 2234 2235static void 2236ixgbe_stop(void *arg) 2237{ 2238 struct ifnet *ifp; 2239 struct adapter *adapter = arg; 2240 struct ixgbe_hw *hw = &adapter->hw; 2241 ifp = adapter->ifp; 2242 2243 mtx_assert(&adapter->core_mtx, MA_OWNED); 2244 2245 INIT_DEBUGOUT("ixgbe_stop: begin\n"); 2246 ixgbe_disable_intr(adapter); 2247 callout_stop(&adapter->timer); 2248 2249 /* Let the stack know...*/ 2250 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 2251 2252 ixgbe_reset_hw(hw); 2253 hw->adapter_stopped = FALSE; 2254 ixgbe_stop_adapter(hw); 2255 if (hw->mac.type == ixgbe_mac_82599EB) 2256 ixgbe_stop_mac_link_on_d3_82599(hw); 2257 /* Turn off the laser - noop with no optics */ 2258 ixgbe_disable_tx_laser(hw); 2259 2260 /* Update the stack */ 2261 adapter->link_up = FALSE; 2262 ixgbe_update_link_status(adapter); 2263 2264 /* reprogram the RAR[0] in case user changed it. */ 2265 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); 2266 2267 return; 2268} 2269 2270 2271/********************************************************************* 2272 * 2273 * Determine hardware revision. 2274 * 2275 **********************************************************************/ 2276static void 2277ixgbe_identify_hardware(struct adapter *adapter) 2278{ 2279 device_t dev = adapter->dev; 2280 struct ixgbe_hw *hw = &adapter->hw; 2281 2282 /* Save off the information about this board */ 2283 hw->vendor_id = pci_get_vendor(dev); 2284 hw->device_id = pci_get_device(dev); 2285 hw->revision_id = pci_read_config(dev, PCIR_REVID, 1); 2286 hw->subsystem_vendor_id = 2287 pci_read_config(dev, PCIR_SUBVEND_0, 2); 2288 hw->subsystem_device_id = 2289 pci_read_config(dev, PCIR_SUBDEV_0, 2); 2290 2291 /* 2292 ** Make sure BUSMASTER is set 2293 */ 2294 pci_enable_busmaster(dev); 2295 2296 /* We need this here to set the num_segs below */ 2297 ixgbe_set_mac_type(hw); 2298 2299 /* Pick up the 82599 settings */ 2300 if (hw->mac.type != ixgbe_mac_82598EB) { 2301 hw->phy.smart_speed = ixgbe_smart_speed; 2302 adapter->num_segs = IXGBE_82599_SCATTER; 2303 } else 2304 adapter->num_segs = IXGBE_82598_SCATTER; 2305 2306 return; 2307} 2308 2309/********************************************************************* 2310 * 2311 * Determine optic type 2312 * 2313 **********************************************************************/ 2314static void 2315ixgbe_setup_optics(struct adapter *adapter) 2316{ 2317 struct ixgbe_hw *hw = &adapter->hw; 2318 int layer; 2319 2320 layer = adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); 2321 2322 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) { 2323 adapter->optics = IFM_10G_T; 2324 return; 2325 } 2326 2327 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) { 2328 adapter->optics = IFM_1000_T; 2329 return; 2330 } 2331 2332 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) { 2333 adapter->optics = IFM_1000_SX; 2334 return; 2335 } 2336 2337 if (layer & (IXGBE_PHYSICAL_LAYER_10GBASE_LR | 2338 IXGBE_PHYSICAL_LAYER_10GBASE_LRM)) { 2339 adapter->optics = IFM_10G_LR; 2340 return; 2341 } 2342 2343 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 2344 adapter->optics = IFM_10G_SR; 2345 return; 2346 } 2347 2348 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU) { 2349 adapter->optics = IFM_10G_TWINAX; 2350 return; 2351 } 2352 2353 if (layer & (IXGBE_PHYSICAL_LAYER_10GBASE_KX4 | 2354 IXGBE_PHYSICAL_LAYER_10GBASE_CX4)) { 2355 adapter->optics = IFM_10G_CX4; 2356 return; 2357 } 2358 2359 /* If we get here just set the default */ 2360 adapter->optics = IFM_ETHER | IFM_AUTO; 2361 return; 2362} 2363 2364/********************************************************************* 2365 * 2366 * Setup the Legacy or MSI Interrupt handler 2367 * 2368 **********************************************************************/ 2369static int 2370ixgbe_allocate_legacy(struct adapter *adapter) 2371{ 2372 device_t dev = adapter->dev; 2373 struct ix_queue *que = adapter->queues; 2374#ifndef IXGBE_LEGACY_TX 2375 struct tx_ring *txr = adapter->tx_rings; 2376#endif 2377 int error, rid = 0; 2378 2379 /* MSI RID at 1 */ 2380 if (adapter->msix == 1) 2381 rid = 1; 2382 2383 /* We allocate a single interrupt resource */ 2384 adapter->res = bus_alloc_resource_any(dev, 2385 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2386 if (adapter->res == NULL) { 2387 device_printf(dev, "Unable to allocate bus resource: " 2388 "interrupt\n"); 2389 return (ENXIO); 2390 } 2391 2392 /* 2393 * Try allocating a fast interrupt and the associated deferred 2394 * processing contexts. 2395 */ 2396#ifndef IXGBE_LEGACY_TX 2397 TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); 2398#endif 2399 TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que); 2400 que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT, 2401 taskqueue_thread_enqueue, &que->tq); 2402 taskqueue_start_threads(&que->tq, 1, PI_NET, "%s ixq", 2403 device_get_nameunit(adapter->dev)); 2404 2405 /* Tasklets for Link, SFP and Multispeed Fiber */ 2406 TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); 2407 TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); 2408 TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); 2409 TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); 2410#ifdef IXGBE_FDIR 2411 TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); 2412#endif 2413 adapter->tq = taskqueue_create_fast("ixgbe_link", M_NOWAIT, 2414 taskqueue_thread_enqueue, &adapter->tq); 2415 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq", 2416 device_get_nameunit(adapter->dev)); 2417 2418 if ((error = bus_setup_intr(dev, adapter->res, 2419 INTR_TYPE_NET | INTR_MPSAFE, NULL, ixgbe_legacy_irq, 2420 que, &adapter->tag)) != 0) { 2421 device_printf(dev, "Failed to register fast interrupt " 2422 "handler: %d\n", error); 2423 taskqueue_free(que->tq); 2424 taskqueue_free(adapter->tq); 2425 que->tq = NULL; 2426 adapter->tq = NULL; 2427 return (error); 2428 } 2429 /* For simplicity in the handlers */ 2430 adapter->active_queues = IXGBE_EIMS_ENABLE_MASK; 2431 2432 return (0); 2433} 2434 2435 2436/********************************************************************* 2437 * 2438 * Setup MSIX Interrupt resources and handlers 2439 * 2440 **********************************************************************/ 2441static int 2442ixgbe_allocate_msix(struct adapter *adapter) 2443{ 2444 device_t dev = adapter->dev; 2445 struct ix_queue *que = adapter->queues; 2446 struct tx_ring *txr = adapter->tx_rings; 2447 int error, rid, vector = 0; 2448 int cpu_id = 0; 2449#ifdef RSS 2450 cpuset_t cpu_mask; 2451#endif 2452 2453#ifdef RSS 2454 /* 2455 * If we're doing RSS, the number of queues needs to 2456 * match the number of RSS buckets that are configured. 2457 * 2458 * + If there's more queues than RSS buckets, we'll end 2459 * up with queues that get no traffic. 2460 * 2461 * + If there's more RSS buckets than queues, we'll end 2462 * up having multiple RSS buckets map to the same queue, 2463 * so there'll be some contention. 2464 */ 2465 if (adapter->num_queues != rss_getnumbuckets()) { 2466 device_printf(dev, 2467 "%s: number of queues (%d) != number of RSS buckets (%d)" 2468 "; performance will be impacted.\n", 2469 __func__, 2470 adapter->num_queues, 2471 rss_getnumbuckets()); 2472 } 2473#endif 2474 2475 for (int i = 0; i < adapter->num_queues; i++, vector++, que++, txr++) { 2476 rid = vector + 1; 2477 que->res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 2478 RF_SHAREABLE | RF_ACTIVE); 2479 if (que->res == NULL) { 2480 device_printf(dev,"Unable to allocate" 2481 " bus resource: que interrupt [%d]\n", vector); 2482 return (ENXIO); 2483 } 2484 /* Set the handler function */ 2485 error = bus_setup_intr(dev, que->res, 2486 INTR_TYPE_NET | INTR_MPSAFE, NULL, 2487 ixgbe_msix_que, que, &que->tag); 2488 if (error) { 2489 que->res = NULL; 2490 device_printf(dev, "Failed to register QUE handler"); 2491 return (error); 2492 } 2493#if __FreeBSD_version >= 800504 2494 bus_describe_intr(dev, que->res, que->tag, "q%d", i); 2495#endif 2496 que->msix = vector; 2497 adapter->active_queues |= (u64)(1 << que->msix); 2498#ifdef RSS 2499 /* 2500 * The queue ID is used as the RSS layer bucket ID. 2501 * We look up the queue ID -> RSS CPU ID and select 2502 * that. 2503 */ 2504 cpu_id = rss_getcpu(i % rss_getnumbuckets()); 2505#else 2506 /* 2507 * Bind the msix vector, and thus the 2508 * rings to the corresponding cpu. 2509 * 2510 * This just happens to match the default RSS round-robin 2511 * bucket -> queue -> CPU allocation. 2512 */ 2513 if (adapter->num_queues > 1) 2514 cpu_id = i; 2515#endif 2516 if (adapter->num_queues > 1) 2517 bus_bind_intr(dev, que->res, cpu_id); 2518#ifdef IXGBE_DEBUG 2519#ifdef RSS 2520 device_printf(dev, 2521 "Bound RSS bucket %d to CPU %d\n", 2522 i, cpu_id); 2523#else 2524 device_printf(dev, 2525 "Bound queue %d to cpu %d\n", 2526 i, cpu_id); 2527#endif 2528#endif /* IXGBE_DEBUG */ 2529 2530 2531#ifndef IXGBE_LEGACY_TX 2532 TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); 2533#endif 2534 TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que); 2535 que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT, 2536 taskqueue_thread_enqueue, &que->tq); 2537#ifdef RSS 2538 CPU_SETOF(cpu_id, &cpu_mask); 2539 taskqueue_start_threads_cpuset(&que->tq, 1, PI_NET, 2540 &cpu_mask, 2541 "%s (bucket %d)", 2542 device_get_nameunit(adapter->dev), 2543 cpu_id); 2544#else 2545 taskqueue_start_threads(&que->tq, 1, PI_NET, "%s:q%d", 2546 device_get_nameunit(adapter->dev), i); 2547#endif 2548 } 2549 2550 /* and Link */ 2551 rid = vector + 1; 2552 adapter->res = bus_alloc_resource_any(dev, 2553 SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); 2554 if (!adapter->res) { 2555 device_printf(dev,"Unable to allocate" 2556 " bus resource: Link interrupt [%d]\n", rid); 2557 return (ENXIO); 2558 } 2559 /* Set the link handler function */ 2560 error = bus_setup_intr(dev, adapter->res, 2561 INTR_TYPE_NET | INTR_MPSAFE, NULL, 2562 ixgbe_msix_link, adapter, &adapter->tag); 2563 if (error) { 2564 adapter->res = NULL; 2565 device_printf(dev, "Failed to register LINK handler"); 2566 return (error); 2567 } 2568#if __FreeBSD_version >= 800504 2569 bus_describe_intr(dev, adapter->res, adapter->tag, "link"); 2570#endif 2571 adapter->vector = vector; 2572 /* Tasklets for Link, SFP and Multispeed Fiber */ 2573 TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); 2574 TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); 2575 TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); 2576#ifdef PCI_IOV 2577 TASK_INIT(&adapter->mbx_task, 0, ixgbe_handle_mbx, adapter); 2578#endif 2579 TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); 2580#ifdef IXGBE_FDIR 2581 TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); 2582#endif 2583 adapter->tq = taskqueue_create_fast("ixgbe_link", M_NOWAIT, 2584 taskqueue_thread_enqueue, &adapter->tq); 2585 taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s linkq", 2586 device_get_nameunit(adapter->dev)); 2587 2588 return (0); 2589} 2590 2591/* 2592 * Setup Either MSI/X or MSI 2593 */ 2594static int 2595ixgbe_setup_msix(struct adapter *adapter) 2596{ 2597 device_t dev = adapter->dev; 2598 int rid, want, queues, msgs; 2599 2600 /* Override by tuneable */ 2601 if (ixgbe_enable_msix == 0) 2602 goto msi; 2603 2604 /* First try MSI/X */ 2605 msgs = pci_msix_count(dev); 2606 if (msgs == 0) 2607 goto msi; 2608 rid = PCIR_BAR(MSIX_82598_BAR); 2609 adapter->msix_mem = bus_alloc_resource_any(dev, 2610 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2611 if (adapter->msix_mem == NULL) { 2612 rid += 4; /* 82599 maps in higher BAR */ 2613 adapter->msix_mem = bus_alloc_resource_any(dev, 2614 SYS_RES_MEMORY, &rid, RF_ACTIVE); 2615 } 2616 if (adapter->msix_mem == NULL) { 2617 /* May not be enabled */ 2618 device_printf(adapter->dev, 2619 "Unable to map MSIX table \n"); 2620 goto msi; 2621 } 2622 2623 /* Figure out a reasonable auto config value */ 2624 queues = (mp_ncpus > (msgs - 1)) ? (msgs - 1) : mp_ncpus; 2625 2626#ifdef RSS 2627 /* If we're doing RSS, clamp at the number of RSS buckets */ 2628 if (queues > rss_getnumbuckets()) 2629 queues = rss_getnumbuckets(); 2630#endif 2631 2632 if (ixgbe_num_queues != 0) 2633 queues = ixgbe_num_queues; 2634 /* Set max queues to 8 when autoconfiguring */ 2635 else if ((ixgbe_num_queues == 0) && (queues > 8)) 2636 queues = 8; 2637 2638 /* reflect correct sysctl value */ 2639 ixgbe_num_queues = queues; 2640 2641 /* 2642 ** Want one vector (RX/TX pair) per queue 2643 ** plus an additional for Link. 2644 */ 2645 want = queues + 1; 2646 if (msgs >= want) 2647 msgs = want; 2648 else { 2649 device_printf(adapter->dev, 2650 "MSIX Configuration Problem, " 2651 "%d vectors but %d queues wanted!\n", 2652 msgs, want); 2653 goto msi; 2654 } 2655 if ((pci_alloc_msix(dev, &msgs) == 0) && (msgs == want)) { 2656 device_printf(adapter->dev, 2657 "Using MSIX interrupts with %d vectors\n", msgs); 2658 adapter->num_queues = queues; 2659 return (msgs); 2660 } 2661 /* 2662 ** If MSIX alloc failed or provided us with 2663 ** less than needed, free and fall through to MSI 2664 */ 2665 pci_release_msi(dev); 2666 2667msi: 2668 if (adapter->msix_mem != NULL) { 2669 bus_release_resource(dev, SYS_RES_MEMORY, 2670 rid, adapter->msix_mem); 2671 adapter->msix_mem = NULL; 2672 } 2673 msgs = 1; 2674 if (pci_alloc_msi(dev, &msgs) == 0) { 2675 device_printf(adapter->dev, "Using an MSI interrupt\n"); 2676 return (msgs); 2677 } 2678 device_printf(adapter->dev, "Using a Legacy interrupt\n"); 2679 return (0); 2680} 2681 2682 2683static int 2684ixgbe_allocate_pci_resources(struct adapter *adapter) 2685{ 2686 int rid; 2687 device_t dev = adapter->dev; 2688 2689 rid = PCIR_BAR(0); 2690 adapter->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 2691 &rid, RF_ACTIVE); 2692 2693 if (!(adapter->pci_mem)) { 2694 device_printf(dev, "Unable to allocate bus resource: memory\n"); 2695 return (ENXIO); 2696 } 2697 2698 /* Save bus_space values for READ/WRITE_REG macros */ 2699 adapter->osdep.mem_bus_space_tag = 2700 rman_get_bustag(adapter->pci_mem); 2701 adapter->osdep.mem_bus_space_handle = 2702 rman_get_bushandle(adapter->pci_mem); 2703 /* Set hw values for shared code */ 2704 adapter->hw.hw_addr = (u8 *) &adapter->osdep.mem_bus_space_handle; 2705 adapter->hw.back = adapter; 2706 2707 /* Default to 1 queue if MSI-X setup fails */ 2708 adapter->num_queues = 1; 2709 2710 /* 2711 ** Now setup MSI or MSI-X, should 2712 ** return us the number of supported 2713 ** vectors. (Will be 1 for MSI) 2714 */ 2715 adapter->msix = ixgbe_setup_msix(adapter); 2716 return (0); 2717} 2718 2719static void 2720ixgbe_free_pci_resources(struct adapter * adapter) 2721{ 2722 struct ix_queue *que = adapter->queues; 2723 device_t dev = adapter->dev; 2724 int rid, memrid; 2725 2726 if (adapter->hw.mac.type == ixgbe_mac_82598EB) 2727 memrid = PCIR_BAR(MSIX_82598_BAR); 2728 else 2729 memrid = PCIR_BAR(MSIX_82599_BAR); 2730 2731 /* 2732 ** There is a slight possibility of a failure mode 2733 ** in attach that will result in entering this function 2734 ** before interrupt resources have been initialized, and 2735 ** in that case we do not want to execute the loops below 2736 ** We can detect this reliably by the state of the adapter 2737 ** res pointer. 2738 */ 2739 if (adapter->res == NULL) 2740 goto mem; 2741 2742 /* 2743 ** Release all msix queue resources: 2744 */ 2745 for (int i = 0; i < adapter->num_queues; i++, que++) { 2746 rid = que->msix + 1; 2747 if (que->tag != NULL) { 2748 bus_teardown_intr(dev, que->res, que->tag); 2749 que->tag = NULL; 2750 } 2751 if (que->res != NULL) 2752 bus_release_resource(dev, SYS_RES_IRQ, rid, que->res); 2753 } 2754 2755 2756 /* Clean the Legacy or Link interrupt last */ 2757 if (adapter->vector) /* we are doing MSIX */ 2758 rid = adapter->vector + 1; 2759 else 2760 (adapter->msix != 0) ? (rid = 1):(rid = 0); 2761 2762 if (adapter->tag != NULL) { 2763 bus_teardown_intr(dev, adapter->res, adapter->tag); 2764 adapter->tag = NULL; 2765 } 2766 if (adapter->res != NULL) 2767 bus_release_resource(dev, SYS_RES_IRQ, rid, adapter->res); 2768 2769mem: 2770 if (adapter->msix) 2771 pci_release_msi(dev); 2772 2773 if (adapter->msix_mem != NULL) 2774 bus_release_resource(dev, SYS_RES_MEMORY, 2775 memrid, adapter->msix_mem); 2776 2777 if (adapter->pci_mem != NULL) 2778 bus_release_resource(dev, SYS_RES_MEMORY, 2779 PCIR_BAR(0), adapter->pci_mem); 2780 2781 return; 2782} 2783 2784/********************************************************************* 2785 * 2786 * Setup networking device structure and register an interface. 2787 * 2788 **********************************************************************/ 2789static int 2790ixgbe_setup_interface(device_t dev, struct adapter *adapter) 2791{ 2792 struct ifnet *ifp; 2793 2794 INIT_DEBUGOUT("ixgbe_setup_interface: begin"); 2795 2796 ifp = adapter->ifp = if_alloc(IFT_ETHER); 2797 if (ifp == NULL) { 2798 device_printf(dev, "can not allocate ifnet structure\n"); 2799 return (-1); 2800 } 2801 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 2802 if_initbaudrate(ifp, IF_Gbps(10)); 2803 ifp->if_init = ixgbe_init; 2804 ifp->if_softc = adapter; 2805 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 2806 ifp->if_ioctl = ixgbe_ioctl; 2807#if __FreeBSD_version >= 1100036 2808 if_setgetcounterfn(ifp, ixgbe_get_counter); 2809#endif 2810#if __FreeBSD_version >= 1100045 2811 /* TSO parameters */ 2812 ifp->if_hw_tsomax = 65518; 2813 ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER; 2814 ifp->if_hw_tsomaxsegsize = 2048; 2815#endif 2816#ifndef IXGBE_LEGACY_TX 2817 ifp->if_transmit = ixgbe_mq_start; 2818 ifp->if_qflush = ixgbe_qflush; 2819#else 2820 ifp->if_start = ixgbe_start; 2821 IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2); 2822 ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 2; 2823 IFQ_SET_READY(&ifp->if_snd); 2824#endif 2825 2826 ether_ifattach(ifp, adapter->hw.mac.addr); 2827 2828 adapter->max_frame_size = 2829 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 2830 2831 /* 2832 * Tell the upper layer(s) we support long frames. 2833 */ 2834 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 2835 2836 /* Set capability flags */ 2837 ifp->if_capabilities |= IFCAP_RXCSUM 2838 | IFCAP_TXCSUM 2839 | IFCAP_RXCSUM_IPV6 2840 | IFCAP_TXCSUM_IPV6 2841 | IFCAP_TSO4 2842 | IFCAP_TSO6 2843 | IFCAP_LRO 2844 | IFCAP_VLAN_HWTAGGING 2845 | IFCAP_VLAN_HWTSO 2846 | IFCAP_VLAN_HWCSUM 2847 | IFCAP_JUMBO_MTU 2848 | IFCAP_VLAN_MTU 2849 | IFCAP_HWSTATS; 2850 2851 /* Enable the above capabilities by default */ 2852 ifp->if_capenable = ifp->if_capabilities; 2853 2854 /* 2855 ** Don't turn this on by default, if vlans are 2856 ** created on another pseudo device (eg. lagg) 2857 ** then vlan events are not passed thru, breaking 2858 ** operation, but with HW FILTER off it works. If 2859 ** using vlans directly on the ixgbe driver you can 2860 ** enable this and get full hardware tag filtering. 2861 */ 2862 ifp->if_capabilities |= IFCAP_VLAN_HWFILTER; 2863 2864 /* 2865 * Specify the media types supported by this adapter and register 2866 * callbacks to update media and link information 2867 */ 2868 ifmedia_init(&adapter->media, IFM_IMASK, ixgbe_media_change, 2869 ixgbe_media_status); 2870 2871 adapter->phy_layer = ixgbe_get_supported_physical_layer(&adapter->hw); 2872 ixgbe_add_media_types(adapter); 2873 2874 /* Set autoselect media by default */ 2875 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2876 2877 return (0); 2878} 2879 2880static void 2881ixgbe_add_media_types(struct adapter *adapter) 2882{ 2883 struct ixgbe_hw *hw = &adapter->hw; 2884 device_t dev = adapter->dev; 2885 int layer; 2886 2887 layer = adapter->phy_layer; 2888 2889 /* Media types with matching FreeBSD media defines */ 2890 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) 2891 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_T, 0, NULL); 2892 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) 2893 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL); 2894 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) 2895 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 0, NULL); 2896 2897 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU || 2898 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) 2899 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_TWINAX, 0, NULL); 2900 2901 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) { 2902 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_LR, 0, NULL); 2903 if (hw->phy.multispeed_fiber) 2904 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_LX, 0, NULL); 2905 } 2906 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) { 2907 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 2908 if (hw->phy.multispeed_fiber) 2909 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 2910 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) 2911 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 0, NULL); 2912 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) 2913 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 2914 2915#ifdef IFM_ETH_XTYPE 2916 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) 2917 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_KR, 0, NULL); 2918 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) 2919 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); 2920 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) 2921 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_KX, 0, NULL); 2922#else 2923 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) { 2924 device_printf(dev, "Media supported: 10GbaseKR\n"); 2925 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n"); 2926 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_SR, 0, NULL); 2927 } 2928 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) { 2929 device_printf(dev, "Media supported: 10GbaseKX4\n"); 2930 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n"); 2931 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); 2932 } 2933 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) { 2934 device_printf(dev, "Media supported: 1000baseKX\n"); 2935 device_printf(dev, "1000baseKX mapped to 1000baseCX\n"); 2936 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_CX, 0, NULL); 2937 } 2938#endif 2939 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) 2940 device_printf(dev, "Media supported: 1000baseBX\n"); 2941 2942 if (hw->device_id == IXGBE_DEV_ID_82598AT) { 2943 ifmedia_add(&adapter->media, 2944 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); 2945 ifmedia_add(&adapter->media, 2946 IFM_ETHER | IFM_1000_T, 0, NULL); 2947 } 2948 2949 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2950} 2951 2952static void 2953ixgbe_config_link(struct adapter *adapter) 2954{ 2955 struct ixgbe_hw *hw = &adapter->hw; 2956 u32 autoneg, err = 0; 2957 bool sfp, negotiate; 2958 2959 sfp = ixgbe_is_sfp(hw); 2960 2961 if (sfp) { 2962 taskqueue_enqueue(adapter->tq, &adapter->mod_task); 2963 } else { 2964 if (hw->mac.ops.check_link) 2965 err = ixgbe_check_link(hw, &adapter->link_speed, 2966 &adapter->link_up, FALSE); 2967 if (err) 2968 goto out; 2969 autoneg = hw->phy.autoneg_advertised; 2970 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 2971 err = hw->mac.ops.get_link_capabilities(hw, 2972 &autoneg, &negotiate); 2973 if (err) 2974 goto out; 2975 if (hw->mac.ops.setup_link) 2976 err = hw->mac.ops.setup_link(hw, 2977 autoneg, adapter->link_up); 2978 } 2979out: 2980 return; 2981} 2982 2983 2984/********************************************************************* 2985 * 2986 * Enable transmit units. 2987 * 2988 **********************************************************************/ 2989static void 2990ixgbe_initialize_transmit_units(struct adapter *adapter) 2991{ 2992 struct tx_ring *txr = adapter->tx_rings; 2993 struct ixgbe_hw *hw = &adapter->hw; 2994 2995 /* Setup the Base and Length of the Tx Descriptor Ring */ 2996 for (int i = 0; i < adapter->num_queues; i++, txr++) { 2997 u64 tdba = txr->txdma.dma_paddr; 2998 u32 txctrl = 0; 2999 int j = txr->me; 3000 3001 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), 3002 (tdba & 0x00000000ffffffffULL)); 3003 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); 3004 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), 3005 adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); 3006 3007 /* Setup the HW Tx Head and Tail descriptor pointers */ 3008 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); 3009 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); 3010 3011 /* Cache the tail address */ 3012 txr->tail = IXGBE_TDT(j); 3013 3014 /* Disable Head Writeback */ 3015 /* 3016 * Note: for X550 series devices, these registers are actually 3017 * prefixed with TPH_ isntead of DCA_, but the addresses and 3018 * fields remain the same. 3019 */ 3020 switch (hw->mac.type) { 3021 case ixgbe_mac_82598EB: 3022 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); 3023 break; 3024 default: 3025 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); 3026 break; 3027 } 3028 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; 3029 switch (hw->mac.type) { 3030 case ixgbe_mac_82598EB: 3031 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); 3032 break; 3033 default: 3034 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); 3035 break; 3036 } 3037 3038 } 3039 3040 if (hw->mac.type != ixgbe_mac_82598EB) { 3041 u32 dmatxctl, rttdcs; 3042#ifdef PCI_IOV 3043 enum ixgbe_iov_mode mode = ixgbe_get_iov_mode(adapter); 3044#endif 3045 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 3046 dmatxctl |= IXGBE_DMATXCTL_TE; 3047 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); 3048 /* Disable arbiter to set MTQC */ 3049 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 3050 rttdcs |= IXGBE_RTTDCS_ARBDIS; 3051 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 3052#ifdef PCI_IOV 3053 IXGBE_WRITE_REG(hw, IXGBE_MTQC, ixgbe_get_mtqc(mode)); 3054#else 3055 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB); 3056#endif 3057 rttdcs &= ~IXGBE_RTTDCS_ARBDIS; 3058 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); 3059 } 3060 3061 return; 3062} 3063 3064static void 3065ixgbe_initialize_rss_mapping(struct adapter *adapter) 3066{ 3067 struct ixgbe_hw *hw = &adapter->hw; 3068 u32 reta = 0, mrqc, rss_key[10]; 3069 int queue_id, table_size, index_mult; 3070#ifdef RSS 3071 u32 rss_hash_config; 3072#endif 3073#ifdef PCI_IOV 3074 enum ixgbe_iov_mode mode; 3075#endif 3076 3077#ifdef RSS 3078 /* Fetch the configured RSS key */ 3079 rss_getkey((uint8_t *) &rss_key); 3080#else 3081 /* set up random bits */ 3082 arc4rand(&rss_key, sizeof(rss_key), 0); 3083#endif 3084 3085 /* Set multiplier for RETA setup and table size based on MAC */ 3086 index_mult = 0x1; 3087 table_size = 128; 3088 switch (adapter->hw.mac.type) { 3089 case ixgbe_mac_82598EB: 3090 index_mult = 0x11; 3091 break; 3092 case ixgbe_mac_X550: 3093 case ixgbe_mac_X550EM_x: 3094 table_size = 512; 3095 break; 3096 default: 3097 break; 3098 } 3099 3100 /* Set up the redirection table */ 3101 for (int i = 0, j = 0; i < table_size; i++, j++) { 3102 if (j == adapter->num_queues) j = 0; 3103#ifdef RSS 3104 /* 3105 * Fetch the RSS bucket id for the given indirection entry. 3106 * Cap it at the number of configured buckets (which is 3107 * num_queues.) 3108 */ 3109 queue_id = rss_get_indirection_to_bucket(i); 3110 queue_id = queue_id % adapter->num_queues; 3111#else 3112 queue_id = (j * index_mult); 3113#endif 3114 /* 3115 * The low 8 bits are for hash value (n+0); 3116 * The next 8 bits are for hash value (n+1), etc. 3117 */ 3118 reta = reta >> 8; 3119 reta = reta | ( ((uint32_t) queue_id) << 24); 3120 if ((i & 3) == 3) { 3121 if (i < 128) 3122 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); 3123 else 3124 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), reta); 3125 reta = 0; 3126 } 3127 } 3128 3129 /* Now fill our hash function seeds */ 3130 for (int i = 0; i < 10; i++) 3131 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); 3132 3133 /* Perform hash on these packet types */ 3134#ifdef RSS 3135 mrqc = IXGBE_MRQC_RSSEN; 3136 rss_hash_config = rss_gethashconfig(); 3137 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4) 3138 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4; 3139 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4) 3140 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP; 3141 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6) 3142 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6; 3143 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6) 3144 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3145 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX) 3146 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX; 3147 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX) 3148 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP; 3149 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4) 3150 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3151 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4_EX) 3152 device_printf(adapter->dev, 3153 "%s: RSS_HASHTYPE_RSS_UDP_IPV4_EX defined, " 3154 "but not supported\n", __func__); 3155 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6) 3156 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3157 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX) 3158 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; 3159#else 3160 /* 3161 * Disable UDP - IP fragments aren't currently being handled 3162 * and so we end up with a mix of 2-tuple and 4-tuple 3163 * traffic. 3164 */ 3165 mrqc = IXGBE_MRQC_RSSEN 3166 | IXGBE_MRQC_RSS_FIELD_IPV4 3167 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3168 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP 3169 | IXGBE_MRQC_RSS_FIELD_IPV6_EX 3170 | IXGBE_MRQC_RSS_FIELD_IPV6 3171 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP 3172 ; 3173#endif /* RSS */ 3174#ifdef PCI_IOV 3175 mode = ixgbe_get_iov_mode(adapter); 3176 mrqc |= ixgbe_get_mrqc(mode); 3177#endif 3178 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3179} 3180 3181 3182/********************************************************************* 3183 * 3184 * Setup receive registers and features. 3185 * 3186 **********************************************************************/ 3187#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 3188 3189#define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1) 3190 3191static void 3192ixgbe_initialize_receive_units(struct adapter *adapter) 3193{ 3194 struct rx_ring *rxr = adapter->rx_rings; 3195 struct ixgbe_hw *hw = &adapter->hw; 3196 struct ifnet *ifp = adapter->ifp; 3197 u32 bufsz, fctrl, srrctl, rxcsum; 3198 u32 hlreg; 3199 3200 /* 3201 * Make sure receives are disabled while 3202 * setting up the descriptor ring 3203 */ 3204 ixgbe_disable_rx(hw); 3205 3206 /* Enable broadcasts */ 3207 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); 3208 fctrl |= IXGBE_FCTRL_BAM; 3209 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3210 fctrl |= IXGBE_FCTRL_DPF; 3211 fctrl |= IXGBE_FCTRL_PMCF; 3212 } 3213 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); 3214 3215 /* Set for Jumbo Frames? */ 3216 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); 3217 if (ifp->if_mtu > ETHERMTU) 3218 hlreg |= IXGBE_HLREG0_JUMBOEN; 3219 else 3220 hlreg &= ~IXGBE_HLREG0_JUMBOEN; 3221#ifdef DEV_NETMAP 3222 /* crcstrip is conditional in netmap (in RDRXCTL too ?) */ 3223 if (ifp->if_capenable & IFCAP_NETMAP && !ix_crcstrip) 3224 hlreg &= ~IXGBE_HLREG0_RXCRCSTRP; 3225 else 3226 hlreg |= IXGBE_HLREG0_RXCRCSTRP; 3227#endif /* DEV_NETMAP */ 3228 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); 3229 3230 bufsz = (adapter->rx_mbuf_sz + 3231 BSIZEPKT_ROUNDUP) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 3232 3233 for (int i = 0; i < adapter->num_queues; i++, rxr++) { 3234 u64 rdba = rxr->rxdma.dma_paddr; 3235 int j = rxr->me; 3236 3237 /* Setup the Base and Length of the Rx Descriptor Ring */ 3238 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), 3239 (rdba & 0x00000000ffffffffULL)); 3240 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 3241 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), 3242 adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); 3243 3244 /* Set up the SRRCTL register */ 3245 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); 3246 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 3247 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 3248 srrctl |= bufsz; 3249 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 3250 3251 /* 3252 * Set DROP_EN iff we have no flow control and >1 queue. 3253 * Note that srrctl was cleared shortly before during reset, 3254 * so we do not need to clear the bit, but do it just in case 3255 * this code is moved elsewhere. 3256 */ 3257 if (adapter->num_queues > 1 && 3258 adapter->hw.fc.requested_mode == ixgbe_fc_none) { 3259 srrctl |= IXGBE_SRRCTL_DROP_EN; 3260 } else { 3261 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 3262 } 3263 3264 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); 3265 3266 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 3267 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 3268 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 3269 3270 /* Set the driver rx tail address */ 3271 rxr->tail = IXGBE_RDT(rxr->me); 3272 } 3273 3274 if (adapter->hw.mac.type != ixgbe_mac_82598EB) { 3275 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 3276 IXGBE_PSRTYPE_UDPHDR | 3277 IXGBE_PSRTYPE_IPV4HDR | 3278 IXGBE_PSRTYPE_IPV6HDR; 3279 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 3280 } 3281 3282 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 3283 3284 ixgbe_initialize_rss_mapping(adapter); 3285 3286 if (adapter->num_queues > 1) { 3287 /* RSS and RX IPP Checksum are mutually exclusive */ 3288 rxcsum |= IXGBE_RXCSUM_PCSD; 3289 } 3290 3291 if (ifp->if_capenable & IFCAP_RXCSUM) 3292 rxcsum |= IXGBE_RXCSUM_PCSD; 3293 3294 /* This is useful for calculating UDP/IP fragment checksums */ 3295 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) 3296 rxcsum |= IXGBE_RXCSUM_IPPCSE; 3297 3298 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); 3299 3300 return; 3301} 3302 3303 3304/* 3305** This routine is run via an vlan config EVENT, 3306** it enables us to use the HW Filter table since 3307** we can get the vlan id. This just creates the 3308** entry in the soft version of the VFTA, init will 3309** repopulate the real table. 3310*/ 3311static void 3312ixgbe_register_vlan(void *arg, struct ifnet *ifp, u16 vtag) 3313{ 3314 struct adapter *adapter = ifp->if_softc; 3315 u16 index, bit; 3316 3317 if (ifp->if_softc != arg) /* Not our event */ 3318 return; 3319 3320 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 3321 return; 3322 3323 IXGBE_CORE_LOCK(adapter); 3324 index = (vtag >> 5) & 0x7F; 3325 bit = vtag & 0x1F; 3326 adapter->shadow_vfta[index] |= (1 << bit); 3327 ++adapter->num_vlans; 3328 ixgbe_setup_vlan_hw_support(adapter); 3329 IXGBE_CORE_UNLOCK(adapter); 3330} 3331 3332/* 3333** This routine is run via an vlan 3334** unconfig EVENT, remove our entry 3335** in the soft vfta. 3336*/ 3337static void 3338ixgbe_unregister_vlan(void *arg, struct ifnet *ifp, u16 vtag) 3339{ 3340 struct adapter *adapter = ifp->if_softc; 3341 u16 index, bit; 3342 3343 if (ifp->if_softc != arg) 3344 return; 3345 3346 if ((vtag == 0) || (vtag > 4095)) /* Invalid */ 3347 return; 3348 3349 IXGBE_CORE_LOCK(adapter); 3350 index = (vtag >> 5) & 0x7F; 3351 bit = vtag & 0x1F; 3352 adapter->shadow_vfta[index] &= ~(1 << bit); 3353 --adapter->num_vlans; 3354 /* Re-init to load the changes */ 3355 ixgbe_setup_vlan_hw_support(adapter); 3356 IXGBE_CORE_UNLOCK(adapter); 3357} 3358 3359static void 3360ixgbe_setup_vlan_hw_support(struct adapter *adapter) 3361{ 3362 struct ifnet *ifp = adapter->ifp; 3363 struct ixgbe_hw *hw = &adapter->hw; 3364 struct rx_ring *rxr; 3365 u32 ctrl; 3366 3367 3368 /* 3369 ** We get here thru init_locked, meaning 3370 ** a soft reset, this has already cleared 3371 ** the VFTA and other state, so if there 3372 ** have been no vlan's registered do nothing. 3373 */ 3374 if (adapter->num_vlans == 0) 3375 return; 3376 3377 /* Setup the queues for vlans */ 3378 for (int i = 0; i < adapter->num_queues; i++) { 3379 rxr = &adapter->rx_rings[i]; 3380 /* On 82599 the VLAN enable is per/queue in RXDCTL */ 3381 if (hw->mac.type != ixgbe_mac_82598EB) { 3382 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); 3383 ctrl |= IXGBE_RXDCTL_VME; 3384 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); 3385 } 3386 rxr->vtag_strip = TRUE; 3387 } 3388 3389 if ((ifp->if_capenable & IFCAP_VLAN_HWFILTER) == 0) 3390 return; 3391 /* 3392 ** A soft reset zero's out the VFTA, so 3393 ** we need to repopulate it now. 3394 */ 3395 for (int i = 0; i < IXGBE_VFTA_SIZE; i++) 3396 if (adapter->shadow_vfta[i] != 0) 3397 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 3398 adapter->shadow_vfta[i]); 3399 3400 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 3401 /* Enable the Filter Table if enabled */ 3402 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER) { 3403 ctrl &= ~IXGBE_VLNCTRL_CFIEN; 3404 ctrl |= IXGBE_VLNCTRL_VFE; 3405 } 3406 if (hw->mac.type == ixgbe_mac_82598EB) 3407 ctrl |= IXGBE_VLNCTRL_VME; 3408 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl); 3409} 3410 3411static void 3412ixgbe_enable_intr(struct adapter *adapter) 3413{ 3414 struct ixgbe_hw *hw = &adapter->hw; 3415 struct ix_queue *que = adapter->queues; 3416 u32 mask, fwsm; 3417 3418 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 3419 /* Enable Fan Failure detection */ 3420 if (hw->device_id == IXGBE_DEV_ID_82598AT) 3421 mask |= IXGBE_EIMS_GPI_SDP1; 3422 3423 switch (adapter->hw.mac.type) { 3424 case ixgbe_mac_82599EB: 3425 mask |= IXGBE_EIMS_ECC; 3426 /* Temperature sensor on some adapters */ 3427 mask |= IXGBE_EIMS_GPI_SDP0; 3428 /* SFP+ (RX_LOS_N & MOD_ABS_N) */ 3429 mask |= IXGBE_EIMS_GPI_SDP1; 3430 mask |= IXGBE_EIMS_GPI_SDP2; 3431#ifdef IXGBE_FDIR 3432 mask |= IXGBE_EIMS_FLOW_DIR; 3433#endif 3434#ifdef PCI_IOV 3435 mask |= IXGBE_EIMS_MAILBOX; 3436#endif 3437 break; 3438 case ixgbe_mac_X540: 3439 /* Detect if Thermal Sensor is enabled */ 3440 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); 3441 if (fwsm & IXGBE_FWSM_TS_ENABLED) 3442 mask |= IXGBE_EIMS_TS; 3443 mask |= IXGBE_EIMS_ECC; 3444#ifdef IXGBE_FDIR 3445 mask |= IXGBE_EIMS_FLOW_DIR; 3446#endif 3447 break; 3448 case ixgbe_mac_X550: 3449 case ixgbe_mac_X550EM_x: 3450 /* MAC thermal sensor is automatically enabled */ 3451 mask |= IXGBE_EIMS_TS; 3452 /* Some devices use SDP0 for important information */ 3453 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || 3454 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) 3455 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw); 3456 mask |= IXGBE_EIMS_ECC; 3457#ifdef IXGBE_FDIR 3458 mask |= IXGBE_EIMS_FLOW_DIR; 3459#endif 3460#ifdef PCI_IOV 3461 mask |= IXGBE_EIMS_MAILBOX; 3462#endif 3463 /* falls through */ 3464 default: 3465 break; 3466 } 3467 3468 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); 3469 3470 /* With MSI-X we use auto clear */ 3471 if (adapter->msix_mem) { 3472 mask = IXGBE_EIMS_ENABLE_MASK; 3473 /* Don't autoclear Link */ 3474 mask &= ~IXGBE_EIMS_OTHER; 3475 mask &= ~IXGBE_EIMS_LSC; 3476#ifdef PCI_IOV 3477 mask &= ~IXGBE_EIMS_MAILBOX; 3478#endif 3479 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); 3480 } 3481 3482 /* 3483 ** Now enable all queues, this is done separately to 3484 ** allow for handling the extended (beyond 32) MSIX 3485 ** vectors that can be used by 82599 3486 */ 3487 for (int i = 0; i < adapter->num_queues; i++, que++) 3488 ixgbe_enable_queue(adapter, que->msix); 3489 3490 IXGBE_WRITE_FLUSH(hw); 3491 3492 return; 3493} 3494 3495static void 3496ixgbe_disable_intr(struct adapter *adapter) 3497{ 3498 if (adapter->msix_mem) 3499 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, 0); 3500 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3501 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); 3502 } else { 3503 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); 3504 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); 3505 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); 3506 } 3507 IXGBE_WRITE_FLUSH(&adapter->hw); 3508 return; 3509} 3510 3511/* 3512** Get the width and transaction speed of 3513** the slot this adapter is plugged into. 3514*/ 3515static void 3516ixgbe_get_slot_info(struct adapter *adapter) 3517{ 3518 device_t dev = adapter->dev; 3519 struct ixgbe_hw *hw = &adapter->hw; 3520 struct ixgbe_mac_info *mac = &hw->mac; 3521 u16 link; 3522 u32 offset; 3523 3524 /* For most devices simply call the shared code routine */ 3525 if (hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) { 3526 ixgbe_get_bus_info(hw); 3527 /* These devices don't use PCI-E */ 3528 switch (hw->mac.type) { 3529 case ixgbe_mac_X550EM_x: 3530 return; 3531 default: 3532 goto display; 3533 } 3534 } 3535 3536 /* 3537 ** For the Quad port adapter we need to parse back 3538 ** up the PCI tree to find the speed of the expansion 3539 ** slot into which this adapter is plugged. A bit more work. 3540 */ 3541 dev = device_get_parent(device_get_parent(dev)); 3542#ifdef IXGBE_DEBUG 3543 device_printf(dev, "parent pcib = %x,%x,%x\n", 3544 pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)); 3545#endif 3546 dev = device_get_parent(device_get_parent(dev)); 3547#ifdef IXGBE_DEBUG 3548 device_printf(dev, "slot pcib = %x,%x,%x\n", 3549 pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)); 3550#endif 3551 /* Now get the PCI Express Capabilities offset */ 3552 pci_find_cap(dev, PCIY_EXPRESS, &offset); 3553 /* ...and read the Link Status Register */ 3554 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2); 3555 switch (link & IXGBE_PCI_LINK_WIDTH) { 3556 case IXGBE_PCI_LINK_WIDTH_1: 3557 hw->bus.width = ixgbe_bus_width_pcie_x1; 3558 break; 3559 case IXGBE_PCI_LINK_WIDTH_2: 3560 hw->bus.width = ixgbe_bus_width_pcie_x2; 3561 break; 3562 case IXGBE_PCI_LINK_WIDTH_4: 3563 hw->bus.width = ixgbe_bus_width_pcie_x4; 3564 break; 3565 case IXGBE_PCI_LINK_WIDTH_8: 3566 hw->bus.width = ixgbe_bus_width_pcie_x8; 3567 break; 3568 default: 3569 hw->bus.width = ixgbe_bus_width_unknown; 3570 break; 3571 } 3572 3573 switch (link & IXGBE_PCI_LINK_SPEED) { 3574 case IXGBE_PCI_LINK_SPEED_2500: 3575 hw->bus.speed = ixgbe_bus_speed_2500; 3576 break; 3577 case IXGBE_PCI_LINK_SPEED_5000: 3578 hw->bus.speed = ixgbe_bus_speed_5000; 3579 break; 3580 case IXGBE_PCI_LINK_SPEED_8000: 3581 hw->bus.speed = ixgbe_bus_speed_8000; 3582 break; 3583 default: 3584 hw->bus.speed = ixgbe_bus_speed_unknown; 3585 break; 3586 } 3587 3588 mac->ops.set_lan_id(hw); 3589 3590display: 3591 device_printf(dev,"PCI Express Bus: Speed %s %s\n", 3592 ((hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s": 3593 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s": 3594 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s":"Unknown"), 3595 (hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" : 3596 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" : 3597 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" : 3598 ("Unknown")); 3599 3600 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) && 3601 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) && 3602 (hw->bus.speed == ixgbe_bus_speed_2500))) { 3603 device_printf(dev, "PCI-Express bandwidth available" 3604 " for this card\n is not sufficient for" 3605 " optimal performance.\n"); 3606 device_printf(dev, "For optimal performance a x8 " 3607 "PCIE, or x4 PCIE Gen2 slot is required.\n"); 3608 } 3609 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) && 3610 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) && 3611 (hw->bus.speed < ixgbe_bus_speed_8000))) { 3612 device_printf(dev, "PCI-Express bandwidth available" 3613 " for this card\n is not sufficient for" 3614 " optimal performance.\n"); 3615 device_printf(dev, "For optimal performance a x8 " 3616 "PCIE Gen3 slot is required.\n"); 3617 } 3618 3619 return; 3620} 3621 3622 3623/* 3624** Setup the correct IVAR register for a particular MSIX interrupt 3625** (yes this is all very magic and confusing :) 3626** - entry is the register array entry 3627** - vector is the MSIX vector for this queue 3628** - type is RX/TX/MISC 3629*/ 3630static void 3631ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type) 3632{ 3633 struct ixgbe_hw *hw = &adapter->hw; 3634 u32 ivar, index; 3635 3636 vector |= IXGBE_IVAR_ALLOC_VAL; 3637 3638 switch (hw->mac.type) { 3639 3640 case ixgbe_mac_82598EB: 3641 if (type == -1) 3642 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX; 3643 else 3644 entry += (type * 64); 3645 index = (entry >> 2) & 0x1F; 3646 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); 3647 ivar &= ~(0xFF << (8 * (entry & 0x3))); 3648 ivar |= (vector << (8 * (entry & 0x3))); 3649 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar); 3650 break; 3651 3652 case ixgbe_mac_82599EB: 3653 case ixgbe_mac_X540: 3654 case ixgbe_mac_X550: 3655 case ixgbe_mac_X550EM_x: 3656 if (type == -1) { /* MISC IVAR */ 3657 index = (entry & 1) * 8; 3658 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC); 3659 ivar &= ~(0xFF << index); 3660 ivar |= (vector << index); 3661 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar); 3662 } else { /* RX/TX IVARS */ 3663 index = (16 * (entry & 1)) + (8 * type); 3664 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1)); 3665 ivar &= ~(0xFF << index); 3666 ivar |= (vector << index); 3667 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar); 3668 } 3669 3670 default: 3671 break; 3672 } 3673} 3674 3675static void 3676ixgbe_configure_ivars(struct adapter *adapter) 3677{ 3678 struct ix_queue *que = adapter->queues; 3679 u32 newitr; 3680 3681 if (ixgbe_max_interrupt_rate > 0) 3682 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; 3683 else { 3684 /* 3685 ** Disable DMA coalescing if interrupt moderation is 3686 ** disabled. 3687 */ 3688 adapter->dmac = 0; 3689 newitr = 0; 3690 } 3691 3692 for (int i = 0; i < adapter->num_queues; i++, que++) { 3693 struct rx_ring *rxr = &adapter->rx_rings[i]; 3694 struct tx_ring *txr = &adapter->tx_rings[i]; 3695 /* First the RX queue entry */ 3696 ixgbe_set_ivar(adapter, rxr->me, que->msix, 0); 3697 /* ... and the TX */ 3698 ixgbe_set_ivar(adapter, txr->me, que->msix, 1); 3699 /* Set an Initial EITR value */ 3700 IXGBE_WRITE_REG(&adapter->hw, 3701 IXGBE_EITR(que->msix), newitr); 3702 } 3703 3704 /* For the Link interrupt */ 3705 ixgbe_set_ivar(adapter, 1, adapter->vector, -1); 3706} 3707 3708/* 3709** ixgbe_sfp_probe - called in the local timer to 3710** determine if a port had optics inserted. 3711*/ 3712static bool 3713ixgbe_sfp_probe(struct adapter *adapter) 3714{ 3715 struct ixgbe_hw *hw = &adapter->hw; 3716 device_t dev = adapter->dev; 3717 bool result = FALSE; 3718 3719 if ((hw->phy.type == ixgbe_phy_nl) && 3720 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) { 3721 s32 ret = hw->phy.ops.identify_sfp(hw); 3722 if (ret) 3723 goto out; 3724 ret = hw->phy.ops.reset(hw); 3725 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3726 device_printf(dev, "Unsupported SFP+ module detected!"); 3727 device_printf(dev, "Reload driver with supported module.\n"); 3728 adapter->sfp_probe = FALSE; 3729 goto out; 3730 } else 3731 device_printf(dev, "SFP+ module detected!\n"); 3732 /* We now have supported optics */ 3733 adapter->sfp_probe = FALSE; 3734 /* Set the optics type so system reports correctly */ 3735 ixgbe_setup_optics(adapter); 3736 result = TRUE; 3737 } 3738out: 3739 return (result); 3740} 3741 3742/* 3743** Tasklet handler for MSIX Link interrupts 3744** - do outside interrupt since it might sleep 3745*/ 3746static void 3747ixgbe_handle_link(void *context, int pending) 3748{ 3749 struct adapter *adapter = context; 3750 struct ixgbe_hw *hw = &adapter->hw; 3751 3752 ixgbe_check_link(hw, 3753 &adapter->link_speed, &adapter->link_up, 0); 3754 ixgbe_update_link_status(adapter); 3755 3756 /* Re-enable link interrupts */ 3757 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_LSC); 3758} 3759 3760/* 3761** Tasklet for handling SFP module interrupts 3762*/ 3763static void 3764ixgbe_handle_mod(void *context, int pending) 3765{ 3766 struct adapter *adapter = context; 3767 struct ixgbe_hw *hw = &adapter->hw; 3768 enum ixgbe_phy_type orig_type = hw->phy.type; 3769 device_t dev = adapter->dev; 3770 u32 err; 3771 3772 IXGBE_CORE_LOCK(adapter); 3773 3774 /* Check to see if the PHY type changed */ 3775 if (hw->phy.ops.identify) { 3776 hw->phy.type = ixgbe_phy_unknown; 3777 hw->phy.ops.identify(hw); 3778 } 3779 3780 if (hw->phy.type != orig_type) { 3781 device_printf(dev, "Detected phy_type %d\n", hw->phy.type); 3782 3783 if (hw->phy.type == ixgbe_phy_none) { 3784 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 3785 goto out; 3786 } 3787 3788 /* Try to do the initialization that was skipped before */ 3789 if (hw->phy.ops.init) 3790 hw->phy.ops.init(hw); 3791 if (hw->phy.ops.reset) 3792 hw->phy.ops.reset(hw); 3793 } 3794 3795 err = hw->phy.ops.identify_sfp(hw); 3796 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3797 device_printf(dev, 3798 "Unsupported SFP+ module type was detected.\n"); 3799 goto out; 3800 } 3801 3802 err = hw->mac.ops.setup_sfp(hw); 3803 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { 3804 device_printf(dev, 3805 "Setup failure - unsupported SFP+ module type.\n"); 3806 goto out; 3807 } 3808 if (hw->phy.multispeed_fiber) 3809 taskqueue_enqueue(adapter->tq, &adapter->msf_task); 3810out: 3811 /* Update media type */ 3812 switch (hw->mac.ops.get_media_type(hw)) { 3813 case ixgbe_media_type_fiber: 3814 adapter->optics = IFM_10G_SR; 3815 break; 3816 case ixgbe_media_type_copper: 3817 adapter->optics = IFM_10G_TWINAX; 3818 break; 3819 case ixgbe_media_type_cx4: 3820 adapter->optics = IFM_10G_CX4; 3821 break; 3822 default: 3823 adapter->optics = 0; 3824 break; 3825 } 3826 3827 IXGBE_CORE_UNLOCK(adapter); 3828 return; 3829} 3830 3831 3832/* 3833** Tasklet for handling MSF (multispeed fiber) interrupts 3834*/ 3835static void 3836ixgbe_handle_msf(void *context, int pending) 3837{ 3838 struct adapter *adapter = context; 3839 struct ixgbe_hw *hw = &adapter->hw; 3840 u32 autoneg; 3841 bool negotiate; 3842 3843 IXGBE_CORE_LOCK(adapter); 3844 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */ 3845 adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); 3846 3847 autoneg = hw->phy.autoneg_advertised; 3848 if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) 3849 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate); 3850 if (hw->mac.ops.setup_link) 3851 hw->mac.ops.setup_link(hw, autoneg, TRUE); 3852 3853 /* Adjust media types shown in ifconfig */ 3854 ifmedia_removeall(&adapter->media); 3855 ixgbe_add_media_types(adapter); 3856 IXGBE_CORE_UNLOCK(adapter); 3857 return; 3858} 3859 3860/* 3861** Tasklet for handling interrupts from an external PHY 3862*/ 3863static void 3864ixgbe_handle_phy(void *context, int pending) 3865{ 3866 struct adapter *adapter = context; 3867 struct ixgbe_hw *hw = &adapter->hw; 3868 int error; 3869 3870 error = hw->phy.ops.handle_lasi(hw); 3871 if (error == IXGBE_ERR_OVERTEMP) 3872 device_printf(adapter->dev, 3873 "CRITICAL: EXTERNAL PHY OVER TEMP!! " 3874 " PHY will downshift to lower power state!\n"); 3875 else if (error) 3876 device_printf(adapter->dev, 3877 "Error handling LASI interrupt: %d\n", 3878 error); 3879 return; 3880} 3881 3882#ifdef IXGBE_FDIR 3883/* 3884** Tasklet for reinitializing the Flow Director filter table 3885*/ 3886static void 3887ixgbe_reinit_fdir(void *context, int pending) 3888{ 3889 struct adapter *adapter = context; 3890 struct ifnet *ifp = adapter->ifp; 3891 3892 if (adapter->fdir_reinit != 1) /* Shouldn't happen */ 3893 return; 3894 ixgbe_reinit_fdir_tables_82599(&adapter->hw); 3895 adapter->fdir_reinit = 0; 3896 /* re-enable flow director interrupts */ 3897 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 3898 /* Restart the interface */ 3899 ifp->if_drv_flags |= IFF_DRV_RUNNING; 3900 return; 3901} 3902#endif 3903 3904/********************************************************************* 3905 * 3906 * Configure DMA Coalescing 3907 * 3908 **********************************************************************/ 3909static void 3910ixgbe_config_dmac(struct adapter *adapter) 3911{ 3912 struct ixgbe_hw *hw = &adapter->hw; 3913 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config; 3914 3915 if (hw->mac.type < ixgbe_mac_X550 || 3916 !hw->mac.ops.dmac_config) 3917 return; 3918 3919 if (dcfg->watchdog_timer ^ adapter->dmac || 3920 dcfg->link_speed ^ adapter->link_speed) { 3921 dcfg->watchdog_timer = adapter->dmac; 3922 dcfg->fcoe_en = false; 3923 dcfg->link_speed = adapter->link_speed; 3924 dcfg->num_tcs = 1; 3925 3926 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n", 3927 dcfg->watchdog_timer, dcfg->link_speed); 3928 3929 hw->mac.ops.dmac_config(hw); 3930 } 3931} 3932 3933/* 3934 * Checks whether the adapter's ports are capable of 3935 * Wake On LAN by reading the adapter's NVM. 3936 * 3937 * Sets each port's hw->wol_enabled value depending 3938 * on the value read here. 3939 */ 3940static void 3941ixgbe_check_wol_support(struct adapter *adapter) 3942{ 3943 struct ixgbe_hw *hw = &adapter->hw; 3944 u16 dev_caps = 0; 3945 3946 /* Find out WoL support for port */ 3947 adapter->wol_support = hw->wol_enabled = 0; 3948 ixgbe_get_device_caps(hw, &dev_caps); 3949 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) || 3950 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) && 3951 hw->bus.func == 0)) 3952 adapter->wol_support = hw->wol_enabled = 1; 3953 3954 /* Save initial wake up filter configuration */ 3955 adapter->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC); 3956 3957 return; 3958} 3959 3960/* 3961 * Prepare the adapter/port for LPLU and/or WoL 3962 */ 3963static int 3964ixgbe_setup_low_power_mode(struct adapter *adapter) 3965{ 3966 struct ixgbe_hw *hw = &adapter->hw; 3967 device_t dev = adapter->dev; 3968 s32 error = 0; 3969 3970 mtx_assert(&adapter->core_mtx, MA_OWNED); 3971 3972 /* Limit power management flow to X550EM baseT */ 3973 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T 3974 && hw->phy.ops.enter_lplu) { 3975 /* Turn off support for APM wakeup. (Using ACPI instead) */ 3976 IXGBE_WRITE_REG(hw, IXGBE_GRC, 3977 IXGBE_READ_REG(hw, IXGBE_GRC) & ~(u32)2); 3978 3979 /* 3980 * Clear Wake Up Status register to prevent any previous wakeup 3981 * events from waking us up immediately after we suspend. 3982 */ 3983 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff); 3984 3985 /* 3986 * Program the Wakeup Filter Control register with user filter 3987 * settings 3988 */ 3989 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wufc); 3990 3991 /* Enable wakeups and power management in Wakeup Control */ 3992 IXGBE_WRITE_REG(hw, IXGBE_WUC, 3993 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN); 3994 3995 /* X550EM baseT adapters need a special LPLU flow */ 3996 hw->phy.reset_disable = true; 3997 ixgbe_stop(adapter); 3998 error = hw->phy.ops.enter_lplu(hw); 3999 if (error) 4000 device_printf(dev, 4001 "Error entering LPLU: %d\n", error); 4002 hw->phy.reset_disable = false; 4003 } else { 4004 /* Just stop for other adapters */ 4005 ixgbe_stop(adapter); 4006 } 4007 4008 return error; 4009} 4010 4011/********************************************************************** 4012 * 4013 * Update the board statistics counters. 4014 * 4015 **********************************************************************/ 4016static void 4017ixgbe_update_stats_counters(struct adapter *adapter) 4018{ 4019 struct ixgbe_hw *hw = &adapter->hw; 4020 u32 missed_rx = 0, bprc, lxon, lxoff, total; 4021 u64 total_missed_rx = 0; 4022 4023 adapter->stats.pf.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 4024 adapter->stats.pf.illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); 4025 adapter->stats.pf.errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC); 4026 adapter->stats.pf.mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC); 4027 4028 for (int i = 0; i < 16; i++) { 4029 adapter->stats.pf.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 4030 adapter->stats.pf.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 4031 adapter->stats.pf.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 4032 } 4033 adapter->stats.pf.mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC); 4034 adapter->stats.pf.mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC); 4035 adapter->stats.pf.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); 4036 4037 /* Hardware workaround, gprc counts missed packets */ 4038 adapter->stats.pf.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); 4039 adapter->stats.pf.gprc -= missed_rx; 4040 4041 if (hw->mac.type != ixgbe_mac_82598EB) { 4042 adapter->stats.pf.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) + 4043 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32); 4044 adapter->stats.pf.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) + 4045 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32); 4046 adapter->stats.pf.tor += IXGBE_READ_REG(hw, IXGBE_TORL) + 4047 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32); 4048 adapter->stats.pf.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 4049 adapter->stats.pf.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 4050 } else { 4051 adapter->stats.pf.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 4052 adapter->stats.pf.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 4053 /* 82598 only has a counter in the high register */ 4054 adapter->stats.pf.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); 4055 adapter->stats.pf.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); 4056 adapter->stats.pf.tor += IXGBE_READ_REG(hw, IXGBE_TORH); 4057 } 4058 4059 /* 4060 * Workaround: mprc hardware is incorrectly counting 4061 * broadcasts, so for now we subtract those. 4062 */ 4063 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); 4064 adapter->stats.pf.bprc += bprc; 4065 adapter->stats.pf.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); 4066 if (hw->mac.type == ixgbe_mac_82598EB) 4067 adapter->stats.pf.mprc -= bprc; 4068 4069 adapter->stats.pf.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); 4070 adapter->stats.pf.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); 4071 adapter->stats.pf.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); 4072 adapter->stats.pf.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); 4073 adapter->stats.pf.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); 4074 adapter->stats.pf.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); 4075 4076 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); 4077 adapter->stats.pf.lxontxc += lxon; 4078 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); 4079 adapter->stats.pf.lxofftxc += lxoff; 4080 total = lxon + lxoff; 4081 4082 adapter->stats.pf.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); 4083 adapter->stats.pf.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); 4084 adapter->stats.pf.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); 4085 adapter->stats.pf.gptc -= total; 4086 adapter->stats.pf.mptc -= total; 4087 adapter->stats.pf.ptc64 -= total; 4088 adapter->stats.pf.gotc -= total * ETHER_MIN_LEN; 4089 4090 adapter->stats.pf.ruc += IXGBE_READ_REG(hw, IXGBE_RUC); 4091 adapter->stats.pf.rfc += IXGBE_READ_REG(hw, IXGBE_RFC); 4092 adapter->stats.pf.roc += IXGBE_READ_REG(hw, IXGBE_ROC); 4093 adapter->stats.pf.rjc += IXGBE_READ_REG(hw, IXGBE_RJC); 4094 adapter->stats.pf.mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC); 4095 adapter->stats.pf.mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC); 4096 adapter->stats.pf.mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC); 4097 adapter->stats.pf.tpr += IXGBE_READ_REG(hw, IXGBE_TPR); 4098 adapter->stats.pf.tpt += IXGBE_READ_REG(hw, IXGBE_TPT); 4099 adapter->stats.pf.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); 4100 adapter->stats.pf.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); 4101 adapter->stats.pf.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); 4102 adapter->stats.pf.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); 4103 adapter->stats.pf.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); 4104 adapter->stats.pf.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); 4105 adapter->stats.pf.xec += IXGBE_READ_REG(hw, IXGBE_XEC); 4106 adapter->stats.pf.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); 4107 adapter->stats.pf.fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); 4108 /* Only read FCOE on 82599 */ 4109 if (hw->mac.type != ixgbe_mac_82598EB) { 4110 adapter->stats.pf.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); 4111 adapter->stats.pf.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); 4112 adapter->stats.pf.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); 4113 adapter->stats.pf.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); 4114 adapter->stats.pf.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); 4115 } 4116 4117 /* Fill out the OS statistics structure */ 4118 IXGBE_SET_IPACKETS(adapter, adapter->stats.pf.gprc); 4119 IXGBE_SET_OPACKETS(adapter, adapter->stats.pf.gptc); 4120 IXGBE_SET_IBYTES(adapter, adapter->stats.pf.gorc); 4121 IXGBE_SET_OBYTES(adapter, adapter->stats.pf.gotc); 4122 IXGBE_SET_IMCASTS(adapter, adapter->stats.pf.mprc); 4123 IXGBE_SET_OMCASTS(adapter, adapter->stats.pf.mptc); 4124 IXGBE_SET_COLLISIONS(adapter, 0); 4125 IXGBE_SET_IQDROPS(adapter, total_missed_rx); 4126 IXGBE_SET_IERRORS(adapter, adapter->stats.pf.crcerrs 4127 + adapter->stats.pf.rlec); 4128} 4129 4130#if __FreeBSD_version >= 1100036 4131static uint64_t 4132ixgbe_get_counter(struct ifnet *ifp, ift_counter cnt) 4133{ 4134 struct adapter *adapter; 4135 struct tx_ring *txr; 4136 uint64_t rv; 4137 4138 adapter = if_getsoftc(ifp); 4139 4140 switch (cnt) { 4141 case IFCOUNTER_IPACKETS: 4142 return (adapter->ipackets); 4143 case IFCOUNTER_OPACKETS: 4144 return (adapter->opackets); 4145 case IFCOUNTER_IBYTES: 4146 return (adapter->ibytes); 4147 case IFCOUNTER_OBYTES: 4148 return (adapter->obytes); 4149 case IFCOUNTER_IMCASTS: 4150 return (adapter->imcasts); 4151 case IFCOUNTER_OMCASTS: 4152 return (adapter->omcasts); 4153 case IFCOUNTER_COLLISIONS: 4154 return (0); 4155 case IFCOUNTER_IQDROPS: 4156 return (adapter->iqdrops); 4157 case IFCOUNTER_OQDROPS: 4158 rv = 0; 4159 txr = adapter->tx_rings; 4160 for (int i = 0; i < adapter->num_queues; i++, txr++) 4161 rv += txr->br->br_drops; 4162 return (rv); 4163 case IFCOUNTER_IERRORS: 4164 return (adapter->ierrors); 4165 default: 4166 return (if_get_counter_default(ifp, cnt)); 4167 } 4168} 4169#endif 4170 4171/** ixgbe_sysctl_tdh_handler - Handler function 4172 * Retrieves the TDH value from the hardware 4173 */ 4174static int 4175ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS) 4176{ 4177 int error; 4178 4179 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 4180 if (!txr) return 0; 4181 4182 unsigned val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDH(txr->me)); 4183 error = sysctl_handle_int(oidp, &val, 0, req); 4184 if (error || !req->newptr) 4185 return error; 4186 return 0; 4187} 4188 4189/** ixgbe_sysctl_tdt_handler - Handler function 4190 * Retrieves the TDT value from the hardware 4191 */ 4192static int 4193ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS) 4194{ 4195 int error; 4196 4197 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1); 4198 if (!txr) return 0; 4199 4200 unsigned val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_TDT(txr->me)); 4201 error = sysctl_handle_int(oidp, &val, 0, req); 4202 if (error || !req->newptr) 4203 return error; 4204 return 0; 4205} 4206 4207/** ixgbe_sysctl_rdh_handler - Handler function 4208 * Retrieves the RDH value from the hardware 4209 */ 4210static int 4211ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS) 4212{ 4213 int error; 4214 4215 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 4216 if (!rxr) return 0; 4217 4218 unsigned val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDH(rxr->me)); 4219 error = sysctl_handle_int(oidp, &val, 0, req); 4220 if (error || !req->newptr) 4221 return error; 4222 return 0; 4223} 4224 4225/** ixgbe_sysctl_rdt_handler - Handler function 4226 * Retrieves the RDT value from the hardware 4227 */ 4228static int 4229ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS) 4230{ 4231 int error; 4232 4233 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1); 4234 if (!rxr) return 0; 4235 4236 unsigned val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_RDT(rxr->me)); 4237 error = sysctl_handle_int(oidp, &val, 0, req); 4238 if (error || !req->newptr) 4239 return error; 4240 return 0; 4241} 4242 4243static int 4244ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS) 4245{ 4246 int error; 4247 struct ix_queue *que = ((struct ix_queue *)oidp->oid_arg1); 4248 unsigned int reg, usec, rate; 4249 4250 reg = IXGBE_READ_REG(&que->adapter->hw, IXGBE_EITR(que->msix)); 4251 usec = ((reg & 0x0FF8) >> 3); 4252 if (usec > 0) 4253 rate = 500000 / usec; 4254 else 4255 rate = 0; 4256 error = sysctl_handle_int(oidp, &rate, 0, req); 4257 if (error || !req->newptr) 4258 return error; 4259 reg &= ~0xfff; /* default, no limitation */ 4260 ixgbe_max_interrupt_rate = 0; 4261 if (rate > 0 && rate < 500000) { 4262 if (rate < 1000) 4263 rate = 1000; 4264 ixgbe_max_interrupt_rate = rate; 4265 reg |= ((4000000/rate) & 0xff8 ); 4266 } 4267 IXGBE_WRITE_REG(&que->adapter->hw, IXGBE_EITR(que->msix), reg); 4268 return 0; 4269} 4270 4271static void 4272ixgbe_add_device_sysctls(struct adapter *adapter) 4273{ 4274 device_t dev = adapter->dev; 4275 struct ixgbe_hw *hw = &adapter->hw; 4276 struct sysctl_oid_list *child; 4277 struct sysctl_ctx_list *ctx; 4278 4279 ctx = device_get_sysctl_ctx(dev); 4280 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 4281 4282 /* Sysctls for all devices */ 4283 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "fc", 4284 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4285 ixgbe_set_flowcntl, "I", IXGBE_SYSCTL_DESC_SET_FC); 4286 4287 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "enable_aim", 4288 CTLFLAG_RW, 4289 &ixgbe_enable_aim, 1, "Interrupt Moderation"); 4290 4291 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "advertise_speed", 4292 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4293 ixgbe_set_advertise, "I", IXGBE_SYSCTL_DESC_ADV_SPEED); 4294 4295 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "thermal_test", 4296 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4297 ixgbe_sysctl_thermal_test, "I", "Thermal Test"); 4298 4299#ifdef IXGBE_DEBUG 4300 /* testing sysctls (for all devices) */ 4301 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "power_state", 4302 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4303 ixgbe_sysctl_power_state, "I", "PCI Power State"); 4304 4305 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "print_rss_config", 4306 CTLTYPE_STRING | CTLFLAG_RD, adapter, 0, 4307 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration"); 4308#endif 4309 /* for X550 series devices */ 4310 if (hw->mac.type >= ixgbe_mac_X550) 4311 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "dmac", 4312 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4313 ixgbe_sysctl_dmac, "I", "DMA Coalesce"); 4314 4315 /* for X552 backplane devices */ 4316 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) { 4317 struct sysctl_oid *eee_node; 4318 struct sysctl_oid_list *eee_list; 4319 4320 eee_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "eee", 4321 CTLFLAG_RD, NULL, 4322 "Energy Efficient Ethernet sysctls"); 4323 eee_list = SYSCTL_CHILDREN(eee_node); 4324 4325 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "enable", 4326 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4327 ixgbe_sysctl_eee_enable, "I", 4328 "Enable or Disable EEE"); 4329 4330 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "negotiated", 4331 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4332 ixgbe_sysctl_eee_negotiated, "I", 4333 "EEE negotiated on link"); 4334 4335 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_status", 4336 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4337 ixgbe_sysctl_eee_tx_lpi_status, "I", 4338 "Whether or not TX link is in LPI state"); 4339 4340 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "rx_lpi_status", 4341 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4342 ixgbe_sysctl_eee_rx_lpi_status, "I", 4343 "Whether or not RX link is in LPI state"); 4344 4345 SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_delay", 4346 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4347 ixgbe_sysctl_eee_tx_lpi_delay, "I", 4348 "TX LPI entry delay in microseconds"); 4349 } 4350 4351 /* for WoL-capable devices */ 4352 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 4353 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wol_enable", 4354 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4355 ixgbe_sysctl_wol_enable, "I", 4356 "Enable/Disable Wake on LAN"); 4357 4358 SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wufc", 4359 CTLTYPE_INT | CTLFLAG_RW, adapter, 0, 4360 ixgbe_sysctl_wufc, "I", 4361 "Enable/Disable Wake Up Filters"); 4362 } 4363 4364 /* for X552/X557-AT devices */ 4365 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) { 4366 struct sysctl_oid *phy_node; 4367 struct sysctl_oid_list *phy_list; 4368 4369 phy_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "phy", 4370 CTLFLAG_RD, NULL, 4371 "External PHY sysctls"); 4372 phy_list = SYSCTL_CHILDREN(phy_node); 4373 4374 SYSCTL_ADD_PROC(ctx, phy_list, OID_AUTO, "temp", 4375 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4376 ixgbe_sysctl_phy_temp, "I", 4377 "Current External PHY Temperature (Celsius)"); 4378 4379 SYSCTL_ADD_PROC(ctx, phy_list, OID_AUTO, "overtemp_occurred", 4380 CTLTYPE_INT | CTLFLAG_RD, adapter, 0, 4381 ixgbe_sysctl_phy_overtemp_occurred, "I", 4382 "External PHY High Temperature Event Occurred"); 4383 } 4384} 4385 4386/* 4387 * Add sysctl variables, one per statistic, to the system. 4388 */ 4389static void 4390ixgbe_add_hw_stats(struct adapter *adapter) 4391{ 4392 device_t dev = adapter->dev; 4393 4394 struct tx_ring *txr = adapter->tx_rings; 4395 struct rx_ring *rxr = adapter->rx_rings; 4396 4397 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); 4398 struct sysctl_oid *tree = device_get_sysctl_tree(dev); 4399 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 4400 struct ixgbe_hw_stats *stats = &adapter->stats.pf; 4401 4402 struct sysctl_oid *stat_node, *queue_node; 4403 struct sysctl_oid_list *stat_list, *queue_list; 4404 4405#define QUEUE_NAME_LEN 32 4406 char namebuf[QUEUE_NAME_LEN]; 4407 4408 /* Driver Statistics */ 4409 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", 4410 CTLFLAG_RD, &adapter->dropped_pkts, 4411 "Driver dropped packets"); 4412 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "mbuf_defrag_failed", 4413 CTLFLAG_RD, &adapter->mbuf_defrag_failed, 4414 "m_defrag() failed"); 4415 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_events", 4416 CTLFLAG_RD, &adapter->watchdog_events, 4417 "Watchdog timeouts"); 4418 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", 4419 CTLFLAG_RD, &adapter->link_irq, 4420 "Link MSIX IRQ Handled"); 4421 4422 for (int i = 0; i < adapter->num_queues; i++, txr++) { 4423 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4424 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4425 CTLFLAG_RD, NULL, "Queue Name"); 4426 queue_list = SYSCTL_CHILDREN(queue_node); 4427 4428 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate", 4429 CTLTYPE_UINT | CTLFLAG_RW, &adapter->queues[i], 4430 sizeof(&adapter->queues[i]), 4431 ixgbe_sysctl_interrupt_rate_handler, "IU", 4432 "Interrupt Rate"); 4433 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs", 4434 CTLFLAG_RD, &(adapter->queues[i].irqs), 4435 "irqs on this queue"); 4436 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", 4437 CTLTYPE_UINT | CTLFLAG_RD, txr, sizeof(txr), 4438 ixgbe_sysctl_tdh_handler, "IU", 4439 "Transmit Descriptor Head"); 4440 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", 4441 CTLTYPE_UINT | CTLFLAG_RD, txr, sizeof(txr), 4442 ixgbe_sysctl_tdt_handler, "IU", 4443 "Transmit Descriptor Tail"); 4444 SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "tso_tx", 4445 CTLFLAG_RD, &txr->tso_tx, 4446 "TSO"); 4447 SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "no_tx_dma_setup", 4448 CTLFLAG_RD, &txr->no_tx_dma_setup, 4449 "Driver tx dma failure in xmit"); 4450 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "no_desc_avail", 4451 CTLFLAG_RD, &txr->no_desc_avail, 4452 "Queue No Descriptor Available"); 4453 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", 4454 CTLFLAG_RD, &txr->total_packets, 4455 "Queue Packets Transmitted"); 4456 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "br_drops", 4457 CTLFLAG_RD, &txr->br->br_drops, 4458 "Packets dropped in buf_ring"); 4459 } 4460 4461 for (int i = 0; i < adapter->num_queues; i++, rxr++) { 4462 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4463 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4464 CTLFLAG_RD, NULL, "Queue Name"); 4465 queue_list = SYSCTL_CHILDREN(queue_node); 4466 4467 struct lro_ctrl *lro = &rxr->lro; 4468 4469 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); 4470 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, 4471 CTLFLAG_RD, NULL, "Queue Name"); 4472 queue_list = SYSCTL_CHILDREN(queue_node); 4473 4474 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", 4475 CTLTYPE_UINT | CTLFLAG_RD, rxr, sizeof(rxr), 4476 ixgbe_sysctl_rdh_handler, "IU", 4477 "Receive Descriptor Head"); 4478 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", 4479 CTLTYPE_UINT | CTLFLAG_RD, rxr, sizeof(rxr), 4480 ixgbe_sysctl_rdt_handler, "IU", 4481 "Receive Descriptor Tail"); 4482 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets", 4483 CTLFLAG_RD, &rxr->rx_packets, 4484 "Queue Packets Received"); 4485 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes", 4486 CTLFLAG_RD, &rxr->rx_bytes, 4487 "Queue Bytes Received"); 4488 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies", 4489 CTLFLAG_RD, &rxr->rx_copies, 4490 "Copied RX Frames"); 4491 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued", 4492 CTLFLAG_RD, &lro->lro_queued, 0, 4493 "LRO Queued"); 4494 SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed", 4495 CTLFLAG_RD, &lro->lro_flushed, 0, 4496 "LRO Flushed"); 4497 } 4498 4499 /* MAC stats get the own sub node */ 4500 4501 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats", 4502 CTLFLAG_RD, NULL, "MAC Statistics"); 4503 stat_list = SYSCTL_CHILDREN(stat_node); 4504 4505 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", 4506 CTLFLAG_RD, &stats->crcerrs, 4507 "CRC Errors"); 4508 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs", 4509 CTLFLAG_RD, &stats->illerrc, 4510 "Illegal Byte Errors"); 4511 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs", 4512 CTLFLAG_RD, &stats->errbc, 4513 "Byte Errors"); 4514 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards", 4515 CTLFLAG_RD, &stats->mspdc, 4516 "MAC Short Packets Discarded"); 4517 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults", 4518 CTLFLAG_RD, &stats->mlfc, 4519 "MAC Local Faults"); 4520 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults", 4521 CTLFLAG_RD, &stats->mrfc, 4522 "MAC Remote Faults"); 4523 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs", 4524 CTLFLAG_RD, &stats->rlec, 4525 "Receive Length Errors"); 4526 4527 /* Flow Control stats */ 4528 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", 4529 CTLFLAG_RD, &stats->lxontxc, 4530 "Link XON Transmitted"); 4531 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", 4532 CTLFLAG_RD, &stats->lxonrxc, 4533 "Link XON Received"); 4534 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", 4535 CTLFLAG_RD, &stats->lxofftxc, 4536 "Link XOFF Transmitted"); 4537 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", 4538 CTLFLAG_RD, &stats->lxoffrxc, 4539 "Link XOFF Received"); 4540 4541 /* Packet Reception Stats */ 4542 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd", 4543 CTLFLAG_RD, &stats->tor, 4544 "Total Octets Received"); 4545 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd", 4546 CTLFLAG_RD, &stats->gorc, 4547 "Good Octets Received"); 4548 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd", 4549 CTLFLAG_RD, &stats->tpr, 4550 "Total Packets Received"); 4551 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd", 4552 CTLFLAG_RD, &stats->gprc, 4553 "Good Packets Received"); 4554 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd", 4555 CTLFLAG_RD, &stats->mprc, 4556 "Multicast Packets Received"); 4557 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd", 4558 CTLFLAG_RD, &stats->bprc, 4559 "Broadcast Packets Received"); 4560 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", 4561 CTLFLAG_RD, &stats->prc64, 4562 "64 byte frames received "); 4563 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", 4564 CTLFLAG_RD, &stats->prc127, 4565 "65-127 byte frames received"); 4566 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", 4567 CTLFLAG_RD, &stats->prc255, 4568 "128-255 byte frames received"); 4569 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", 4570 CTLFLAG_RD, &stats->prc511, 4571 "256-511 byte frames received"); 4572 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", 4573 CTLFLAG_RD, &stats->prc1023, 4574 "512-1023 byte frames received"); 4575 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", 4576 CTLFLAG_RD, &stats->prc1522, 4577 "1023-1522 byte frames received"); 4578 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized", 4579 CTLFLAG_RD, &stats->ruc, 4580 "Receive Undersized"); 4581 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", 4582 CTLFLAG_RD, &stats->rfc, 4583 "Fragmented Packets Received "); 4584 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized", 4585 CTLFLAG_RD, &stats->roc, 4586 "Oversized Packets Received"); 4587 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd", 4588 CTLFLAG_RD, &stats->rjc, 4589 "Received Jabber"); 4590 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd", 4591 CTLFLAG_RD, &stats->mngprc, 4592 "Management Packets Received"); 4593 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd", 4594 CTLFLAG_RD, &stats->mngptc, 4595 "Management Packets Dropped"); 4596 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs", 4597 CTLFLAG_RD, &stats->xec, 4598 "Checksum Errors"); 4599 4600 /* Packet Transmission Stats */ 4601 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", 4602 CTLFLAG_RD, &stats->gotc, 4603 "Good Octets Transmitted"); 4604 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", 4605 CTLFLAG_RD, &stats->tpt, 4606 "Total Packets Transmitted"); 4607 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", 4608 CTLFLAG_RD, &stats->gptc, 4609 "Good Packets Transmitted"); 4610 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", 4611 CTLFLAG_RD, &stats->bptc, 4612 "Broadcast Packets Transmitted"); 4613 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", 4614 CTLFLAG_RD, &stats->mptc, 4615 "Multicast Packets Transmitted"); 4616 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd", 4617 CTLFLAG_RD, &stats->mngptc, 4618 "Management Packets Transmitted"); 4619 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", 4620 CTLFLAG_RD, &stats->ptc64, 4621 "64 byte frames transmitted "); 4622 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", 4623 CTLFLAG_RD, &stats->ptc127, 4624 "65-127 byte frames transmitted"); 4625 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", 4626 CTLFLAG_RD, &stats->ptc255, 4627 "128-255 byte frames transmitted"); 4628 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", 4629 CTLFLAG_RD, &stats->ptc511, 4630 "256-511 byte frames transmitted"); 4631 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", 4632 CTLFLAG_RD, &stats->ptc1023, 4633 "512-1023 byte frames transmitted"); 4634 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", 4635 CTLFLAG_RD, &stats->ptc1522, 4636 "1024-1522 byte frames transmitted"); 4637} 4638 4639static void 4640ixgbe_set_sysctl_value(struct adapter *adapter, const char *name, 4641 const char *description, int *limit, int value) 4642{ 4643 *limit = value; 4644 SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev), 4645 SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), 4646 OID_AUTO, name, CTLFLAG_RW, limit, value, description); 4647} 4648 4649/* 4650** Set flow control using sysctl: 4651** Flow control values: 4652** 0 - off 4653** 1 - rx pause 4654** 2 - tx pause 4655** 3 - full 4656*/ 4657static int 4658ixgbe_set_flowcntl(SYSCTL_HANDLER_ARGS) 4659{ 4660 int error, last; 4661 struct adapter *adapter = (struct adapter *) arg1; 4662 4663 last = adapter->fc; 4664 error = sysctl_handle_int(oidp, &adapter->fc, 0, req); 4665 if ((error) || (req->newptr == NULL)) 4666 return (error); 4667 4668 /* Don't bother if it's not changed */ 4669 if (adapter->fc == last) 4670 return (0); 4671 4672 switch (adapter->fc) { 4673 case ixgbe_fc_rx_pause: 4674 case ixgbe_fc_tx_pause: 4675 case ixgbe_fc_full: 4676 adapter->hw.fc.requested_mode = adapter->fc; 4677 if (adapter->num_queues > 1) 4678 ixgbe_disable_rx_drop(adapter); 4679 break; 4680 case ixgbe_fc_none: 4681 adapter->hw.fc.requested_mode = ixgbe_fc_none; 4682 if (adapter->num_queues > 1) 4683 ixgbe_enable_rx_drop(adapter); 4684 break; 4685 default: 4686 adapter->fc = last; 4687 return (EINVAL); 4688 } 4689 /* Don't autoneg if forcing a value */ 4690 adapter->hw.fc.disable_fc_autoneg = TRUE; 4691 ixgbe_fc_enable(&adapter->hw); 4692 return error; 4693} 4694 4695/* 4696** Control advertised link speed: 4697** Flags: 4698** 0x1 - advertise 100 Mb 4699** 0x2 - advertise 1G 4700** 0x4 - advertise 10G 4701*/ 4702static int 4703ixgbe_set_advertise(SYSCTL_HANDLER_ARGS) 4704{ 4705 int error = 0, requested; 4706 struct adapter *adapter; 4707 device_t dev; 4708 struct ixgbe_hw *hw; 4709 ixgbe_link_speed speed = 0; 4710 4711 adapter = (struct adapter *) arg1; 4712 dev = adapter->dev; 4713 hw = &adapter->hw; 4714 4715 requested = adapter->advertise; 4716 error = sysctl_handle_int(oidp, &requested, 0, req); 4717 if ((error) || (req->newptr == NULL)) 4718 return (error); 4719 4720 /* No speed changes for backplane media */ 4721 if (hw->phy.media_type == ixgbe_media_type_backplane) 4722 return (ENODEV); 4723 4724 /* Checks to validate new value */ 4725 if (adapter->advertise == requested) /* no change */ 4726 return (0); 4727 4728 if (!((hw->phy.media_type == ixgbe_media_type_copper) || 4729 (hw->phy.multispeed_fiber))) { 4730 device_printf(dev, 4731 "Advertised speed can only be set on copper or " 4732 "multispeed fiber media types.\n"); 4733 return (EINVAL); 4734 } 4735 4736 if (requested < 0x1 || requested > 0x7) { 4737 device_printf(dev, 4738 "Invalid advertised speed; valid modes are 0x1 through 0x7\n"); 4739 return (EINVAL); 4740 } 4741 4742 if ((requested & 0x1) 4743 && (hw->mac.type != ixgbe_mac_X540) 4744 && (hw->mac.type != ixgbe_mac_X550)) { 4745 device_printf(dev, "Set Advertise: 100Mb on X540/X550 only\n"); 4746 return (EINVAL); 4747 } 4748 4749 /* Set new value and report new advertised mode */ 4750 if (requested & 0x1) 4751 speed |= IXGBE_LINK_SPEED_100_FULL; 4752 if (requested & 0x2) 4753 speed |= IXGBE_LINK_SPEED_1GB_FULL; 4754 if (requested & 0x4) 4755 speed |= IXGBE_LINK_SPEED_10GB_FULL; 4756 4757 hw->mac.autotry_restart = TRUE; 4758 hw->mac.ops.setup_link(hw, speed, TRUE); 4759 adapter->advertise = requested; 4760 4761 return (error); 4762} 4763 4764/* 4765 * The following two sysctls are for X552/X557-AT devices; 4766 * they deal with the external PHY used in them. 4767 */ 4768static int 4769ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS) 4770{ 4771 struct adapter *adapter = (struct adapter *) arg1; 4772 struct ixgbe_hw *hw = &adapter->hw; 4773 u16 reg; 4774 4775 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4776 device_printf(adapter->dev, 4777 "Device has no supported external thermal sensor.\n"); 4778 return (ENODEV); 4779 } 4780 4781 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, 4782 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 4783 ®)) { 4784 device_printf(adapter->dev, 4785 "Error reading from PHY's current temperature register\n"); 4786 return (EAGAIN); 4787 } 4788 4789 /* Shift temp for output */ 4790 reg = reg >> 8; 4791 4792 return (sysctl_handle_int(oidp, NULL, reg, req)); 4793} 4794 4795/* 4796 * Reports whether the current PHY temperature is over 4797 * the overtemp threshold. 4798 * - This is reported directly from the PHY 4799 */ 4800static int 4801ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS) 4802{ 4803 struct adapter *adapter = (struct adapter *) arg1; 4804 struct ixgbe_hw *hw = &adapter->hw; 4805 u16 reg; 4806 4807 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) { 4808 device_printf(adapter->dev, 4809 "Device has no supported external thermal sensor.\n"); 4810 return (ENODEV); 4811 } 4812 4813 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, 4814 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 4815 ®)) { 4816 device_printf(adapter->dev, 4817 "Error reading from PHY's temperature status register\n"); 4818 return (EAGAIN); 4819 } 4820 4821 /* Get occurrence bit */ 4822 reg = !!(reg & 0x4000); 4823 return (sysctl_handle_int(oidp, 0, reg, req)); 4824} 4825 4826/* 4827** Thermal Shutdown Trigger (internal MAC) 4828** - Set this to 1 to cause an overtemp event to occur 4829*/ 4830static int 4831ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS) 4832{ 4833 struct adapter *adapter = (struct adapter *) arg1; 4834 struct ixgbe_hw *hw = &adapter->hw; 4835 int error, fire = 0; 4836 4837 error = sysctl_handle_int(oidp, &fire, 0, req); 4838 if ((error) || (req->newptr == NULL)) 4839 return (error); 4840 4841 if (fire) { 4842 u32 reg = IXGBE_READ_REG(hw, IXGBE_EICS); 4843 reg |= IXGBE_EICR_TS; 4844 IXGBE_WRITE_REG(hw, IXGBE_EICS, reg); 4845 } 4846 4847 return (0); 4848} 4849 4850/* 4851** Manage DMA Coalescing. 4852** Control values: 4853** 0/1 - off / on (use default value of 1000) 4854** 4855** Legal timer values are: 4856** 50,100,250,500,1000,2000,5000,10000 4857** 4858** Turning off interrupt moderation will also turn this off. 4859*/ 4860static int 4861ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS) 4862{ 4863 struct adapter *adapter = (struct adapter *) arg1; 4864 struct ifnet *ifp = adapter->ifp; 4865 int error; 4866 u32 newval; 4867 4868 newval = adapter->dmac; 4869 error = sysctl_handle_int(oidp, &newval, 0, req); 4870 if ((error) || (req->newptr == NULL)) 4871 return (error); 4872 4873 switch (newval) { 4874 case 0: 4875 /* Disabled */ 4876 adapter->dmac = 0; 4877 break; 4878 case 1: 4879 /* Enable and use default */ 4880 adapter->dmac = 1000; 4881 break; 4882 case 50: 4883 case 100: 4884 case 250: 4885 case 500: 4886 case 1000: 4887 case 2000: 4888 case 5000: 4889 case 10000: 4890 /* Legal values - allow */ 4891 adapter->dmac = newval; 4892 break; 4893 default: 4894 /* Do nothing, illegal value */ 4895 return (EINVAL); 4896 } 4897 4898 /* Re-initialize hardware if it's already running */ 4899 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 4900 ixgbe_init(adapter); 4901 4902 return (0); 4903} 4904 4905#ifdef IXGBE_DEBUG 4906/** 4907 * Sysctl to test power states 4908 * Values: 4909 * 0 - set device to D0 4910 * 3 - set device to D3 4911 * (none) - get current device power state 4912 */ 4913static int 4914ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS) 4915{ 4916 struct adapter *adapter = (struct adapter *) arg1; 4917 device_t dev = adapter->dev; 4918 int curr_ps, new_ps, error = 0; 4919 4920 curr_ps = new_ps = pci_get_powerstate(dev); 4921 4922 error = sysctl_handle_int(oidp, &new_ps, 0, req); 4923 if ((error) || (req->newptr == NULL)) 4924 return (error); 4925 4926 if (new_ps == curr_ps) 4927 return (0); 4928 4929 if (new_ps == 3 && curr_ps == 0) 4930 error = DEVICE_SUSPEND(dev); 4931 else if (new_ps == 0 && curr_ps == 3) 4932 error = DEVICE_RESUME(dev); 4933 else 4934 return (EINVAL); 4935 4936 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev)); 4937 4938 return (error); 4939} 4940#endif 4941/* 4942 * Sysctl to enable/disable the WoL capability, if supported by the adapter. 4943 * Values: 4944 * 0 - disabled 4945 * 1 - enabled 4946 */ 4947static int 4948ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS) 4949{ 4950 struct adapter *adapter = (struct adapter *) arg1; 4951 struct ixgbe_hw *hw = &adapter->hw; 4952 int new_wol_enabled; 4953 int error = 0; 4954 4955 new_wol_enabled = hw->wol_enabled; 4956 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req); 4957 if ((error) || (req->newptr == NULL)) 4958 return (error); 4959 new_wol_enabled = !!(new_wol_enabled); 4960 if (new_wol_enabled == hw->wol_enabled) 4961 return (0); 4962 4963 if (new_wol_enabled > 0 && !adapter->wol_support) 4964 return (ENODEV); 4965 else 4966 hw->wol_enabled = new_wol_enabled; 4967 4968 return (0); 4969} 4970 4971/* 4972 * Sysctl to enable/disable the Energy Efficient Ethernet capability, 4973 * if supported by the adapter. 4974 * Values: 4975 * 0 - disabled 4976 * 1 - enabled 4977 */ 4978static int 4979ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS) 4980{ 4981 struct adapter *adapter = (struct adapter *) arg1; 4982 struct ixgbe_hw *hw = &adapter->hw; 4983 struct ifnet *ifp = adapter->ifp; 4984 int new_eee_enabled, error = 0; 4985 4986 new_eee_enabled = adapter->eee_enabled; 4987 error = sysctl_handle_int(oidp, &new_eee_enabled, 0, req); 4988 if ((error) || (req->newptr == NULL)) 4989 return (error); 4990 new_eee_enabled = !!(new_eee_enabled); 4991 if (new_eee_enabled == adapter->eee_enabled) 4992 return (0); 4993 4994 if (new_eee_enabled > 0 && !hw->mac.ops.setup_eee) 4995 return (ENODEV); 4996 else 4997 adapter->eee_enabled = new_eee_enabled; 4998 4999 /* Re-initialize hardware if it's already running */ 5000 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 5001 ixgbe_init(adapter); 5002 5003 return (0); 5004} 5005 5006/* 5007 * Read-only sysctl indicating whether EEE support was negotiated 5008 * on the link. 5009 */ 5010static int 5011ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS) 5012{ 5013 struct adapter *adapter = (struct adapter *) arg1; 5014 struct ixgbe_hw *hw = &adapter->hw; 5015 bool status; 5016 5017 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & IXGBE_EEE_STAT_NEG); 5018 5019 return (sysctl_handle_int(oidp, 0, status, req)); 5020} 5021 5022/* 5023 * Read-only sysctl indicating whether RX Link is in LPI state. 5024 */ 5025static int 5026ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS) 5027{ 5028 struct adapter *adapter = (struct adapter *) arg1; 5029 struct ixgbe_hw *hw = &adapter->hw; 5030 bool status; 5031 5032 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & 5033 IXGBE_EEE_RX_LPI_STATUS); 5034 5035 return (sysctl_handle_int(oidp, 0, status, req)); 5036} 5037 5038/* 5039 * Read-only sysctl indicating whether TX Link is in LPI state. 5040 */ 5041static int 5042ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS) 5043{ 5044 struct adapter *adapter = (struct adapter *) arg1; 5045 struct ixgbe_hw *hw = &adapter->hw; 5046 bool status; 5047 5048 status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & 5049 IXGBE_EEE_TX_LPI_STATUS); 5050 5051 return (sysctl_handle_int(oidp, 0, status, req)); 5052} 5053 5054/* 5055 * Read-only sysctl indicating TX Link LPI delay 5056 */ 5057static int 5058ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS) 5059{ 5060 struct adapter *adapter = (struct adapter *) arg1; 5061 struct ixgbe_hw *hw = &adapter->hw; 5062 u32 reg; 5063 5064 reg = IXGBE_READ_REG(hw, IXGBE_EEE_SU); 5065 5066 return (sysctl_handle_int(oidp, 0, reg >> 26, req)); 5067} 5068 5069/* 5070 * Sysctl to enable/disable the types of packets that the 5071 * adapter will wake up on upon receipt. 5072 * WUFC - Wake Up Filter Control 5073 * Flags: 5074 * 0x1 - Link Status Change 5075 * 0x2 - Magic Packet 5076 * 0x4 - Direct Exact 5077 * 0x8 - Directed Multicast 5078 * 0x10 - Broadcast 5079 * 0x20 - ARP/IPv4 Request Packet 5080 * 0x40 - Direct IPv4 Packet 5081 * 0x80 - Direct IPv6 Packet 5082 * 5083 * Setting another flag will cause the sysctl to return an 5084 * error. 5085 */ 5086static int 5087ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS) 5088{ 5089 struct adapter *adapter = (struct adapter *) arg1; 5090 int error = 0; 5091 u32 new_wufc; 5092 5093 new_wufc = adapter->wufc; 5094 5095 error = sysctl_handle_int(oidp, &new_wufc, 0, req); 5096 if ((error) || (req->newptr == NULL)) 5097 return (error); 5098 if (new_wufc == adapter->wufc) 5099 return (0); 5100 5101 if (new_wufc & 0xffffff00) 5102 return (EINVAL); 5103 else { 5104 new_wufc &= 0xff; 5105 new_wufc |= (0xffffff & adapter->wufc); 5106 adapter->wufc = new_wufc; 5107 } 5108 5109 return (0); 5110} 5111 5112#ifdef IXGBE_DEBUG 5113static int 5114ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS) 5115{ 5116 struct adapter *adapter = (struct adapter *)arg1; 5117 struct ixgbe_hw *hw = &adapter->hw; 5118 device_t dev = adapter->dev; 5119 int error = 0, reta_size; 5120 struct sbuf *buf; 5121 u32 reg; 5122 5123 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 5124 if (!buf) { 5125 device_printf(dev, "Could not allocate sbuf for output.\n"); 5126 return (ENOMEM); 5127 } 5128 5129 // TODO: use sbufs to make a string to print out 5130 /* Set multiplier for RETA setup and table size based on MAC */ 5131 switch (adapter->hw.mac.type) { 5132 case ixgbe_mac_X550: 5133 case ixgbe_mac_X550EM_x: 5134 reta_size = 128; 5135 break; 5136 default: 5137 reta_size = 32; 5138 break; 5139 } 5140 5141 /* Print out the redirection table */ 5142 sbuf_cat(buf, "\n"); 5143 for (int i = 0; i < reta_size; i++) { 5144 if (i < 32) { 5145 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i)); 5146 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg); 5147 } else { 5148 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32)); 5149 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg); 5150 } 5151 } 5152 5153 // TODO: print more config 5154 5155 error = sbuf_finish(buf); 5156 if (error) 5157 device_printf(dev, "Error finishing sbuf: %d\n", error); 5158 5159 sbuf_delete(buf); 5160 return (0); 5161} 5162#endif /* IXGBE_DEBUG */ 5163 5164/* 5165** Enable the hardware to drop packets when the buffer is 5166** full. This is useful when multiqueue,so that no single 5167** queue being full stalls the entire RX engine. We only 5168** enable this when Multiqueue AND when Flow Control is 5169** disabled. 5170*/ 5171static void 5172ixgbe_enable_rx_drop(struct adapter *adapter) 5173{ 5174 struct ixgbe_hw *hw = &adapter->hw; 5175 5176 for (int i = 0; i < adapter->num_queues; i++) { 5177 struct rx_ring *rxr = &adapter->rx_rings[i]; 5178 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5179 srrctl |= IXGBE_SRRCTL_DROP_EN; 5180 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5181 } 5182#ifdef PCI_IOV 5183 /* enable drop for each vf */ 5184 for (int i = 0; i < adapter->num_vfs; i++) { 5185 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5186 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | 5187 IXGBE_QDE_ENABLE)); 5188 } 5189#endif 5190} 5191 5192static void 5193ixgbe_disable_rx_drop(struct adapter *adapter) 5194{ 5195 struct ixgbe_hw *hw = &adapter->hw; 5196 5197 for (int i = 0; i < adapter->num_queues; i++) { 5198 struct rx_ring *rxr = &adapter->rx_rings[i]; 5199 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); 5200 srrctl &= ~IXGBE_SRRCTL_DROP_EN; 5201 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); 5202 } 5203#ifdef PCI_IOV 5204 /* disable drop for each vf */ 5205 for (int i = 0; i < adapter->num_vfs; i++) { 5206 IXGBE_WRITE_REG(hw, IXGBE_QDE, 5207 (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); 5208 } 5209#endif 5210} 5211 5212static void 5213ixgbe_rearm_queues(struct adapter *adapter, u64 queues) 5214{ 5215 u32 mask; 5216 5217 switch (adapter->hw.mac.type) { 5218 case ixgbe_mac_82598EB: 5219 mask = (IXGBE_EIMS_RTX_QUEUE & queues); 5220 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 5221 break; 5222 case ixgbe_mac_82599EB: 5223 case ixgbe_mac_X540: 5224 case ixgbe_mac_X550: 5225 case ixgbe_mac_X550EM_x: 5226 mask = (queues & 0xFFFFFFFF); 5227 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); 5228 mask = (queues >> 32); 5229 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask); 5230 break; 5231 default: 5232 break; 5233 } 5234} 5235 5236#ifdef PCI_IOV 5237 5238/* 5239** Support functions for SRIOV/VF management 5240*/ 5241 5242static void 5243ixgbe_ping_all_vfs(struct adapter *adapter) 5244{ 5245 struct ixgbe_vf *vf; 5246 5247 for (int i = 0; i < adapter->num_vfs; i++) { 5248 vf = &adapter->vfs[i]; 5249 if (vf->flags & IXGBE_VF_ACTIVE) 5250 ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); 5251 } 5252} 5253 5254 5255static void 5256ixgbe_vf_set_default_vlan(struct adapter *adapter, struct ixgbe_vf *vf, 5257 uint16_t tag) 5258{ 5259 struct ixgbe_hw *hw; 5260 uint32_t vmolr, vmvir; 5261 5262 hw = &adapter->hw; 5263 5264 vf->vlan_tag = tag; 5265 5266 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf->pool)); 5267 5268 /* Do not receive packets that pass inexact filters. */ 5269 vmolr &= ~(IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_ROPE); 5270 5271 /* Disable Multicast Promicuous Mode. */ 5272 vmolr &= ~IXGBE_VMOLR_MPE; 5273 5274 /* Accept broadcasts. */ 5275 vmolr |= IXGBE_VMOLR_BAM; 5276 5277 if (tag == 0) { 5278 /* Accept non-vlan tagged traffic. */ 5279 //vmolr |= IXGBE_VMOLR_AUPE; 5280 5281 /* Allow VM to tag outgoing traffic; no default tag. */ 5282 vmvir = 0; 5283 } else { 5284 /* Require vlan-tagged traffic. */ 5285 vmolr &= ~IXGBE_VMOLR_AUPE; 5286 5287 /* Tag all traffic with provided vlan tag. */ 5288 vmvir = (tag | IXGBE_VMVIR_VLANA_DEFAULT); 5289 } 5290 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf->pool), vmolr); 5291 IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf->pool), vmvir); 5292} 5293 5294 5295static boolean_t 5296ixgbe_vf_frame_size_compatible(struct adapter *adapter, struct ixgbe_vf *vf) 5297{ 5298 5299 /* 5300 * Frame size compatibility between PF and VF is only a problem on 5301 * 82599-based cards. X540 and later support any combination of jumbo 5302 * frames on PFs and VFs. 5303 */ 5304 if (adapter->hw.mac.type != ixgbe_mac_82599EB) 5305 return (TRUE); 5306 5307 switch (vf->api_ver) { 5308 case IXGBE_API_VER_1_0: 5309 case IXGBE_API_VER_UNKNOWN: 5310 /* 5311 * On legacy (1.0 and older) VF versions, we don't support jumbo 5312 * frames on either the PF or the VF. 5313 */ 5314 if (adapter->max_frame_size > ETHER_MAX_LEN || 5315 vf->max_frame_size > ETHER_MAX_LEN) 5316 return (FALSE); 5317 5318 return (TRUE); 5319 5320 break; 5321 case IXGBE_API_VER_1_1: 5322 default: 5323 /* 5324 * 1.1 or later VF versions always work if they aren't using 5325 * jumbo frames. 5326 */ 5327 if (vf->max_frame_size <= ETHER_MAX_LEN) 5328 return (TRUE); 5329 5330 /* 5331 * Jumbo frames only work with VFs if the PF is also using jumbo 5332 * frames. 5333 */ 5334 if (adapter->max_frame_size <= ETHER_MAX_LEN) 5335 return (TRUE); 5336 5337 return (FALSE); 5338 5339 } 5340} 5341 5342 5343static void 5344ixgbe_process_vf_reset(struct adapter *adapter, struct ixgbe_vf *vf) 5345{ 5346 ixgbe_vf_set_default_vlan(adapter, vf, vf->default_vlan); 5347 5348 // XXX clear multicast addresses 5349 5350 ixgbe_clear_rar(&adapter->hw, vf->rar_index); 5351 5352 vf->api_ver = IXGBE_API_VER_UNKNOWN; 5353} 5354 5355 5356static void 5357ixgbe_vf_enable_transmit(struct adapter *adapter, struct ixgbe_vf *vf) 5358{ 5359 struct ixgbe_hw *hw; 5360 uint32_t vf_index, vfte; 5361 5362 hw = &adapter->hw; 5363 5364 vf_index = IXGBE_VF_INDEX(vf->pool); 5365 vfte = IXGBE_READ_REG(hw, IXGBE_VFTE(vf_index)); 5366 vfte |= IXGBE_VF_BIT(vf->pool); 5367 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_index), vfte); 5368} 5369 5370 5371static void 5372ixgbe_vf_enable_receive(struct adapter *adapter, struct ixgbe_vf *vf) 5373{ 5374 struct ixgbe_hw *hw; 5375 uint32_t vf_index, vfre; 5376 5377 hw = &adapter->hw; 5378 5379 vf_index = IXGBE_VF_INDEX(vf->pool); 5380 vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(vf_index)); 5381 if (ixgbe_vf_frame_size_compatible(adapter, vf)) 5382 vfre |= IXGBE_VF_BIT(vf->pool); 5383 else 5384 vfre &= ~IXGBE_VF_BIT(vf->pool); 5385 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_index), vfre); 5386} 5387 5388 5389static void 5390ixgbe_vf_reset_msg(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5391{ 5392 struct ixgbe_hw *hw; 5393 uint32_t ack; 5394 uint32_t resp[IXGBE_VF_PERMADDR_MSG_LEN]; 5395 5396 hw = &adapter->hw; 5397 5398 ixgbe_process_vf_reset(adapter, vf); 5399 5400 if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { 5401 ixgbe_set_rar(&adapter->hw, vf->rar_index, 5402 vf->ether_addr, vf->pool, TRUE); 5403 ack = IXGBE_VT_MSGTYPE_ACK; 5404 } else 5405 ack = IXGBE_VT_MSGTYPE_NACK; 5406 5407 ixgbe_vf_enable_transmit(adapter, vf); 5408 ixgbe_vf_enable_receive(adapter, vf); 5409 5410 vf->flags |= IXGBE_VF_CTS; 5411 5412 resp[0] = IXGBE_VF_RESET | ack | IXGBE_VT_MSGTYPE_CTS; 5413 bcopy(vf->ether_addr, &resp[1], ETHER_ADDR_LEN); 5414 resp[3] = hw->mac.mc_filter_type; 5415 ixgbe_write_mbx(hw, resp, IXGBE_VF_PERMADDR_MSG_LEN, vf->pool); 5416} 5417 5418 5419static void 5420ixgbe_vf_set_mac(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5421{ 5422 uint8_t *mac; 5423 5424 mac = (uint8_t*)&msg[1]; 5425 5426 /* Check that the VF has permission to change the MAC address. */ 5427 if (!(vf->flags & IXGBE_VF_CAP_MAC) && ixgbe_vf_mac_changed(vf, mac)) { 5428 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5429 return; 5430 } 5431 5432 if (ixgbe_validate_mac_addr(mac) != 0) { 5433 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5434 return; 5435 } 5436 5437 bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); 5438 5439 ixgbe_set_rar(&adapter->hw, vf->rar_index, vf->ether_addr, 5440 vf->pool, TRUE); 5441 5442 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5443} 5444 5445 5446/* 5447** VF multicast addresses are set by using the appropriate bit in 5448** 1 of 128 32 bit addresses (4096 possible). 5449*/ 5450static void 5451ixgbe_vf_set_mc_addr(struct adapter *adapter, struct ixgbe_vf *vf, u32 *msg) 5452{ 5453 u16 *list = (u16*)&msg[1]; 5454 int entries; 5455 u32 vmolr, vec_bit, vec_reg, mta_reg; 5456 5457 entries = (msg[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; 5458 entries = min(entries, IXGBE_MAX_VF_MC); 5459 5460 vmolr = IXGBE_READ_REG(&adapter->hw, IXGBE_VMOLR(vf->pool)); 5461 5462 vf->num_mc_hashes = entries; 5463 5464 /* Set the appropriate MTA bit */ 5465 for (int i = 0; i < entries; i++) { 5466 vf->mc_hash[i] = list[i]; 5467 vec_reg = (vf->mc_hash[i] >> 5) & 0x7F; 5468 vec_bit = vf->mc_hash[i] & 0x1F; 5469 mta_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_MTA(vec_reg)); 5470 mta_reg |= (1 << vec_bit); 5471 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MTA(vec_reg), mta_reg); 5472 } 5473 5474 vmolr |= IXGBE_VMOLR_ROMPE; 5475 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(vf->pool), vmolr); 5476 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5477 return; 5478} 5479 5480 5481static void 5482ixgbe_vf_set_vlan(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5483{ 5484 struct ixgbe_hw *hw; 5485 int enable; 5486 uint16_t tag; 5487 5488 hw = &adapter->hw; 5489 enable = IXGBE_VT_MSGINFO(msg[0]); 5490 tag = msg[1] & IXGBE_VLVF_VLANID_MASK; 5491 5492 if (!(vf->flags & IXGBE_VF_CAP_VLAN)) { 5493 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5494 return; 5495 } 5496 5497 /* It is illegal to enable vlan tag 0. */ 5498 if (tag == 0 && enable != 0){ 5499 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5500 return; 5501 } 5502 5503 ixgbe_set_vfta(hw, tag, vf->pool, enable); 5504 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5505} 5506 5507 5508static void 5509ixgbe_vf_set_lpe(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) 5510{ 5511 struct ixgbe_hw *hw; 5512 uint32_t vf_max_size, pf_max_size, mhadd; 5513 5514 hw = &adapter->hw; 5515 vf_max_size = msg[1]; 5516 5517 if (vf_max_size < ETHER_CRC_LEN) { 5518 /* We intentionally ACK invalid LPE requests. */ 5519 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5520 return; 5521 } 5522 5523 vf_max_size -= ETHER_CRC_LEN; 5524 5525 if (vf_max_size > IXGBE_MAX_FRAME_SIZE) { 5526 /* We intentionally ACK invalid LPE requests. */ 5527 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5528 return; 5529 } 5530 5531 vf->max_frame_size = vf_max_size; 5532 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5533 5534 /* 5535 * We might have to disable reception to this VF if the frame size is 5536 * not compatible with the config on the PF. 5537 */ 5538 ixgbe_vf_enable_receive(adapter, vf); 5539 5540 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 5541 pf_max_size = (mhadd & IXGBE_MHADD_MFS_MASK) >> IXGBE_MHADD_MFS_SHIFT; 5542 5543 if (pf_max_size < adapter->max_frame_size) { 5544 mhadd &= ~IXGBE_MHADD_MFS_MASK; 5545 mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; 5546 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); 5547 } 5548 5549 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5550} 5551 5552 5553static void 5554ixgbe_vf_set_macvlan(struct adapter *adapter, struct ixgbe_vf *vf, 5555 uint32_t *msg) 5556{ 5557 //XXX implement this 5558 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5559} 5560 5561 5562static void 5563ixgbe_vf_api_negotiate(struct adapter *adapter, struct ixgbe_vf *vf, 5564 uint32_t *msg) 5565{ 5566 5567 switch (msg[1]) { 5568 case IXGBE_API_VER_1_0: 5569 case IXGBE_API_VER_1_1: 5570 vf->api_ver = msg[1]; 5571 ixgbe_send_vf_ack(adapter, vf, msg[0]); 5572 break; 5573 default: 5574 vf->api_ver = IXGBE_API_VER_UNKNOWN; 5575 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5576 break; 5577 } 5578} 5579 5580 5581static void 5582ixgbe_vf_get_queues(struct adapter *adapter, struct ixgbe_vf *vf, 5583 uint32_t *msg) 5584{ 5585 struct ixgbe_hw *hw; 5586 uint32_t resp[IXGBE_VF_GET_QUEUES_RESP_LEN]; 5587 int num_queues; 5588 5589 hw = &adapter->hw; 5590 5591 /* GET_QUEUES is not supported on pre-1.1 APIs. */ 5592 switch (msg[0]) { 5593 case IXGBE_API_VER_1_0: 5594 case IXGBE_API_VER_UNKNOWN: 5595 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5596 return; 5597 } 5598 5599 resp[0] = IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK | 5600 IXGBE_VT_MSGTYPE_CTS; 5601 5602 num_queues = ixgbe_vf_queues(ixgbe_get_iov_mode(adapter)); 5603 resp[IXGBE_VF_TX_QUEUES] = num_queues; 5604 resp[IXGBE_VF_RX_QUEUES] = num_queues; 5605 resp[IXGBE_VF_TRANS_VLAN] = (vf->default_vlan != 0); 5606 resp[IXGBE_VF_DEF_QUEUE] = 0; 5607 5608 ixgbe_write_mbx(hw, resp, IXGBE_VF_GET_QUEUES_RESP_LEN, vf->pool); 5609} 5610 5611 5612static void 5613ixgbe_process_vf_msg(struct adapter *adapter, struct ixgbe_vf *vf) 5614{ 5615 struct ixgbe_hw *hw; 5616 uint32_t msg[IXGBE_VFMAILBOX_SIZE]; 5617 int error; 5618 5619 hw = &adapter->hw; 5620 5621 error = ixgbe_read_mbx(hw, msg, IXGBE_VFMAILBOX_SIZE, vf->pool); 5622 5623 if (error != 0) 5624 return; 5625 5626 CTR3(KTR_MALLOC, "%s: received msg %x from %d", 5627 adapter->ifp->if_xname, msg[0], vf->pool); 5628 if (msg[0] == IXGBE_VF_RESET) { 5629 ixgbe_vf_reset_msg(adapter, vf, msg); 5630 return; 5631 } 5632 5633 if (!(vf->flags & IXGBE_VF_CTS)) { 5634 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5635 return; 5636 } 5637 5638 switch (msg[0] & IXGBE_VT_MSG_MASK) { 5639 case IXGBE_VF_SET_MAC_ADDR: 5640 ixgbe_vf_set_mac(adapter, vf, msg); 5641 break; 5642 case IXGBE_VF_SET_MULTICAST: 5643 ixgbe_vf_set_mc_addr(adapter, vf, msg); 5644 break; 5645 case IXGBE_VF_SET_VLAN: 5646 ixgbe_vf_set_vlan(adapter, vf, msg); 5647 break; 5648 case IXGBE_VF_SET_LPE: 5649 ixgbe_vf_set_lpe(adapter, vf, msg); 5650 break; 5651 case IXGBE_VF_SET_MACVLAN: 5652 ixgbe_vf_set_macvlan(adapter, vf, msg); 5653 break; 5654 case IXGBE_VF_API_NEGOTIATE: 5655 ixgbe_vf_api_negotiate(adapter, vf, msg); 5656 break; 5657 case IXGBE_VF_GET_QUEUES: 5658 ixgbe_vf_get_queues(adapter, vf, msg); 5659 break; 5660 default: 5661 ixgbe_send_vf_nack(adapter, vf, msg[0]); 5662 } 5663} 5664 5665 5666/* 5667 * Tasklet for handling VF -> PF mailbox messages. 5668 */ 5669static void 5670ixgbe_handle_mbx(void *context, int pending) 5671{ 5672 struct adapter *adapter; 5673 struct ixgbe_hw *hw; 5674 struct ixgbe_vf *vf; 5675 int i; 5676 5677 adapter = context; 5678 hw = &adapter->hw; 5679 5680 IXGBE_CORE_LOCK(adapter); 5681 for (i = 0; i < adapter->num_vfs; i++) { 5682 vf = &adapter->vfs[i]; 5683 5684 if (vf->flags & IXGBE_VF_ACTIVE) { 5685 if (ixgbe_check_for_rst(hw, vf->pool) == 0) 5686 ixgbe_process_vf_reset(adapter, vf); 5687 5688 if (ixgbe_check_for_msg(hw, vf->pool) == 0) 5689 ixgbe_process_vf_msg(adapter, vf); 5690 5691 if (ixgbe_check_for_ack(hw, vf->pool) == 0) 5692 ixgbe_process_vf_ack(adapter, vf); 5693 } 5694 } 5695 IXGBE_CORE_UNLOCK(adapter); 5696} 5697 5698 5699static int 5700ixgbe_init_iov(device_t dev, u16 num_vfs, const nvlist_t *config) 5701{ 5702 struct adapter *adapter; 5703 enum ixgbe_iov_mode mode; 5704 5705 adapter = device_get_softc(dev); 5706 adapter->num_vfs = num_vfs; 5707 mode = ixgbe_get_iov_mode(adapter); 5708 5709 if (num_vfs > ixgbe_max_vfs(mode)) { 5710 adapter->num_vfs = 0; 5711 return (ENOSPC); 5712 } 5713 5714 IXGBE_CORE_LOCK(adapter); 5715 5716 adapter->vfs = malloc(sizeof(*adapter->vfs) * num_vfs, M_IXGBE, 5717 M_NOWAIT | M_ZERO); 5718 5719 if (adapter->vfs == NULL) { 5720 adapter->num_vfs = 0; 5721 IXGBE_CORE_UNLOCK(adapter); 5722 return (ENOMEM); 5723 } 5724 5725 ixgbe_init_locked(adapter); 5726 5727 IXGBE_CORE_UNLOCK(adapter); 5728 5729 return (0); 5730} 5731 5732 5733static void 5734ixgbe_uninit_iov(device_t dev) 5735{ 5736 struct ixgbe_hw *hw; 5737 struct adapter *adapter; 5738 uint32_t pf_reg, vf_reg; 5739 5740 adapter = device_get_softc(dev); 5741 hw = &adapter->hw; 5742 5743 IXGBE_CORE_LOCK(adapter); 5744 5745 /* Enable rx/tx for the PF and disable it for all VFs. */ 5746 pf_reg = IXGBE_VF_INDEX(adapter->pool); 5747 IXGBE_WRITE_REG(hw, IXGBE_VFRE(pf_reg), 5748 IXGBE_VF_BIT(adapter->pool)); 5749 IXGBE_WRITE_REG(hw, IXGBE_VFTE(pf_reg), 5750 IXGBE_VF_BIT(adapter->pool)); 5751 5752 if (pf_reg == 0) 5753 vf_reg = 1; 5754 else 5755 vf_reg = 0; 5756 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 0); 5757 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 0); 5758 5759 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0); 5760 5761 free(adapter->vfs, M_IXGBE); 5762 adapter->vfs = NULL; 5763 adapter->num_vfs = 0; 5764 5765 IXGBE_CORE_UNLOCK(adapter); 5766} 5767 5768 5769static void 5770ixgbe_initialize_iov(struct adapter *adapter) 5771{ 5772 struct ixgbe_hw *hw = &adapter->hw; 5773 uint32_t mrqc, mtqc, vt_ctl, vf_reg, gcr_ext, gpie; 5774 enum ixgbe_iov_mode mode; 5775 int i; 5776 5777 mode = ixgbe_get_iov_mode(adapter); 5778 if (mode == IXGBE_NO_VM) 5779 return; 5780 5781 IXGBE_CORE_LOCK_ASSERT(adapter); 5782 5783 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 5784 mrqc &= ~IXGBE_MRQC_MRQE_MASK; 5785 5786 switch (mode) { 5787 case IXGBE_64_VM: 5788 mrqc |= IXGBE_MRQC_VMDQRSS64EN; 5789 break; 5790 case IXGBE_32_VM: 5791 mrqc |= IXGBE_MRQC_VMDQRSS32EN; 5792 break; 5793 default: 5794 panic("Unexpected SR-IOV mode %d", mode); 5795 } 5796 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 5797 5798 mtqc = IXGBE_MTQC_VT_ENA; 5799 switch (mode) { 5800 case IXGBE_64_VM: 5801 mtqc |= IXGBE_MTQC_64VF; 5802 break; 5803 case IXGBE_32_VM: 5804 mtqc |= IXGBE_MTQC_32VF; 5805 break; 5806 default: 5807 panic("Unexpected SR-IOV mode %d", mode); 5808 } 5809 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc); 5810 5811 5812 gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); 5813 gcr_ext |= IXGBE_GCR_EXT_MSIX_EN; 5814 gcr_ext &= ~IXGBE_GCR_EXT_VT_MODE_MASK; 5815 switch (mode) { 5816 case IXGBE_64_VM: 5817 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64; 5818 break; 5819 case IXGBE_32_VM: 5820 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_32; 5821 break; 5822 default: 5823 panic("Unexpected SR-IOV mode %d", mode); 5824 } 5825 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); 5826 5827 5828 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); 5829 gcr_ext &= ~IXGBE_GPIE_VTMODE_MASK; 5830 switch (mode) { 5831 case IXGBE_64_VM: 5832 gpie |= IXGBE_GPIE_VTMODE_64; 5833 break; 5834 case IXGBE_32_VM: 5835 gpie |= IXGBE_GPIE_VTMODE_32; 5836 break; 5837 default: 5838 panic("Unexpected SR-IOV mode %d", mode); 5839 } 5840 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 5841 5842 /* Enable rx/tx for the PF. */ 5843 vf_reg = IXGBE_VF_INDEX(adapter->pool); 5844 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 5845 IXGBE_VF_BIT(adapter->pool)); 5846 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 5847 IXGBE_VF_BIT(adapter->pool)); 5848 5849 /* Allow VM-to-VM communication. */ 5850 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); 5851 5852 vt_ctl = IXGBE_VT_CTL_VT_ENABLE | IXGBE_VT_CTL_REPLEN; 5853 vt_ctl |= (adapter->pool << IXGBE_VT_CTL_POOL_SHIFT); 5854 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl); 5855 5856 for (i = 0; i < adapter->num_vfs; i++) 5857 ixgbe_init_vf(adapter, &adapter->vfs[i]); 5858} 5859 5860 5861/* 5862** Check the max frame setting of all active VF's 5863*/ 5864static void 5865ixgbe_recalculate_max_frame(struct adapter *adapter) 5866{ 5867 struct ixgbe_vf *vf; 5868 5869 IXGBE_CORE_LOCK_ASSERT(adapter); 5870 5871 for (int i = 0; i < adapter->num_vfs; i++) { 5872 vf = &adapter->vfs[i]; 5873 if (vf->flags & IXGBE_VF_ACTIVE) 5874 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5875 } 5876} 5877 5878 5879static void 5880ixgbe_init_vf(struct adapter *adapter, struct ixgbe_vf *vf) 5881{ 5882 struct ixgbe_hw *hw; 5883 uint32_t vf_index, pfmbimr; 5884 5885 IXGBE_CORE_LOCK_ASSERT(adapter); 5886 5887 hw = &adapter->hw; 5888 5889 if (!(vf->flags & IXGBE_VF_ACTIVE)) 5890 return; 5891 5892 vf_index = IXGBE_VF_INDEX(vf->pool); 5893 pfmbimr = IXGBE_READ_REG(hw, IXGBE_PFMBIMR(vf_index)); 5894 pfmbimr |= IXGBE_VF_BIT(vf->pool); 5895 IXGBE_WRITE_REG(hw, IXGBE_PFMBIMR(vf_index), pfmbimr); 5896 5897 ixgbe_vf_set_default_vlan(adapter, vf, vf->vlan_tag); 5898 5899 // XXX multicast addresses 5900 5901 if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { 5902 ixgbe_set_rar(&adapter->hw, vf->rar_index, 5903 vf->ether_addr, vf->pool, TRUE); 5904 } 5905 5906 ixgbe_vf_enable_transmit(adapter, vf); 5907 ixgbe_vf_enable_receive(adapter, vf); 5908 5909 ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); 5910} 5911 5912static int 5913ixgbe_add_vf(device_t dev, u16 vfnum, const nvlist_t *config) 5914{ 5915 struct adapter *adapter; 5916 struct ixgbe_vf *vf; 5917 const void *mac; 5918 5919 adapter = device_get_softc(dev); 5920 5921 KASSERT(vfnum < adapter->num_vfs, ("VF index %d is out of range %d", 5922 vfnum, adapter->num_vfs)); 5923 5924 IXGBE_CORE_LOCK(adapter); 5925 vf = &adapter->vfs[vfnum]; 5926 vf->pool= vfnum; 5927 5928 /* RAR[0] is used by the PF so use vfnum + 1 for VF RAR. */ 5929 vf->rar_index = vfnum + 1; 5930 vf->default_vlan = 0; 5931 vf->max_frame_size = ETHER_MAX_LEN; 5932 ixgbe_update_max_frame(adapter, vf->max_frame_size); 5933 5934 if (nvlist_exists_binary(config, "mac-addr")) { 5935 mac = nvlist_get_binary(config, "mac-addr", NULL); 5936 bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); 5937 if (nvlist_get_bool(config, "allow-set-mac")) 5938 vf->flags |= IXGBE_VF_CAP_MAC; 5939 } else 5940 /* 5941 * If the administrator has not specified a MAC address then 5942 * we must allow the VF to choose one. 5943 */ 5944 vf->flags |= IXGBE_VF_CAP_MAC; 5945 5946 vf->flags = IXGBE_VF_ACTIVE; 5947 5948 ixgbe_init_vf(adapter, vf); 5949 IXGBE_CORE_UNLOCK(adapter); 5950 5951 return (0); 5952} 5953#endif /* PCI_IOV */ 5954 5955