ispmbox.h revision 44819
144819Smjacob/* $Id: ispmbox.h,v 1.6 1999/02/09 01:05:42 mjacob Exp $ */ 244819Smjacob/* release_03_16_99 */ 335388Smjacob/* 439235Sgibbs * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 535388Smjacob * 635388Smjacob *--------------------------------------- 735388Smjacob * Copyright (c) 1997, 1998 by Matthew Jacob 835388Smjacob * NASA/Ames Research Center 935388Smjacob * All rights reserved. 1035388Smjacob *--------------------------------------- 1135388Smjacob * 1235388Smjacob * Redistribution and use in source and binary forms, with or without 1335388Smjacob * modification, are permitted provided that the following conditions 1435388Smjacob * are met: 1535388Smjacob * 1. Redistributions of source code must retain the above copyright 1635388Smjacob * notice immediately at the beginning of the file, without modification, 1735388Smjacob * this list of conditions, and the following disclaimer. 1835388Smjacob * 2. Redistributions in binary form must reproduce the above copyright 1935388Smjacob * notice, this list of conditions and the following disclaimer in the 2035388Smjacob * documentation and/or other materials provided with the distribution. 2135388Smjacob * 3. The name of the author may not be used to endorse or promote products 2235388Smjacob * derived from this software without specific prior written permission. 2335388Smjacob * 2435388Smjacob * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 2535388Smjacob * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2635388Smjacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2735388Smjacob * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2835388Smjacob * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2935388Smjacob * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3035388Smjacob * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3135388Smjacob * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3235388Smjacob * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3335388Smjacob * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3435388Smjacob * SUCH DAMAGE. 3535388Smjacob * 3635388Smjacob */ 3735388Smjacob#ifndef _ISPMBOX_H 3835388Smjacob#define _ISPMBOX_H 3935388Smjacob 4035388Smjacob/* 4135388Smjacob * Mailbox Command Opcodes 4235388Smjacob */ 4335388Smjacob 4435388Smjacob#define MBOX_NO_OP 0x0000 4535388Smjacob#define MBOX_LOAD_RAM 0x0001 4635388Smjacob#define MBOX_EXEC_FIRMWARE 0x0002 4735388Smjacob#define MBOX_DUMP_RAM 0x0003 4835388Smjacob#define MBOX_WRITE_RAM_WORD 0x0004 4935388Smjacob#define MBOX_READ_RAM_WORD 0x0005 5035388Smjacob#define MBOX_MAILBOX_REG_TEST 0x0006 5135388Smjacob#define MBOX_VERIFY_CHECKSUM 0x0007 5235388Smjacob#define MBOX_ABOUT_FIRMWARE 0x0008 5335388Smjacob /* 9 */ 5435388Smjacob /* a */ 5535388Smjacob /* b */ 5635388Smjacob /* c */ 5735388Smjacob /* d */ 5835388Smjacob#define MBOX_CHECK_FIRMWARE 0x000e 5935388Smjacob /* f */ 6035388Smjacob#define MBOX_INIT_REQ_QUEUE 0x0010 6135388Smjacob#define MBOX_INIT_RES_QUEUE 0x0011 6235388Smjacob#define MBOX_EXECUTE_IOCB 0x0012 6335388Smjacob#define MBOX_WAKE_UP 0x0013 6435388Smjacob#define MBOX_STOP_FIRMWARE 0x0014 6535388Smjacob#define MBOX_ABORT 0x0015 6635388Smjacob#define MBOX_ABORT_DEVICE 0x0016 6735388Smjacob#define MBOX_ABORT_TARGET 0x0017 6835388Smjacob#define MBOX_BUS_RESET 0x0018 6935388Smjacob#define MBOX_STOP_QUEUE 0x0019 7035388Smjacob#define MBOX_START_QUEUE 0x001a 7135388Smjacob#define MBOX_SINGLE_STEP_QUEUE 0x001b 7235388Smjacob#define MBOX_ABORT_QUEUE 0x001c 7335388Smjacob#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 7435388Smjacob /* 1e */ 7535388Smjacob#define MBOX_GET_FIRMWARE_STATUS 0x001f 7635388Smjacob#define MBOX_GET_INIT_SCSI_ID 0x0020 7735388Smjacob#define MBOX_GET_SELECT_TIMEOUT 0x0021 7835388Smjacob#define MBOX_GET_RETRY_COUNT 0x0022 7935388Smjacob#define MBOX_GET_TAG_AGE_LIMIT 0x0023 8035388Smjacob#define MBOX_GET_CLOCK_RATE 0x0024 8135388Smjacob#define MBOX_GET_ACT_NEG_STATE 0x0025 8235388Smjacob#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 8335388Smjacob#define MBOX_GET_SBUS_PARAMS 0x0027 8435388Smjacob#define MBOX_GET_TARGET_PARAMS 0x0028 8535388Smjacob#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 8635388Smjacob /* 2a */ 8735388Smjacob /* 2b */ 8835388Smjacob /* 2c */ 8935388Smjacob /* 2d */ 9035388Smjacob /* 2e */ 9135388Smjacob /* 2f */ 9235388Smjacob#define MBOX_SET_INIT_SCSI_ID 0x0030 9335388Smjacob#define MBOX_SET_SELECT_TIMEOUT 0x0031 9435388Smjacob#define MBOX_SET_RETRY_COUNT 0x0032 9535388Smjacob#define MBOX_SET_TAG_AGE_LIMIT 0x0033 9635388Smjacob#define MBOX_SET_CLOCK_RATE 0x0034 9735388Smjacob#define MBOX_SET_ACTIVE_NEG_STATE 0x0035 9835388Smjacob#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 9935388Smjacob#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 10035388Smjacob#define MBOX_SET_PCI_PARAMETERS 0x0037 10135388Smjacob#define MBOX_SET_TARGET_PARAMS 0x0038 10235388Smjacob#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 10335388Smjacob /* 3a */ 10435388Smjacob /* 3b */ 10535388Smjacob /* 3c */ 10635388Smjacob /* 3d */ 10735388Smjacob /* 3e */ 10835388Smjacob /* 3f */ 10935388Smjacob#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 11035388Smjacob#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 11135388Smjacob#define MBOX_EXEC_BIOS_IOCB 0x0042 11243420Smjacob#define MBOX_SET_FW_FEATURES 0x004a 11343420Smjacob#define MBOX_GET_FW_FEATURES 0x004b 11443420Smjacob#define FW_FEATURE_LVD_NOTIFY 0x2 11543420Smjacob#define FW_FEATURE_FAST_POST 0x1 11635388Smjacob 11735388Smjacob/* These are for the ISP2100 FC cards */ 11835388Smjacob#define MBOX_GET_LOOP_ID 0x20 11935388Smjacob#define MBOX_EXEC_COMMAND_IOCB_A64 0x54 12035388Smjacob#define MBOX_INIT_FIRMWARE 0x60 12135388Smjacob#define MBOX_GET_INIT_CONTROL_BLOCK 0x61 12235388Smjacob#define MBOX_INIT_LIP 0x62 12335388Smjacob#define MBOX_GET_FC_AL_POSITION_MAP 0x63 12435388Smjacob#define MBOX_GET_PORT_DB 0x64 12535388Smjacob#define MBOX_CLEAR_ACA 0x65 12635388Smjacob#define MBOX_TARGET_RESET 0x66 12735388Smjacob#define MBOX_CLEAR_TASK_SET 0x67 12835388Smjacob#define MBOX_ABORT_TASK_SET 0x68 12935388Smjacob#define MBOX_GET_FW_STATE 0x69 13044819Smjacob#define MBOX_GET_PORT_NAME 0x6a 13144819Smjacob#define MBOX_GET_LINK_STATUS 0x6b 13239235Sgibbs#define MBOX_INIT_LIP_RESET 0x6c 13339235Sgibbs#define MBOX_INIT_LIP_LOGIN 0x72 13435388Smjacob 13535388Smjacob#define ISP2100_SET_PCI_PARAM 0x00ff 13635388Smjacob 13735388Smjacob#define MBOX_BUSY 0x04 13835388Smjacob 13935388Smjacobtypedef struct { 14035388Smjacob u_int16_t param[8]; 14135388Smjacob} mbreg_t; 14235388Smjacob 14335388Smjacob/* 14439235Sgibbs * Mailbox Command Complete Status Codes 14539235Sgibbs */ 14639235Sgibbs#define MBOX_COMMAND_COMPLETE 0x4000 14739235Sgibbs#define MBOX_INVALID_COMMAND 0x4001 14839235Sgibbs#define MBOX_HOST_INTERFACE_ERROR 0x4002 14939235Sgibbs#define MBOX_TEST_FAILED 0x4003 15039235Sgibbs#define MBOX_COMMAND_ERROR 0x4005 15139235Sgibbs#define MBOX_COMMAND_PARAM_ERROR 0x4006 15239235Sgibbs 15339235Sgibbs/* 15439235Sgibbs * Asynchronous event status codes 15539235Sgibbs */ 15639235Sgibbs#define ASYNC_BUS_RESET 0x8001 15739235Sgibbs#define ASYNC_SYSTEM_ERROR 0x8002 15839235Sgibbs#define ASYNC_RQS_XFER_ERR 0x8003 15939235Sgibbs#define ASYNC_RSP_XFER_ERR 0x8004 16039235Sgibbs#define ASYNC_QWAKEUP 0x8005 16139235Sgibbs#define ASYNC_TIMEOUT_RESET 0x8006 16241520Smjacob#define ASYNC_DEVICE_RESET 0x8007 16339235Sgibbs#define ASYNC_EXTMSG_UNDERRUN 0x800A 16439235Sgibbs#define ASYNC_SCAM_INT 0x800B 16539235Sgibbs#define ASYNC_HUNG_SCSI 0x800C 16639235Sgibbs#define ASYNC_KILLED_BUS 0x800D 16739235Sgibbs#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 16839235Sgibbs#define ASYNC_CMD_CMPLT 0x8020 16939235Sgibbs#define ASYNC_CTIO_DONE 0x8021 17039235Sgibbs 17139235Sgibbs/* for ISP2100 only */ 17239235Sgibbs#define ASYNC_LIP_OCCURRED 0x8010 17339235Sgibbs#define ASYNC_LOOP_UP 0x8011 17439235Sgibbs#define ASYNC_LOOP_DOWN 0x8012 17539235Sgibbs#define ASYNC_LOOP_RESET 0x8013 17641520Smjacob#define ASYNC_PDB_CHANGED 0x8014 17739235Sgibbs#define ASYNC_CHANGE_NOTIFY 0x8015 17839235Sgibbs 17939235Sgibbs/* 18035388Smjacob * Command Structure Definitions 18135388Smjacob */ 18235388Smjacob 18335388Smjacobtypedef struct { 18435388Smjacob u_int32_t ds_base; 18535388Smjacob u_int32_t ds_count; 18635388Smjacob} ispds_t; 18735388Smjacob 18835388Smjacobtypedef struct { 18935388Smjacob#if BYTE_ORDER == BIG_ENDIAN 19035388Smjacob u_int8_t rqs_entry_count; 19135388Smjacob u_int8_t rqs_entry_type; 19235388Smjacob u_int8_t rqs_flags; 19335388Smjacob u_int8_t rqs_seqno; 19435388Smjacob#else 19535388Smjacob u_int8_t rqs_entry_type; 19635388Smjacob u_int8_t rqs_entry_count; 19735388Smjacob u_int8_t rqs_seqno; 19835388Smjacob u_int8_t rqs_flags; 19935388Smjacob#endif 20035388Smjacob} isphdr_t; 20135388Smjacob 20235388Smjacob/* RQS Flag definitions */ 20335388Smjacob#define RQSFLAG_CONTINUATION 0x01 20435388Smjacob#define RQSFLAG_FULL 0x02 20535388Smjacob#define RQSFLAG_BADHEADER 0x04 20635388Smjacob#define RQSFLAG_BADPACKET 0x08 20735388Smjacob 20835388Smjacob/* RQS entry_type definitions */ 20939235Sgibbs#define RQSTYPE_REQUEST 0x01 21039235Sgibbs#define RQSTYPE_DATASEG 0x02 21139235Sgibbs#define RQSTYPE_RESPONSE 0x03 21239235Sgibbs#define RQSTYPE_MARKER 0x04 21339235Sgibbs#define RQSTYPE_CMDONLY 0x05 21439235Sgibbs#define RQSTYPE_ATIO 0x06 /* Target Mode */ 21539235Sgibbs#define RQSTYPE_CTIO0 0x07 /* Target Mode */ 21639235Sgibbs#define RQSTYPE_SCAM 0x08 21739235Sgibbs#define RQSTYPE_A64 0x09 21839235Sgibbs#define RQSTYPE_A64_CONT 0x0a 21939235Sgibbs#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 22039235Sgibbs#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 22139235Sgibbs#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 22239235Sgibbs#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 22339235Sgibbs#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 22439235Sgibbs#define RQSTYPE_STATUS_CONT 0x10 22539235Sgibbs#define RQSTYPE_T2RQS 0x11 22635388Smjacob 22739235Sgibbs#define RQSTYPE_T4RQS 0x15 22839235Sgibbs#define RQSTYPE_ATIO2 0x16 22939235Sgibbs#define RQSTYPE_CTIO2 0x17 23039235Sgibbs#define RQSTYPE_CSET0 0x18 23139235Sgibbs#define RQSTYPE_T3RQS 0x19 23235388Smjacob 23339235Sgibbs#define RQSTYPE_CTIO3 0x1f 23439235Sgibbs 23539235Sgibbs 23635388Smjacob#define ISP_RQDSEG 4 23735388Smjacobtypedef struct { 23835388Smjacob isphdr_t req_header; 23935388Smjacob u_int32_t req_handle; 24035388Smjacob#if BYTE_ORDER == BIG_ENDIAN 24135388Smjacob u_int8_t req_target; 24235388Smjacob u_int8_t req_lun_trn; 24335388Smjacob#else 24435388Smjacob u_int8_t req_lun_trn; 24535388Smjacob u_int8_t req_target; 24635388Smjacob#endif 24735388Smjacob u_int16_t req_cdblen; 24835388Smjacob#define req_modifier req_cdblen /* marker packet */ 24935388Smjacob u_int16_t req_flags; 25041520Smjacob u_int16_t req_reserved; 25135388Smjacob u_int16_t req_time; 25235388Smjacob u_int16_t req_seg_count; 25335388Smjacob u_int8_t req_cdb[12]; 25435388Smjacob ispds_t req_dataseg[ISP_RQDSEG]; 25535388Smjacob} ispreq_t; 25635388Smjacob 25735388Smjacob#define ISP_RQDSEG_T2 3 25835388Smjacobtypedef struct { 25935388Smjacob isphdr_t req_header; 26035388Smjacob u_int32_t req_handle; 26135388Smjacob#if BYTE_ORDER == BIG_ENDIAN 26235388Smjacob u_int8_t req_target; 26335388Smjacob u_int8_t req_lun_trn; 26435388Smjacob#else 26535388Smjacob u_int8_t req_lun_trn; 26635388Smjacob u_int8_t req_target; 26735388Smjacob#endif 26841520Smjacob u_int16_t req_scclun; 26935388Smjacob u_int16_t req_flags; 27035388Smjacob u_int16_t _res2; 27135388Smjacob u_int16_t req_time; 27235388Smjacob u_int16_t req_seg_count; 27335388Smjacob u_int32_t req_cdb[4]; 27435388Smjacob u_int32_t req_totalcnt; 27535388Smjacob ispds_t req_dataseg[ISP_RQDSEG_T2]; 27635388Smjacob} ispreqt2_t; 27735388Smjacob 27835388Smjacob/* req_flag values */ 27935388Smjacob#define REQFLAG_NODISCON 0x0001 28035388Smjacob#define REQFLAG_HTAG 0x0002 28135388Smjacob#define REQFLAG_OTAG 0x0004 28235388Smjacob#define REQFLAG_STAG 0x0008 28335388Smjacob#define REQFLAG_TARGET_RTN 0x0010 28435388Smjacob 28535388Smjacob#define REQFLAG_NODATA 0x0000 28635388Smjacob#define REQFLAG_DATA_IN 0x0020 28735388Smjacob#define REQFLAG_DATA_OUT 0x0040 28835388Smjacob#define REQFLAG_DATA_UNKNOWN 0x0060 28935388Smjacob 29035388Smjacob#define REQFLAG_DISARQ 0x0100 29139235Sgibbs#define REQFLAG_FRC_ASYNC 0x0200 29239235Sgibbs#define REQFLAG_FRC_SYNC 0x0400 29339235Sgibbs#define REQFLAG_FRC_WIDE 0x0800 29439235Sgibbs#define REQFLAG_NOPARITY 0x1000 29539235Sgibbs#define REQFLAG_STOPQ 0x2000 29639235Sgibbs#define REQFLAG_XTRASNS 0x4000 29739235Sgibbs#define REQFLAG_PRIORITY 0x8000 29835388Smjacob 29935388Smjacobtypedef struct { 30035388Smjacob isphdr_t req_header; 30135388Smjacob u_int32_t req_handle; 30235388Smjacob#if BYTE_ORDER == BIG_ENDIAN 30335388Smjacob u_int8_t req_target; 30435388Smjacob u_int8_t req_lun_trn; 30535388Smjacob#else 30635388Smjacob u_int8_t req_lun_trn; 30735388Smjacob u_int8_t req_target; 30835388Smjacob#endif 30935388Smjacob u_int16_t req_cdblen; 31035388Smjacob u_int16_t req_flags; 31135388Smjacob u_int16_t _res1; 31235388Smjacob u_int16_t req_time; 31335388Smjacob u_int16_t req_seg_count; 31435388Smjacob u_int8_t req_cdb[44]; 31535388Smjacob} ispextreq_t; 31635388Smjacob 31735388Smjacob#define ISP_CDSEG 7 31835388Smjacobtypedef struct { 31935388Smjacob isphdr_t req_header; 32035388Smjacob u_int32_t _res1; 32135388Smjacob ispds_t req_dataseg[ISP_CDSEG]; 32235388Smjacob} ispcontreq_t; 32335388Smjacob 32435388Smjacobtypedef struct { 32535388Smjacob isphdr_t req_header; 32635388Smjacob u_int32_t _res1; 32735388Smjacob#if BYTE_ORDER == BIG_ENDIAN 32835388Smjacob u_int8_t req_target; 32935388Smjacob u_int8_t req_lun_trn; 33035388Smjacob u_int8_t _res2; 33135388Smjacob u_int8_t req_modifier; 33235388Smjacob#else 33335388Smjacob u_int8_t req_lun_trn; 33435388Smjacob u_int8_t req_target; 33535388Smjacob u_int8_t req_modifier; 33635388Smjacob u_int8_t _res2; 33735388Smjacob#endif 33835388Smjacob} ispmarkreq_t; 33935388Smjacob 34035388Smjacob#define SYNC_DEVICE 0 34135388Smjacob#define SYNC_TARGET 1 34235388Smjacob#define SYNC_ALL 2 34335388Smjacob 34435388Smjacobtypedef struct { 34535388Smjacob isphdr_t req_header; 34635388Smjacob u_int32_t req_handle; 34735388Smjacob u_int16_t req_scsi_status; 34835388Smjacob u_int16_t req_completion_status; 34935388Smjacob u_int16_t req_state_flags; 35035388Smjacob u_int16_t req_status_flags; 35135388Smjacob u_int16_t req_time; 35235388Smjacob u_int16_t req_sense_len; 35335388Smjacob u_int32_t req_resid; 35435388Smjacob u_int8_t _res1[8]; 35535388Smjacob u_int8_t req_sense_data[32]; 35635388Smjacob} ispstatusreq_t; 35735388Smjacob 35835388Smjacob/* 35935388Smjacob * For Qlogic 2100, the high order byte of SCSI status has 36035388Smjacob * additional meaning. 36135388Smjacob */ 36235388Smjacob#define RQCS_RU 0x800 /* Residual Under */ 36335388Smjacob#define RQCS_RO 0x400 /* Residual Over */ 36435388Smjacob#define RQCS_SV 0x200 /* Sense Length Valid */ 36535388Smjacob#define RQCS_RV 0x100 /* Residual Valid */ 36635388Smjacob 36735388Smjacob/* 36835388Smjacob * Completion Status Codes. 36935388Smjacob */ 37035388Smjacob#define RQCS_COMPLETE 0x0000 37135388Smjacob#define RQCS_INCOMPLETE 0x0001 37235388Smjacob#define RQCS_DMA_ERROR 0x0002 37335388Smjacob#define RQCS_TRANSPORT_ERROR 0x0003 37435388Smjacob#define RQCS_RESET_OCCURRED 0x0004 37535388Smjacob#define RQCS_ABORTED 0x0005 37635388Smjacob#define RQCS_TIMEOUT 0x0006 37735388Smjacob#define RQCS_DATA_OVERRUN 0x0007 37835388Smjacob#define RQCS_COMMAND_OVERRUN 0x0008 37935388Smjacob#define RQCS_STATUS_OVERRUN 0x0009 38035388Smjacob#define RQCS_BAD_MESSAGE 0x000a 38135388Smjacob#define RQCS_NO_MESSAGE_OUT 0x000b 38235388Smjacob#define RQCS_EXT_ID_FAILED 0x000c 38335388Smjacob#define RQCS_IDE_MSG_FAILED 0x000d 38435388Smjacob#define RQCS_ABORT_MSG_FAILED 0x000e 38535388Smjacob#define RQCS_REJECT_MSG_FAILED 0x000f 38635388Smjacob#define RQCS_NOP_MSG_FAILED 0x0010 38735388Smjacob#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 38835388Smjacob#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 38935388Smjacob#define RQCS_ID_MSG_FAILED 0x0013 39035388Smjacob#define RQCS_UNEXP_BUS_FREE 0x0014 39135388Smjacob#define RQCS_DATA_UNDERRUN 0x0015 39239235Sgibbs#define RQCS_XACT_ERR1 0x0018 39339235Sgibbs#define RQCS_XACT_ERR2 0x0019 39439235Sgibbs#define RQCS_XACT_ERR3 0x001A 39539235Sgibbs#define RQCS_BAD_ENTRY 0x001B 39639235Sgibbs#define RQCS_QUEUE_FULL 0x001C 39739235Sgibbs#define RQCS_PHASE_SKIPPED 0x001D 39839235Sgibbs#define RQCS_ARQS_FAILED 0x001E 39939235Sgibbs#define RQCS_WIDE_FAILED 0x001F 40039235Sgibbs#define RQCS_SYNCXFER_FAILED 0x0020 40139235Sgibbs#define RQCS_LVD_BUSERR 0x0021 40239235Sgibbs 40335388Smjacob/* 2100 Only Completion Codes */ 40435388Smjacob#define RQCS_PORT_UNAVAILABLE 0x0028 40535388Smjacob#define RQCS_PORT_LOGGED_OUT 0x0029 40635388Smjacob#define RQCS_PORT_CHANGED 0x002A 40735388Smjacob#define RQCS_PORT_BUSY 0x002B 40835388Smjacob 40935388Smjacob/* 41035388Smjacob * State Flags (not applicable to 2100) 41135388Smjacob */ 41235388Smjacob#define RQSF_GOT_BUS 0x0100 41335388Smjacob#define RQSF_GOT_TARGET 0x0200 41435388Smjacob#define RQSF_SENT_CDB 0x0400 41535388Smjacob#define RQSF_XFRD_DATA 0x0800 41635388Smjacob#define RQSF_GOT_STATUS 0x1000 41735388Smjacob#define RQSF_GOT_SENSE 0x2000 41835388Smjacob#define RQSF_XFER_COMPLETE 0x4000 41935388Smjacob 42035388Smjacob/* 42135388Smjacob * Status Flags (not applicable to 2100) 42235388Smjacob */ 42335388Smjacob#define RQSTF_DISCONNECT 0x0001 42435388Smjacob#define RQSTF_SYNCHRONOUS 0x0002 42535388Smjacob#define RQSTF_PARITY_ERROR 0x0004 42635388Smjacob#define RQSTF_BUS_RESET 0x0008 42735388Smjacob#define RQSTF_DEVICE_RESET 0x0010 42835388Smjacob#define RQSTF_ABORTED 0x0020 42935388Smjacob#define RQSTF_TIMEOUT 0x0040 43035388Smjacob#define RQSTF_NEGOTIATION 0x0080 43135388Smjacob 43235388Smjacob/* 43344819Smjacob * FC (ISP2100) specific data structures 43439235Sgibbs */ 43539235Sgibbs 43639235Sgibbs/* 43735388Smjacob * Initialization Control Block 43839235Sgibbs * 43939235Sgibbs * Version One format. 44035388Smjacob */ 44135388Smjacobtypedef struct { 44235388Smjacob#if BYTE_ORDER == BIG_ENDIAN 44335388Smjacob u_int8_t _reserved0; 44435388Smjacob u_int8_t icb_version; 44535388Smjacob#else 44635388Smjacob u_int8_t icb_version; 44735388Smjacob u_int8_t _reserved0; 44835388Smjacob#endif 44935388Smjacob u_int16_t icb_fwoptions; 45035388Smjacob u_int16_t icb_maxfrmlen; 45135388Smjacob u_int16_t icb_maxalloc; 45235388Smjacob u_int16_t icb_execthrottle; 45335388Smjacob#if BYTE_ORDER == BIG_ENDIAN 45435388Smjacob u_int8_t icb_retry_delay; 45535388Smjacob u_int8_t icb_retry_count; 45635388Smjacob#else 45735388Smjacob u_int8_t icb_retry_count; 45835388Smjacob u_int8_t icb_retry_delay; 45935388Smjacob#endif 46039235Sgibbs u_int8_t icb_nodename[8]; 46135388Smjacob u_int16_t icb_hardaddr; 46239235Sgibbs#if BYTE_ORDER == BIG_ENDIAN 46339235Sgibbs u_int8_t _reserved1; 46439235Sgibbs u_int8_t icb_iqdevtype; 46539235Sgibbs#else 46639235Sgibbs u_int8_t icb_iqdevtype; 46739235Sgibbs u_int8_t _reserved1; 46839235Sgibbs#endif 46939235Sgibbs u_int8_t icb_portname[8]; 47035388Smjacob u_int16_t icb_rqstout; 47135388Smjacob u_int16_t icb_rspnsin; 47235388Smjacob u_int16_t icb_rqstqlen; 47335388Smjacob u_int16_t icb_rsltqlen; 47435388Smjacob u_int16_t icb_rqstaddr[4]; 47535388Smjacob u_int16_t icb_respaddr[4]; 47635388Smjacob} isp_icb_t; 47739235Sgibbs#define ICB_VERSION1 1 47835388Smjacob 47939235Sgibbs#define ICBOPT_HARD_ADDRESS (1<<0) 48039235Sgibbs#define ICBOPT_FAIRNESS (1<<1) 48139235Sgibbs#define ICBOPT_FULL_DUPLEX (1<<2) 48239235Sgibbs#define ICBOPT_FAST_POST (1<<3) 48339235Sgibbs#define ICBOPT_TGT_ENABLE (1<<4) 48439235Sgibbs#define ICBOPT_INI_DISABLE (1<<5) 48539235Sgibbs#define ICBOPT_INI_ADISC (1<<6) 48639235Sgibbs#define ICBOPT_INI_TGTTYPE (1<<7) 48739235Sgibbs#define ICBOPT_PDBCHANGE_AE (1<<8) 48839235Sgibbs#define ICBOPT_NOLIP (1<<9) 48939235Sgibbs#define ICBOPT_SRCHDOWN (1<<10) 49039235Sgibbs#define ICBOPT_PREVLOOP (1<<11) 49139235Sgibbs#define ICBOPT_STOP_ON_QFULL (1<<12) 49239235Sgibbs#define ICBOPT_FULL_LOGIN (1<<13) 49339235Sgibbs#define ICBOPT_USE_PORTNAME (1<<14) 49435388Smjacob 49539235Sgibbs 49639235Sgibbs#define ICB_MIN_FRMLEN 256 49739235Sgibbs#define ICB_MAX_FRMLEN 2112 49839235Sgibbs#define ICB_DFLT_FRMLEN 1024 49939235Sgibbs 50039235Sgibbs#define RQRSP_ADDR0015 0 50139235Sgibbs#define RQRSP_ADDR1631 1 50239235Sgibbs#define RQRSP_ADDR3247 2 50339235Sgibbs#define RQRSP_ADDR4863 3 50439235Sgibbs 50539235Sgibbs 50639235Sgibbs#define ICB_NNM0 7 50739235Sgibbs#define ICB_NNM1 6 50839235Sgibbs#define ICB_NNM2 5 50939235Sgibbs#define ICB_NNM3 4 51039235Sgibbs#define ICB_NNM4 3 51139235Sgibbs#define ICB_NNM5 2 51239235Sgibbs#define ICB_NNM6 1 51339235Sgibbs#define ICB_NNM7 0 51439235Sgibbs 51539235Sgibbs#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 51639235Sgibbs array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 51739235Sgibbs array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 51839235Sgibbs array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 51939235Sgibbs array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 52039235Sgibbs array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 52139235Sgibbs array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 52239235Sgibbs array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 52339235Sgibbs array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 52439235Sgibbs 52541520Smjacob/* 52644819Smjacob * Port Data Base Element 52744819Smjacob */ 52844819Smjacob 52944819Smjacobtypedef struct { 53044819Smjacob u_int16_t pdb_options; 53144819Smjacob#if BYTE_ORDER == BIG_ENDIAN 53244819Smjacob u_int8_t pdb_sstate; 53344819Smjacob u_int8_t pdb_mstate; 53444819Smjacob#else 53544819Smjacob u_int8_t pdb_mstate; 53644819Smjacob u_int8_t pdb_sstate; 53744819Smjacob#endif 53844819Smjacob#if BYTE_ORDER == BIG_ENDIAN 53944819Smjacob#define BITS2WORD(x) \ 54044819Smjacob (x)[1] << 16 | (x)[2] << 8 | (x)[3] 54144819Smjacob#else 54244819Smjacob#define BITS2WORD(x) \ 54344819Smjacob (x)[0] << 16 | (x)[3] << 8 | (x)[2] 54444819Smjacob#endif 54544819Smjacob u_int8_t pdb_hardaddr_bits[4]; 54644819Smjacob u_int8_t pdb_portid_bits[4]; 54744819Smjacob u_int8_t pdb_nodename[8]; 54844819Smjacob u_int8_t pdb_portname[8]; 54944819Smjacob u_int16_t pdb_execthrottle; 55044819Smjacob u_int16_t pdb_exec_count; 55144819Smjacob#if BYTE_ORDER == BIG_ENDIAN 55244819Smjacob u_int8_t pdb_retry_delay; 55344819Smjacob u_int8_t pdb_retry_count; 55444819Smjacob#else 55544819Smjacob u_int8_t pdb_retry_count; 55644819Smjacob u_int8_t pdb_retry_delay; 55744819Smjacob#endif 55844819Smjacob u_int16_t pdb_resalloc; 55944819Smjacob u_int16_t pdb_curalloc; 56044819Smjacob u_int16_t pdb_qhead; 56144819Smjacob u_int16_t pdb_qtail; 56244819Smjacob u_int16_t pdb_tl_next; 56344819Smjacob u_int16_t pdb_tl_last; 56444819Smjacob u_int16_t pdb_features; /* PLOGI, Common Service */ 56544819Smjacob u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 56644819Smjacob u_int16_t pdb_roi; /* PLOGI, Common Service */ 56744819Smjacob#if BYTE_ORDER == BIG_ENDIAN 56844819Smjacob u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 56944819Smjacob u_int8_t pdb_target; 57044819Smjacob#else 57144819Smjacob u_int8_t pdb_target; 57244819Smjacob u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 57344819Smjacob#endif 57444819Smjacob u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 57544819Smjacob u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 57644819Smjacob u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 57744819Smjacob u_int16_t pdb_labrtflg; 57844819Smjacob u_int16_t pdb_lstopflg; 57944819Smjacob u_int16_t pdb_sqhead; 58044819Smjacob u_int16_t pdb_sqtail; 58144819Smjacob u_int16_t pdb_ptimer; 58244819Smjacob u_int16_t pdb_nxt_seqid; 58344819Smjacob u_int16_t pdb_fcount; 58444819Smjacob u_int16_t pdb_prli_len; 58544819Smjacob u_int16_t pdb_prli_svc0; 58644819Smjacob u_int16_t pdb_prli_svc3; 58744819Smjacob u_int16_t pdb_loopid; 58844819Smjacob u_int16_t pdb_il_ptr; 58944819Smjacob u_int16_t pdb_sl_ptr; 59044819Smjacob} isp_pdb_t; 59144819Smjacob 59244819Smjacob#define INVALID_PDB_OPTIONS 0xDEAD 59344819Smjacob 59444819Smjacob#define PDB_OPTIONS_XMITTING (1<<11) 59544819Smjacob#define PDB_OPTIONS_LNKXMIT (1<<10) 59644819Smjacob#define PDB_OPTIONS_ABORTED (1<<9) 59744819Smjacob#define PDB_OPTIONS_ADISC (1<<1) 59844819Smjacob 59944819Smjacob#define PDB_STATE_DISCOVERY 0 60044819Smjacob#define PDB_STATE_WDISC_ACK 1 60144819Smjacob#define PDB_STATE_PLOGI 2 60244819Smjacob#define PDB_STATE_PLOGI_ACK 3 60344819Smjacob#define PDB_STATE_PRLI 4 60444819Smjacob#define PDB_STATE_PRLI_ACK 5 60544819Smjacob#define PDB_STATE_LOGGED_IN 6 60644819Smjacob#define PDB_STATE_PORT_UNAVAIL 7 60744819Smjacob#define PDB_STATE_PRLO 8 60844819Smjacob#define PDB_STATE_PRLO_ACK 9 60944819Smjacob#define PDB_STATE_PLOGO 10 61044819Smjacob#define PDB_STATE_PLOG_ACK 11 61144819Smjacob 61244819Smjacob#define SVC3_TGT_ROLE 0x10 61344819Smjacob#define SVC3_INI_ROLE 0x20 61444819Smjacob#define SVC3_ROLE_MASK 0x30 61544819Smjacob 61644819Smjacob/* 61741520Smjacob * Target Mode Structures 61841520Smjacob */ 61941520Smjacob#define TGTSVALID 0x80 /* scsi status & sense data valid */ 62041520Smjacob#define SUGGSENSELEN 18 62141520Smjacob 62241520Smjacob/* 62341520Smjacob * Structure for Enable Lun and Modify Lun queue entries 62441520Smjacob */ 62541520Smjacobtypedef struct { 62641520Smjacob isphdr_t le_header; 62741520Smjacob u_int32_t le_reserved2; 62841520Smjacob#if BYTE_ORDER == BIG_ENDIAN 62941520Smjacob#else 63041520Smjacob u_int8_t le_lun; 63141520Smjacob u_int8_t le_rsvd; 63241520Smjacob u_int8_t le_ops; /* Modify LUN only */ 63341520Smjacob u_int8_t le_tgt; /* Not for FC */ 63441520Smjacob#endif 63541520Smjacob u_int32_t le_flags; /* Not for FC */ 63641520Smjacob#if BYTE_ORDER == BIG_ENDIAN 63741520Smjacob#else 63841520Smjacob u_int8_t le_status; 63941520Smjacob u_int8_t le_rsvd2; 64041520Smjacob u_int8_t le_cmd_count; 64141520Smjacob u_int8_t le_in_count; 64241520Smjacob u_int8_t le_cdb6len; /* Not for FC */ 64341520Smjacob u_int8_t le_cdb7len; /* Not for FC */ 64441520Smjacob#endif 64541520Smjacob u_int16_t le_timeout; 64641520Smjacob u_int16_t le_reserved[20]; 64741520Smjacob} lun_entry_t; 64841520Smjacob 64941520Smjacob/* 65041520Smjacob * le_flags values 65141520Smjacob */ 65241520Smjacob#define LUN_TQAE 0x00000001 /* Tagged Queue Action Enable */ 65341520Smjacob#define LUN_DSSM 0x01000000 /* Disable Sending SDP Message */ 65441520Smjacob#define LUN_DM 0x40000000 /* Disconnects Mandatory */ 65541520Smjacob 65641520Smjacob/* 65741520Smjacob * le_ops values 65841520Smjacob */ 65941520Smjacob#define LUN_CCINCR 0x01 /* increment command count */ 66041520Smjacob#define LUN_CCDECR 0x02 /* decrement command count */ 66141520Smjacob#define LUN_ININCR 0x40 /* increment immed. notify count */ 66241520Smjacob#define LUN_INDECR 0x80 /* decrement immed. notify count */ 66341520Smjacob 66441520Smjacob/* 66541520Smjacob * le_status values 66641520Smjacob */ 66741520Smjacob#define LUN_ERR 0x04 /* request completed with error */ 66841520Smjacob#define LUN_INVAL 0x06 /* invalid request */ 66941520Smjacob#define LUN_NOCAP 0x16 /* can't provide requested capability */ 67041520Smjacob#define LUN_ENABLED 0x3E /* LUN already enabled */ 67141520Smjacob 67241520Smjacob/* 67341520Smjacob * Immediate Notify Entry structure 67441520Smjacob */ 67541520Smjacob#define IN_MSGLEN 8 /* 8 bytes */ 67641520Smjacob#define IN_RSVDLEN 8 /* 8 words */ 67741520Smjacobtypedef struct { 67841520Smjacob isphdr_t in_header; 67941520Smjacob u_int32_t in_reserved2; 68041520Smjacob#if BYTE_ORDER == BIG_ENDIAN 68141520Smjacob#else 68241520Smjacob u_int8_t in_lun; /* lun */ 68341520Smjacob u_int8_t in_iid; /* initiator */ 68441520Smjacob u_int8_t in_rsvd; 68541520Smjacob u_int8_t in_tgt; /* target */ 68641520Smjacob#endif 68741520Smjacob u_int32_t in_flags; 68841520Smjacob#if BYTE_ORDER == BIG_ENDIAN 68941520Smjacob#else 69041520Smjacob u_int8_t in_status; 69141520Smjacob u_int8_t in_rsvd2; 69241520Smjacob u_int8_t in_tag_val; /* tag value */ 69341520Smjacob u_int8_t in_tag_type; /* tag type */ 69441520Smjacob#endif 69541520Smjacob u_int16_t in_seqid; /* sequence id */ 69641520Smjacob u_int8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 69741520Smjacob u_int16_t in_reserved[IN_RSVDLEN]; 69841520Smjacob u_int8_t in_sense[SUGGSENSELEN]; /* suggested sense data */ 69941520Smjacob} in_entry_t; 70041520Smjacob 70141520Smjacobtypedef struct { 70241520Smjacob isphdr_t in_header; 70341520Smjacob u_int32_t in_reserved2; 70441520Smjacob#if BYTE_ORDER == BIG_ENDIAN 70541520Smjacob#else 70641520Smjacob u_int8_t in_lun; /* lun */ 70741520Smjacob u_int8_t in_iid; /* initiator */ 70841520Smjacob#endif 70941520Smjacob u_int16_t in_rsvd; 71041520Smjacob u_int32_t in_rsvd2; 71141520Smjacob u_int16_t in_status; 71241520Smjacob u_int16_t in_task_flags; 71341520Smjacob u_int16_t in_seqid; /* sequence id */ 71441520Smjacob} in_fcentry_t; 71541520Smjacob 71641520Smjacob/* 71741520Smjacob * Values for the in_status field 71841520Smjacob */ 71941520Smjacob#define IN_NO_RCAP 0x16 /* requested capability not available */ 72041520Smjacob#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 72141520Smjacob#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 72241520Smjacob#define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 72341520Smjacob#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 72441520Smjacob#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 72541520Smjacob 72641520Smjacob/* 72741520Smjacob * Notify Acknowledge Entry structure 72841520Smjacob */ 72941520Smjacob#define NA_RSVDLEN 22 73041520Smjacobtypedef struct { 73141520Smjacob isphdr_t na_header; 73241520Smjacob u_int32_t na_reserved2; 73341520Smjacob#if BYTE_ORDER == BIG_ENDIAN 73441520Smjacob#else 73541520Smjacob u_int8_t na_lun; /* lun */ 73641520Smjacob u_int8_t na_iid; /* initiator */ 73741520Smjacob u_int8_t na_rsvd; 73841520Smjacob u_int8_t na_tgt; /* target */ 73941520Smjacob#endif 74041520Smjacob u_int32_t na_flags; 74141520Smjacob#if BYTE_ORDER == BIG_ENDIAN 74241520Smjacob#else 74341520Smjacob u_int8_t na_status; 74441520Smjacob u_int8_t na_event; 74541520Smjacob#endif 74641520Smjacob u_int16_t na_seqid; /* sequence id */ 74741520Smjacob u_int16_t na_reserved[NA_RSVDLEN]; 74841520Smjacob} na_entry_t; 74941520Smjacob 75041520Smjacob/* 75141520Smjacob * Value for the na_event field 75241520Smjacob */ 75341520Smjacob#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 75441520Smjacob 75541520Smjacob#define NA2_RSVDLEN 21 75641520Smjacobtypedef struct { 75741520Smjacob isphdr_t na_header; 75841520Smjacob u_int32_t na_reserved2; 75941520Smjacob#if BYTE_ORDER == BIG_ENDIAN 76041520Smjacob#else 76141520Smjacob u_int8_t na_lun; /* lun */ 76241520Smjacob u_int8_t na_iid; /* initiator */ 76341520Smjacob#endif 76441520Smjacob u_int16_t na_rsvd; 76541520Smjacob u_int16_t na_flags; 76641520Smjacob u_int16_t na_rsvd2; 76741520Smjacob u_int16_t na_status; 76841520Smjacob u_int16_t na_task_flags; 76941520Smjacob u_int16_t na_seqid; /* sequence id */ 77041520Smjacob u_int16_t na_reserved[NA2_RSVDLEN]; 77141520Smjacob} na_fcentry_t; 77241520Smjacob#define NAFC_RST_CLRD 0x40 77341520Smjacob 77441520Smjacob/* 77541520Smjacob * Value for the na_event field 77641520Smjacob */ 77741520Smjacob#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 77841520Smjacob/* 77941520Smjacob * Accept Target I/O Entry structure 78041520Smjacob */ 78141520Smjacob#define ATIO_CDBLEN 26 78241520Smjacob 78341520Smjacobtypedef struct { 78441520Smjacob isphdr_t at_header; 78541520Smjacob u_int32_t at_reserved2; 78641520Smjacob#if BYTE_ORDER == BIG_ENDIAN 78741520Smjacob#else 78841520Smjacob u_int8_t at_lun; /* lun */ 78941520Smjacob u_int8_t at_iid; /* initiator */ 79041520Smjacob u_int8_t at_cdblen; /* cdb length */ 79141520Smjacob u_int8_t at_tgt; /* target */ 79241520Smjacob#endif 79341520Smjacob u_int32_t at_flags; 79441520Smjacob#if BYTE_ORDER == BIG_ENDIAN 79541520Smjacob#else 79641520Smjacob u_int8_t at_status; /* firmware status */ 79741520Smjacob u_int8_t at_scsi_status; /* scsi status */ 79841520Smjacob u_int8_t at_tag_val; /* tag value */ 79941520Smjacob u_int8_t at_tag_type; /* tag type */ 80041520Smjacob#endif 80141520Smjacob u_int8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 80241520Smjacob u_int8_t at_sense[SUGGSENSELEN]; /* suggested sense data */ 80341520Smjacob} at_entry_t; 80441520Smjacob 80541520Smjacob/* 80641520Smjacob * at_flags values 80741520Smjacob */ 80841520Smjacob#define AT_NODISC 0x00008000 /* disconnect disabled */ 80941520Smjacob#define AT_TQAE 0x00000001 /* Tagged Queue Action enabled */ 81041520Smjacob 81141520Smjacob/* 81241520Smjacob * at_status values 81341520Smjacob */ 81441520Smjacob#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 81541520Smjacob#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 81641520Smjacob#define AT_NOCAP 0x16 /* Requested capability not available */ 81741520Smjacob#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 81841520Smjacob#define AT_CDB 0x3D /* CDB received */ 81941520Smjacob 82041520Smjacob/* 82141520Smjacob * Accept Target I/O Entry structure, Type 2 82241520Smjacob */ 82341520Smjacob#define ATIO2_CDBLEN 16 82441520Smjacob 82541520Smjacobtypedef struct { 82641520Smjacob isphdr_t at_header; 82741520Smjacob u_int32_t at_reserved2; 82841520Smjacob#if BYTE_ORDER == BIG_ENDIAN 82941520Smjacob#else 83041520Smjacob u_int8_t at_lun; /* lun */ 83141520Smjacob u_int8_t at_iid; /* initiator */ 83241520Smjacob#endif 83341520Smjacob u_int16_t at_rxid; /* response ID */ 83441520Smjacob u_int16_t at_flags; 83541520Smjacob u_int16_t at_status; /* firmware status */ 83641520Smjacob#if BYTE_ORDER == BIG_ENDIAN 83741520Smjacob#else 83841520Smjacob u_int8_t at_reserved1; 83941520Smjacob u_int8_t at_taskcodes; 84041520Smjacob u_int8_t at_taskflags; 84141520Smjacob u_int8_t at_execodes; 84241520Smjacob#endif 84341520Smjacob u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 84441520Smjacob u_int32_t at_datalen; /* allocated data len */ 84541520Smjacob u_int16_t at_scclun; 84641520Smjacob u_int16_t at_reserved3; 84741520Smjacob u_int16_t at_scsi_status; 84841520Smjacob u_int8_t at_sense[SUGGSENSELEN]; /* suggested sense data */ 84941520Smjacob} at2_entry_t; 85041520Smjacob 85141520Smjacob#define ATIO2_TC_ATTR_MASK 0x7 85241520Smjacob#define ATIO2_TC_ATTR_SIMPLEQ 0 85341520Smjacob#define ATIO2_TC_ATTR_HEADOFQ 1 85441520Smjacob#define ATIO2_TC_ATTR_ORDERED 2 85541520Smjacob#define ATIO2_TC_ATTR_ACAQ 4 85641520Smjacob#define ATIO2_TC_ATTR_UNTAGGED 5 85741520Smjacob#define TC2TT(code) \ 85841520Smjacob (((code) == ATIO2_TC_ATTR_SIMPLEQ)? 0x20 : \ 85941520Smjacob (((code) == ATIO2_TC_ATTR_HEADOFQ)? 0x21 : \ 86041520Smjacob (((code) == ATIO2_TC_ATTR_ORDERED)? 0x22 : \ 86141520Smjacob (((code) == ATIO2_TC_ATTR_ACAQ)? 0x24 : 0)))) 86241520Smjacob 86341520Smjacob 86441520Smjacob/* 86541520Smjacob * Continue Target I/O Entry structure 86641520Smjacob * Request from driver. The response from the 86741520Smjacob * ISP firmware is the same except that the last 18 86841520Smjacob * bytes are overwritten by suggested sense data if 86941520Smjacob * the 'autosense valid' bit is set in the status byte. 87041520Smjacob */ 87141520Smjacobtypedef struct { 87241520Smjacob isphdr_t ct_header; 87341520Smjacob u_int32_t ct_reserved; 87441520Smjacob#if BYTE_ORDER == BIG_ENDIAN 87541520Smjacob#else 87641520Smjacob u_int8_t ct_lun; /* lun */ 87741520Smjacob u_int8_t ct_iid; /* initiator id */ 87841520Smjacob u_int8_t ct_rsvd; 87941520Smjacob u_int8_t ct_tgt; /* our target id */ 88041520Smjacob#endif 88141520Smjacob u_int32_t ct_flags; 88241520Smjacob#if BYTE_ORDER == BIG_ENDIAN 88341520Smjacob#else 88441520Smjacob u_int8_t ct_status; /* isp status */ 88541520Smjacob u_int8_t ct_scsi_status; /* scsi status */ 88641520Smjacob u_int8_t ct_tag_val; /* tag value */ 88741520Smjacob u_int8_t ct_tag_type; /* tag type */ 88841520Smjacob#endif 88941520Smjacob u_int32_t ct_xfrlen; /* transfer length */ 89041520Smjacob u_int32_t ct_resid; /* residual length */ 89141520Smjacob u_int16_t ct_timeout; 89241520Smjacob u_int16_t ct_seg_count; 89341520Smjacob ispds_t ct_dataseg[ISP_RQDSEG]; 89441520Smjacob} ct_entry_t; 89541520Smjacob 89641520Smjacob/* 89741520Smjacob * ct_flags values 89841520Smjacob */ 89941520Smjacob#define CT_TQAE 0x00000001 /* Tagged Queue Action enable */ 90041520Smjacob#define CT_DATA_IN 0x00000040 /* Data direction */ 90141520Smjacob#define CT_DATA_OUT 0x00000080 /* Data direction */ 90241520Smjacob#define CT_NO_DATA 0x000000C0 /* Data direction */ 90341520Smjacob#define CT_DATAMASK 0x000000C0 /* Data direction */ 90441520Smjacob#define CT_NODISC 0x00008000 /* Disconnects disabled */ 90541520Smjacob#define CT_DSDP 0x01000000 /* Disable Save Data Pointers */ 90641520Smjacob#define CT_SENDRDP 0x04000000 /* Send Restore Pointers msg */ 90741520Smjacob#define CT_SENDSTATUS 0x80000000 /* Send SCSI status byte */ 90841520Smjacob 90941520Smjacob/* 91041520Smjacob * ct_status values 91141520Smjacob * - set by the firmware when it returns the CTIO 91241520Smjacob */ 91341520Smjacob#define CT_OK 0x01 /* completed without error */ 91441520Smjacob#define CT_ABORTED 0x02 /* aborted by host */ 91541520Smjacob#define CT_ERR 0x04 /* see sense data for error */ 91641520Smjacob#define CT_INVAL 0x06 /* request for disabled lun */ 91741520Smjacob#define CT_NOPATH 0x07 /* invalid ITL nexus */ 91841520Smjacob#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 91941520Smjacob#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 92041520Smjacob#define CT_TIMEOUT 0x0B /* timed out */ 92141520Smjacob#define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 92241520Smjacob#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 92341520Smjacob#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 92441520Smjacob#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 92541520Smjacob#define CT_LOGOUT 0x29 /* port logout not acknowledged yet */ 92641520Smjacob#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 92741520Smjacob 92841520Smjacob/* 92941520Smjacob * When the firmware returns a CTIO entry, it may overwrite the last 93041520Smjacob * part of the structure with sense data. This starts at offset 0x2E 93141520Smjacob * into the entry, which is in the middle of ct_dataseg[1]. Rather 93241520Smjacob * than define a new struct for this, I'm just using the sense data 93341520Smjacob * offset. 93441520Smjacob */ 93541520Smjacob#define CTIO_SENSE_OFFSET 0x2E 93641520Smjacob 93741520Smjacob/* 93841520Smjacob * Entry length in u_longs. All entries are the same size so 93941520Smjacob * any one will do as the numerator. 94041520Smjacob */ 94141520Smjacob#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(u_int32_t)) 94241520Smjacob 94341520Smjacob/* 94441520Smjacob * QLA2100 CTIO (type 2) entry 94541520Smjacob */ 94641520Smjacob#define MAXRESPLEN 26 94741520Smjacobtypedef struct { 94841520Smjacob isphdr_t ct_header; 94941520Smjacob u_int32_t ct_reserved; 95041520Smjacob#if BYTE_ORDER == BIG_ENDIAN 95141520Smjacob#else 95241520Smjacob u_int8_t ct_lun; /* lun */ 95341520Smjacob u_int8_t ct_iid; /* initiator id */ 95441520Smjacob#endif 95541520Smjacob u_int16_t ct_rxid; /* response ID */ 95641520Smjacob u_int16_t ct_flags; 95741520Smjacob u_int16_t ct_status; /* isp status */ 95841520Smjacob u_int16_t ct_timeout; 95941520Smjacob u_int16_t ct_seg_count; 96041520Smjacob u_int32_t ct_reloff; /* relative offset */ 96141520Smjacob u_int32_t ct_resid; /* residual length */ 96241520Smjacob union { 96341520Smjacob /* 96441520Smjacob * The three different modes that the target driver 96541520Smjacob * can set the CTIO2 up as. 96641520Smjacob * 96741520Smjacob * The first is for sending FCP_DATA_IUs as well as 96841520Smjacob * (optionally) sending a terminal SCSI status FCP_RSP_IU. 96941520Smjacob * 97041520Smjacob * The second is for sending SCSI sense data in an FCP_RSP_IU. 97141520Smjacob * Note that no FCP_DATA_IUs will be sent. 97241520Smjacob * 97341520Smjacob * The third is for sending FCP_RSP_IUs as built specifically 97441520Smjacob * in system memory as located by the isp_dataseg. 97541520Smjacob */ 97641520Smjacob struct { 97741520Smjacob u_int32_t _reserved; 97841520Smjacob u_int16_t _reserved2; 97941520Smjacob u_int16_t ct_scsi_status; 98041520Smjacob u_int32_t ct_xfrlen; 98141520Smjacob ispds_t ct_dataseg[ISP_RQDSEG_T2]; 98241520Smjacob } m0; 98341520Smjacob struct { 98441520Smjacob u_int16_t _reserved; 98541520Smjacob u_int16_t _reserved2; 98641520Smjacob u_int16_t ct_senselen; 98741520Smjacob u_int16_t ct_scsi_status; 98841520Smjacob u_int16_t ct_resplen; 98941520Smjacob u_int8_t ct_resp[MAXRESPLEN]; 99041520Smjacob } m1; 99141520Smjacob struct { 99241520Smjacob u_int32_t _reserved; 99341520Smjacob u_int16_t _reserved2; 99441520Smjacob u_int16_t _reserved3; 99541520Smjacob u_int32_t ct_datalen; 99641520Smjacob ispds_t ct_fcp_rsp_iudata; 99741520Smjacob } m2; 99841520Smjacob /* 99941520Smjacob * CTIO2 returned from F/W... 100041520Smjacob */ 100141520Smjacob struct { 100241520Smjacob u_int32_t _reserved[4]; 100341520Smjacob u_int16_t ct_scsi_status; 100441520Smjacob u_int8_t ct_sense[SUGGSENSELEN]; 100541520Smjacob } fw; 100641520Smjacob } rsp; 100741520Smjacob} ct2_entry_t; 100841520Smjacob/* 100941520Smjacob * ct_flags values for CTIO2 101041520Smjacob */ 101141520Smjacob#define CT2_FLAG_MMASK 0x0003 101241520Smjacob#define CT2_FLAG_MODE0 0x0000 101341520Smjacob#define CT2_FLAG_MODE1 0x0001 101441520Smjacob#define CT2_FLAG_MODE2 0x0002 101541520Smjacob#define CT2_DATA_IN CT_DATA_IN 101641520Smjacob#define CT2_DATA_OUT CT_DATA_OUT 101741520Smjacob#define CT2_NO_DATA CT_NO_DATA 101841520Smjacob#define CT2_DATAMASK CT_DATA_MASK 101941520Smjacob#define CT2_CCINCR 0x0100 102041520Smjacob#define CT2_FASTPOST 0x0200 102141520Smjacob#define CT2_SENDSTATUS 0x8000 102241520Smjacob 102341520Smjacob/* 102441520Smjacob * ct_status values are (mostly) the same as that for ct_entry. 102541520Smjacob */ 102641520Smjacob 102741520Smjacob/* 102841520Smjacob * ct_scsi_status values- the low 8 bits are the normal SCSI status 102941520Smjacob * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 103041520Smjacob * fields. 103141520Smjacob */ 103241520Smjacob#define CT2_RSPLEN_VALID 0x0100 103341520Smjacob#define CT2_SNSLEN_VALID 0x0200 103441520Smjacob#define CT2_DATA_OVER 0x0400 103541520Smjacob#define CT2_DATA_UNDER 0x0800 103641520Smjacob 103735388Smjacob#endif /* _ISPMBOX_H */ 1038