ispmbox.h revision 237537
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 237537 2012-06-24 17:30:54Z mjacob $ */ 2/*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30/* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33#ifndef _ISPMBOX_H 34#define _ISPMBOX_H 35 36/* 37 * Mailbox Command Opcodes 38 */ 39#define MBOX_NO_OP 0x0000 40#define MBOX_LOAD_RAM 0x0001 41#define MBOX_EXEC_FIRMWARE 0x0002 42#define MBOX_DUMP_RAM 0x0003 43#define MBOX_WRITE_RAM_WORD 0x0004 44#define MBOX_READ_RAM_WORD 0x0005 45#define MBOX_MAILBOX_REG_TEST 0x0006 46#define MBOX_VERIFY_CHECKSUM 0x0007 47#define MBOX_ABOUT_FIRMWARE 0x0008 48#define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50#define MBOX_LOAD_RISC_RAM 0x000b 51 /* c */ 52#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53#define MBOX_CHECK_FIRMWARE 0x000e 54#define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55#define MBOX_INIT_REQ_QUEUE 0x0010 56#define MBOX_INIT_RES_QUEUE 0x0011 57#define MBOX_EXECUTE_IOCB 0x0012 58#define MBOX_WAKE_UP 0x0013 59#define MBOX_STOP_FIRMWARE 0x0014 60#define MBOX_ABORT 0x0015 61#define MBOX_ABORT_DEVICE 0x0016 62#define MBOX_ABORT_TARGET 0x0017 63#define MBOX_BUS_RESET 0x0018 64#define MBOX_STOP_QUEUE 0x0019 65#define MBOX_START_QUEUE 0x001a 66#define MBOX_SINGLE_STEP_QUEUE 0x001b 67#define MBOX_ABORT_QUEUE 0x001c 68#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70#define MBOX_GET_FIRMWARE_STATUS 0x001f 71#define MBOX_GET_INIT_SCSI_ID 0x0020 72#define MBOX_GET_SELECT_TIMEOUT 0x0021 73#define MBOX_GET_RETRY_COUNT 0x0022 74#define MBOX_GET_TAG_AGE_LIMIT 0x0023 75#define MBOX_GET_CLOCK_RATE 0x0024 76#define MBOX_GET_ACT_NEG_STATE 0x0025 77#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78#define MBOX_GET_SBUS_PARAMS 0x0027 79#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80#define MBOX_GET_TARGET_PARAMS 0x0028 81#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88#define MBOX_SET_INIT_SCSI_ID 0x0030 89#define MBOX_SET_SELECT_TIMEOUT 0x0031 90#define MBOX_SET_RETRY_COUNT 0x0032 91#define MBOX_SET_TAG_AGE_LIMIT 0x0033 92#define MBOX_SET_CLOCK_RATE 0x0034 93#define MBOX_SET_ACT_NEG_STATE 0x0035 94#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96#define MBOX_SET_PCI_PARAMETERS 0x0037 97#define MBOX_SET_TARGET_PARAMS 0x0038 98#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107#define MBOX_EXEC_BIOS_IOCB 0x0042 108#define MBOX_SET_FW_FEATURES 0x004a 109#define MBOX_GET_FW_FEATURES 0x004b 110#define FW_FEATURE_FAST_POST 0x1 111#define FW_FEATURE_LVD_NOTIFY 0x2 112#define FW_FEATURE_RIO_32BIT 0x4 113#define FW_FEATURE_RIO_16BIT 0x8 114 115#define MBOX_INIT_REQ_QUEUE_A64 0x0052 116#define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118#define MBOX_ENABLE_TARGET_MODE 0x0055 119#define ENABLE_TARGET_FLAG 0x8000 120#define ENABLE_TQING_FLAG 0x0004 121#define ENABLE_MANDATORY_DISC 0x0002 122#define MBOX_GET_TARGET_STATUS 0x0056 123 124/* These are for the ISP2X00 FC cards */ 125#define MBOX_GET_LOOP_ID 0x0020 126/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 127#define ISP24XX_INORDER 0x0100 128#define ISP24XX_NPIV_SAN 0x0400 129#define ISP24XX_VSAN_SAN 0x1000 130#define ISP24XX_FC_SP_SAN 0x2000 131 132#define MBOX_GET_FIRMWARE_OPTIONS 0x0028 133#define MBOX_SET_FIRMWARE_OPTIONS 0x0038 134#define MBOX_GET_RESOURCE_COUNT 0x0042 135#define MBOX_REQUEST_OFFLINE_MODE 0x0043 136#define MBOX_ENHANCED_GET_PDB 0x0047 137#define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 138#define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 139#define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 140#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 141#define MBOX_INIT_FIRMWARE 0x0060 142#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 143#define MBOX_INIT_LIP 0x0062 144#define MBOX_GET_FC_AL_POSITION_MAP 0x0063 145#define MBOX_GET_PORT_DB 0x0064 146#define MBOX_CLEAR_ACA 0x0065 147#define MBOX_TARGET_RESET 0x0066 148#define MBOX_CLEAR_TASK_SET 0x0067 149#define MBOX_ABORT_TASK_SET 0x0068 150#define MBOX_GET_FW_STATE 0x0069 151#define MBOX_GET_PORT_NAME 0x006A 152#define MBOX_GET_LINK_STATUS 0x006B 153#define MBOX_INIT_LIP_RESET 0x006C 154#define MBOX_SEND_SNS 0x006E 155#define MBOX_FABRIC_LOGIN 0x006F 156#define MBOX_SEND_CHANGE_REQUEST 0x0070 157#define MBOX_FABRIC_LOGOUT 0x0071 158#define MBOX_INIT_LIP_LOGIN 0x0072 159#define MBOX_LUN_RESET 0x007E 160 161#define MBOX_DRIVER_HEARTBEAT 0x005B 162#define MBOX_FW_HEARTBEAT 0x005C 163 164#define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 165#define MBGSD_GET_RATE 0 166#define MBGSD_SET_RATE 1 167#define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 168#define MBGSD_ONEGB 0 169#define MBGSD_TWOGB 1 170#define MBGSD_AUTO 2 171#define MBGSD_FOURGB 3 /* 24XX only */ 172#define MBGSD_EIGHTGB 4 /* 25XX only */ 173 174 175#define ISP2100_SET_PCI_PARAM 0x00ff 176 177#define MBOX_BUSY 0x04 178 179/* 180 * Mailbox Command Complete Status Codes 181 */ 182#define MBOX_COMMAND_COMPLETE 0x4000 183#define MBOX_INVALID_COMMAND 0x4001 184#define MBOX_HOST_INTERFACE_ERROR 0x4002 185#define MBOX_TEST_FAILED 0x4003 186#define MBOX_COMMAND_ERROR 0x4005 187#define MBOX_COMMAND_PARAM_ERROR 0x4006 188#define MBOX_PORT_ID_USED 0x4007 189#define MBOX_LOOP_ID_USED 0x4008 190#define MBOX_ALL_IDS_USED 0x4009 191#define MBOX_NOT_LOGGED_IN 0x400A 192/* pseudo mailbox completion codes */ 193#define MBOX_REGS_BUSY 0x6000 /* registers in use */ 194#define MBOX_TIMEOUT 0x6001 /* command timed out */ 195 196#define MBLOGALL 0x000f 197#define MBLOGNONE 0x0000 198#define MBLOGMASK(x) ((x) & 0xf) 199 200/* 201 * Asynchronous event status codes 202 */ 203#define ASYNC_BUS_RESET 0x8001 204#define ASYNC_SYSTEM_ERROR 0x8002 205#define ASYNC_RQS_XFER_ERR 0x8003 206#define ASYNC_RSP_XFER_ERR 0x8004 207#define ASYNC_QWAKEUP 0x8005 208#define ASYNC_TIMEOUT_RESET 0x8006 209#define ASYNC_DEVICE_RESET 0x8007 210#define ASYNC_EXTMSG_UNDERRUN 0x800A 211#define ASYNC_SCAM_INT 0x800B 212#define ASYNC_HUNG_SCSI 0x800C 213#define ASYNC_KILLED_BUS 0x800D 214#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 215#define ASYNC_LIP_OCCURRED 0x8010 216#define ASYNC_LOOP_UP 0x8011 217#define ASYNC_LOOP_DOWN 0x8012 218#define ASYNC_LOOP_RESET 0x8013 219#define ASYNC_PDB_CHANGED 0x8014 220#define ASYNC_CHANGE_NOTIFY 0x8015 221#define ASYNC_LIP_F8 0x8016 222#define ASYNC_LIP_ERROR 0x8017 223#define ASYNC_SECURITY_UPDATE 0x801B 224#define ASYNC_CMD_CMPLT 0x8020 225#define ASYNC_CTIO_DONE 0x8021 226#define ASYNC_RIO32_1 0x8021 227#define ASYNC_RIO32_2 0x8022 228#define ASYNC_IP_XMIT_DONE 0x8022 229#define ASYNC_IP_RECV_DONE 0x8023 230#define ASYNC_IP_BROADCAST 0x8024 231#define ASYNC_IP_RCVQ_LOW 0x8025 232#define ASYNC_IP_RCVQ_EMPTY 0x8026 233#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 234#define ASYNC_PTPMODE 0x8030 235#define ASYNC_RIO16_1 0x8031 236#define ASYNC_RIO16_2 0x8032 237#define ASYNC_RIO16_3 0x8033 238#define ASYNC_RIO16_4 0x8034 239#define ASYNC_RIO16_5 0x8035 240#define ASYNC_CONNMODE 0x8036 241#define ISP_CONN_LOOP 1 242#define ISP_CONN_PTP 2 243#define ISP_CONN_BADLIP 3 244#define ISP_CONN_FATAL 4 245#define ISP_CONN_LOOPBACK 5 246#define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 247#define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 248#define ASYNC_RCV_ERR 0x8048 249 250/* 251 * Firmware Options. There are a lot of them. 252 * 253 * IFCOPTN - ISP Fibre Channel Option Word N 254 */ 255#define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 256#define IFCOPT1_EAABSRCVD (1 << 12) 257#define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 258#define IFCOPT1_ENAPURE (1 << 10) 259#define IFCOPT1_ENA8017 (1 << 7) 260#define IFCOPT1_DISGPIO67 (1 << 6) 261#define IFCOPT1_LIPLOSSIMM (1 << 5) 262#define IFCOPT1_DISF7SWTCH (1 << 4) 263#define IFCOPT1_CTIO_RETRY (1 << 3) 264#define IFCOPT1_LIPASYNC (1 << 1) 265#define IFCOPT1_LIPF8 (1 << 0) 266 267#define IFCOPT2_LOOPBACK (1 << 1) 268#define IFCOPT2_ATIO3_ONLY (1 << 0) 269 270#define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 271#define IFCOPT3_RNDASYNC (1 << 1) 272/* 273 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 274 * mailbox command to enable this. 275 */ 276#define ASYNC_QFULL_SENT 0x8049 277 278/* 279 * Needs to be enabled 280 */ 281#define ASYNC_AUTO_PLOGI_RJT 0x8018 282/* 283 * 24XX only 284 */ 285#define ASYNC_RJT_SENT 0x8049 286 287/* 288 * All IOCB Queue entries are this size 289 */ 290#define QENTRY_LEN 64 291 292/* 293 * Command Structure Definitions 294 */ 295 296typedef struct { 297 uint32_t ds_base; 298 uint32_t ds_count; 299} ispds_t; 300 301typedef struct { 302 uint32_t ds_base; 303 uint32_t ds_basehi; 304 uint32_t ds_count; 305} ispds64_t; 306 307#define DSTYPE_32BIT 0 308#define DSTYPE_64BIT 1 309typedef struct { 310 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 311 uint32_t ds_segment; /* unused */ 312 uint32_t ds_base; /* 32 bit address of DSD list */ 313} ispdslist_t; 314 315 316typedef struct { 317 uint8_t rqs_entry_type; 318 uint8_t rqs_entry_count; 319 uint8_t rqs_seqno; 320 uint8_t rqs_flags; 321} isphdr_t; 322 323/* RQS Flag definitions */ 324#define RQSFLAG_CONTINUATION 0x01 325#define RQSFLAG_FULL 0x02 326#define RQSFLAG_BADHEADER 0x04 327#define RQSFLAG_BADPACKET 0x08 328#define RQSFLAG_BADCOUNT 0x10 329#define RQSFLAG_BADORDER 0x20 330#define RQSFLAG_MASK 0x3f 331 332/* RQS entry_type definitions */ 333#define RQSTYPE_REQUEST 0x01 334#define RQSTYPE_DATASEG 0x02 335#define RQSTYPE_RESPONSE 0x03 336#define RQSTYPE_MARKER 0x04 337#define RQSTYPE_CMDONLY 0x05 338#define RQSTYPE_ATIO 0x06 /* Target Mode */ 339#define RQSTYPE_CTIO 0x07 /* Target Mode */ 340#define RQSTYPE_SCAM 0x08 341#define RQSTYPE_A64 0x09 342#define RQSTYPE_A64_CONT 0x0a 343#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 344#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 345#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 346#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 347#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 348#define RQSTYPE_STATUS_CONT 0x10 349#define RQSTYPE_T2RQS 0x11 350#define RQSTYPE_CTIO7 0x12 351#define RQSTYPE_IP_XMIT 0x13 352#define RQSTYPE_TSK_MGMT 0x14 353#define RQSTYPE_T4RQS 0x15 354#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 355#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 356#define RQSTYPE_T7RQS 0x18 357#define RQSTYPE_T3RQS 0x19 358#define RQSTYPE_IP_XMIT_64 0x1b 359#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 360#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 361#define RQSTYPE_RIO1 0x21 362#define RQSTYPE_RIO2 0x22 363#define RQSTYPE_IP_RECV 0x23 364#define RQSTYPE_IP_RECV_CONT 0x24 365#define RQSTYPE_CT_PASSTHRU 0x29 366#define RQSTYPE_MS_PASSTHRU 0x29 367#define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 368#define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 369#define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 370#define RQSTYPE_ABORT_IO 0x33 371#define RQSTYPE_T6RQS 0x48 372#define RQSTYPE_LOGIN 0x52 373#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 374#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 375 376 377#define ISP_RQDSEG 4 378typedef struct { 379 isphdr_t req_header; 380 uint32_t req_handle; 381 uint8_t req_lun_trn; 382 uint8_t req_target; 383 uint16_t req_cdblen; 384 uint16_t req_flags; 385 uint16_t req_reserved; 386 uint16_t req_time; 387 uint16_t req_seg_count; 388 uint8_t req_cdb[12]; 389 ispds_t req_dataseg[ISP_RQDSEG]; 390} ispreq_t; 391#define ISP_RQDSEG_A64 2 392 393typedef struct { 394 isphdr_t mrk_header; 395 uint32_t mrk_handle; 396 uint8_t mrk_reserved0; 397 uint8_t mrk_target; 398 uint16_t mrk_modifier; 399 uint16_t mrk_flags; 400 uint16_t mrk_lun; 401 uint8_t mrk_reserved1[48]; 402} isp_marker_t; 403 404typedef struct { 405 isphdr_t mrk_header; 406 uint32_t mrk_handle; 407 uint16_t mrk_nphdl; 408 uint8_t mrk_modifier; 409 uint8_t mrk_reserved0; 410 uint8_t mrk_reserved1; 411 uint8_t mrk_vphdl; 412 uint16_t mrk_reserved2; 413 uint8_t mrk_lun[8]; 414 uint8_t mrk_reserved3[40]; 415} isp_marker_24xx_t; 416 417 418#define SYNC_DEVICE 0 419#define SYNC_TARGET 1 420#define SYNC_ALL 2 421#define SYNC_LIP 3 422 423#define ISP_RQDSEG_T2 3 424typedef struct { 425 isphdr_t req_header; 426 uint32_t req_handle; 427 uint8_t req_lun_trn; 428 uint8_t req_target; 429 uint16_t req_scclun; 430 uint16_t req_flags; 431 uint16_t req_reserved; 432 uint16_t req_time; 433 uint16_t req_seg_count; 434 uint8_t req_cdb[16]; 435 uint32_t req_totalcnt; 436 ispds_t req_dataseg[ISP_RQDSEG_T2]; 437} ispreqt2_t; 438 439typedef struct { 440 isphdr_t req_header; 441 uint32_t req_handle; 442 uint16_t req_target; 443 uint16_t req_scclun; 444 uint16_t req_flags; 445 uint16_t req_reserved; 446 uint16_t req_time; 447 uint16_t req_seg_count; 448 uint8_t req_cdb[16]; 449 uint32_t req_totalcnt; 450 ispds_t req_dataseg[ISP_RQDSEG_T2]; 451} ispreqt2e_t; 452 453#define ISP_RQDSEG_T3 2 454typedef struct { 455 isphdr_t req_header; 456 uint32_t req_handle; 457 uint8_t req_lun_trn; 458 uint8_t req_target; 459 uint16_t req_scclun; 460 uint16_t req_flags; 461 uint16_t req_reserved; 462 uint16_t req_time; 463 uint16_t req_seg_count; 464 uint8_t req_cdb[16]; 465 uint32_t req_totalcnt; 466 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 467} ispreqt3_t; 468#define ispreq64_t ispreqt3_t /* same as.... */ 469 470typedef struct { 471 isphdr_t req_header; 472 uint32_t req_handle; 473 uint16_t req_target; 474 uint16_t req_scclun; 475 uint16_t req_flags; 476 uint16_t req_reserved; 477 uint16_t req_time; 478 uint16_t req_seg_count; 479 uint8_t req_cdb[16]; 480 uint32_t req_totalcnt; 481 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 482} ispreqt3e_t; 483 484/* req_flag values */ 485#define REQFLAG_NODISCON 0x0001 486#define REQFLAG_HTAG 0x0002 487#define REQFLAG_OTAG 0x0004 488#define REQFLAG_STAG 0x0008 489#define REQFLAG_TARGET_RTN 0x0010 490 491#define REQFLAG_NODATA 0x0000 492#define REQFLAG_DATA_IN 0x0020 493#define REQFLAG_DATA_OUT 0x0040 494#define REQFLAG_DATA_UNKNOWN 0x0060 495 496#define REQFLAG_DISARQ 0x0100 497#define REQFLAG_FRC_ASYNC 0x0200 498#define REQFLAG_FRC_SYNC 0x0400 499#define REQFLAG_FRC_WIDE 0x0800 500#define REQFLAG_NOPARITY 0x1000 501#define REQFLAG_STOPQ 0x2000 502#define REQFLAG_XTRASNS 0x4000 503#define REQFLAG_PRIORITY 0x8000 504 505typedef struct { 506 isphdr_t req_header; 507 uint32_t req_handle; 508 uint8_t req_lun_trn; 509 uint8_t req_target; 510 uint16_t req_cdblen; 511 uint16_t req_flags; 512 uint16_t req_reserved; 513 uint16_t req_time; 514 uint16_t req_seg_count; 515 uint8_t req_cdb[44]; 516} ispextreq_t; 517 518/* 24XX only */ 519typedef struct { 520 uint16_t fcd_length; 521 uint16_t fcd_a1500; 522 uint16_t fcd_a3116; 523 uint16_t fcd_a4732; 524 uint16_t fcd_a6348; 525} fcp_cmnd_ds_t; 526 527typedef struct { 528 isphdr_t req_header; 529 uint32_t req_handle; 530 uint16_t req_nphdl; 531 uint16_t req_time; 532 uint16_t req_seg_count; 533 uint16_t req_fc_rsp_dsd_length; 534 uint8_t req_lun[8]; 535 uint16_t req_flags; 536 uint16_t req_fc_cmnd_dsd_length; 537 uint16_t req_fc_cmnd_dsd_a1500; 538 uint16_t req_fc_cmnd_dsd_a3116; 539 uint16_t req_fc_cmnd_dsd_a4732; 540 uint16_t req_fc_cmnd_dsd_a6348; 541 uint16_t req_fc_rsp_dsd_a1500; 542 uint16_t req_fc_rsp_dsd_a3116; 543 uint16_t req_fc_rsp_dsd_a4732; 544 uint16_t req_fc_rsp_dsd_a6348; 545 uint32_t req_totalcnt; 546 uint16_t req_tidlo; 547 uint8_t req_tidhi; 548 uint8_t req_vpidx; 549 ispds64_t req_dataseg; 550} ispreqt6_t; 551 552typedef struct { 553 isphdr_t req_header; 554 uint32_t req_handle; 555 uint16_t req_nphdl; 556 uint16_t req_time; 557 uint16_t req_seg_count; 558 uint16_t req_reserved; 559 uint8_t req_lun[8]; 560 uint8_t req_alen_datadir; 561 uint8_t req_task_management; 562 uint8_t req_task_attribute; 563 uint8_t req_crn; 564 uint8_t req_cdb[16]; 565 uint32_t req_dl; 566 uint16_t req_tidlo; 567 uint8_t req_tidhi; 568 uint8_t req_vpidx; 569 ispds64_t req_dataseg; 570} ispreqt7_t; 571 572/* Task Management Request Function */ 573typedef struct { 574 isphdr_t tmf_header; 575 uint32_t tmf_handle; 576 uint16_t tmf_nphdl; 577 uint8_t tmf_reserved0[2]; 578 uint16_t tmf_delay; 579 uint16_t tmf_timeout; 580 uint8_t tmf_lun[8]; 581 uint32_t tmf_flags; 582 uint8_t tmf_reserved1[20]; 583 uint16_t tmf_tidlo; 584 uint8_t tmf_tidhi; 585 uint8_t tmf_vpidx; 586 uint8_t tmf_reserved2[12]; 587} isp24xx_tmf_t; 588 589#define ISP24XX_TMF_NOSEND 0x80000000 590 591#define ISP24XX_TMF_LUN_RESET 0x00000010 592#define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 593#define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 594#define ISP24XX_TMF_TARGET_RESET 0x00000002 595#define ISP24XX_TMF_CLEAR_ACA 0x00000001 596 597/* I/O Abort Structure */ 598typedef struct { 599 isphdr_t abrt_header; 600 uint32_t abrt_handle; 601 uint16_t abrt_nphdl; 602 uint16_t abrt_options; 603 uint32_t abrt_cmd_handle; 604 uint8_t abrt_reserved[32]; 605 uint16_t abrt_tidlo; 606 uint8_t abrt_tidhi; 607 uint8_t abrt_vpidx; 608 uint8_t abrt_reserved1[12]; 609} isp24xx_abrt_t; 610 611#define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 612#define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 613#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 614 615#define ISP_CDSEG 7 616typedef struct { 617 isphdr_t req_header; 618 uint32_t req_reserved; 619 ispds_t req_dataseg[ISP_CDSEG]; 620} ispcontreq_t; 621 622#define ISP_CDSEG64 5 623typedef struct { 624 isphdr_t req_header; 625 ispds64_t req_dataseg[ISP_CDSEG64]; 626} ispcontreq64_t; 627 628typedef struct { 629 isphdr_t req_header; 630 uint32_t req_handle; 631 uint16_t req_scsi_status; 632 uint16_t req_completion_status; 633 uint16_t req_state_flags; 634 uint16_t req_status_flags; 635 uint16_t req_time; 636#define req_response_len req_time /* FC only */ 637 uint16_t req_sense_len; 638 uint32_t req_resid; 639 uint8_t req_response[8]; /* FC only */ 640 uint8_t req_sense_data[32]; 641} ispstatusreq_t; 642 643/* 644 * Status Continuation 645 */ 646typedef struct { 647 isphdr_t req_header; 648 uint8_t req_sense_data[60]; 649} ispstatus_cont_t; 650 651/* 652 * 24XX Type 0 status 653 */ 654typedef struct { 655 isphdr_t req_header; 656 uint32_t req_handle; 657 uint16_t req_completion_status; 658 uint16_t req_oxid; 659 uint32_t req_resid; 660 uint16_t req_reserved0; 661 uint16_t req_state_flags; 662 uint16_t req_reserved1; 663 uint16_t req_scsi_status; 664 uint32_t req_fcp_residual; 665 uint32_t req_sense_len; 666 uint32_t req_response_len; 667 uint8_t req_rsp_sense[28]; 668} isp24xx_statusreq_t; 669 670/* 671 * For Qlogic 2X00, the high order byte of SCSI status has 672 * additional meaning. 673 */ 674#define RQCS_RU 0x800 /* Residual Under */ 675#define RQCS_RO 0x400 /* Residual Over */ 676#define RQCS_RESID (RQCS_RU|RQCS_RO) 677#define RQCS_SV 0x200 /* Sense Length Valid */ 678#define RQCS_RV 0x100 /* FCP Response Length Valid */ 679 680/* 681 * CT Passthru IOCB 682 */ 683typedef struct { 684 isphdr_t ctp_header; 685 uint32_t ctp_handle; 686 uint16_t ctp_status; 687 uint16_t ctp_nphdl; /* n-port handle */ 688 uint16_t ctp_cmd_cnt; /* Command DSD count */ 689 uint8_t ctp_vpidx; 690 uint8_t ctp_reserved0; 691 uint16_t ctp_time; 692 uint16_t ctp_reserved1; 693 uint16_t ctp_rsp_cnt; /* Response DSD count */ 694 uint16_t ctp_reserved2[5]; 695 uint32_t ctp_rsp_bcnt; /* Response byte count */ 696 uint32_t ctp_cmd_bcnt; /* Command byte count */ 697 ispds64_t ctp_dataseg[2]; 698} isp_ct_pt_t; 699 700/* 701 * MS Passthru IOCB 702 */ 703typedef struct { 704 isphdr_t ms_header; 705 uint32_t ms_handle; 706 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 707 uint16_t ms_status; 708 uint16_t ms_flags; 709 uint16_t ms_reserved1; /* low 8 bits */ 710 uint16_t ms_time; 711 uint16_t ms_cmd_cnt; /* Command DSD count */ 712 uint16_t ms_tot_cnt; /* Total DSD Count */ 713 uint8_t ms_type; /* MS type */ 714 uint8_t ms_r_ctl; /* R_CTL */ 715 uint16_t ms_rxid; /* RX_ID */ 716 uint16_t ms_reserved2; 717 uint32_t ms_handle2; 718 uint32_t ms_rsp_bcnt; /* Response byte count */ 719 uint32_t ms_cmd_bcnt; /* Command byte count */ 720 ispds64_t ms_dataseg[2]; 721} isp_ms_t; 722 723/* 724 * Completion Status Codes. 725 */ 726#define RQCS_COMPLETE 0x0000 727#define RQCS_DMA_ERROR 0x0002 728#define RQCS_RESET_OCCURRED 0x0004 729#define RQCS_ABORTED 0x0005 730#define RQCS_TIMEOUT 0x0006 731#define RQCS_DATA_OVERRUN 0x0007 732#define RQCS_DATA_UNDERRUN 0x0015 733#define RQCS_QUEUE_FULL 0x001C 734 735/* 1X00 Only Completion Codes */ 736#define RQCS_INCOMPLETE 0x0001 737#define RQCS_TRANSPORT_ERROR 0x0003 738#define RQCS_COMMAND_OVERRUN 0x0008 739#define RQCS_STATUS_OVERRUN 0x0009 740#define RQCS_BAD_MESSAGE 0x000a 741#define RQCS_NO_MESSAGE_OUT 0x000b 742#define RQCS_EXT_ID_FAILED 0x000c 743#define RQCS_IDE_MSG_FAILED 0x000d 744#define RQCS_ABORT_MSG_FAILED 0x000e 745#define RQCS_REJECT_MSG_FAILED 0x000f 746#define RQCS_NOP_MSG_FAILED 0x0010 747#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 748#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 749#define RQCS_ID_MSG_FAILED 0x0013 750#define RQCS_UNEXP_BUS_FREE 0x0014 751#define RQCS_XACT_ERR1 0x0018 752#define RQCS_XACT_ERR2 0x0019 753#define RQCS_XACT_ERR3 0x001A 754#define RQCS_BAD_ENTRY 0x001B 755#define RQCS_PHASE_SKIPPED 0x001D 756#define RQCS_ARQS_FAILED 0x001E 757#define RQCS_WIDE_FAILED 0x001F 758#define RQCS_SYNCXFER_FAILED 0x0020 759#define RQCS_LVD_BUSERR 0x0021 760 761/* 2X00 Only Completion Codes */ 762#define RQCS_PORT_UNAVAILABLE 0x0028 763#define RQCS_PORT_LOGGED_OUT 0x0029 764#define RQCS_PORT_CHANGED 0x002A 765#define RQCS_PORT_BUSY 0x002B 766 767/* 24XX Only Completion Codes */ 768#define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 769#define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 770#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 771#define RQCS_24XX_TMO 0x0030 /* task management overrun */ 772 773 774/* 775 * 1X00 specific State Flags 776 */ 777#define RQSF_GOT_BUS 0x0100 778#define RQSF_GOT_TARGET 0x0200 779#define RQSF_SENT_CDB 0x0400 780#define RQSF_XFRD_DATA 0x0800 781#define RQSF_GOT_STATUS 0x1000 782#define RQSF_GOT_SENSE 0x2000 783#define RQSF_XFER_COMPLETE 0x4000 784 785/* 786 * 2X00 specific State Flags 787 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 788 */ 789#define RQSF_DATA_IN 0x0020 790#define RQSF_DATA_OUT 0x0040 791#define RQSF_STAG 0x0008 792#define RQSF_OTAG 0x0004 793#define RQSF_HTAG 0x0002 794/* 795 * 1X00 Status Flags 796 */ 797#define RQSTF_DISCONNECT 0x0001 798#define RQSTF_SYNCHRONOUS 0x0002 799#define RQSTF_PARITY_ERROR 0x0004 800#define RQSTF_BUS_RESET 0x0008 801#define RQSTF_DEVICE_RESET 0x0010 802#define RQSTF_ABORTED 0x0020 803#define RQSTF_TIMEOUT 0x0040 804#define RQSTF_NEGOTIATION 0x0080 805 806/* 807 * 2X00 specific state flags 808 */ 809/* RQSF_SENT_CDB */ 810/* RQSF_XFRD_DATA */ 811/* RQSF_GOT_STATUS */ 812/* RQSF_XFER_COMPLETE */ 813 814/* 815 * 2X00 specific status flags 816 */ 817/* RQSTF_ABORTED */ 818/* RQSTF_TIMEOUT */ 819#define RQSTF_DMA_ERROR 0x0080 820#define RQSTF_LOGOUT 0x2000 821 822/* 823 * Miscellaneous 824 */ 825#ifndef ISP_EXEC_THROTTLE 826#define ISP_EXEC_THROTTLE 16 827#endif 828 829/* 830 * About Firmware returns an 'attribute' word in mailbox 6. 831 * These attributes are for 2200 and 2300. 832 */ 833#define ISP_FW_ATTR_TMODE 0x0001 834#define ISP_FW_ATTR_SCCLUN 0x0002 835#define ISP_FW_ATTR_FABRIC 0x0004 836#define ISP_FW_ATTR_CLASS2 0x0008 837#define ISP_FW_ATTR_FCTAPE 0x0010 838#define ISP_FW_ATTR_IP 0x0020 839#define ISP_FW_ATTR_VI 0x0040 840#define ISP_FW_ATTR_VI_SOLARIS 0x0080 841#define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 842 843/* and these are for the 2400 */ 844#define ISP2400_FW_ATTR_CLASS2 0x0001 845#define ISP2400_FW_ATTR_IP 0x0002 846#define ISP2400_FW_ATTR_MULTIID 0x0004 847#define ISP2400_FW_ATTR_SB2 0x0008 848#define ISP2400_FW_ATTR_T10CRC 0x0010 849#define ISP2400_FW_ATTR_VI 0x0020 850#define ISP2400_FW_ATTR_VP0 0x1000 851#define ISP2400_FW_ATTR_EXPFW 0x2000 852#define ISP2400_FW_ATTR_EXTNDED 0x8000 853 854/* 855 * These are either manifestly true or are dependent on f/w attributes 856 */ 857#define ISP_CAP_TMODE(isp) \ 858 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 859#define ISP_CAP_SCCFW(isp) \ 860 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 861#define ISP_CAP_2KLOGIN(isp) \ 862 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 863 864/* 865 * This is only true for 24XX cards with this f/w attribute 866 */ 867#define ISP_CAP_MULTI_ID(isp) \ 868 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 869#define ISP_GET_VPIDX(isp, tag) \ 870 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 871 872/* 873 * This is true manifestly or is dependent on a f/w attribute 874 * but may or may not actually be *enabled*. In any case, it 875 * is enabled on a per-channel basis. 876 */ 877#define ISP_CAP_FCTAPE(isp) \ 878 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 879 880#define ISP_FCTAPE_ENABLED(isp, chan) \ 881 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 882 883/* 884 * Reduced Interrupt Operation Response Queue Entries 885 */ 886 887typedef struct { 888 isphdr_t req_header; 889 uint32_t req_handles[15]; 890} isp_rio1_t; 891 892typedef struct { 893 isphdr_t req_header; 894 uint16_t req_handles[30]; 895} isp_rio2_t; 896 897/* 898 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 899 */ 900 901/* 902 * Initialization Control Block 903 * 904 * Version One (prime) format. 905 */ 906typedef struct { 907 uint8_t icb_version; 908 uint8_t icb_reserved0; 909 uint16_t icb_fwoptions; 910 uint16_t icb_maxfrmlen; 911 uint16_t icb_maxalloc; 912 uint16_t icb_execthrottle; 913 uint8_t icb_retry_count; 914 uint8_t icb_retry_delay; 915 uint8_t icb_portname[8]; 916 uint16_t icb_hardaddr; 917 uint8_t icb_iqdevtype; 918 uint8_t icb_logintime; 919 uint8_t icb_nodename[8]; 920 uint16_t icb_rqstout; 921 uint16_t icb_rspnsin; 922 uint16_t icb_rqstqlen; 923 uint16_t icb_rsltqlen; 924 uint16_t icb_rqstaddr[4]; 925 uint16_t icb_respaddr[4]; 926 uint16_t icb_lunenables; 927 uint8_t icb_ccnt; 928 uint8_t icb_icnt; 929 uint16_t icb_lunetimeout; 930 uint16_t icb_reserved1; 931 uint16_t icb_xfwoptions; 932 uint8_t icb_racctimer; 933 uint8_t icb_idelaytimer; 934 uint16_t icb_zfwoptions; 935 uint16_t icb_reserved2[13]; 936} isp_icb_t; 937 938#define ICB_VERSION1 1 939 940#define ICBOPT_EXTENDED 0x8000 941#define ICBOPT_BOTH_WWNS 0x4000 942#define ICBOPT_FULL_LOGIN 0x2000 943#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 944#define ICBOPT_PREVLOOP 0x0800 945#define ICBOPT_SRCHDOWN 0x0400 946#define ICBOPT_NOLIP 0x0200 947#define ICBOPT_PDBCHANGE_AE 0x0100 948#define ICBOPT_INI_TGTTYPE 0x0080 949#define ICBOPT_INI_ADISC 0x0040 950#define ICBOPT_INI_DISABLE 0x0020 951#define ICBOPT_TGT_ENABLE 0x0010 952#define ICBOPT_FAST_POST 0x0008 953#define ICBOPT_FULL_DUPLEX 0x0004 954#define ICBOPT_FAIRNESS 0x0002 955#define ICBOPT_HARD_ADDRESS 0x0001 956 957#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 958#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 959#define ICBXOPT_FCTAPE_CONFIRM 0x2000 960#define ICBXOPT_FCTAPE 0x1000 961#define ICBXOPT_CLASS2_ACK0 0x0200 962#define ICBXOPT_CLASS2 0x0100 963#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 964#define ICBXOPT_TOPO_MASK 0x0070 965#define ICBXOPT_LOOP_ONLY 0x0000 966#define ICBXOPT_PTP_ONLY 0x0010 967#define ICBXOPT_LOOP_2_PTP 0x0020 968#define ICBXOPT_PTP_2_LOOP 0x0030 969/* 970 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 971 * RIO is not defined for the 23XX cards (just 2200) 972 */ 973#define ICBXOPT_RIO_OFF 0 974#define ICBXOPT_RIO_16BIT 1 975#define ICBXOPT_RIO_32BIT 2 976#define ICBXOPT_RIO_16BIT_IOCB 3 977#define ICBXOPT_RIO_32BIT_IOCB 4 978#define ICBXOPT_ZIO 5 979#define ICBXOPT_TIMER_MASK 0x7 980 981#define ICBZOPT_RATE_MASK 0xC000 982#define ICBZOPT_RATE_ONEGB 0x0000 983#define ICBZOPT_RATE_AUTO 0x8000 984#define ICBZOPT_RATE_TWOGB 0x4000 985#define ICBZOPT_50_OHM 0x2000 986#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 987#define ICBZOPT_RSPSZ_MASK 0x0030 988#define ICBZOPT_RSPSZ_24 0x0000 989#define ICBZOPT_RSPSZ_12 0x0010 990#define ICBZOPT_RSPSZ_24A 0x0020 991#define ICBZOPT_RSPSZ_32 0x0030 992#define ICBZOPT_SOFTID 0x0002 993#define ICBZOPT_ENA_RDXFR_RDY 0x0001 994 995/* 2400 F/W options */ 996#define ICB2400_OPT1_BOTH_WWNS 0x00004000 997#define ICB2400_OPT1_FULL_LOGIN 0x00002000 998#define ICB2400_OPT1_PREVLOOP 0x00000800 999#define ICB2400_OPT1_SRCHDOWN 0x00000400 1000#define ICB2400_OPT1_NOLIP 0x00000200 1001#define ICB2400_OPT1_INI_DISABLE 0x00000020 1002#define ICB2400_OPT1_TGT_ENABLE 0x00000010 1003#define ICB2400_OPT1_FULL_DUPLEX 0x00000004 1004#define ICB2400_OPT1_FAIRNESS 0x00000002 1005#define ICB2400_OPT1_HARD_ADDRESS 0x00000001 1006 1007#define ICB2400_OPT2_TPRLIC 0x00004000 1008#define ICB2400_OPT2_FCTAPE 0x00001000 1009#define ICB2400_OPT2_FCSP 0x00000800 1010#define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1011#define ICB2400_OPT2_CLASS2 0x00000100 1012#define ICB2400_OPT2_NO_PLAY 0x00000080 1013#define ICB2400_OPT2_TOPO_MASK 0x00000070 1014#define ICB2400_OPT2_LOOP_ONLY 0x00000000 1015#define ICB2400_OPT2_PTP_ONLY 0x00000010 1016#define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1017#define ICB2400_OPT2_TIMER_MASK 0x0000000f 1018#define ICB2400_OPT2_ZIO 0x00000005 1019#define ICB2400_OPT2_ZIO1 0x00000006 1020 1021#define ICB2400_OPT3_75_OHM 0x00010000 1022#define ICB2400_OPT3_RATE_MASK 0x0000E000 1023#define ICB2400_OPT3_RATE_ONEGB 0x00000000 1024#define ICB2400_OPT3_RATE_TWOGB 0x00002000 1025#define ICB2400_OPT3_RATE_AUTO 0x00004000 1026#define ICB2400_OPT3_RATE_FOURGB 0x00006000 1027#define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1028#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1029#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1030#define ICB2400_OPT3_ENA_OOF 0x00000040 1031/* note that a response size flag of zero is reserved! */ 1032#define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1033#define ICB2400_OPT3_RSPSZ_12 0x00000010 1034#define ICB2400_OPT3_RSPSZ_24 0x00000020 1035#define ICB2400_OPT3_RSPSZ_32 0x00000030 1036#define ICB2400_OPT3_SOFTID 0x00000002 1037 1038#define ICB_MIN_FRMLEN 256 1039#define ICB_MAX_FRMLEN 2112 1040#define ICB_DFLT_FRMLEN 1024 1041#define ICB_DFLT_ALLOC 256 1042#define ICB_DFLT_THROTTLE 16 1043#define ICB_DFLT_RDELAY 5 1044#define ICB_DFLT_RCOUNT 3 1045 1046#define ICB_LOGIN_TOV 30 1047#define ICB_LUN_ENABLE_TOV 180 1048 1049 1050/* 1051 * And somebody at QLogic had a great idea that you could just change 1052 * the structure *and* keep the version number the same as the other cards. 1053 */ 1054typedef struct { 1055 uint16_t icb_version; 1056 uint16_t icb_reserved0; 1057 uint16_t icb_maxfrmlen; 1058 uint16_t icb_execthrottle; 1059 uint16_t icb_xchgcnt; 1060 uint16_t icb_hardaddr; 1061 uint8_t icb_portname[8]; 1062 uint8_t icb_nodename[8]; 1063 uint16_t icb_rspnsin; 1064 uint16_t icb_rqstout; 1065 uint16_t icb_retry_count; 1066 uint16_t icb_priout; 1067 uint16_t icb_rsltqlen; 1068 uint16_t icb_rqstqlen; 1069 uint16_t icb_ldn_nols; 1070 uint16_t icb_prqstqlen; 1071 uint16_t icb_rqstaddr[4]; 1072 uint16_t icb_respaddr[4]; 1073 uint16_t icb_priaddr[4]; 1074 uint16_t icb_reserved1[4]; 1075 uint16_t icb_atio_in; 1076 uint16_t icb_atioqlen; 1077 uint16_t icb_atioqaddr[4]; 1078 uint16_t icb_idelaytimer; 1079 uint16_t icb_logintime; 1080 uint32_t icb_fwoptions1; 1081 uint32_t icb_fwoptions2; 1082 uint32_t icb_fwoptions3; 1083 uint16_t icb_reserved2[12]; 1084} isp_icb_2400_t; 1085 1086#define RQRSP_ADDR0015 0 1087#define RQRSP_ADDR1631 1 1088#define RQRSP_ADDR3247 2 1089#define RQRSP_ADDR4863 3 1090 1091 1092#define ICB_NNM0 7 1093#define ICB_NNM1 6 1094#define ICB_NNM2 5 1095#define ICB_NNM3 4 1096#define ICB_NNM4 3 1097#define ICB_NNM5 2 1098#define ICB_NNM6 1 1099#define ICB_NNM7 0 1100 1101#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1102 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1103 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1104 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1105 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1106 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1107 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1108 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1109 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1110 1111#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1112 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1113 ((uint64_t) array[ICB_NNM1] << 8) | \ 1114 ((uint64_t) array[ICB_NNM2] << 16) | \ 1115 ((uint64_t) array[ICB_NNM3] << 24) | \ 1116 ((uint64_t) array[ICB_NNM4] << 32) | \ 1117 ((uint64_t) array[ICB_NNM5] << 40) | \ 1118 ((uint64_t) array[ICB_NNM6] << 48) | \ 1119 ((uint64_t) array[ICB_NNM7] << 56) 1120 1121 1122/* 1123 * For MULTI_ID firmware, this describes a 1124 * virtual port entity for getting status. 1125 */ 1126typedef struct { 1127 uint16_t vp_port_status; 1128 uint8_t vp_port_options; 1129 uint8_t vp_port_loopid; 1130 uint8_t vp_port_portname[8]; 1131 uint8_t vp_port_nodename[8]; 1132 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1133 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1134} vp_port_info_t; 1135 1136#define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1137#define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1138#define ICB2400_VPOPT_ENABLED 0x00000008 1139#define ICB2400_VPOPT_NOPLAY 0x00000004 1140#define ICB2400_VPOPT_PREVLOOP 0x00000002 1141#define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1142 1143#define ICB2400_VPOPT_WRITE_SIZE 20 1144 1145/* 1146 * For MULTI_ID firmware, we append this structure 1147 * to the isp_icb_2400_t above, followed by a list 1148 * structures that are *most* of the vp_port_info_t. 1149 */ 1150typedef struct { 1151 uint16_t vp_count; 1152 uint16_t vp_global_options; 1153} isp_icb_2400_vpinfo_t; 1154 1155#define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1156#define ICB2400_VPINFO_PORT_OFF(chan) \ 1157 ICB2400_VPINFO_OFF + \ 1158 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1159 1160#define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1161#define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1162#define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1163 1164typedef struct { 1165 isphdr_t vp_ctrl_hdr; 1166 uint32_t vp_ctrl_handle; 1167 uint16_t vp_ctrl_index_fail; 1168 uint16_t vp_ctrl_status; 1169 uint16_t vp_ctrl_command; 1170 uint16_t vp_ctrl_vp_count; 1171 uint16_t vp_ctrl_idmap[8]; 1172 uint8_t vp_ctrl_reserved[32]; 1173} vp_ctrl_info_t; 1174 1175#define VP_CTRL_CMD_ENABLE_VP 0 1176#define VP_CTRL_CMD_DISABLE_VP 8 1177#define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1178#define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1179 1180/* 1181 * We can use this structure for modifying either one or two VP ports after initialization 1182 */ 1183typedef struct { 1184 isphdr_t vp_mod_hdr; 1185 uint32_t vp_mod_hdl; 1186 uint16_t vp_mod_reserved0; 1187 uint16_t vp_mod_status; 1188 uint8_t vp_mod_cmd; 1189 uint8_t vp_mod_cnt; 1190 uint8_t vp_mod_idx0; 1191 uint8_t vp_mod_idx1; 1192 struct { 1193 uint8_t options; 1194 uint8_t loopid; 1195 uint16_t reserved1; 1196 uint8_t wwpn[8]; 1197 uint8_t wwnn[8]; 1198 } vp_mod_ports[2]; 1199 uint8_t vp_mod_reserved2[8]; 1200} vp_modify_t; 1201 1202#define VP_STS_OK 0x00 1203#define VP_STS_ERR 0x01 1204#define VP_CNT_ERR 0x02 1205#define VP_GEN_ERR 0x03 1206#define VP_IDX_ERR 0x04 1207#define VP_STS_BSY 0x05 1208 1209#define VP_MODIFY_VP 0x00 1210#define VP_MODIFY_ENA 0x01 1211 1212/* 1213 * Port Data Base Element 1214 */ 1215 1216typedef struct { 1217 uint16_t pdb_options; 1218 uint8_t pdb_mstate; 1219 uint8_t pdb_sstate; 1220 uint8_t pdb_hardaddr_bits[4]; 1221 uint8_t pdb_portid_bits[4]; 1222 uint8_t pdb_nodename[8]; 1223 uint8_t pdb_portname[8]; 1224 uint16_t pdb_execthrottle; 1225 uint16_t pdb_exec_count; 1226 uint8_t pdb_retry_count; 1227 uint8_t pdb_retry_delay; 1228 uint16_t pdb_resalloc; 1229 uint16_t pdb_curalloc; 1230 uint16_t pdb_qhead; 1231 uint16_t pdb_qtail; 1232 uint16_t pdb_tl_next; 1233 uint16_t pdb_tl_last; 1234 uint16_t pdb_features; /* PLOGI, Common Service */ 1235 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1236 uint16_t pdb_roi; /* PLOGI, Common Service */ 1237 uint8_t pdb_target; 1238 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1239 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1240 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1241 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1242 uint16_t pdb_labrtflg; 1243 uint16_t pdb_lstopflg; 1244 uint16_t pdb_sqhead; 1245 uint16_t pdb_sqtail; 1246 uint16_t pdb_ptimer; 1247 uint16_t pdb_nxt_seqid; 1248 uint16_t pdb_fcount; 1249 uint16_t pdb_prli_len; 1250 uint16_t pdb_prli_svc0; 1251 uint16_t pdb_prli_svc3; 1252 uint16_t pdb_loopid; 1253 uint16_t pdb_il_ptr; 1254 uint16_t pdb_sl_ptr; 1255} isp_pdb_21xx_t; 1256 1257#define PDB_OPTIONS_XMITTING (1<<11) 1258#define PDB_OPTIONS_LNKXMIT (1<<10) 1259#define PDB_OPTIONS_ABORTED (1<<9) 1260#define PDB_OPTIONS_ADISC (1<<1) 1261 1262#define PDB_STATE_DISCOVERY 0 1263#define PDB_STATE_WDISC_ACK 1 1264#define PDB_STATE_PLOGI 2 1265#define PDB_STATE_PLOGI_ACK 3 1266#define PDB_STATE_PRLI 4 1267#define PDB_STATE_PRLI_ACK 5 1268#define PDB_STATE_LOGGED_IN 6 1269#define PDB_STATE_PORT_UNAVAIL 7 1270#define PDB_STATE_PRLO 8 1271#define PDB_STATE_PRLO_ACK 9 1272#define PDB_STATE_PLOGO 10 1273#define PDB_STATE_PLOG_ACK 11 1274 1275#define SVC3_TGT_ROLE 0x10 1276#define SVC3_INI_ROLE 0x20 1277#define SVC3_ROLE_MASK 0x30 1278#define SVC3_ROLE_SHIFT 4 1279 1280#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1281#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1282 1283/* 1284 * Port Data Base Element- 24XX cards 1285 */ 1286typedef struct { 1287 uint16_t pdb_flags; 1288 uint8_t pdb_curstate; 1289 uint8_t pdb_laststate; 1290 uint8_t pdb_hardaddr_bits[4]; 1291 uint8_t pdb_portid_bits[4]; 1292#define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1293 uint16_t pdb_retry_timer; 1294 uint16_t pdb_handle; 1295 uint16_t pdb_rcv_dsize; 1296 uint16_t pdb_reserved0; 1297 uint16_t pdb_prli_svc0; 1298 uint16_t pdb_prli_svc3; 1299 uint8_t pdb_portname[8]; 1300 uint8_t pdb_nodename[8]; 1301 uint8_t pdb_reserved1[24]; 1302} isp_pdb_24xx_t; 1303 1304#define PDB2400_TID_SUPPORTED 0x4000 1305#define PDB2400_FC_TAPE 0x0080 1306#define PDB2400_CLASS2_ACK0 0x0040 1307#define PDB2400_FCP_CONF 0x0020 1308#define PDB2400_CLASS2 0x0010 1309#define PDB2400_ADDR_VALID 0x0002 1310 1311#define PDB2400_STATE_PLOGI_PEND 0x03 1312#define PDB2400_STATE_PLOGI_DONE 0x04 1313#define PDB2400_STATE_PRLI_PEND 0x05 1314#define PDB2400_STATE_LOGGED_IN 0x06 1315#define PDB2400_STATE_PORT_UNAVAIL 0x07 1316#define PDB2400_STATE_PRLO_PEND 0x09 1317#define PDB2400_STATE_LOGO_PEND 0x0B 1318 1319/* 1320 * Common elements from the above two structures that are actually useful to us. 1321 */ 1322typedef struct { 1323 uint16_t handle; 1324 uint16_t reserved; 1325 uint32_t s3_role : 8, 1326 portid : 24; 1327 uint8_t portname[8]; 1328 uint8_t nodename[8]; 1329} isp_pdb_t; 1330 1331/* 1332 * Port Database Changed Async Event information for 24XX cards 1333 */ 1334#define PDB24XX_AE_OK 0x00 1335#define PDB24XX_AE_IMPL_LOGO_1 0x01 1336#define PDB24XX_AE_IMPL_LOGO_2 0x02 1337#define PDB24XX_AE_IMPL_LOGO_3 0x03 1338#define PDB24XX_AE_PLOGI_RCVD 0x04 1339#define PDB24XX_AE_PLOGI_RJT 0x05 1340#define PDB24XX_AE_PRLI_RCVD 0x06 1341#define PDB24XX_AE_PRLI_RJT 0x07 1342#define PDB24XX_AE_TPRLO 0x08 1343#define PDB24XX_AE_TPRLO_RJT 0x09 1344#define PDB24XX_AE_PRLO_RCVD 0x0a 1345#define PDB24XX_AE_LOGO_RCVD 0x0b 1346#define PDB24XX_AE_TOPO_CHG 0x0c 1347#define PDB24XX_AE_NPORT_CHG 0x0d 1348#define PDB24XX_AE_FLOGI_RJT 0x0e 1349#define PDB24XX_AE_BAD_FANN 0x0f 1350#define PDB24XX_AE_FLOGI_TIMO 0x10 1351#define PDB24XX_AE_ABX_LOGO 0x11 1352#define PDB24XX_AE_PLOGI_DONE 0x12 1353#define PDB24XX_AE_PRLI_DONJE 0x13 1354#define PDB24XX_AE_OPN_1 0x14 1355#define PDB24XX_AE_OPN_2 0x15 1356#define PDB24XX_AE_TXERR 0x16 1357#define PDB24XX_AE_FORCED_LOGO 0x17 1358#define PDB24XX_AE_DISC_TIMO 0x18 1359 1360/* 1361 * Genericized Port Login/Logout software structure 1362 */ 1363typedef struct { 1364 uint16_t handle; 1365 uint16_t channel; 1366 uint32_t 1367 flags : 8, 1368 portid : 24; 1369} isp_plcmd_t; 1370/* the flags to use are those for PLOGX_FLG_* below */ 1371 1372/* 1373 * ISP24XX- Login/Logout Port IOCB 1374 */ 1375typedef struct { 1376 isphdr_t plogx_header; 1377 uint32_t plogx_handle; 1378 uint16_t plogx_status; 1379 uint16_t plogx_nphdl; 1380 uint16_t plogx_flags; 1381 uint16_t plogx_vphdl; /* low 8 bits */ 1382 uint16_t plogx_portlo; /* low 16 bits */ 1383 uint16_t plogx_rspsz_porthi; 1384 struct { 1385 uint16_t lo16; 1386 uint16_t hi16; 1387 } plogx_ioparm[11]; 1388} isp_plogx_t; 1389 1390#define PLOGX_STATUS_OK 0x00 1391#define PLOGX_STATUS_UNAVAIL 0x28 1392#define PLOGX_STATUS_LOGOUT 0x29 1393#define PLOGX_STATUS_IOCBERR 0x31 1394 1395#define PLOGX_IOCBERR_NOLINK 0x01 1396#define PLOGX_IOCBERR_NOIOCB 0x02 1397#define PLOGX_IOCBERR_NOXGHG 0x03 1398#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1399#define PLOGX_IOCBERR_NOFABRIC 0x05 1400#define PLOGX_IOCBERR_NOTREADY 0x07 1401#define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1402#define PLOGX_IOCBERR_NOPCB 0x0a 1403#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1404#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1405#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1406#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1407#define PLOGX_IOCBERR_NOHANDLE 0x1c 1408#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1409 1410#define PLOGX_FLG_CMD_MASK 0xf 1411#define PLOGX_FLG_CMD_PLOGI 0 1412#define PLOGX_FLG_CMD_PRLI 1 1413#define PLOGX_FLG_CMD_PDISC 2 1414#define PLOGX_FLG_CMD_LOGO 8 1415#define PLOGX_FLG_CMD_PRLO 9 1416#define PLOGX_FLG_CMD_TPRLO 10 1417 1418#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1419#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1420#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1421#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1422#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1423#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1424#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1425 1426#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1427#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1428 1429/* 1430 * Report ID Acquisistion (24XX multi-id firmware) 1431 */ 1432typedef struct { 1433 isphdr_t ridacq_hdr; 1434 uint32_t ridacq_handle; 1435 union { 1436 struct { 1437 uint8_t ridacq_vp_acquired; 1438 uint8_t ridacq_vp_setup; 1439 uint16_t ridacq_reserved0; 1440 } type0; /* type 0 */ 1441 struct { 1442 uint16_t ridacq_vp_count; 1443 uint8_t ridacq_vp_index; 1444 uint8_t ridacq_vp_status; 1445 } type1; /* type 1 */ 1446 } un; 1447 uint16_t ridacq_vp_port_lo; 1448 uint8_t ridacq_vp_port_hi; 1449 uint8_t ridacq_format; /* 0 or 1 */ 1450 uint16_t ridacq_map[8]; 1451 uint8_t ridacq_reserved1[32]; 1452} isp_ridacq_t; 1453 1454#define RIDACQ_STS_COMPLETE 0 1455#define RIDACQ_STS_UNACQUIRED 1 1456#define RIDACQ_STS_CHANGED 20 1457 1458 1459/* 1460 * Simple Name Server Data Structures 1461 */ 1462#define SNS_GA_NXT 0x100 1463#define SNS_GPN_ID 0x112 1464#define SNS_GNN_ID 0x113 1465#define SNS_GFF_ID 0x11F 1466#define SNS_GID_FT 0x171 1467#define SNS_RFT_ID 0x217 1468typedef struct { 1469 uint16_t snscb_rblen; /* response buffer length (words) */ 1470 uint16_t snscb_reserved0; 1471 uint16_t snscb_addr[4]; /* response buffer address */ 1472 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1473 uint16_t snscb_reserved1; 1474 uint16_t snscb_data[1]; /* variable data */ 1475} sns_screq_t; /* Subcommand Request Structure */ 1476 1477typedef struct { 1478 uint16_t snscb_rblen; /* response buffer length (words) */ 1479 uint16_t snscb_reserved0; 1480 uint16_t snscb_addr[4]; /* response buffer address */ 1481 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1482 uint16_t snscb_reserved1; 1483 uint16_t snscb_cmd; 1484 uint16_t snscb_reserved2; 1485 uint32_t snscb_reserved3; 1486 uint32_t snscb_port; 1487} sns_ga_nxt_req_t; 1488#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1489 1490typedef struct { 1491 uint16_t snscb_rblen; /* response buffer length (words) */ 1492 uint16_t snscb_reserved0; 1493 uint16_t snscb_addr[4]; /* response buffer address */ 1494 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1495 uint16_t snscb_reserved1; 1496 uint16_t snscb_cmd; 1497 uint16_t snscb_reserved2; 1498 uint32_t snscb_reserved3; 1499 uint32_t snscb_portid; 1500} sns_gxn_id_req_t; 1501#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1502 1503typedef struct { 1504 uint16_t snscb_rblen; /* response buffer length (words) */ 1505 uint16_t snscb_reserved0; 1506 uint16_t snscb_addr[4]; /* response buffer address */ 1507 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1508 uint16_t snscb_reserved1; 1509 uint16_t snscb_cmd; 1510 uint16_t snscb_mword_div_2; 1511 uint32_t snscb_reserved3; 1512 uint32_t snscb_fc4_type; 1513} sns_gid_ft_req_t; 1514#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1515 1516typedef struct { 1517 uint16_t snscb_rblen; /* response buffer length (words) */ 1518 uint16_t snscb_reserved0; 1519 uint16_t snscb_addr[4]; /* response buffer address */ 1520 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1521 uint16_t snscb_reserved1; 1522 uint16_t snscb_cmd; 1523 uint16_t snscb_reserved2; 1524 uint32_t snscb_reserved3; 1525 uint32_t snscb_port; 1526 uint32_t snscb_fc4_types[8]; 1527} sns_rft_id_req_t; 1528#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1529 1530typedef struct { 1531 ct_hdr_t snscb_cthdr; 1532 uint8_t snscb_port_type; 1533 uint8_t snscb_port_id[3]; 1534 uint8_t snscb_portname[8]; 1535 uint16_t snscb_data[1]; /* variable data */ 1536} sns_scrsp_t; /* Subcommand Response Structure */ 1537 1538typedef struct { 1539 ct_hdr_t snscb_cthdr; 1540 uint8_t snscb_port_type; 1541 uint8_t snscb_port_id[3]; 1542 uint8_t snscb_portname[8]; 1543 uint8_t snscb_pnlen; /* symbolic port name length */ 1544 uint8_t snscb_pname[255]; /* symbolic port name */ 1545 uint8_t snscb_nodename[8]; 1546 uint8_t snscb_nnlen; /* symbolic node name length */ 1547 uint8_t snscb_nname[255]; /* symbolic node name */ 1548 uint8_t snscb_ipassoc[8]; 1549 uint8_t snscb_ipaddr[16]; 1550 uint8_t snscb_svc_class[4]; 1551 uint8_t snscb_fc4_types[32]; 1552 uint8_t snscb_fpname[8]; 1553 uint8_t snscb_reserved; 1554 uint8_t snscb_hardaddr[3]; 1555} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1556#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1557 1558typedef struct { 1559 ct_hdr_t snscb_cthdr; 1560 uint8_t snscb_wwn[8]; 1561} sns_gxn_id_rsp_t; 1562#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1563 1564typedef struct { 1565 ct_hdr_t snscb_cthdr; 1566 uint32_t snscb_fc4_features[32]; 1567} sns_gff_id_rsp_t; 1568#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1569 1570typedef struct { 1571 ct_hdr_t snscb_cthdr; 1572 struct { 1573 uint8_t control; 1574 uint8_t portid[3]; 1575 } snscb_ports[1]; 1576} sns_gid_ft_rsp_t; 1577#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1578#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1579 1580/* 1581 * Other Misc Structures 1582 */ 1583 1584/* ELS Pass Through */ 1585typedef struct { 1586 isphdr_t els_hdr; 1587 uint32_t els_handle; 1588 uint16_t els_status; 1589 uint16_t els_nphdl; 1590 uint16_t els_xmit_dsd_count; /* outgoing only */ 1591 uint8_t els_vphdl; 1592 uint8_t els_sof; 1593 uint32_t els_rxid; 1594 uint16_t els_recv_dsd_count; /* outgoing only */ 1595 uint8_t els_opcode; 1596 uint8_t els_reserved1; 1597 uint8_t els_did_lo; 1598 uint8_t els_did_mid; 1599 uint8_t els_did_hi; 1600 uint8_t els_reserved2; 1601 uint16_t els_reserved3; 1602 uint16_t els_ctl_flags; 1603 union { 1604 struct { 1605 uint32_t _els_bytecnt; 1606 uint32_t _els_subcode1; 1607 uint32_t _els_subcode2; 1608 uint8_t _els_reserved4[20]; 1609 } in; 1610 struct { 1611 uint32_t _els_recv_bytecnt; 1612 uint32_t _els_xmit_bytecnt; 1613 uint32_t _els_xmit_dsd_length; 1614 uint16_t _els_xmit_dsd_a1500; 1615 uint16_t _els_xmit_dsd_a3116; 1616 uint16_t _els_xmit_dsd_a4732; 1617 uint16_t _els_xmit_dsd_a6348; 1618 uint32_t _els_recv_dsd_length; 1619 uint16_t _els_recv_dsd_a1500; 1620 uint16_t _els_recv_dsd_a3116; 1621 uint16_t _els_recv_dsd_a4732; 1622 uint16_t _els_recv_dsd_a6348; 1623 } out; 1624 } inout; 1625#define els_bytecnt inout.in._els_bytecnt 1626#define els_subcode1 inout.in._els_subcode1 1627#define els_subcode2 inout.in._els_subcode2 1628#define els_reserved4 inout.in._els_reserved4 1629#define els_recv_bytecnt inout.out._els_recv_bytecnt 1630#define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1631#define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1632#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1633#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1634#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1635#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1636#define els_recv_dsd_length inout.out._els_recv_dsd_length 1637#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1638#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1639#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1640#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1641} els_t; 1642 1643/* 1644 * A handy package structure for running FC-SCSI commands internally 1645 */ 1646typedef struct { 1647 uint16_t handle; 1648 uint16_t lun; 1649 uint32_t 1650 channel : 8, 1651 portid : 24; 1652 uint32_t timeout; 1653 union { 1654 struct { 1655 uint32_t data_length; 1656 uint32_t 1657 no_wait : 1, 1658 do_read : 1; 1659 uint8_t cdb[16]; 1660 void *data_ptr; 1661 } beg; 1662 struct { 1663 uint32_t data_residual; 1664 uint8_t status; 1665 uint8_t pad; 1666 uint16_t sense_length; 1667 uint8_t sense_data[32]; 1668 } end; 1669 } fcd; 1670} isp_xcmd_t; 1671 1672/* 1673 * Target Mode related definitions 1674 */ 1675#define QLTM_SENSELEN 18 /* non-FC cards only */ 1676#define QLTM_SVALID 0x80 1677 1678/* 1679 * Structure for Enable Lun and Modify Lun queue entries 1680 */ 1681typedef struct { 1682 isphdr_t le_header; 1683 uint32_t le_reserved; 1684 uint8_t le_lun; 1685 uint8_t le_rsvd; 1686 uint8_t le_ops; /* Modify LUN only */ 1687 uint8_t le_tgt; /* Not for FC */ 1688 uint32_t le_flags; /* Not for FC */ 1689 uint8_t le_status; 1690 uint8_t le_reserved2; 1691 uint8_t le_cmd_count; 1692 uint8_t le_in_count; 1693 uint8_t le_cdb6len; /* Not for FC */ 1694 uint8_t le_cdb7len; /* Not for FC */ 1695 uint16_t le_timeout; 1696 uint16_t le_reserved3[20]; 1697} lun_entry_t; 1698 1699/* 1700 * le_flags values 1701 */ 1702#define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1703#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1704#define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1705#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1706 1707/* 1708 * le_ops values 1709 */ 1710#define LUN_CCINCR 0x01 /* increment command count */ 1711#define LUN_CCDECR 0x02 /* decrement command count */ 1712#define LUN_ININCR 0x40 /* increment immed. notify count */ 1713#define LUN_INDECR 0x80 /* decrement immed. notify count */ 1714 1715/* 1716 * le_status values 1717 */ 1718#define LUN_OK 0x01 /* we be rockin' */ 1719#define LUN_ERR 0x04 /* request completed with error */ 1720#define LUN_INVAL 0x06 /* invalid request */ 1721#define LUN_NOCAP 0x16 /* can't provide requested capability */ 1722#define LUN_ENABLED 0x3E /* LUN already enabled */ 1723 1724/* 1725 * Immediate Notify Entry structure 1726 */ 1727#define IN_MSGLEN 8 /* 8 bytes */ 1728#define IN_RSVDLEN 8 /* 8 words */ 1729typedef struct { 1730 isphdr_t in_header; 1731 uint32_t in_reserved; 1732 uint8_t in_lun; /* lun */ 1733 uint8_t in_iid; /* initiator */ 1734 uint8_t in_reserved2; 1735 uint8_t in_tgt; /* target */ 1736 uint32_t in_flags; 1737 uint8_t in_status; 1738 uint8_t in_rsvd2; 1739 uint8_t in_tag_val; /* tag value */ 1740 uint8_t in_tag_type; /* tag type */ 1741 uint16_t in_seqid; /* sequence id */ 1742 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1743 uint16_t in_reserved3[IN_RSVDLEN]; 1744 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1745} in_entry_t; 1746 1747typedef struct { 1748 isphdr_t in_header; 1749 uint32_t in_reserved; 1750 uint8_t in_lun; /* lun */ 1751 uint8_t in_iid; /* initiator */ 1752 uint16_t in_scclun; 1753 uint32_t in_reserved2; 1754 uint16_t in_status; 1755 uint16_t in_task_flags; 1756 uint16_t in_seqid; /* sequence id */ 1757} in_fcentry_t; 1758 1759typedef struct { 1760 isphdr_t in_header; 1761 uint32_t in_reserved; 1762 uint16_t in_iid; /* initiator */ 1763 uint16_t in_scclun; 1764 uint32_t in_reserved2; 1765 uint16_t in_status; 1766 uint16_t in_task_flags; 1767 uint16_t in_seqid; /* sequence id */ 1768} in_fcentry_e_t; 1769 1770/* 1771 * Values for the in_status field 1772 */ 1773#define IN_REJECT 0x0D /* Message Reject message received */ 1774#define IN_RESET 0x0E /* Bus Reset occurred */ 1775#define IN_NO_RCAP 0x16 /* requested capability not available */ 1776#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1777#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1778#define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1779#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1780#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1781#define IN_PORT_CHANGED 0x2A /* port changed */ 1782#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1783#define IN_NO_NEXUS 0x3B /* Nexus not established */ 1784 1785/* 1786 * Values for the in_task_flags field- should only get one at a time! 1787 */ 1788#define TASK_FLAGS_RESERVED_MASK (0xe700) 1789#define TASK_FLAGS_CLEAR_ACA (1<<14) 1790#define TASK_FLAGS_TARGET_RESET (1<<13) 1791#define TASK_FLAGS_LUN_RESET (1<<12) 1792#define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1793#define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1794 1795/* 1796 * ISP24XX Immediate Notify 1797 */ 1798typedef struct { 1799 isphdr_t in_header; 1800 uint32_t in_reserved; 1801 uint16_t in_nphdl; 1802 uint16_t in_reserved1; 1803 uint16_t in_flags; 1804 uint16_t in_srr_rxid; 1805 uint16_t in_status; 1806 uint8_t in_status_subcode; 1807 uint8_t in_reserved2; 1808 uint32_t in_rxid; 1809 uint16_t in_srr_reloff_lo; 1810 uint16_t in_srr_reloff_hi; 1811 uint16_t in_srr_iu; 1812 uint16_t in_srr_oxid; 1813 /* 1814 * If bit 2 is set in in_flags, the following 1815 * two tags are valid. If the received ELS is 1816 * a LOGO, then these tags contain the N Port ID 1817 * from the LOGO payload. If the received ELS 1818 * request is TPRLO, these tags contain the 1819 * Third Party Originator N Port ID. 1820 */ 1821 uint16_t in_nport_id_hi; 1822 uint8_t in_nport_id_lo; 1823 uint8_t in_reserved3; 1824 /* 1825 * If bit 2 is set in in_flags, the following 1826 * tag is valid. If the received ELS is a LOGO, 1827 * then this tag contains the n-port handle 1828 * from the LOGO payload. If the received ELS 1829 * request is TPRLO, this tag contain the 1830 * n-port handle for the Third Party Originator. 1831 */ 1832 uint16_t in_np_handle; 1833 uint8_t in_reserved4[12]; 1834 uint8_t in_reserved5; 1835 uint8_t in_vpidx; 1836 uint32_t in_reserved6; 1837 uint16_t in_portid_lo; 1838 uint8_t in_portid_hi; 1839 uint8_t in_reserved7; 1840 uint16_t in_reserved8; 1841 uint16_t in_oxid; 1842} in_fcentry_24xx_t; 1843 1844#define IN24XX_FLAG_PUREX_IOCB 0x1 1845#define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1846#define IN24XX_FLAG_NPHDL_VALID 0x4 1847 1848#define IN24XX_LIP_RESET 0x0E 1849#define IN24XX_LINK_RESET 0x0F 1850#define IN24XX_PORT_LOGOUT 0x29 1851#define IN24XX_PORT_CHANGED 0x2A 1852#define IN24XX_LINK_FAILED 0x2E 1853#define IN24XX_SRR_RCVD 0x45 1854#define IN24XX_ELS_RCVD 0x46 /* 1855 * login-affectin ELS received- check 1856 * subcode for specific opcode 1857 */ 1858 1859/* 1860 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1861 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1862 * Big Endian format. 1863 */ 1864#define IN24XX_PLOGI_WWNN_OFF 0x20 1865#define IN24XX_PLOGI_WWPN_OFF 0x28 1866 1867/* 1868 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1869 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1870 */ 1871#define IN24XX_LOGO_WWPN_OFF 0x28 1872 1873/* 1874 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1875 */ 1876#define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1877#define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1878#define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1879#define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1880#define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1881#define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1882#define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1883#define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1884#define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1885#define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1886 1887/* 1888 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1889 */ 1890#define IN24XX_PORT_CHANGED_BADFAN 0x00 1891#define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1892#define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1893#define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1894#define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1895#define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1896 1897/* 1898 * Notify Acknowledge Entry structure 1899 */ 1900#define NA_RSVDLEN 22 1901typedef struct { 1902 isphdr_t na_header; 1903 uint32_t na_reserved; 1904 uint8_t na_lun; /* lun */ 1905 uint8_t na_iid; /* initiator */ 1906 uint8_t na_reserved2; 1907 uint8_t na_tgt; /* target */ 1908 uint32_t na_flags; 1909 uint8_t na_status; 1910 uint8_t na_event; 1911 uint16_t na_seqid; /* sequence id */ 1912 uint16_t na_reserved3[NA_RSVDLEN]; 1913} na_entry_t; 1914 1915/* 1916 * Value for the na_event field 1917 */ 1918#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1919#define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1920#define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1921 1922#define NA2_RSVDLEN 21 1923typedef struct { 1924 isphdr_t na_header; 1925 uint32_t na_reserved; 1926 uint8_t na_reserved1; 1927 uint8_t na_iid; /* initiator loop id */ 1928 uint16_t na_response; 1929 uint16_t na_flags; 1930 uint16_t na_reserved2; 1931 uint16_t na_status; 1932 uint16_t na_task_flags; 1933 uint16_t na_seqid; /* sequence id */ 1934 uint16_t na_reserved3[NA2_RSVDLEN]; 1935} na_fcentry_t; 1936 1937typedef struct { 1938 isphdr_t na_header; 1939 uint32_t na_reserved; 1940 uint16_t na_iid; /* initiator loop id */ 1941 uint16_t na_response; /* response code */ 1942 uint16_t na_flags; 1943 uint16_t na_reserved2; 1944 uint16_t na_status; 1945 uint16_t na_task_flags; 1946 uint16_t na_seqid; /* sequence id */ 1947 uint16_t na_reserved3[NA2_RSVDLEN]; 1948} na_fcentry_e_t; 1949 1950#define NAFC_RCOUNT 0x80 /* increment resource count */ 1951#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1952#define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1953 1954/* 1955 * ISP24XX Notify Acknowledge 1956 */ 1957 1958typedef struct { 1959 isphdr_t na_header; 1960 uint32_t na_handle; 1961 uint16_t na_nphdl; 1962 uint16_t na_reserved1; 1963 uint16_t na_flags; 1964 uint16_t na_srr_rxid; 1965 uint16_t na_status; 1966 uint8_t na_status_subcode; 1967 uint8_t na_reserved2; 1968 uint32_t na_rxid; 1969 uint16_t na_srr_reloff_lo; 1970 uint16_t na_srr_reloff_hi; 1971 uint16_t na_srr_iu; 1972 uint16_t na_srr_flags; 1973 uint8_t na_reserved3[18]; 1974 uint8_t na_reserved4; 1975 uint8_t na_vpidx; 1976 uint8_t na_srr_reject_vunique; 1977 uint8_t na_srr_reject_explanation; 1978 uint8_t na_srr_reject_code; 1979 uint8_t na_reserved5; 1980 uint8_t na_reserved6[6]; 1981 uint16_t na_oxid; 1982} na_fcentry_24xx_t; 1983 1984/* 1985 * Accept Target I/O Entry structure 1986 */ 1987#define ATIO_CDBLEN 26 1988 1989typedef struct { 1990 isphdr_t at_header; 1991 uint16_t at_reserved; 1992 uint16_t at_handle; 1993 uint8_t at_lun; /* lun */ 1994 uint8_t at_iid; /* initiator */ 1995 uint8_t at_cdblen; /* cdb length */ 1996 uint8_t at_tgt; /* target */ 1997 uint32_t at_flags; 1998 uint8_t at_status; /* firmware status */ 1999 uint8_t at_scsi_status; /* scsi status */ 2000 uint8_t at_tag_val; /* tag value */ 2001 uint8_t at_tag_type; /* tag type */ 2002 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2003 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2004} at_entry_t; 2005 2006/* 2007 * at_flags values 2008 */ 2009#define AT_NODISC 0x00008000 /* disconnect disabled */ 2010#define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2011 2012/* 2013 * at_status values 2014 */ 2015#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2016#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2017#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2018#define AT_NOCAP 0x16 /* Requested capability not available */ 2019#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2020#define AT_CDB 0x3D /* CDB received */ 2021/* 2022 * Macros to create and fetch and test concatenated handle and tag value macros 2023 * (SPI only) 2024 */ 2025#define AT_MAKE_TAGID(tid, aep) \ 2026 tid = aep->at_handle; \ 2027 if (aep->at_flags & AT_TQAE) { \ 2028 tid |= (aep->at_tag_val << 16); \ 2029 tid |= (1 << 24); \ 2030 } 2031 2032#define CT_MAKE_TAGID(tid, ct) \ 2033 tid = ct->ct_fwhandle; \ 2034 if (ct->ct_flags & CT_TQAE) { \ 2035 tid |= (ct->ct_tag_val << 16); \ 2036 tid |= (1 << 24); \ 2037 } 2038 2039#define AT_HAS_TAG(val) ((val) & (1 << 24)) 2040#define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2041#define AT_GET_HANDLE(val) ((val) & 0xffff) 2042 2043#define IN_MAKE_TAGID(tid, inp) \ 2044 tid = inp->in_seqid; \ 2045 tid |= (inp->in_tag_val << 16); \ 2046 tid |= (1 << 24) 2047 2048/* 2049 * Accept Target I/O Entry structure, Type 2 2050 */ 2051#define ATIO2_CDBLEN 16 2052 2053typedef struct { 2054 isphdr_t at_header; 2055 uint32_t at_reserved; 2056 uint8_t at_lun; /* lun or reserved */ 2057 uint8_t at_iid; /* initiator */ 2058 uint16_t at_rxid; /* response ID */ 2059 uint16_t at_flags; 2060 uint16_t at_status; /* firmware status */ 2061 uint8_t at_crn; /* command reference number */ 2062 uint8_t at_taskcodes; 2063 uint8_t at_taskflags; 2064 uint8_t at_execodes; 2065 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2066 uint32_t at_datalen; /* allocated data len */ 2067 uint16_t at_scclun; /* SCC Lun or reserved */ 2068 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2069 uint16_t at_reserved2[6]; 2070 uint16_t at_oxid; 2071} at2_entry_t; 2072 2073typedef struct { 2074 isphdr_t at_header; 2075 uint32_t at_reserved; 2076 uint16_t at_iid; /* initiator */ 2077 uint16_t at_rxid; /* response ID */ 2078 uint16_t at_flags; 2079 uint16_t at_status; /* firmware status */ 2080 uint8_t at_crn; /* command reference number */ 2081 uint8_t at_taskcodes; 2082 uint8_t at_taskflags; 2083 uint8_t at_execodes; 2084 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2085 uint32_t at_datalen; /* allocated data len */ 2086 uint16_t at_scclun; /* SCC Lun or reserved */ 2087 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2088 uint16_t at_reserved2[6]; 2089 uint16_t at_oxid; 2090} at2e_entry_t; 2091 2092#define ATIO2_WWPN_OFFSET 0x2A 2093#define ATIO2_OXID_OFFSET 0x3E 2094 2095#define ATIO2_TC_ATTR_MASK 0x7 2096#define ATIO2_TC_ATTR_SIMPLEQ 0 2097#define ATIO2_TC_ATTR_HEADOFQ 1 2098#define ATIO2_TC_ATTR_ORDERED 2 2099#define ATIO2_TC_ATTR_ACAQ 4 2100#define ATIO2_TC_ATTR_UNTAGGED 5 2101 2102#define ATIO2_EX_WRITE 0x1 2103#define ATIO2_EX_READ 0x2 2104/* 2105 * Macros to create and fetch and test concatenated handle and tag value macros 2106 */ 2107#define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2108 tid = aep->at_rxid; \ 2109 tid |= (((uint64_t)inst) << 32); \ 2110 tid |= (((uint64_t)bus) << 48) 2111 2112#define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2113 tid = ct->ct_rxid; \ 2114 tid |= (((uint64_t)inst) << 32); \ 2115 tid |= (((uint64_t)(bus & 0xff)) << 48) 2116 2117#define AT2_HAS_TAG(val) 1 2118#define AT2_GET_TAG(val) ((val) & 0xffffffff) 2119#define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2120#define AT2_GET_HANDLE AT2_GET_TAG 2121#define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2122 2123#define FC_HAS_TAG AT2_HAS_TAG 2124#define FC_GET_TAG AT2_GET_TAG 2125#define FC_GET_INST AT2_GET_INST 2126#define FC_GET_HANDLE AT2_GET_HANDLE 2127 2128#define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2129 tid = seqid; \ 2130 tid |= (((uint64_t)inst) << 32); \ 2131 tid |= (((uint64_t)(bus & 0xff)) << 48) 2132 2133#define FC_TAG_INSERT_INST(tid, inst) \ 2134 tid &= ~0x0000ffff00000000ull; \ 2135 tid |= (((uint64_t)inst) << 32) 2136 2137/* 2138 * 24XX ATIO Definition 2139 * 2140 * This is *quite* different from other entry types. 2141 * First of all, it has its own queue it comes in on. 2142 * 2143 * Secondly, it doesn't have a normal header. 2144 * 2145 * Thirdly, it's just a passthru of the FCP CMND IU 2146 * which is recorded in big endian mode. 2147 */ 2148typedef struct { 2149 uint8_t at_type; 2150 uint8_t at_count; 2151 /* 2152 * Task attribute in high four bits, 2153 * the rest is the FCP CMND IU Length. 2154 * NB: the command can extend past the 2155 * length for a single queue entry. 2156 */ 2157 uint16_t at_ta_len; 2158 uint32_t at_rxid; 2159 fc_hdr_t at_hdr; 2160 fcp_cmnd_iu_t at_cmnd; 2161} at7_entry_t; 2162#define AT7_NORESRC_RXID 0xffffffff 2163 2164 2165/* 2166 * Continue Target I/O Entry structure 2167 * Request from driver. The response from the 2168 * ISP firmware is the same except that the last 18 2169 * bytes are overwritten by suggested sense data if 2170 * the 'autosense valid' bit is set in the status byte. 2171 */ 2172typedef struct { 2173 isphdr_t ct_header; 2174 uint16_t ct_syshandle; 2175 uint16_t ct_fwhandle; /* required by f/w */ 2176 uint8_t ct_lun; /* lun */ 2177 uint8_t ct_iid; /* initiator id */ 2178 uint8_t ct_reserved2; 2179 uint8_t ct_tgt; /* our target id */ 2180 uint32_t ct_flags; 2181 uint8_t ct_status; /* isp status */ 2182 uint8_t ct_scsi_status; /* scsi status */ 2183 uint8_t ct_tag_val; /* tag value */ 2184 uint8_t ct_tag_type; /* tag type */ 2185 uint32_t ct_xfrlen; /* transfer length */ 2186 int32_t ct_resid; /* residual length */ 2187 uint16_t ct_timeout; 2188 uint16_t ct_seg_count; 2189 ispds_t ct_dataseg[ISP_RQDSEG]; 2190} ct_entry_t; 2191 2192/* 2193 * For some of the dual port SCSI adapters, port (bus #) is reported 2194 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2195 * 2196 * Note that this does not apply to FC adapters at all which can and 2197 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2198 * that have logged in across a SCSI fabric. 2199 */ 2200#define GET_IID_VAL(x) (x & 0x3f) 2201#define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2202#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2203#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2204 2205/* 2206 * ct_flags values 2207 */ 2208#define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2209#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 2210#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 2211#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2212#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2213#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2214#define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2215#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2216#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2217#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2218#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2219 2220/* 2221 * ct_status values 2222 * - set by the firmware when it returns the CTIO 2223 */ 2224#define CT_OK 0x01 /* completed without error */ 2225#define CT_ABORTED 0x02 /* aborted by host */ 2226#define CT_ERR 0x04 /* see sense data for error */ 2227#define CT_INVAL 0x06 /* request for disabled lun */ 2228#define CT_NOPATH 0x07 /* invalid ITL nexus */ 2229#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2230#define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2231#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2232#define CT_TIMEOUT 0x0B /* timed out */ 2233#define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2234#define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2235#define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2236#define CT_PANIC 0x13 /* Unrecoverable Error */ 2237#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2238#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2239#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2240#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2241#define CT_PORTUNAVAIL 0x28 /* port not available */ 2242#define CT_LOGOUT 0x29 /* port logout */ 2243#define CT_PORTCHANGED 0x2A /* port changed */ 2244#define CT_IDE 0x33 /* Initiator Detected Error */ 2245#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2246#define CT_SRR 0x45 /* SRR Received */ 2247#define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2248 2249#define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2250 2251/* 2252 * When the firmware returns a CTIO entry, it may overwrite the last 2253 * part of the structure with sense data. This starts at offset 0x2E 2254 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2255 * than define a new struct for this, I'm just using the sense data 2256 * offset. 2257 */ 2258#define CTIO_SENSE_OFFSET 0x2E 2259 2260/* 2261 * Entry length in u_longs. All entries are the same size so 2262 * any one will do as the numerator. 2263 */ 2264#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2265 2266/* 2267 * QLA2100 CTIO (type 2) entry 2268 */ 2269#define MAXRESPLEN 26 2270typedef struct { 2271 isphdr_t ct_header; 2272 uint32_t ct_syshandle; 2273 uint8_t ct_lun; /* lun */ 2274 uint8_t ct_iid; /* initiator id */ 2275 uint16_t ct_rxid; /* response ID */ 2276 uint16_t ct_flags; 2277 uint16_t ct_status; /* isp status */ 2278 uint16_t ct_timeout; 2279 uint16_t ct_seg_count; 2280 uint32_t ct_reloff; /* relative offset */ 2281 int32_t ct_resid; /* residual length */ 2282 union { 2283 /* 2284 * The three different modes that the target driver 2285 * can set the CTIO{2,3,4} up as. 2286 * 2287 * The first is for sending FCP_DATA_IUs as well as 2288 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2289 * 2290 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2291 * Note that no FCP_DATA_IUs will be sent. 2292 * 2293 * The third is for sending FCP_RSP_IUs as built specifically 2294 * in system memory as located by the isp_dataseg. 2295 */ 2296 struct { 2297 uint32_t _reserved; 2298 uint16_t _reserved2; 2299 uint16_t ct_scsi_status; 2300 uint32_t ct_xfrlen; 2301 union { 2302 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2303 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2304 ispdslist_t ct_dslist; 2305 } u; 2306 } m0; 2307 struct { 2308 uint16_t _reserved; 2309 uint16_t _reserved2; 2310 uint16_t ct_senselen; 2311 uint16_t ct_scsi_status; 2312 uint16_t ct_resplen; 2313 uint8_t ct_resp[MAXRESPLEN]; 2314 } m1; 2315 struct { 2316 uint32_t _reserved; 2317 uint16_t _reserved2; 2318 uint16_t _reserved3; 2319 uint32_t ct_datalen; 2320 ispds_t ct_fcp_rsp_iudata; 2321 } m2; 2322 } rsp; 2323} ct2_entry_t; 2324 2325typedef struct { 2326 isphdr_t ct_header; 2327 uint32_t ct_syshandle; 2328 uint16_t ct_iid; /* initiator id */ 2329 uint16_t ct_rxid; /* response ID */ 2330 uint16_t ct_flags; 2331 uint16_t ct_status; /* isp status */ 2332 uint16_t ct_timeout; 2333 uint16_t ct_seg_count; 2334 uint32_t ct_reloff; /* relative offset */ 2335 int32_t ct_resid; /* residual length */ 2336 union { 2337 struct { 2338 uint32_t _reserved; 2339 uint16_t _reserved2; 2340 uint16_t ct_scsi_status; 2341 uint32_t ct_xfrlen; 2342 union { 2343 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2344 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2345 ispdslist_t ct_dslist; 2346 } u; 2347 } m0; 2348 struct { 2349 uint16_t _reserved; 2350 uint16_t _reserved2; 2351 uint16_t ct_senselen; 2352 uint16_t ct_scsi_status; 2353 uint16_t ct_resplen; 2354 uint8_t ct_resp[MAXRESPLEN]; 2355 } m1; 2356 struct { 2357 uint32_t _reserved; 2358 uint16_t _reserved2; 2359 uint16_t _reserved3; 2360 uint32_t ct_datalen; 2361 ispds_t ct_fcp_rsp_iudata; 2362 } m2; 2363 } rsp; 2364} ct2e_entry_t; 2365 2366/* 2367 * ct_flags values for CTIO2 2368 */ 2369#define CT2_FLAG_MODE0 0x0000 2370#define CT2_FLAG_MODE1 0x0001 2371#define CT2_FLAG_MODE2 0x0002 2372#define CT2_FLAG_MMASK 0x0003 2373#define CT2_DATA_IN 0x0040 2374#define CT2_DATA_OUT 0x0080 2375#define CT2_NO_DATA 0x00C0 2376#define CT2_DATAMASK 0x00C0 2377#define CT2_CCINCR 0x0100 2378#define CT2_FASTPOST 0x0200 2379#define CT2_CONFIRM 0x2000 2380#define CT2_TERMINATE 0x4000 2381#define CT2_SENDSTATUS 0x8000 2382 2383/* 2384 * ct_status values are (mostly) the same as that for ct_entry. 2385 */ 2386 2387/* 2388 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2389 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2390 * fields. 2391 */ 2392#define CT2_RSPLEN_VALID 0x0100 2393#define CT2_SNSLEN_VALID 0x0200 2394#define CT2_DATA_OVER 0x0400 2395#define CT2_DATA_UNDER 0x0800 2396 2397/* 2398 * ISP24XX CTIO 2399 */ 2400#define MAXRESPLEN_24XX 24 2401typedef struct { 2402 isphdr_t ct_header; 2403 uint32_t ct_syshandle; 2404 uint16_t ct_nphdl; /* status on returned CTIOs */ 2405 uint16_t ct_timeout; 2406 uint16_t ct_seg_count; 2407 uint8_t ct_vpidx; 2408 uint8_t ct_xflags; 2409 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2410 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2411 uint8_t ct_reserved; 2412 uint32_t ct_rxid; 2413 uint16_t ct_senselen; /* mode 1 only */ 2414 uint16_t ct_flags; 2415 int32_t ct_resid; /* residual length */ 2416 uint16_t ct_oxid; 2417 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2418 union { 2419 struct { 2420 uint32_t reloff; 2421 uint32_t reserved0; 2422 uint32_t ct_xfrlen; 2423 uint32_t reserved1; 2424 ispds64_t ds; 2425 } m0; 2426 struct { 2427 uint16_t ct_resplen; 2428 uint16_t reserved; 2429 uint8_t ct_resp[MAXRESPLEN_24XX]; 2430 } m1; 2431 struct { 2432 uint32_t reserved0; 2433 uint32_t ct_datalen; 2434 uint32_t reserved1; 2435 ispds64_t ct_fcp_rsp_iudata; 2436 } m2; 2437 } rsp; 2438} ct7_entry_t; 2439 2440/* 2441 * ct_flags values for CTIO7 2442 */ 2443#define CT7_DATA_IN 0x0002 2444#define CT7_DATA_OUT 0x0001 2445#define CT7_NO_DATA 0x0000 2446#define CT7_DATAMASK 0x003 2447#define CT7_DSD_ENABLE 0x0004 2448#define CT7_CONF_STSFD 0x0010 2449#define CT7_EXPLCT_CONF 0x0020 2450#define CT7_FLAG_MODE0 0x0000 2451#define CT7_FLAG_MODE1 0x0040 2452#define CT7_FLAG_MODE2 0x0080 2453#define CT7_FLAG_MMASK 0x00C0 2454#define CT7_NOACK 0x0100 2455#define CT7_TASK_ATTR_SHIFT 9 2456#define CT7_CONFIRM 0x2000 2457#define CT7_TERMINATE 0x4000 2458#define CT7_SENDSTATUS 0x8000 2459 2460/* 2461 * Type 7 CTIO status codes 2462 */ 2463#define CT7_OK 0x01 /* completed without error */ 2464#define CT7_ABORTED 0x02 /* aborted by host */ 2465#define CT7_ERR 0x04 /* see sense data for error */ 2466#define CT7_INVAL 0x06 /* request for disabled lun */ 2467#define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2468#define CT7_DATA_OVER 0x09 /* Data Overrun */ 2469#define CT7_TIMEOUT 0x0B /* timed out */ 2470#define CT7_RESET 0x0E /* LIP Rset Received */ 2471#define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2472#define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2473#define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2474#define CT7_PORTUNAVAIL 0x28 /* port not available */ 2475#define CT7_LOGOUT 0x29 /* port logout */ 2476#define CT7_PORTCHANGED 0x2A /* port changed */ 2477#define CT7_SRR 0x45 /* SRR Received */ 2478 2479/* 2480 * Other 24XX related target IOCBs 2481 */ 2482 2483/* 2484 * ABTS Received 2485 */ 2486typedef struct { 2487 isphdr_t abts_header; 2488 uint8_t abts_reserved0[6]; 2489 uint16_t abts_nphdl; 2490 uint16_t abts_reserved1; 2491 uint16_t abts_sof; 2492 uint32_t abts_rxid_abts; 2493 uint16_t abts_did_lo; 2494 uint8_t abts_did_hi; 2495 uint8_t abts_r_ctl; 2496 uint16_t abts_sid_lo; 2497 uint8_t abts_sid_hi; 2498 uint8_t abts_cs_ctl; 2499 uint16_t abts_fs_ctl; 2500 uint8_t abts_f_ctl; 2501 uint8_t abts_type; 2502 uint16_t abts_seq_cnt; 2503 uint8_t abts_df_ctl; 2504 uint8_t abts_seq_id; 2505 uint16_t abts_rx_id; 2506 uint16_t abts_ox_id; 2507 uint32_t abts_param; 2508 uint8_t abts_reserved2[16]; 2509 uint32_t abts_rxid_task; 2510} abts_t; 2511 2512typedef struct { 2513 isphdr_t abts_rsp_header; 2514 uint32_t abts_rsp_handle; 2515 uint16_t abts_rsp_status; 2516 uint16_t abts_rsp_nphdl; 2517 uint16_t abts_rsp_ctl_flags; 2518 uint16_t abts_rsp_sof; 2519 uint32_t abts_rsp_rxid_abts; 2520 uint16_t abts_rsp_did_lo; 2521 uint8_t abts_rsp_did_hi; 2522 uint8_t abts_rsp_r_ctl; 2523 uint16_t abts_rsp_sid_lo; 2524 uint8_t abts_rsp_sid_hi; 2525 uint8_t abts_rsp_cs_ctl; 2526 uint16_t abts_rsp_f_ctl_lo; 2527 uint8_t abts_rsp_f_ctl_hi; 2528 uint8_t abts_rsp_type; 2529 uint16_t abts_rsp_seq_cnt; 2530 uint8_t abts_rsp_df_ctl; 2531 uint8_t abts_rsp_seq_id; 2532 uint16_t abts_rsp_rx_id; 2533 uint16_t abts_rsp_ox_id; 2534 uint32_t abts_rsp_param; 2535 union { 2536 struct { 2537 uint16_t reserved; 2538 uint8_t last_seq_id; 2539 uint8_t seq_id_valid; 2540 uint16_t aborted_rx_id; 2541 uint16_t aborted_ox_id; 2542 uint16_t high_seq_cnt; 2543 uint16_t low_seq_cnt; 2544 uint8_t reserved2[4]; 2545 } ba_acc; 2546 struct { 2547 uint8_t vendor_unique; 2548 uint8_t explanation; 2549 uint8_t reason; 2550 uint8_t reserved; 2551 uint8_t reserved2[12]; 2552 } ba_rjt; 2553 struct { 2554 uint8_t reserved[8]; 2555 uint32_t subcode1; 2556 uint32_t subcode2; 2557 } rsp; 2558 uint8_t reserved[16]; 2559 } abts_rsp_payload; 2560 uint32_t abts_rsp_rxid_task; 2561} abts_rsp_t; 2562 2563/* terminate this ABTS exchange */ 2564#define ISP24XX_ABTS_RSP_TERMINATE 0x01 2565 2566#define ISP24XX_ABTS_RSP_COMPLETE 0x00 2567#define ISP24XX_ABTS_RSP_RESET 0x04 2568#define ISP24XX_ABTS_RSP_ABORTED 0x05 2569#define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2570#define ISP24XX_ABTS_RSP_INVXID 0x08 2571#define ISP24XX_ABTS_RSP_LOGOUT 0x29 2572#define ISP24XX_ABTS_RSP_SUBCODE 0x31 2573 2574#define ISP24XX_NO_TASK 0xffffffff 2575 2576/* 2577 * Miscellaneous 2578 * 2579 * These are the limits of the number of dma segments we 2580 * can deal with based not on the size of the segment counter 2581 * (which is 16 bits), but on the size of the number of 2582 * queue entries field (which is 8 bits). We assume no 2583 * segments in the first queue entry, so we can either 2584 * have 7 dma segments per continuation entry or 5 2585 * (for 64 bit dma).. multiplying out by 254.... 2586 */ 2587#define ISP_NSEG_MAX 1778 2588#define ISP_NSEG64_MAX 1270 2589 2590#endif /* _ISPMBOX_H */ 2591