1230557Sjimharris/*- 2230557Sjimharris * This file is provided under a dual BSD/GPLv2 license. When using or 3230557Sjimharris * redistributing this file, you may do so under either license. 4230557Sjimharris * 5230557Sjimharris * GPL LICENSE SUMMARY 6230557Sjimharris * 7230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8230557Sjimharris * 9230557Sjimharris * This program is free software; you can redistribute it and/or modify 10230557Sjimharris * it under the terms of version 2 of the GNU General Public License as 11230557Sjimharris * published by the Free Software Foundation. 12230557Sjimharris * 13230557Sjimharris * This program is distributed in the hope that it will be useful, but 14230557Sjimharris * WITHOUT ANY WARRANTY; without even the implied warranty of 15230557Sjimharris * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16230557Sjimharris * General Public License for more details. 17230557Sjimharris * 18230557Sjimharris * You should have received a copy of the GNU General Public License 19230557Sjimharris * along with this program; if not, write to the Free Software 20230557Sjimharris * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21230557Sjimharris * The full GNU General Public License is included in this distribution 22230557Sjimharris * in the file called LICENSE.GPL. 23230557Sjimharris * 24230557Sjimharris * BSD LICENSE 25230557Sjimharris * 26230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27230557Sjimharris * All rights reserved. 28230557Sjimharris * 29230557Sjimharris * Redistribution and use in source and binary forms, with or without 30230557Sjimharris * modification, are permitted provided that the following conditions 31230557Sjimharris * are met: 32230557Sjimharris * 33230557Sjimharris * * Redistributions of source code must retain the above copyright 34230557Sjimharris * notice, this list of conditions and the following disclaimer. 35230557Sjimharris * * Redistributions in binary form must reproduce the above copyright 36230557Sjimharris * notice, this list of conditions and the following disclaimer in 37230557Sjimharris * the documentation and/or other materials provided with the 38230557Sjimharris * distribution. 39230557Sjimharris * 40230557Sjimharris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41230557Sjimharris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42230557Sjimharris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43230557Sjimharris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44230557Sjimharris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45230557Sjimharris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46230557Sjimharris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47230557Sjimharris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48230557Sjimharris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49230557Sjimharris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50230557Sjimharris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51230557Sjimharris * 52230557Sjimharris * $FreeBSD$ 53230557Sjimharris */ 54230557Sjimharris#ifndef _SCIC_SDS_CONTROLLER_H_ 55230557Sjimharris#define _SCIC_SDS_CONTROLLER_H_ 56230557Sjimharris 57230557Sjimharris/** 58230557Sjimharris * @file 59230557Sjimharris * 60230557Sjimharris * @brief This file contains the structures, constants and prototypes used for 61230557Sjimharris * the core controller object. 62230557Sjimharris */ 63230557Sjimharris 64230557Sjimharris#ifdef __cplusplus 65230557Sjimharrisextern "C" { 66230557Sjimharris#endif // __cplusplus 67230557Sjimharris 68230557Sjimharris#include <dev/isci/scil/sci_pool.h> 69230557Sjimharris#include <dev/isci/scil/sci_controller_constants.h> 70230557Sjimharris#include <dev/isci/scil/sci_memory_descriptor_list.h> 71230557Sjimharris#include <dev/isci/scil/sci_base_controller.h> 72230557Sjimharris#include <dev/isci/scil/scic_config_parameters.h> 73230557Sjimharris#include <dev/isci/scil/scic_sds_port.h> 74230557Sjimharris#include <dev/isci/scil/scic_sds_phy.h> 75230557Sjimharris#include <dev/isci/scil/scic_sds_remote_node_table.h> 76230557Sjimharris#include <dev/isci/scil/scu_registers.h> 77230557Sjimharris#include <dev/isci/scil/scu_constants.h> 78230557Sjimharris#include <dev/isci/scil/scu_remote_node_context.h> 79230557Sjimharris#include <dev/isci/scil/scu_task_context.h> 80230557Sjimharris#include <dev/isci/scil/scu_unsolicited_frame.h> 81230557Sjimharris#include <dev/isci/scil/scic_sds_unsolicited_frame_control.h> 82230557Sjimharris#include <dev/isci/scil/scic_sds_port_configuration_agent.h> 83230557Sjimharris#include <dev/isci/scil/scic_sds_pci.h> 84230557Sjimharris 85230557Sjimharrisstruct SCIC_SDS_REMOTE_DEVICE; 86230557Sjimharrisstruct SCIC_SDS_REQUEST; 87230557Sjimharris 88230557Sjimharris 89230557Sjimharris#define SCU_COMPLETION_RAM_ALIGNMENT (64) 90230557Sjimharris 91230557Sjimharris/** 92230557Sjimharris * @enum SCIC_SDS_CONTROLLER_MEMORY_DESCRIPTORS 93230557Sjimharris * 94230557Sjimharris * This enumeration depects the types of MDEs that are going to be created for 95230557Sjimharris * the controller object. 96230557Sjimharris */ 97230557Sjimharrisenum SCIC_SDS_CONTROLLER_MEMORY_DESCRIPTORS 98230557Sjimharris{ 99230557Sjimharris /** 100230557Sjimharris * Completion queue MDE entry 101230557Sjimharris */ 102230557Sjimharris SCU_MDE_COMPLETION_QUEUE, 103230557Sjimharris 104230557Sjimharris /** 105230557Sjimharris * Remote node context MDE entry 106230557Sjimharris */ 107230557Sjimharris SCU_MDE_REMOTE_NODE_CONTEXT, 108230557Sjimharris 109230557Sjimharris /** 110230557Sjimharris * Task context MDE entry 111230557Sjimharris */ 112230557Sjimharris SCU_MDE_TASK_CONTEXT, 113230557Sjimharris 114230557Sjimharris /** 115230557Sjimharris * Unsolicited frame buffer MDE entrys this is the start of the unsolicited 116230557Sjimharris * frame buffer entries. 117230557Sjimharris */ 118230557Sjimharris SCU_MDE_UF_BUFFER, 119230557Sjimharris 120230557Sjimharris SCU_MAX_MDES 121230557Sjimharris}; 122230557Sjimharris 123230557Sjimharris/** 124230557Sjimharris * @struct SCIC_POWER_CONTROL 125230557Sjimharris * 126230557Sjimharris * This structure defines the fields for managing power control for direct 127230557Sjimharris * attached disk devices. 128230557Sjimharris */ 129230557Sjimharristypedef struct SCIC_POWER_CONTROL 130230557Sjimharris{ 131230557Sjimharris /** 132230557Sjimharris * This field is set when the power control timer is running and cleared when 133230557Sjimharris * it is not. 134230557Sjimharris */ 135230557Sjimharris BOOL timer_started; 136230557Sjimharris 137230557Sjimharris /** 138230557Sjimharris * This field is the handle to the driver timer object. This timer is used to 139230557Sjimharris * control when the directed attached disks can consume power. 140230557Sjimharris */ 141230557Sjimharris void *timer; 142230557Sjimharris 143230557Sjimharris /** 144230557Sjimharris * This field is used to keep track of how many phys are put into the 145230557Sjimharris * requesters field. 146230557Sjimharris */ 147230557Sjimharris U8 phys_waiting; 148230557Sjimharris 149230557Sjimharris /** 150230557Sjimharris * This field is used to keep track of how many remote devices have been granted to consume power 151230557Sjimharris */ 152230557Sjimharris U8 remote_devices_granted_power; 153230557Sjimharris 154230557Sjimharris /** 155230557Sjimharris * This field is an array of phys that we are waiting on. The phys are direct 156230557Sjimharris * mapped into requesters via SCIC_SDS_PHY_T.phy_index 157230557Sjimharris */ 158230557Sjimharris SCIC_SDS_PHY_T *requesters[SCI_MAX_PHYS]; 159230557Sjimharris 160230557Sjimharris} SCIC_POWER_CONTROL_T; 161230557Sjimharris 162230557Sjimharris/** 163230557Sjimharris * @struct SCIC_SDS_CONTROLLER 164230557Sjimharris * 165230557Sjimharris * This structure represents the SCU contoller object. 166230557Sjimharris */ 167230557Sjimharristypedef struct SCIC_SDS_CONTROLLER 168230557Sjimharris{ 169230557Sjimharris /** 170230557Sjimharris * The SCI_BASE_CONTROLLER is the parent object for the SCIC_SDS_CONTROLLER 171230557Sjimharris * object. 172230557Sjimharris */ 173230557Sjimharris SCI_BASE_CONTROLLER_T parent; 174230557Sjimharris 175230557Sjimharris /** 176230557Sjimharris * This field is the driver timer object handler used to time the controller 177230557Sjimharris * object start and stop requests. 178230557Sjimharris */ 179230557Sjimharris void *timeout_timer; 180230557Sjimharris 181230557Sjimharris /** 182230557Sjimharris * This field is the current set of state handlers assigned to this controller 183230557Sjimharris * object. 184230557Sjimharris */ 185230557Sjimharris struct SCIC_SDS_CONTROLLER_STATE_HANDLER *state_handlers; 186230557Sjimharris 187230557Sjimharris /** 188230557Sjimharris * This field contains the user parameters to be utilized for this 189230557Sjimharris * core controller object. 190230557Sjimharris */ 191230557Sjimharris SCIC_USER_PARAMETERS_T user_parameters; 192230557Sjimharris 193230557Sjimharris /** 194230557Sjimharris * This field contains the OEM parameters version defining the structure 195230557Sjimharris * layout. It comes from the version in the OEM block header. 196230557Sjimharris */ 197230557Sjimharris U8 oem_parameters_version; 198230557Sjimharris 199230557Sjimharris /** 200230557Sjimharris * This field contains the OEM parameters to be utilized for this 201230557Sjimharris * core controller object. 202230557Sjimharris */ 203230557Sjimharris SCIC_OEM_PARAMETERS_T oem_parameters; 204230557Sjimharris 205230557Sjimharris /** 206230557Sjimharris * This field contains the port configuration agent for this controller. 207230557Sjimharris */ 208230557Sjimharris SCIC_SDS_PORT_CONFIGURATION_AGENT_T port_agent; 209230557Sjimharris 210230557Sjimharris /** 211230557Sjimharris * This field is the array of port objects that are controlled by this 212230557Sjimharris * controller object. There is one dummy port object also contained within 213230557Sjimharris * this controller object. 214230557Sjimharris */ 215230557Sjimharris struct SCIC_SDS_PORT port_table[SCI_MAX_PORTS + 1]; 216230557Sjimharris 217230557Sjimharris /** 218230557Sjimharris * This field is the array of phy objects that are controlled by this 219230557Sjimharris * controller object. 220230557Sjimharris */ 221230557Sjimharris struct SCIC_SDS_PHY phy_table[SCI_MAX_PHYS]; 222230557Sjimharris 223230557Sjimharris /** 224230557Sjimharris * This field is the array of device objects that are currently constructed 225230557Sjimharris * for this controller object. This table is used as a fast lookup of device 226230557Sjimharris * objects that need to handle device completion notifications from the 227230557Sjimharris * hardware. The table is RNi based. 228230557Sjimharris */ 229230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *device_table[SCI_MAX_REMOTE_DEVICES]; 230230557Sjimharris 231230557Sjimharris /** 232230557Sjimharris * This field is the array of IO request objects that are currently active for 233230557Sjimharris * this controller object. This table is used as a fast lookup of the io 234230557Sjimharris * request object that need to handle completion queue notifications. The 235230557Sjimharris * table is TCi based. 236230557Sjimharris */ 237230557Sjimharris struct SCIC_SDS_REQUEST *io_request_table[SCI_MAX_IO_REQUESTS]; 238230557Sjimharris 239230557Sjimharris /** 240230557Sjimharris * This field is the free RNi data structure 241230557Sjimharris */ 242230557Sjimharris SCIC_REMOTE_NODE_TABLE_T available_remote_nodes; 243230557Sjimharris 244230557Sjimharris /** 245230557Sjimharris * This field is the TCi pool used to manage the task context index. 246230557Sjimharris */ 247230557Sjimharris SCI_POOL_CREATE(tci_pool, U16, SCI_MAX_IO_REQUESTS); 248230557Sjimharris 249230557Sjimharris /** 250230557Sjimharris * This filed is the SCIC_POWER_CONTROL data used to controll when direct 251230557Sjimharris * attached devices can consume power. 252230557Sjimharris */ 253230557Sjimharris SCIC_POWER_CONTROL_T power_control; 254230557Sjimharris 255230557Sjimharris /** 256230557Sjimharris * This field is the array of sequence values for the IO Tag fields. Even 257230557Sjimharris * though only 4 bits of the field is used for the sequence the sequence is 16 258230557Sjimharris * bits in size so the sequence can be bitwise or'd with the TCi to build the 259230557Sjimharris * IO Tag value. 260230557Sjimharris */ 261230557Sjimharris U16 io_request_sequence[SCI_MAX_IO_REQUESTS]; 262230557Sjimharris 263230557Sjimharris /** 264230557Sjimharris * This field in the array of sequence values for the RNi. These are used 265230557Sjimharris * to control io request build to io request start operations. The sequence 266230557Sjimharris * value is recorded into an io request when it is built and is checked on 267230557Sjimharris * the io request start operation to make sure that there was not a device 268230557Sjimharris * hot plug between the build and start operation. 269230557Sjimharris */ 270230557Sjimharris U8 remote_device_sequence[SCI_MAX_REMOTE_DEVICES]; 271230557Sjimharris 272230557Sjimharris /** 273230557Sjimharris * This field is a pointer to the memory allocated by the driver for the task 274230557Sjimharris * context table. This data is shared between the hardware and software. 275230557Sjimharris */ 276230557Sjimharris SCU_TASK_CONTEXT_T *task_context_table; 277230557Sjimharris 278230557Sjimharris /** 279230557Sjimharris * This field is a pointer to the memory allocated by the driver for the 280230557Sjimharris * remote node context table. This table is shared between the hardware and 281230557Sjimharris * software. 282230557Sjimharris */ 283230557Sjimharris SCU_REMOTE_NODE_CONTEXT_T *remote_node_context_table; 284230557Sjimharris 285230557Sjimharris /** 286230557Sjimharris * This field is the array of physical memory requiremets for this controller 287230557Sjimharris * object. 288230557Sjimharris */ 289230557Sjimharris SCI_PHYSICAL_MEMORY_DESCRIPTOR_T memory_descriptors[SCU_MAX_MDES]; 290230557Sjimharris 291230557Sjimharris /** 292230557Sjimharris * This field is a pointer to the completion queue. This memory is 293230557Sjimharris * written to by the hardware and read by the software. 294230557Sjimharris */ 295230557Sjimharris U32 *completion_queue; 296230557Sjimharris 297230557Sjimharris /** 298230557Sjimharris * This field is the software copy of the completion queue get pointer. The 299230557Sjimharris * controller object writes this value to the hardware after processing the 300230557Sjimharris * completion entries. 301230557Sjimharris */ 302230557Sjimharris U32 completion_queue_get; 303230557Sjimharris 304230557Sjimharris /** 305230557Sjimharris * This field is the minimum of the number of hardware supported port entries 306230557Sjimharris * and the software requested port entries. 307230557Sjimharris */ 308230557Sjimharris U32 logical_port_entries; 309230557Sjimharris 310230557Sjimharris /** 311230557Sjimharris * This field is the minimum number of hardware supported completion queue 312230557Sjimharris * entries and the software requested completion queue entries. 313230557Sjimharris */ 314230557Sjimharris U32 completion_queue_entries; 315230557Sjimharris 316230557Sjimharris /** 317230557Sjimharris * This field is the minimum number of hardware supported event entries and 318230557Sjimharris * the software requested event entries. 319230557Sjimharris */ 320230557Sjimharris U32 completion_event_entries; 321230557Sjimharris 322230557Sjimharris /** 323230557Sjimharris * This field is the minimum number of devices supported by the hardware and 324230557Sjimharris * the number of devices requested by the software. 325230557Sjimharris */ 326230557Sjimharris U32 remote_node_entries; 327230557Sjimharris 328230557Sjimharris /** 329230557Sjimharris * This field is the minimum number of IO requests supported by the hardware 330230557Sjimharris * and the number of IO requests requested by the software. 331230557Sjimharris */ 332230557Sjimharris U32 task_context_entries; 333230557Sjimharris 334230557Sjimharris /** 335230557Sjimharris * This object contains all of the unsolicited frame specific 336230557Sjimharris * data utilized by the core controller. 337230557Sjimharris */ 338230557Sjimharris SCIC_SDS_UNSOLICITED_FRAME_CONTROL_T uf_control; 339230557Sjimharris 340230557Sjimharris /** 341230557Sjimharris * This field records the fact that the controller has encountered a fatal 342230557Sjimharris * error and must be reset. 343230557Sjimharris */ 344230557Sjimharris BOOL encountered_fatal_error; 345230557Sjimharris 346230557Sjimharris /** 347230557Sjimharris * This field specifies that the controller should ignore 348230557Sjimharris * completion processing for non-fastpath events. This will 349230557Sjimharris * cause the completions to be thrown away. 350230557Sjimharris */ 351230557Sjimharris BOOL restrict_completions; 352230557Sjimharris 353230557Sjimharris // Phy Startup Data 354230557Sjimharris /** 355230557Sjimharris * This field is the driver timer handle for controller phy request startup. 356230557Sjimharris * On controller start the controller will start each PHY individually in 357230557Sjimharris * order of phy index. 358230557Sjimharris */ 359230557Sjimharris void *phy_startup_timer; 360230557Sjimharris 361230557Sjimharris /** 362230557Sjimharris * This field is set when the phy_startup_timer is running and is cleared when 363230557Sjimharris * the phy_startup_timer is stopped. 364230557Sjimharris */ 365230557Sjimharris BOOL phy_startup_timer_pending; 366230557Sjimharris 367230557Sjimharris /** 368230557Sjimharris * This field is the index of the next phy start. It is initialized to 0 and 369230557Sjimharris * increments for each phy index that is started. 370230557Sjimharris */ 371230557Sjimharris U32 next_phy_to_start; 372230557Sjimharris 373230557Sjimharris /** 374230557Sjimharris * This field controlls the invalid link up notifications to the SCI_USER. If 375230557Sjimharris * an invalid_link_up notification is reported a bit for the PHY index is set 376230557Sjimharris * so further notifications are not made. Once the PHY object reports link up 377230557Sjimharris * and is made part of a port then this bit for the PHY index is cleared. 378230557Sjimharris */ 379230557Sjimharris U8 invalid_phy_mask; 380230557Sjimharris 381230557Sjimharris /** 382230557Sjimharris * This is the controller index for this controller object. 383230557Sjimharris */ 384230557Sjimharris U8 controller_index; 385230557Sjimharris 386230557Sjimharris /** 387230557Sjimharris * This field is the PCI revision code for the controller object. 388230557Sjimharris */ 389230557Sjimharris enum SCU_CONTROLLER_PCI_REVISION_CODE pci_revision; 390230557Sjimharris 391230557Sjimharris /* 392230557Sjimharris * This field saves the current interrupt coalescing number of the controller. 393230557Sjimharris */ 394230557Sjimharris U16 interrupt_coalesce_number; 395230557Sjimharris 396230557Sjimharris /* 397230557Sjimharris * This field saves the current interrupt coalescing timeout value in microseconds. 398230557Sjimharris */ 399230557Sjimharris U32 interrupt_coalesce_timeout; 400230557Sjimharris 401230557Sjimharris // Hardware memory mapped register space 402230557Sjimharris#ifdef ARLINGTON_BUILD 403230557Sjimharris /** 404230557Sjimharris * This field is a pointer to the memory mapped register space for the 405230557Sjimharris * LEX_REGISTERS. 406230557Sjimharris */ 407230557Sjimharris LEX_REGISTERS_T *lex_registers; 408230557Sjimharris#endif 409230557Sjimharris 410230557Sjimharris /** 411230557Sjimharris * This field is a pointer to the memory mapped register space for the 412230557Sjimharris * SMU_REGISTERS. 413230557Sjimharris */ 414230557Sjimharris SMU_REGISTERS_T *smu_registers; 415230557Sjimharris 416230557Sjimharris /** 417230557Sjimharris * This field is a pointer to the memory mapped register space for the 418230557Sjimharris * SCU_REGISTERS. 419230557Sjimharris */ 420230557Sjimharris SCU_REGISTERS_T *scu_registers; 421230557Sjimharris 422230557Sjimharris} SCIC_SDS_CONTROLLER_T; 423230557Sjimharris 424230557Sjimharris 425230557Sjimharristypedef void (*SCIC_SDS_CONTROLLER_PHY_HANDLER_T)( 426230557Sjimharris struct SCIC_SDS_CONTROLLER *controller, 427230557Sjimharris struct SCIC_SDS_PORT *port, 428230557Sjimharris struct SCIC_SDS_PHY *phy 429230557Sjimharris ); 430230557Sjimharris 431230557Sjimharristypedef void (*SCIC_SDS_CONTROLLER_DEVICE_HANDLER_T)( 432230557Sjimharris struct SCIC_SDS_CONTROLLER * controller, 433230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE * device 434230557Sjimharris ); 435230557Sjimharris/** 436230557Sjimharris * @struct SCIC_SDS_CONTROLLER_STATE_HANDLER 437230557Sjimharris * 438230557Sjimharris * This structure contains the SDS core specific definition for the state 439230557Sjimharris * handlers. 440230557Sjimharris */ 441230557Sjimharristypedef struct SCIC_SDS_CONTROLLER_STATE_HANDLER 442230557Sjimharris{ 443230557Sjimharris SCI_BASE_CONTROLLER_STATE_HANDLER_T parent; 444230557Sjimharris 445230557Sjimharris SCI_BASE_CONTROLLER_REQUEST_HANDLER_T terminate_request_handler; 446230557Sjimharris SCIC_SDS_CONTROLLER_PHY_HANDLER_T link_up_handler; 447230557Sjimharris SCIC_SDS_CONTROLLER_PHY_HANDLER_T link_down_handler; 448230557Sjimharris SCIC_SDS_CONTROLLER_DEVICE_HANDLER_T remote_device_started_handler; 449230557Sjimharris SCIC_SDS_CONTROLLER_DEVICE_HANDLER_T remote_device_stopped_handler; 450230557Sjimharris 451230557Sjimharris} SCIC_SDS_CONTROLLER_STATE_HANDLER_T; 452230557Sjimharris 453230557Sjimharrisextern SCIC_SDS_CONTROLLER_STATE_HANDLER_T 454230557Sjimharris scic_sds_controller_state_handler_table[]; 455230557Sjimharrisextern SCI_BASE_STATE_T scic_sds_controller_state_table[]; 456230557Sjimharris 457230557Sjimharris/** 458230557Sjimharris * This macro will increment the specified index to and if the index wraps 459230557Sjimharris * to 0 it will toggel the cycle bit. 460230557Sjimharris */ 461230557Sjimharris#define INCREMENT_QUEUE_GET(index, cycle, entry_count, bit_toggle) \ 462230557Sjimharris{ \ 463230557Sjimharris if ((index) + 1 == entry_count) \ 464230557Sjimharris { \ 465230557Sjimharris (index) = 0; \ 466230557Sjimharris (cycle) = (cycle) ^ (bit_toggle); \ 467230557Sjimharris } \ 468230557Sjimharris else \ 469230557Sjimharris { \ 470230557Sjimharris index = index + 1; \ 471230557Sjimharris } \ 472230557Sjimharris} 473230557Sjimharris 474230557Sjimharris/** 475230557Sjimharris * This is a helper macro that sets the state handlers for the controller 476230557Sjimharris * object 477230557Sjimharris */ 478230557Sjimharris#define scic_sds_controller_set_state_handlers(this_controller, handlers) \ 479230557Sjimharris ((this_controller)->state_handlers = (handlers)) 480230557Sjimharris 481230557Sjimharris/** 482230557Sjimharris * This is a helper macro that gets the base state machine for the 483230557Sjimharris * controller object 484230557Sjimharris */ 485230557Sjimharris#define scic_sds_controller_get_base_state_machine(this_contoroller) \ 486230557Sjimharris (&(this_controller)->parent.state_machine) 487230557Sjimharris 488230557Sjimharris/** 489230557Sjimharris * This is a helper macro to get the port configuration agent from the 490230557Sjimharris * controller object. 491230557Sjimharris */ 492230557Sjimharris#define scic_sds_controller_get_port_configuration_agent(controller) \ 493230557Sjimharris (&(controller)->port_agent) 494230557Sjimharris 495230557Sjimharris/** 496230557Sjimharris * This is a helper macro that sets the base state machine state handlers 497230557Sjimharris * based on the state id 498230557Sjimharris */ 499230557Sjimharris#define scic_sds_controller_set_base_state_handlers(this_controller, state_id) \ 500230557Sjimharris scic_sds_controller_set_state_handlers( \ 501230557Sjimharris this_controller, &scic_sds_controller_state_handler_table[(state_id)]) 502230557Sjimharris 503230557Sjimharris/** 504230557Sjimharris * This macro writes to the smu_register for this controller 505230557Sjimharris */ 506230557Sjimharris#define smu_register_write(controller, reg, value) \ 507230557Sjimharris scic_sds_pci_write_smu_dword((controller), &(reg), (value)) 508230557Sjimharris 509230557Sjimharris/** 510230557Sjimharris * This macro reads the smu_register for this controller 511230557Sjimharris */ 512230557Sjimharris#define smu_register_read(controller, reg) \ 513230557Sjimharris scic_sds_pci_read_smu_dword((controller), &(reg)) 514230557Sjimharris 515230557Sjimharris/** 516230557Sjimharris * This mcaro writes the scu_register for this controller 517230557Sjimharris */ 518230557Sjimharris#define scu_register_write(controller, reg, value) \ 519230557Sjimharris scic_sds_pci_write_scu_dword((controller), &(reg), (value)) 520230557Sjimharris 521230557Sjimharris/** 522230557Sjimharris * This macro reads the scu_register for this controller 523230557Sjimharris */ 524230557Sjimharris#define scu_register_read(controller, reg) \ 525230557Sjimharris scic_sds_pci_read_scu_dword((controller), &(reg)) 526230557Sjimharris 527230557Sjimharris#ifdef ARLINGTON_BUILD 528230557Sjimharris /** 529230557Sjimharris * This macro writes to the lex_register for this controller. 530230557Sjimharris */ 531230557Sjimharris #define lex_register_write(controller, reg, value) \ 532230557Sjimharris scic_cb_pci_write_dword((controller), (reg), (value)) 533230557Sjimharris 534230557Sjimharris /** 535230557Sjimharris * This macro reads from the lex_register for this controller. 536230557Sjimharris */ 537230557Sjimharris #define lex_register_read(controller, reg) \ 538230557Sjimharris scic_cb_pci_read_dword((controller), (reg)) 539230557Sjimharris#endif // ARLINGTON_BUILD 540230557Sjimharris 541230557Sjimharris/** 542230557Sjimharris * This macro returns the protocol engine group for this controller object. 543230557Sjimharris * Presently we only support protocol engine group 0 so just return that 544230557Sjimharris */ 545230557Sjimharris#define scic_sds_controller_get_protocol_engine_group(controller) 0 546230557Sjimharris 547230557Sjimharris/** 548230557Sjimharris * This macro constructs an IO tag from the sequence and index values. 549230557Sjimharris */ 550230557Sjimharris#define scic_sds_io_tag_construct(sequence, task_index) \ 551230557Sjimharris ((sequence) << 12 | (task_index)) 552230557Sjimharris 553230557Sjimharris/** 554230557Sjimharris * This macro returns the IO sequence from the IO tag value. 555230557Sjimharris */ 556230557Sjimharris#define scic_sds_io_tag_get_sequence(io_tag) \ 557230557Sjimharris (((io_tag) & 0xF000) >> 12) 558230557Sjimharris 559230557Sjimharris/** 560230557Sjimharris * This macro returns the TCi from the io tag value 561230557Sjimharris */ 562230557Sjimharris#define scic_sds_io_tag_get_index(io_tag) \ 563230557Sjimharris ((io_tag) & 0x0FFF) 564230557Sjimharris 565230557Sjimharris/** 566230557Sjimharris * This is a helper macro to increment the io sequence count. 567230557Sjimharris * 568230557Sjimharris * We may find in the future that it will be faster to store the sequence 569230557Sjimharris * count in such a way as we dont perform the shift operation to build io 570230557Sjimharris * tag values so therefore need a way to incrment them correctly 571230557Sjimharris */ 572230557Sjimharris#define scic_sds_io_sequence_increment(value) \ 573230557Sjimharris ((value) = (((value) + 1) & 0x000F)) 574230557Sjimharris 575230557Sjimharris#define scic_sds_remote_device_node_count(device) \ 576230557Sjimharris ( \ 577230557Sjimharris ( \ 578230557Sjimharris (device)->target_protocols.u.bits.attached_stp_target \ 579230557Sjimharris && ((device)->is_direct_attached != TRUE) \ 580230557Sjimharris ) \ 581230557Sjimharris ? SCU_STP_REMOTE_NODE_COUNT : SCU_SSP_REMOTE_NODE_COUNT \ 582230557Sjimharris ) 583230557Sjimharris 584230557Sjimharris/** 585230557Sjimharris * This macro will set the bit in the invalid phy mask for this controller 586230557Sjimharris * object. This is used to control messages reported for invalid link up 587230557Sjimharris * notifications. 588230557Sjimharris */ 589230557Sjimharris#define scic_sds_controller_set_invalid_phy(controller, phy) \ 590230557Sjimharris ((controller)->invalid_phy_mask |= (1 << (phy)->phy_index)) 591230557Sjimharris 592230557Sjimharris/** 593230557Sjimharris * This macro will clear the bit in the invalid phy mask for this controller 594230557Sjimharris * object. This is used to control messages reported for invalid link up 595230557Sjimharris * notifications. 596230557Sjimharris */ 597230557Sjimharris#define scic_sds_controller_clear_invalid_phy(controller, phy) \ 598230557Sjimharris ((controller)->invalid_phy_mask &= ~(1 << (phy)->phy_index)) 599230557Sjimharris 600230557Sjimharris// --------------------------------------------------------------------------- 601230557Sjimharris 602230557SjimharrisU32 scic_sds_controller_get_object_size(void); 603230557Sjimharris 604230557Sjimharris// --------------------------------------------------------------------------- 605230557Sjimharris 606230557SjimharrisU32 scic_sds_controller_get_min_timer_count(void); 607230557SjimharrisU32 scic_sds_controller_get_max_timer_count(void); 608230557Sjimharris 609230557Sjimharris// --------------------------------------------------------------------------- 610230557Sjimharris 611230557Sjimharrisvoid scic_sds_controller_post_request( 612230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 613230557Sjimharris U32 request 614230557Sjimharris); 615230557Sjimharris 616230557Sjimharris// --------------------------------------------------------------------------- 617230557Sjimharris 618230557Sjimharrisvoid scic_sds_controller_release_frame( 619230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 620230557Sjimharris U32 frame_index 621230557Sjimharris); 622230557Sjimharris 623230557Sjimharrisvoid scic_sds_controller_copy_sata_response( 624230557Sjimharris void * response_buffer, 625230557Sjimharris void * frame_header, 626230557Sjimharris void * frame_buffer 627230557Sjimharris); 628230557Sjimharris 629230557Sjimharris// --------------------------------------------------------------------------- 630230557Sjimharris 631230557SjimharrisSCI_STATUS scic_sds_controller_allocate_remote_node_context( 632230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 633230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *the_device, 634230557Sjimharris U16 *node_id 635230557Sjimharris); 636230557Sjimharris 637230557Sjimharrisvoid scic_sds_controller_free_remote_node_context( 638230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 639230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *the_device, 640230557Sjimharris U16 node_id 641230557Sjimharris); 642230557Sjimharris 643230557SjimharrisSCU_REMOTE_NODE_CONTEXT_T *scic_sds_controller_get_remote_node_context_buffer( 644230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 645230557Sjimharris U16 node_id 646230557Sjimharris); 647230557Sjimharris 648230557Sjimharris// --------------------------------------------------------------------------- 649230557Sjimharris 650230557Sjimharrisstruct SCIC_SDS_REQUEST *scic_sds_controller_get_io_request_from_tag( 651230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 652230557Sjimharris U16 io_tag 653230557Sjimharris); 654230557Sjimharris 655230557SjimharrisU16 scic_sds_controller_get_io_sequence_from_tag( 656230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 657230557Sjimharris U16 io_tag 658230557Sjimharris); 659230557Sjimharris 660230557SjimharrisSCU_TASK_CONTEXT_T *scic_sds_controller_get_task_context_buffer( 661230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 662230557Sjimharris U16 io_tag 663230557Sjimharris); 664230557Sjimharris 665230557Sjimharris//----------------------------------------------------------------------------- 666230557Sjimharris 667230557SjimharrisSCI_STATUS scic_sds_terminate_reqests( 668230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 669230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *this_remote_device, 670230557Sjimharris struct SCIC_SDS_PORT *this_port 671230557Sjimharris); 672230557Sjimharris 673230557Sjimharris//***************************************************************************** 674230557Sjimharris//* CORE CONTROLLER POWER CONTROL METHODS 675230557Sjimharris//***************************************************************************** 676230557Sjimharris 677230557Sjimharrisvoid scic_sds_controller_power_control_timer_handler( 678230557Sjimharris void *controller 679230557Sjimharris); 680230557Sjimharris 681230557Sjimharrisvoid scic_sds_controller_power_control_queue_insert( 682230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 683230557Sjimharris struct SCIC_SDS_PHY *the_phy 684230557Sjimharris); 685230557Sjimharris 686230557Sjimharrisvoid scic_sds_controller_power_control_queue_remove( 687230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 688230557Sjimharris struct SCIC_SDS_PHY *the_phy 689230557Sjimharris); 690230557Sjimharris 691230557Sjimharris//***************************************************************************** 692230557Sjimharris//* CORE CONTROLLER PHY MESSAGE PROCESSING 693230557Sjimharris//***************************************************************************** 694230557Sjimharris 695230557Sjimharrisvoid scic_sds_controller_link_up( 696230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 697230557Sjimharris struct SCIC_SDS_PORT *the_port, 698230557Sjimharris struct SCIC_SDS_PHY *the_phy 699230557Sjimharris); 700230557Sjimharris 701230557Sjimharrisvoid scic_sds_controller_link_down( 702230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 703230557Sjimharris struct SCIC_SDS_PORT *the_port, 704230557Sjimharris struct SCIC_SDS_PHY *the_phy 705230557Sjimharris); 706230557Sjimharris 707230557Sjimharris//***************************************************************************** 708230557Sjimharris//* CORE CONTROLLER PORT AGENT MESSAGE PROCESSING 709230557Sjimharris//***************************************************************************** 710230557Sjimharrisvoid scic_sds_controller_port_agent_configured_ports( 711230557Sjimharris SCIC_SDS_CONTROLLER_T * this_controller 712230557Sjimharris); 713230557Sjimharris 714230557Sjimharris//***************************************************************************** 715230557Sjimharris//* CORE CONTROLLER REMOTE DEVICE MESSAGE PROCESSING 716230557Sjimharris//***************************************************************************** 717230557Sjimharris 718230557SjimharrisBOOL scic_sds_controller_has_remote_devices_stopping( 719230557Sjimharris SCIC_SDS_CONTROLLER_T * this_controller 720230557Sjimharris); 721230557Sjimharris 722230557Sjimharrisvoid scic_sds_controller_remote_device_started( 723230557Sjimharris SCIC_SDS_CONTROLLER_T * this_controller, 724230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE * the_device 725230557Sjimharris); 726230557Sjimharris 727230557Sjimharrisvoid scic_sds_controller_remote_device_stopped( 728230557Sjimharris SCIC_SDS_CONTROLLER_T * this_controller, 729230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE * the_device 730230557Sjimharris); 731230557Sjimharris 732230557Sjimharris//***************************************************************************** 733230557Sjimharris//* CORE CONTROLLER PRIVATE METHODS 734230557Sjimharris//***************************************************************************** 735230557Sjimharris 736230557Sjimharris#ifdef SCI_LOGGING 737230557Sjimharrisvoid scic_sds_controller_initialize_state_logging( 738230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 739230557Sjimharris); 740230557Sjimharris 741230557Sjimharrisvoid scic_sds_controller_deinitialize_state_logging( 742230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 743230557Sjimharris); 744230557Sjimharris#else 745230557Sjimharris#define scic_sds_controller_initialize_state_logging(x) 746230557Sjimharris#define scic_sds_controller_deinitialize_state_logging(x) 747230557Sjimharris#endif 748230557Sjimharris 749230557SjimharrisSCI_STATUS scic_sds_controller_validate_memory_descriptor_table( 750230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 751230557Sjimharris); 752230557Sjimharris 753230557Sjimharrisvoid scic_sds_controller_ram_initialization( 754230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 755230557Sjimharris); 756230557Sjimharris 757230557Sjimharrisvoid scic_sds_controller_assign_task_entries( 758230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 759230557Sjimharris); 760230557Sjimharris 761230557Sjimharrisvoid scic_sds_controller_afe_initialization( 762230557Sjimharris SCIC_SDS_CONTROLLER_T * this_controller 763230557Sjimharris); 764230557Sjimharris 765230557Sjimharrisvoid scic_sds_controller_enable_port_task_scheduler( 766230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 767230557Sjimharris); 768230557Sjimharris 769230557Sjimharrisvoid scic_sds_controller_initialize_completion_queue( 770230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 771230557Sjimharris); 772230557Sjimharris 773230557Sjimharrisvoid scic_sds_controller_initialize_unsolicited_frame_queue( 774230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 775230557Sjimharris); 776230557Sjimharris 777230557Sjimharrisvoid scic_sds_controller_phy_timer_stop( 778230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 779230557Sjimharris); 780230557Sjimharris 781230557SjimharrisBOOL scic_sds_controller_is_start_complete( 782230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 783230557Sjimharris); 784230557Sjimharris 785230557SjimharrisSCI_STATUS scic_sds_controller_start_next_phy( 786230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 787230557Sjimharris); 788230557Sjimharris 789230557SjimharrisSCI_STATUS scic_sds_controller_stop_phys( 790230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 791230557Sjimharris); 792230557Sjimharris 793230557SjimharrisSCI_STATUS scic_sds_controller_stop_ports( 794230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 795230557Sjimharris); 796230557Sjimharris 797230557SjimharrisSCI_STATUS scic_sds_controller_stop_devices( 798230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 799230557Sjimharris); 800230557Sjimharris 801230557Sjimharrisvoid scic_sds_controller_copy_task_context( 802230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller, 803230557Sjimharris struct SCIC_SDS_REQUEST *this_request 804230557Sjimharris); 805230557Sjimharris 806230557Sjimharrisvoid scic_sds_controller_timeout_handler( 807230557Sjimharris SCI_CONTROLLER_HANDLE_T controller 808230557Sjimharris); 809230557Sjimharris 810230557Sjimharrisvoid scic_sds_controller_initialize_power_control( 811230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 812230557Sjimharris); 813230557Sjimharris 814230557Sjimharrisvoid scic_sds_controller_register_setup( 815230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 816230557Sjimharris); 817230557Sjimharris 818230557Sjimharrisvoid scic_sds_controller_reset_hardware( 819230557Sjimharris SCIC_SDS_CONTROLLER_T * this_controller 820230557Sjimharris); 821230557Sjimharris 822230557Sjimharris#ifdef ARLINGTON_BUILD 823230557Sjimharrisvoid scic_sds_controller_lex_atux_initialization( 824230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 825230557Sjimharris); 826230557Sjimharris 827230557Sjimharrisvoid scic_sds_controller_enable_chipwatch( 828230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 829230557Sjimharris); 830230557Sjimharris#endif // ARLINGTON_BUILD 831230557Sjimharris 832230557Sjimharrisvoid scic_sds_controller_build_memory_descriptor_table( 833230557Sjimharris SCIC_SDS_CONTROLLER_T *this_controller 834230557Sjimharris); 835230557Sjimharris 836230557Sjimharris#ifdef __cplusplus 837230557Sjimharris} 838230557Sjimharris#endif // __cplusplus 839230557Sjimharris 840230557Sjimharris#endif // _SCIC_SDS_CONTROLLER_H_ 841