1139749Simp/*- 212437Speter * Copyright (c) 1995 John Hay. All rights reserved. 312437Speter * 412437Speter * Redistribution and use in source and binary forms, with or without 512437Speter * modification, are permitted provided that the following conditions 612437Speter * are met: 712437Speter * 1. Redistributions of source code must retain the above copyright 812437Speter * notice, this list of conditions and the following disclaimer. 912437Speter * 2. Redistributions in binary form must reproduce the above copyright 1012437Speter * notice, this list of conditions and the following disclaimer in the 1112437Speter * documentation and/or other materials provided with the distribution. 1212437Speter * 3. All advertising materials mentioning features or use of this software 1312437Speter * must display the following acknowledgement: 1412437Speter * This product includes software developed by [your name] 1512437Speter * and [any other names deserving credit ] 1612437Speter * 4. Neither the name of the author nor the names of any co-contributors 1712437Speter * may be used to endorse or promote products derived from this software 1812437Speter * without specific prior written permission. 1912437Speter * 2012437Speter * THIS SOFTWARE IS PROVIDED BY [your name] AND CONTRIBUTORS ``AS IS'' AND 2112437Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2212437Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2312437Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2412437Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2512437Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2612437Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2712437Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2812437Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2912437Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3012437Speter * SUCH DAMAGE. 3112437Speter * 3250477Speter * $FreeBSD$ 3312437Speter */ 3412437Speter#ifndef _HD64570_H_ 3512437Speter#define _HD64570_H_ 3612437Speter 3712437Spetertypedef struct msci_channel 3812437Speter { 3912437Speter union 4012437Speter { 4112437Speter unsigned short us_trb; /* rw */ 4212437Speter struct 4312437Speter { 4412437Speter unsigned char uc_trbl; 4512437Speter unsigned char uc_trbh; 4612437Speter }uc_trb; 4712437Speter }u_trb; 4812437Speter unsigned char st0; /* ro */ 4912437Speter unsigned char st1; /* rw */ 5012437Speter unsigned char st2; /* rw */ 5112437Speter unsigned char st3; /* ro */ 5212437Speter unsigned char fst; /* rw */ 5312437Speter unsigned char unused0; 5412437Speter unsigned char ie0; /* rw */ 5512437Speter unsigned char ie1; /* rw */ 5612437Speter unsigned char ie2; /* rw */ 5712437Speter unsigned char fie; /* rw */ 5812437Speter unsigned char cmd; /* wo */ 5912437Speter unsigned char unused1; 6012437Speter unsigned char md0; /* rw */ 6112437Speter unsigned char md1; /* rw */ 6212437Speter unsigned char md2; /* rw */ 6312437Speter unsigned char ctl; /* rw */ 6412437Speter unsigned char sa0; /* rw */ 6512437Speter unsigned char sa1; /* rw */ 6612437Speter unsigned char idl; /* rw */ 6712437Speter unsigned char tmc; /* rw */ 6812437Speter unsigned char rxs; /* rw */ 6912437Speter unsigned char txs; /* rw */ 7012437Speter unsigned char trc0; /* rw */ 7112437Speter unsigned char trc1; /* rw */ 7212437Speter unsigned char rrc; /* rw */ 7312437Speter unsigned char unused2; 7412437Speter unsigned char cst0; /* rw */ 7512437Speter unsigned char cst1; /* rw */ 7612437Speter unsigned char unused3[2]; 7712437Speter }msci_channel; 7812437Speter 7912437Speter#define trb u_trb.us_trb 8012437Speter#define trbl u_trb.uc_trb.uc_trbl 8112437Speter#define trbh u_trb.uc_trb.uc_trbh 8212437Speter 8312437Spetertypedef struct timer_channel 8412437Speter { 8512437Speter unsigned short tcnt; /* rw */ 8612437Speter unsigned short tconr; /* wo */ 8712437Speter unsigned char tcsr; /* rw */ 8812437Speter unsigned char tepr; /* rw */ 8912437Speter unsigned char unused[2]; 9012437Speter }timer_channel; 9112437Speter 9212437Spetertypedef struct dmac_channel 9312437Speter { 9412437Speter unsigned short dar; /* rw */ 9512437Speter unsigned char darb; /* rw */ 9612437Speter unsigned char unused0; 9712437Speter unsigned short sar; /* rw On odd numbered dmacs (tx) only */ 9812437Speter unsigned char sarb; /* rw */ 9919235Sjhay#define cpb sarb 10012437Speter unsigned char unused1; 10112437Speter unsigned short cda; /* rw */ 10212437Speter unsigned short eda; /* rw */ 10312437Speter unsigned short bfl; /* rw On even numbered dmacs (rx) only */ 10412437Speter unsigned short bcr; /* rw */ 10512437Speter unsigned char dsr; /* rw */ 10612437Speter unsigned char dmr; /* rw */ 10712437Speter unsigned char unused2; 10812437Speter unsigned char fct; /* rw */ 10912437Speter unsigned char dir; /* rw */ 11012437Speter unsigned char dcr; /* rw */ 11112437Speter unsigned char unused3[10]; 11212437Speter }dmac_channel; 11312437Speter 11412437Speter/* x is the channel number. rx channels are even numbered and tx, odd. */ 11512437Speter#define DMAC_RXCH(x) ((x*2) + 0) 11612437Speter#define DMAC_TXCH(x) ((x*2) + 1) 11712437Speter 11812437Spetertypedef struct sca_regs 11912437Speter { 12012437Speter unsigned char lpr; /* rw */ 12112437Speter unsigned char unused0; /* -- */ 12212437Speter /* Wait system */ 12312437Speter unsigned char pabr0; /* rw */ 12412437Speter unsigned char pabr1; /* rw */ 12512437Speter unsigned char wcrl; /* rw */ 12612437Speter unsigned char wcrm; /* rw */ 12712437Speter unsigned char wcrh; /* rw */ 12812437Speter unsigned char unused1; 12912437Speter /* DMAC */ 13012437Speter unsigned char pcr; /* rw */ 13112437Speter unsigned char dmer; /* rw */ 13212437Speter unsigned char unused2[6]; 13312437Speter /* Interrupt */ 13412437Speter unsigned char isr0; /* ro */ 13512437Speter unsigned char isr1; /* ro */ 13612437Speter unsigned char isr2; /* ro */ 13712437Speter unsigned char unused3; 13812437Speter unsigned char ier0; /* rw */ 13912437Speter unsigned char ier1; /* rw */ 14012437Speter unsigned char ier2; /* rw */ 14112437Speter unsigned char unused4; 14212437Speter unsigned char itcr; /* rw */ 14312437Speter unsigned char unused5; 14412437Speter unsigned char ivr; /* rw */ 14512437Speter unsigned char unused6; 14612437Speter unsigned char imvr; /* rw */ 14712437Speter unsigned char unused7[3]; 14812437Speter /* MSCI Channel 0 */ 14912437Speter msci_channel msci[2]; 15012437Speter timer_channel timer[4]; 15112437Speter dmac_channel dmac[4]; 15212437Speter }sca_regs; 15312437Speter 15412437Speter#define SCA_CMD_TXRESET 0x01 15512437Speter#define SCA_CMD_TXENABLE 0x02 15612437Speter#define SCA_CMD_TXDISABLE 0x03 15712437Speter#define SCA_CMD_TXCRCINIT 0x04 15812437Speter#define SCA_CMD_TXCRCEXCL 0x05 15912437Speter#define SCA_CMS_TXEOM 0x06 16012437Speter#define SCA_CMD_TXABORT 0x07 16112437Speter#define SCA_CMD_MPON 0x08 16212437Speter#define SCA_CMD_TXBCLEAR 0x09 16312437Speter 16412437Speter#define SCA_CMD_RXRESET 0x11 16512437Speter#define SCA_CMD_RXENABLE 0x12 16612437Speter#define SCA_CMD_RXDISABLE 0x13 16712437Speter#define SCA_CMD_RXCRCINIT 0x14 16812437Speter#define SCA_CMD_RXMSGREJ 0x15 16912437Speter#define SCA_CMD_MPSEARCH 0x16 17012437Speter#define SCA_CMD_RXCRCEXCL 0x17 17112437Speter#define SCA_CMD_RXCRCCALC 0x18 17212437Speter 17312437Speter#define SCA_CMD_NOP 0x00 17412437Speter#define SCA_CMD_RESET 0x21 17512437Speter#define SCA_CMD_SEARCH 0x31 17612437Speter 17712437Speter#define SCA_MD0_CRC_1 0x01 17812437Speter#define SCA_MD0_CRC_CCITT 0x02 17912437Speter#define SCA_MD0_CRC_ENABLE 0x04 18012437Speter#define SCA_MD0_AUTO_ENABLE 0x10 18112437Speter#define SCA_MD0_MODE_ASYNC 0x00 18212437Speter#define SCA_MD0_MODE_BYTESYNC1 0x20 18312437Speter#define SCA_MD0_MODE_BISYNC 0x40 18412437Speter#define SCA_MD0_MODE_BYTESYNC2 0x60 18512437Speter#define SCA_MD0_MODE_HDLC 0x80 18612437Speter 18712437Speter#define SCA_MD1_NOADDRCHK 0x00 18812437Speter#define SCA_MD1_SNGLADDR1 0x40 18912437Speter#define SCA_MD1_SNGLADDR2 0x80 19012437Speter#define SCA_MD1_DUALADDR 0xC0 19112437Speter 19212437Speter#define SCA_MD2_DUPLEX 0x00 19312437Speter#define SCA_MD2_ECHO 0x01 19412437Speter#define SCA_MD2_LOOPBACK 0x03 19512437Speter#define SCA_MD2_ADPLLx8 0x00 19612437Speter#define SCA_MD2_ADPLLx16 0x08 19712437Speter#define SCA_MD2_ADPLLx32 0x10 19812437Speter#define SCA_MD2_NRZ 0x00 19912437Speter#define SCA_MD2_NRZI 0x20 20012437Speter#define SCA_MD2_MANCHESTER 0x80 20112437Speter#define SCA_MD2_FM0 0xC0 20212437Speter#define SCA_MD2_FM1 0xA0 20312437Speter 20412437Speter#define SCA_CTL_RTS 0x01 20512437Speter#define SCA_CTL_IDLPAT 0x10 20612437Speter#define SCA_CTL_UDRNC 0x20 20712437Speter 20812437Speter#define SCA_RXS_DIV_MASK 0x0F 20912437Speter#define SCA_RXS_DIV1 0x00 21012437Speter#define SCA_RXS_DIV2 0x01 21112437Speter#define SCA_RXS_DIV4 0x02 21212437Speter#define SCA_RXS_DIV8 0x03 21312437Speter#define SCA_RXS_DIV16 0x04 21412437Speter#define SCA_RXS_DIV32 0x05 21512437Speter#define SCA_RXS_DIV64 0x06 21612437Speter#define SCA_RXS_DIV128 0x07 21712437Speter#define SCA_RXS_DIV256 0x08 21812437Speter#define SCA_RXS_DIV512 0x09 21912437Speter#define SCA_RXS_CLK_RXC0 0x00 22012437Speter#define SCA_RXS_CLK_RXC1 0x20 22112437Speter#define SCA_RXS_CLK_INT 0x40 22212437Speter#define SCA_RXS_CLK_ADPLL_OUT 0x60 22312437Speter#define SCA_RXS_CLK_ADPLL_IN 0x70 22412437Speter 22512437Speter#define SCA_TXS_DIV_MASK 0x0F 22612437Speter#define SCA_TXS_DIV1 0x00 22712437Speter#define SCA_TXS_DIV2 0x01 22812437Speter#define SCA_TXS_DIV4 0x02 22912437Speter#define SCA_TXS_DIV8 0x03 23012437Speter#define SCA_TXS_DIV16 0x04 23112437Speter#define SCA_TXS_DIV32 0x05 23212437Speter#define SCA_TXS_DIV64 0x06 23312437Speter#define SCA_TXS_DIV128 0x07 23412437Speter#define SCA_TXS_DIV256 0x08 23512437Speter#define SCA_TXS_DIV512 0x09 23612437Speter#define SCA_TXS_CLK_TXC 0x00 23712437Speter#define SCA_TXS_CLK_INT 0x40 23812437Speter#define SCA_TXS_CLK_RX 0x60 23912437Speter 24012437Speter#define SCA_ST0_RXRDY 0x01 24112437Speter#define SCA_ST0_TXRDY 0x02 24212437Speter#define SCA_ST0_RXINT 0x40 24312437Speter#define SCA_ST0_TXINT 0x80 24412437Speter 24512437Speter#define SCA_ST1_IDLST 0x01 24612437Speter#define SCA_ST1_ABTST 0x02 24712437Speter#define SCA_ST1_DCDCHG 0x04 24812437Speter#define SCA_ST1_CTSCHG 0x08 24912437Speter#define SCA_ST1_FLAG 0x10 25012437Speter#define SCA_ST1_TXIDL 0x40 25112437Speter#define SCA_ST1_UDRN 0x80 25212437Speter 25312437Speter/* ST2 and FST look the same */ 25412437Speter#define SCA_FST_CRCERR 0x04 25512437Speter#define SCA_FST_OVRN 0x08 25612437Speter#define SCA_FST_RESFRM 0x10 25712437Speter#define SCA_FST_ABRT 0x20 25812437Speter#define SCA_FST_SHRT 0x40 25912437Speter#define SCA_FST_EOM 0x80 26012437Speter 26112437Speter#define SCA_ST3_RXENA 0x01 26212437Speter#define SCA_ST3_TXENA 0x02 26312437Speter#define SCA_ST3_DCD 0x04 26412437Speter#define SCA_ST3_CTS 0x08 26512437Speter#define SCA_ST3_ADPLLSRCH 0x10 26612437Speter#define SCA_ST3_TXDATA 0x20 26712437Speter 26812437Speter#define SCA_FIE_EOMFE 0x80 26912437Speter 27012437Speter#define SCA_IE0_RXRDY 0x01 27112437Speter#define SCA_IE0_TXRDY 0x02 27212437Speter#define SCA_IE0_RXINT 0x40 27312437Speter#define SCA_IE0_TXINT 0x80 27412437Speter 27512437Speter#define SCA_IE1_IDLDE 0x01 27612437Speter#define SCA_IE1_ABTDE 0x02 27712437Speter#define SCA_IE1_DCD 0x04 27812437Speter#define SCA_IE1_CTS 0x08 27912437Speter#define SCA_IE1_FLAG 0x10 28012437Speter#define SCA_IE1_IDL 0x40 28112437Speter#define SCA_IE1_UDRN 0x80 28212437Speter 28312437Speter#define SCA_IE2_CRCERR 0x04 28412437Speter#define SCA_IE2_OVRN 0x08 28512437Speter#define SCA_IE2_RESFRM 0x10 28612437Speter#define SCA_IE2_ABRT 0x20 28712437Speter#define SCA_IE2_SHRT 0x40 28812437Speter#define SCA_IE2_EOM 0x80 28912437Speter 29012437Speter/* This is for RRC, TRC0 and TRC1. */ 29112437Speter#define SCA_RCR_MASK 0x1F 29212437Speter 29312437Speter#define SCA_IE1_ 29412437Speter 29512437Speter#define SCA_IV_CHAN0 0x00 29612437Speter#define SCA_IV_CHAN1 0x20 29712437Speter 29812437Speter#define SCA_IV_RXRDY 0x04 29912437Speter#define SCA_IV_TXRDY 0x06 30012437Speter#define SCA_IV_RXINT 0x08 30112437Speter#define SCA_IV_TXINT 0x0A 30212437Speter 30312437Speter#define SCA_IV_DMACH0 0x00 30412437Speter#define SCA_IV_DMACH1 0x08 30512437Speter#define SCA_IV_DMACH2 0x20 30612437Speter#define SCA_IV_DMACH3 0x28 30712437Speter 30812437Speter#define SCA_IV_DMIA 0x14 30912437Speter#define SCA_IV_DMIB 0x16 31012437Speter 31112437Speter#define SCA_IV_TIMER0 0x1C 31212437Speter#define SCA_IV_TIMER1 0x1E 31312437Speter#define SCA_IV_TIMER2 0x3C 31412437Speter#define SCA_IV_TIMER3 0x3E 31512437Speter 31612437Speter/* 31712437Speter * DMA registers 31812437Speter */ 31912437Speter#define SCA_DSR_EOT 0x80 32012437Speter#define SCA_DSR_EOM 0x40 32112437Speter#define SCA_DSR_BOF 0x20 32212437Speter#define SCA_DSR_COF 0x10 32312437Speter#define SCA_DSR_DE 0x02 32412437Speter#define SCA_DSR_DWE 0x01 32512437Speter 32612437Speter#define SCA_DMR_TMOD 0x10 32712437Speter#define SCA_DMR_NF 0x04 32812437Speter#define SCA_DMR_CNTE 0x02 32912437Speter 33012437Speter#define SCA_DMER_EN 0x80 33112437Speter 33212437Speter#define SCA_DCR_ABRT 0x01 33312437Speter#define SCA_DCR_FCCLR 0x02 /* Clear frame end intr counter */ 33412437Speter 33512437Speter#define SCA_DIR_EOT 0x80 33612437Speter#define SCA_DIR_EOM 0x40 33712437Speter#define SCA_DIR_BOF 0x20 33812437Speter#define SCA_DIR_COF 0x10 33912437Speter 34014643Speter#define SCA_PCR_BRC 0x10 34114643Speter#define SCA_PCR_CCC 0x08 34214643Speter#define SCA_PCR_PR2 0x04 34314643Speter#define SCA_PCR_PR1 0x02 34414643Speter#define SCA_PCR_PR0 0x01 34514643Speter 34612437Spetertypedef struct sca_descriptor 34712437Speter { 34812437Speter unsigned short cp; 34912437Speter unsigned short bp; 35012437Speter unsigned char bpb; 35112437Speter unsigned char unused0; 35212437Speter unsigned short len; 35312437Speter unsigned char stat; 35412437Speter unsigned char unused1; 35512437Speter }sca_descriptor; 35612437Speter 35712437Speter#define SCA_DESC_EOT 0x01 35812437Speter#define SCA_DESC_CRC 0x04 35912437Speter#define SCA_DESC_OVRN 0x08 36012437Speter#define SCA_DESC_RESD 0x10 36112437Speter#define SCA_DESC_ABORT 0x20 36212437Speter#define SCA_DESC_SHRTFRM 0x40 36312437Speter#define SCA_DESC_EOM 0x80 36412437Speter#define SCA_DESC_ERRORS 0x7C 36512437Speter 36612437Speter/* 36712437Speter*************************************************************************** 36812437Speter** END 36912437Speter*************************************************************************** 37012437Speter**/ 37112437Speter#endif /* _HD64570_H_ */ 37212437Speter 373