excareg.h revision 100703
189948Simp/* $NetBSD: i82365reg.h,v 1.3 1998/12/20 17:53:28 nathanw Exp $ */ 289948Simp/* $FreeBSD: head/sys/dev/exca/excareg.h 100703 2002-07-26 08:01:08Z imp $ */ 389948Simp 489948Simp/* 589948Simp * Copyright (c) 2002 M Warner Losh. All rights reserved. 689948Simp * 789948Simp * Redistribution and use in source and binary forms, with or without 889948Simp * modification, are permitted provided that the following conditions 989948Simp * are met: 1089948Simp * 1. Redistributions of source code must retain the above copyright 1189948Simp * notice, this list of conditions and the following disclaimer. 1289948Simp * 2. Redistributions in binary form must reproduce the above copyright 1389948Simp * notice, this list of conditions and the following disclaimer in the 1489948Simp * documentation and/or other materials provided with the distribution. 1589948Simp * 1689948Simp * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1789948Simp * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1889948Simp * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1989948Simp * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2089948Simp * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2189948Simp * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2289948Simp * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2389948Simp * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2489948Simp * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2589948Simp * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2689948Simp * 2789948Simp * This software may be derived from NetBSD i82365.c and other files with 2889948Simp * the following copyright: 2989948Simp * 3089948Simp * Copyright (c) 1997 Marc Horowitz. All rights reserved. 3189948Simp * 3289948Simp * Redistribution and use in source and binary forms, with or without 3389948Simp * modification, are permitted provided that the following conditions 3489948Simp * are met: 3589948Simp * 1. Redistributions of source code must retain the above copyright 3689948Simp * notice, this list of conditions and the following disclaimer. 3789948Simp * 2. Redistributions in binary form must reproduce the above copyright 3889948Simp * notice, this list of conditions and the following disclaimer in the 3989948Simp * documentation and/or other materials provided with the distribution. 4089948Simp * 3. All advertising materials mentioning features or use of this software 4189948Simp * must display the following acknowledgement: 4289948Simp * This product includes software developed by Marc Horowitz. 4389948Simp * 4. The name of the author may not be used to endorse or promote products 4489948Simp * derived from this software without specific prior written permission. 4589948Simp * 4689948Simp * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 4789948Simp * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 4889948Simp * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 4989948Simp * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 5089948Simp * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 5189948Simp * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 5289948Simp * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 5389948Simp * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 5489948Simp * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 5589948Simp * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 5689948Simp */ 5789948Simp 58100703Simp#ifndef _SYS_DEV_EXCA_EXCAREG_H 59100703Simp#define _SYS_DEV_EXCA_EXCAREG_H 60100703Simp 6189948Simp/* 6289948Simp * All information is from the intel 82365sl PC Card Interface Controller 6389948Simp * (PCIC) data sheet, marked "preliminary". Order number 290423-002, January 6489948Simp * 1993. 6589948Simp */ 6689948Simp 6789948Simp#define EXCA_IOSIZE 2 6889948Simp 6989948Simp#define EXCA_REG_INDEX 0 7089948Simp#define EXCA_REG_DATA 1 7189948Simp 7289948Simp#define EXCA_NSLOTS 4 /* 2 in 2 chips */ 7389948Simp 7489948Simp/* 7589948Simp * I/o ports 7689948Simp */ 7789948Simp#define EXCA_INDEX0 0x3e0 7889948Simp 7989948Simp/* 8089948Simp * The PCIC allows two chips to share the same address. In order not to run 8189948Simp * afoul of the bsd device model, this driver will treat those chips as 8289948Simp * the same device. 8389948Simp */ 8489948Simp 8589948Simp#define EXCA_CHIP0_BASE 0x00 8689948Simp#define EXCA_CHIP1_BASE 0x80 8789948Simp 8889948Simp/* Each PCIC chip can drive two sockets */ 8989948Simp 9089948Simp#define EXCA_SOCKET_SIZE 0x40 9189948Simp#define EXCA_SOCKETA_INDEX 0x00 9289948Simp#define EXCA_SOCKETB_INDEX EXCA_SOCKET_SIZE 9389948Simp 9489948Simp/* general setup registers */ 9589948Simp 9689948Simp#define EXCA_IDENT 0x00 /* RO */ 9789948Simp#define EXCA_IDENT_IFTYPE_MASK 0xC0 9889948Simp#define EXCA_IDENT_IFTYPE_IO_ONLY 0x00 9989948Simp#define EXCA_IDENT_IFTYPE_MEM_ONLY 0x40 10089948Simp#define EXCA_IDENT_IFTYPE_MEM_AND_IO 0x80 10189948Simp#define EXCA_IDENT_IFTYPE_RESERVED 0xC0 10289948Simp#define EXCA_IDENT_ZERO 0x30 10389948Simp#define EXCA_IDENT_REV_MASK 0x0F 10489948Simp#define EXCA_IDENT_REV_I82365SLR0 0x02 10589948Simp#define EXCA_IDENT_REV_I82365SLR1 0x03 10689948Simp 10789948Simp#define EXCA_IF_STATUS 0x01 /* RO */ 10889948Simp#define EXCA_IF_STATUS_GPI 0x80 /* General Purpose Input */ 10989948Simp#define EXCA_IF_STATUS_POWERACTIVE 0x40 11089948Simp#define EXCA_IF_STATUS_READY 0x20 /* really READY/!BUSY */ 11189948Simp#define EXCA_IF_STATUS_MEM_WP 0x10 11289948Simp#define EXCA_IF_STATUS_CARDDETECT_MASK 0x0C 11389948Simp#define EXCA_IF_STATUS_CARDDETECT_PRESENT 0x0C 11489948Simp#define EXCA_IF_STATUS_BATTERY_MASK 0x03 11589948Simp#define EXCA_IF_STATUS_BATTERY_DEAD1 0x00 11689948Simp#define EXCA_IF_STATUS_BATTERY_DEAD2 0x01 11789948Simp#define EXCA_IF_STATUS_BATTERY_WARNING 0x02 11889948Simp#define EXCA_IF_STATUS_BATTERY_GOOD 0x03 11989948Simp 12089948Simp#define EXCA_PWRCTL 0x02 /* RW */ 12189948Simp#define EXCA_PWRCTL_OE 0x80 /* output enable */ 12289948Simp#define EXCA_PWRCTL_DISABLE_RESETDRV 0x40 12389948Simp#define EXCA_PWRCTL_AUTOSWITCH_ENABLE 0x20 12489948Simp#define EXCA_PWRCTL_PWR_ENABLE 0x10 12589948Simp#define EXCA_PWRCTL_VPP2_MASK 0x0C 12689948Simp/* XXX these are a little unclear from the data sheet */ 12789948Simp#define EXCA_PWRCTL_VPP2_RESERVED 0x0C 12889948Simp#define EXCA_PWRCTL_VPP2_EN1 0x08 12989948Simp#define EXCA_PWRCTL_VPP2_EN0 0x04 13089948Simp#define EXCA_PWRCTL_VPP2_ENX 0x00 13189948Simp#define EXCA_PWRCTL_VPP1_MASK 0x03 13289948Simp/* XXX these are a little unclear from the data sheet */ 13389948Simp#define EXCA_PWRCTL_VPP1_RESERVED 0x03 13489948Simp#define EXCA_PWRCTL_VPP1_EN1 0x02 13589948Simp#define EXCA_PWRCTL_VPP1_EN0 0x01 13689948Simp#define EXCA_PWRCTL_VPP1_ENX 0x00 13789948Simp 13889948Simp#define EXCA_CSC 0x04 /* RW */ 13989948Simp#define EXCA_CSC_ZERO 0xE0 14089948Simp#define EXCA_CSC_GPI 0x10 14189948Simp#define EXCA_CSC_CD 0x08 /* Card Detect Change */ 14289948Simp#define EXCA_CSC_READY 0x04 14389948Simp#define EXCA_CSC_BATTWARN 0x02 14489948Simp#define EXCA_CSC_BATTDEAD 0x01 /* for memory cards */ 14589948Simp#define EXCA_CSC_RI 0x01 /* for i/o cards */ 14689948Simp 14789948Simp#define EXCA_ADDRWIN_ENABLE 0x06 /* RW */ 14889948Simp#define EXCA_ADDRWIN_ENABLE_IO1 0x80 14989948Simp#define EXCA_ADDRWIN_ENABLE_IO0 0x40 15089948Simp#define EXCA_ADDRWIN_ENABLE_MEMCS16 0x20 /* rtfds if you care */ 15189948Simp#define EXCA_ADDRWIN_ENABLE_MEM4 0x10 15289948Simp#define EXCA_ADDRWIN_ENABLE_MEM3 0x08 15389948Simp#define EXCA_ADDRWIN_ENABLE_MEM2 0x04 15489948Simp#define EXCA_ADDRWIN_ENABLE_MEM1 0x02 15589948Simp#define EXCA_ADDRWIN_ENABLE_MEM0 0x01 15689948Simp 15789948Simp#define EXCA_CARD_DETECT 0x16 /* RW */ 15889948Simp#define EXCA_CARD_DETECT_RESERVED 0xC0 15989948Simp#define EXCA_CARD_DETECT_SW_INTR 0x20 16089948Simp#define EXCA_CARD_DETECT_RESUME_ENABLE 0x10 16189948Simp#define EXCA_CARD_DETECT_GPI_TRANSCTL 0x08 16289948Simp#define EXCA_CARD_DETECT_GPI_ENABLE 0x04 16389948Simp#define EXCA_CARD_DETECT_CFGRST_ENABLE 0x02 16489948Simp#define EXCA_CARD_DETECT_MEMDLY_INHIBIT 0x01 16589948Simp 16689948Simp/* interrupt registers */ 16789948Simp 16889948Simp#define EXCA_INTR 0x03 /* RW */ 16989948Simp#define EXCA_INTR_RI_ENABLE 0x80 17089948Simp#define EXCA_INTR_RESET 0x40 /* active low (zero) */ 17189948Simp#define EXCA_INTR_CARDTYPE_MASK 0x20 17289948Simp#define EXCA_INTR_CARDTYPE_IO 0x20 17389948Simp#define EXCA_INTR_CARDTYPE_MEM 0x00 17489948Simp#define EXCA_INTR_ENABLE 0x10 17589948Simp#define EXCA_INTR_IRQ_MASK 0x0F 17689948Simp#define EXCA_INTR_IRQ_SHIFT 0 17789948Simp#define EXCA_INTR_IRQ_NONE 0x00 17889948Simp#define EXCA_INTR_IRQ_RESERVED1 0x01 17989948Simp#define EXCA_INTR_IRQ_RESERVED2 0x02 18089948Simp#define EXCA_INTR_IRQ3 0x03 18189948Simp#define EXCA_INTR_IRQ4 0x04 18289948Simp#define EXCA_INTR_IRQ5 0x05 18389948Simp#define EXCA_INTR_IRQ_RESERVED6 0x06 18489948Simp#define EXCA_INTR_IRQ7 0x07 18589948Simp#define EXCA_INTR_IRQ_RESERVED8 0x08 18689948Simp#define EXCA_INTR_IRQ9 0x09 18789948Simp#define EXCA_INTR_IRQ10 0x0A 18889948Simp#define EXCA_INTR_IRQ11 0x0B 18989948Simp#define EXCA_INTR_IRQ12 0x0C 19089948Simp#define EXCA_INTR_IRQ_RESERVED13 0x0D 19189948Simp#define EXCA_INTR_IRQ14 0x0E 19289948Simp#define EXCA_INTR_IRQ15 0x0F 19389948Simp 19489948Simp#define EXCA_INTR_IRQ_VALIDMASK 0xDEB8 /* 1101 1110 1011 1000 */ 19589948Simp 19689948Simp#define EXCA_CSC_INTR 0x05 /* RW */ 19789948Simp#define EXCA_CSC_INTR_IRQ_MASK 0xF0 19889948Simp#define EXCA_CSC_INTR_IRQ_SHIFT 4 19989948Simp#define EXCA_CSC_INTR_IRQ_NONE 0x00 20089948Simp#define EXCA_CSC_INTR_IRQ_RESERVED1 0x10 20189948Simp#define EXCA_CSC_INTR_IRQ_RESERVED2 0x20 20289948Simp#define EXCA_CSC_INTR_IRQ3 0x30 20389948Simp#define EXCA_CSC_INTR_IRQ4 0x40 20489948Simp#define EXCA_CSC_INTR_IRQ5 0x50 20589948Simp#define EXCA_CSC_INTR_IRQ_RESERVED6 0x60 20689948Simp#define EXCA_CSC_INTR_IRQ7 0x70 20789948Simp#define EXCA_CSC_INTR_IRQ_RESERVED8 0x80 20889948Simp#define EXCA_CSC_INTR_IRQ9 0x90 20989948Simp#define EXCA_CSC_INTR_IRQ10 0xA0 21089948Simp#define EXCA_CSC_INTR_IRQ11 0xB0 21189948Simp#define EXCA_CSC_INTR_IRQ12 0xC0 21289948Simp#define EXCA_CSC_INTR_IRQ_RESERVED13 0xD0 21389948Simp#define EXCA_CSC_INTR_IRQ14 0xE0 21489948Simp#define EXCA_CSC_INTR_IRQ15 0xF0 21589948Simp#define EXCA_CSC_INTR_CD_ENABLE 0x08 21689948Simp#define EXCA_CSC_INTR_READY_ENABLE 0x04 21789948Simp#define EXCA_CSC_INTR_BATTWARN_ENABLE 0x02 21889948Simp#define EXCA_CSC_INTR_BATTDEAD_ENABLE 0x01 /* for memory cards */ 21989948Simp#define EXCA_CSC_INTR_RI_ENABLE 0x01 /* for I/O cards */ 22089948Simp 22189948Simp#define EXCA_CSC_INTR_IRQ_VALIDMASK 0xDEB8 /* 1101 1110 1011 1000 */ 22289948Simp 22389948Simp/* I/O registers */ 22489948Simp 22589948Simp#define EXCA_IO_WINS 2 22689948Simp 22789948Simp#define EXCA_IOCTL 0x07 /* RW */ 22889948Simp#define EXCA_IOCTL_IO1_WAITSTATE 0x80 22989948Simp#define EXCA_IOCTL_IO1_ZEROWAIT 0x40 23089948Simp#define EXCA_IOCTL_IO1_IOCS16SRC_MASK 0x20 23189948Simp#define EXCA_IOCTL_IO1_IOCS16SRC_CARD 0x20 23289948Simp#define EXCA_IOCTL_IO1_IOCS16SRC_DATASIZE 0x00 23389948Simp#define EXCA_IOCTL_IO1_DATASIZE_MASK 0x10 23489948Simp#define EXCA_IOCTL_IO1_DATASIZE_16BIT 0x10 23589948Simp#define EXCA_IOCTL_IO1_DATASIZE_8BIT 0x00 23689948Simp#define EXCA_IOCTL_IO0_WAITSTATE 0x08 23789948Simp#define EXCA_IOCTL_IO0_ZEROWAIT 0x04 23889948Simp#define EXCA_IOCTL_IO0_IOCS16SRC_MASK 0x02 23989948Simp#define EXCA_IOCTL_IO0_IOCS16SRC_CARD 0x02 24089948Simp#define EXCA_IOCTL_IO0_IOCS16SRC_DATASIZE 0x00 24189948Simp#define EXCA_IOCTL_IO0_DATASIZE_MASK 0x01 24289948Simp#define EXCA_IOCTL_IO0_DATASIZE_16BIT 0x01 24389948Simp#define EXCA_IOCTL_IO0_DATASIZE_8BIT 0x00 24489948Simp 24589948Simp#define EXCA_IOADDR0_START_LSB 0x08 24689948Simp#define EXCA_IOADDR0_START_MSB 0x09 24789948Simp#define EXCA_IOADDR0_STOP_LSB 0x0A 24889948Simp#define EXCA_IOADDR0_STOP_MSB 0x0B 24989948Simp#define EXCA_IOADDR1_START_LSB 0x0C 25089948Simp#define EXCA_IOADDR1_START_MSB 0x0D 25189948Simp#define EXCA_IOADDR1_STOP_LSB 0x0E 25289948Simp#define EXCA_IOADDR1_STOP_MSB 0x0F 25389948Simp 25489948Simp/* memory registers */ 25589948Simp 25689948Simp/* 25789948Simp * memory window addresses refer to bits A23-A12 of the ISA system memory 25889948Simp * address. This is a shift of 12 bits. The LSB contains A19-A12, and the 25989948Simp * MSB contains A23-A20, plus some other bits. 26089948Simp */ 26189948Simp 26289948Simp#define EXCA_MEM_WINS 5 26389948Simp 26489948Simp#define EXCA_MEM_SHIFT 12 26589948Simp#define EXCA_MEM_PAGESIZE (1<<EXCA_MEM_SHIFT) 26689948Simp 26789948Simp#define EXCA_SYSMEM_ADDRX_SHIFT EXCA_MEM_SHIFT 26889948Simp#define EXCA_SYSMEM_ADDRX_START_MSB_DATASIZE_MASK 0x80 26989948Simp#define EXCA_SYSMEM_ADDRX_START_MSB_DATASIZE_16BIT 0x80 27089948Simp#define EXCA_SYSMEM_ADDRX_START_MSB_DATASIZE_8BIT 0x00 27189948Simp#define EXCA_SYSMEM_ADDRX_START_MSB_ZEROWAIT 0x40 27289948Simp#define EXCA_SYSMEM_ADDRX_START_MSB_SCRATCH_MASK 0x30 27389948Simp#define EXCA_SYSMEM_ADDRX_START_MSB_ADDR_MASK 0x0F 27489948Simp 27589948Simp#define EXCA_SYSMEM_ADDRX_STOP_MSB_WAIT_MASK 0xC0 27689948Simp#define EXCA_SYSMEM_ADDRX_STOP_MSB_WAIT0 0x00 27789948Simp#define EXCA_SYSMEM_ADDRX_STOP_MSB_WAIT1 0x40 27889948Simp#define EXCA_SYSMEM_ADDRX_STOP_MSB_WAIT2 0x80 27989948Simp#define EXCA_SYSMEM_ADDRX_STOP_MSB_WAIT3 0xC0 28089948Simp#define EXCA_SYSMEM_ADDRX_STOP_MSB_ADDR_MASK 0x0F 28189948Simp 28289948Simp/* 28389948Simp * The card side of a memory mapping consists of bits A19-A12 of the card 28489948Simp * memory address in the LSB, and A25-A20 plus some other bits in the MSB. 28589948Simp * Again, the shift is 12 bits. 28689948Simp */ 28789948Simp 28889948Simp#define EXCA_CARDMEM_ADDRX_SHIFT EXCA_MEM_SHIFT 28989948Simp#define EXCA_CARDMEM_ADDRX_MSB_WP 0x80 29089948Simp#define EXCA_CARDMEM_ADDRX_MSB_REGACTIVE_MASK 0x40 29189948Simp#define EXCA_CARDMEM_ADDRX_MSB_REGACTIVE_ATTR 0x40 29289948Simp#define EXCA_CARDMEM_ADDRX_MSB_REGACTIVE_COMMON 0x00 29389948Simp#define EXCA_CARDMEM_ADDRX_MSB_ADDR_MASK 0x3F 29489948Simp 29589948Simp#define EXCA_SYSMEM_ADDR0_START_LSB 0x10 29689948Simp#define EXCA_SYSMEM_ADDR0_START_MSB 0x11 29789948Simp#define EXCA_SYSMEM_ADDR0_STOP_LSB 0x12 29889948Simp#define EXCA_SYSMEM_ADDR0_STOP_MSB 0x13 29989948Simp 30089948Simp#define EXCA_CARDMEM_ADDR0_LSB 0x14 30189948Simp#define EXCA_CARDMEM_ADDR0_MSB 0x15 30289948Simp 30389948Simp/* #define EXCA_RESERVED 0x17 */ 30489948Simp 30589948Simp#define EXCA_SYSMEM_ADDR1_START_LSB 0x18 30689948Simp#define EXCA_SYSMEM_ADDR1_START_MSB 0x19 30789948Simp#define EXCA_SYSMEM_ADDR1_STOP_LSB 0x1A 30889948Simp#define EXCA_SYSMEM_ADDR1_STOP_MSB 0x1B 30989948Simp 31089948Simp#define EXCA_CARDMEM_ADDR1_LSB 0x1C 31189948Simp#define EXCA_CARDMEM_ADDR1_MSB 0x1D 31289948Simp 31389948Simp#define EXCA_SYSMEM_ADDR2_START_LSB 0x20 31489948Simp#define EXCA_SYSMEM_ADDR2_START_MSB 0x21 31589948Simp#define EXCA_SYSMEM_ADDR2_STOP_LSB 0x22 31689948Simp#define EXCA_SYSMEM_ADDR2_STOP_MSB 0x23 31789948Simp 31889948Simp#define EXCA_CARDMEM_ADDR2_LSB 0x24 31989948Simp#define EXCA_CARDMEM_ADDR2_MSB 0x25 32089948Simp 32189948Simp/* #define EXCA_RESERVED 0x26 */ 32289948Simp/* #define EXCA_RESERVED 0x27 */ 32389948Simp 32489948Simp#define EXCA_SYSMEM_ADDR3_START_LSB 0x28 32589948Simp#define EXCA_SYSMEM_ADDR3_START_MSB 0x29 32689948Simp#define EXCA_SYSMEM_ADDR3_STOP_LSB 0x2A 32789948Simp#define EXCA_SYSMEM_ADDR3_STOP_MSB 0x2B 32889948Simp 32989948Simp#define EXCA_CARDMEM_ADDR3_LSB 0x2C 33089948Simp#define EXCA_CARDMEM_ADDR3_MSB 0x2D 33189948Simp 33289948Simp/* #define EXCA_RESERVED 0x2E */ 33389948Simp/* #define EXCA_RESERVED 0x2F */ 33489948Simp 33589948Simp#define EXCA_SYSMEM_ADDR4_START_LSB 0x30 33689948Simp#define EXCA_SYSMEM_ADDR4_START_MSB 0x31 33789948Simp#define EXCA_SYSMEM_ADDR4_STOP_LSB 0x32 33889948Simp#define EXCA_SYSMEM_ADDR4_STOP_MSB 0x33 33989948Simp 34089948Simp#define EXCA_CARDMEM_ADDR4_LSB 0x34 34189948Simp#define EXCA_CARDMEM_ADDR4_MSB 0x35 34289948Simp 34389948Simp/* #define EXCA_RESERVED 0x36 */ 34489948Simp/* #define EXCA_RESERVED 0x37 */ 34589948Simp/* #define EXCA_RESERVED 0x38 */ 34689948Simp/* #define EXCA_RESERVED 0x39 */ 34789948Simp/* #define EXCA_RESERVED 0x3A */ 34889948Simp/* #define EXCA_RESERVED 0x3B */ 34989948Simp/* #define EXCA_RESERVED 0x3C */ 35089948Simp/* #define EXCA_RESERVED 0x3D */ 35189948Simp/* #define EXCA_RESERVED 0x3E */ 35289948Simp/* #define EXCA_RESERVED 0x3F */ 35389948Simp 35489948Simp/* cardbus extensions - memory window page registers */ 35589948Simp 35689948Simp#define EXCA_MEMREG_WIN_SHIFT 24 35789948Simp#define EXCA_SYSMEM_ADDR0_WIN 0x40 35889948Simp#define EXCA_SYSMEM_ADDR1_WIN 0x41 35989948Simp#define EXCA_SYSMEM_ADDR2_WIN 0x42 36089948Simp#define EXCA_SYSMEM_ADDR3_WIN 0x43 36189948Simp#define EXCA_SYSMEM_ADDR4_WIN 0x44 36289948Simp 36389948Simp/* vendor-specific registers */ 36489948Simp 36589948Simp#define EXCA_INTEL_GLOBAL_CTL 0x1E /* RW */ 36689948Simp#define EXCA_INTEL_GLOBAL_CTL_RESERVED 0xF0 36789948Simp#define EXCA_INTEL_GLOBAL_CTL_IRQ14PULSE_ENABLE 0x08 36889948Simp#define EXCA_INTEL_GLOBAL_CTL_EXPLICIT_CSC_ACK 0x04 36989948Simp#define EXCA_INTEL_GLOBAL_CTL_IRQLEVEL_ENABLE 0x02 37089948Simp#define EXCA_INTEL_GLOBAL_CTL_POWERDOWN 0x01 37189948Simp 37289948Simp#define EXCA_CIRRUS_MISC_CTL_2 0x1E 37389948Simp#define EXCA_CIRRUS_MISC_CTL_2_SUSPEND 0x04 37489948Simp 37589948Simp#define EXCA_CIRRUS_CHIP_INFO 0x1F 37689948Simp#define EXCA_CIRRUS_CHIP_INFO_CHIP_ID 0xC0 37789948Simp#define EXCA_CIRRUS_CHIP_INFO_SLOTS 0x20 37889948Simp#define EXCA_CIRRUS_CHIP_INFO_REV 0x1F 37989948Simp 38089948Simp#define EXCA_CIRRUS_EXTENDED_INDEX 0x2E 38189948Simp#define EXCA_CIRRUS_EXTENDED_DATA 0x2F 38289948Simp#define EXCA_CIRRUS_EXT_CONTROL_1 0x03 38389948Simp#define EXCA_CIRRUS_EXT_CONTROL_1_PCI_INTR_MASK 0x18 38489948Simp 38589948Simp/* Plug and play */ 38689948Simp#define EXCA_PNP_ACTIONTEC 0x1802A904 /* AEI0218 */ 38789948Simp#define EXCA_PNP_IBM3765 0x65374d24 /* IBM3765 */ 38889948Simp#define EXCA_PNP_82365 0x000ED041 /* PNP0E00 */ 38989948Simp#define EXCA_PNP_CL_PD6720 0x010ED041 /* PNP0E01 */ 39089948Simp#define EXCA_PNP_VLSI_82C146 0x020ED041 /* PNP0E02 */ 39189948Simp#define EXCA_PNP_82365_CARDBUS 0x030ED041 /* PNP0E03 */ 39289948Simp#define EXCA_PNP_SCM_SWAPBOX 0x69046d4c /* SMC0469 */ 39389948Simp 39489948Simp/* C-Bus PnP Definitions */ 39589948Simp#define EXCA_NEC_PC9801_102 0x9180a3b8 /* NEC8091 PC-9801-102 */ 39689948Simp#define EXCA_NEC_PC9821RA_E01 0x2181a3b8 /* NEC8121 PC-9821RA-E01 */ 39789948Simp 39889948Simp/* 39989948Simp * Mask of allowable interrupts. 40089948Simp * 40189948Simp * For IBM-AT machines, irqs 3, 4, 5, 7, 9, 10, 11, 12, 14, 15 are 40289948Simp * allowed. Nearly all IBM-AT machines with pcic cards or bridges 40389948Simp * wire these interrupts (or a subset thereof) to the corresponding 40489948Simp * pins on the ISA bus. Some older laptops are reported to not route 40589948Simp * all the interrupt pins to the bus because the designers knew that 40689948Simp * some would conflict with builtin devices. Older versions of Windows 40789948Simp * NT had a special device that would probe for conflicts early in the 40889948Simp * boot process and formulate a mapping table. Maybe we should do 40989948Simp * something similar. 41089948Simp * 41189948Simp * For NEC PC-98 machines, irq 3, 5, 6, 9, 10, 11, 12, 13 are allowed. 41289948Simp * These correspond to the C-BUS signals INT 0, 1, 2, 3, 41, 42, 5, 6 41389948Simp * respectively. 41489948Simp * 41589948Simp * Hiroshi TSUKADA-san writes in FreeBSD98-testers that CBUS INT 2 41689948Simp * (mapped to IRQ 6) is routed to the IRQ 7 pin of the pcic in pc98 41789948Simp * cbus add-in cards. He has confirmed this routing with a visual 41889948Simp * inspection of his card or a VOM. 41989948Simp */ 42089948Simp#ifdef PC98 42189948Simp#define EXCA_INT_MASK_ALLOWED 0x3E68 /* PC98 */ 42289948Simp#else 42389948Simp#define EXCA_INT_MASK_ALLOWED 0xDEB8 /* AT */ 42489948Simp#endif 425100703Simp 426100703Simp#endif /* !_SYS_DEV_EXCA_EXCAREG_H */ 427