midwayvar.h revision 92739
125603Skjc/* $NetBSD: midwayvar.h,v 1.10 1997/03/20 21:34:46 chuck Exp $ */ 225603Skjc 325603Skjc/* 425603Skjc * 525603Skjc * Copyright (c) 1996 Charles D. Cranor and Washington University. 625603Skjc * All rights reserved. 725603Skjc * 825603Skjc * Redistribution and use in source and binary forms, with or without 925603Skjc * modification, are permitted provided that the following conditions 1025603Skjc * are met: 1125603Skjc * 1. Redistributions of source code must retain the above copyright 1225603Skjc * notice, this list of conditions and the following disclaimer. 1325603Skjc * 2. Redistributions in binary form must reproduce the above copyright 1425603Skjc * notice, this list of conditions and the following disclaimer in the 1525603Skjc * documentation and/or other materials provided with the distribution. 1625603Skjc * 3. All advertising materials mentioning features or use of this software 1725603Skjc * must display the following acknowledgement: 1825603Skjc * This product includes software developed by Charles D. Cranor and 1925603Skjc * Washington University. 2025603Skjc * 4. The name of the author may not be used to endorse or promote products 2125603Skjc * derived from this software without specific prior written permission. 2225603Skjc * 2325603Skjc * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 2425603Skjc * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 2525603Skjc * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2625603Skjc * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2725603Skjc * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2825603Skjc * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2925603Skjc * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3025603Skjc * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3125603Skjc * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 3225603Skjc * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3368432Skjc * 3468432Skjc * $FreeBSD: head/sys/dev/en/midwayvar.h 92739 2002-03-20 02:08:01Z alfred $ 3525603Skjc */ 3625603Skjc 3725603Skjc/* 3825603Skjc * m i d w a y v a r . h 3925603Skjc * 4025603Skjc * we define the en_softc here so that bus specific modules can allocate 4125603Skjc * it as the first item in their softc. note that BSD-required 4225603Skjc * "struct device" is in the mid_softc! 4325603Skjc * 4425603Skjc * author: Chuck Cranor <chuck@ccrc.wustl.edu> 4525603Skjc */ 4625603Skjc 4725603Skjc/* 4825603Skjc * params needed to determine softc size 4925603Skjc */ 5025603Skjc 5125603Skjc#ifndef EN_NTX 5225603Skjc#define EN_NTX 8 /* number of tx bufs to use */ 5325603Skjc#endif 5425603Skjc#ifndef EN_TXSZ 5525603Skjc#define EN_TXSZ 32 /* trasmit buf size in KB */ 5625603Skjc#endif 5725603Skjc#ifndef EN_RXSZ 5825603Skjc#define EN_RXSZ 32 /* recv buf size in KB */ 5925603Skjc#endif 6025603Skjc#define EN_MAXNRX ((2048-(EN_NTX*EN_TXSZ))/EN_RXSZ) 6125603Skjc /* largest possible NRX (depends on RAM size) */ 6225603Skjc 6325603Skjc 6425603Skjc#if defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__) 6525603Skjc#define EN_INTR_TYPE int 6625603Skjc#define EN_INTR_RET(X) return(X) 6725603Skjc#if defined(__NetBSD__) || defined(__OpenBSD__) 6825603Skjc#define EN_IOCTL_CMDT u_long 6925603Skjc#elif defined(__bsdi__) 7025603Skjc#define EN_IOCTL_CMDT int 7125603Skjc#endif 7225603Skjc 7325603Skjc#elif defined(__FreeBSD__) 7425603Skjc 7525603Skjc#define EN_INTR_TYPE void 7625603Skjc#define EN_INTR_RET(X) return 7736735Sdfr#define EN_IOCTL_CMDT u_long 7825603Skjc 7925603Skjcstruct device { 8025603Skjc char dv_xname[IFNAMSIZ]; 8125603Skjc}; 8225603Skjc 8325603Skjc#define DV_IFNET 1 8425603Skjc 8525603Skjc#endif 8625603Skjc 8725603Skjc/* 8825603Skjc * softc 8925603Skjc */ 9025603Skjc 9125603Skjcstruct en_softc { 9225603Skjc /* bsd glue */ 9325603Skjc struct device sc_dev; /* system device */ 9425603Skjc struct ifnet enif; /* network ifnet handle */ 9525603Skjc 9625603Skjc /* bus glue */ 9725603Skjc bus_space_tag_t en_memt; /* for EN_READ/EN_WRITE */ 9825603Skjc bus_space_handle_t en_base; /* base of en card */ 9925603Skjc bus_size_t en_obmemsz; /* size of en card (bytes) */ 10092739Salfred void (*en_busreset)(void *); 10125603Skjc /* bus specific reset function */ 10225603Skjc 10325603Skjc /* serv list */ 10425603Skjc u_int32_t hwslistp; /* hw pointer to service list (byte offset) */ 10525603Skjc u_int16_t swslist[MID_SL_N]; /* software service list (see en_service()) */ 10625603Skjc u_int16_t swsl_head, /* ends of swslist (index into swslist) */ 10725603Skjc swsl_tail; 10825603Skjc u_int32_t swsl_size; /* # of items in swsl */ 10925603Skjc 11025603Skjc 11125603Skjc /* xmit dma */ 11225603Skjc u_int32_t dtq[MID_DTQ_N]; /* sw copy of dma q (see ENIDQ macros) */ 11325603Skjc u_int32_t dtq_free; /* # of dtq's free */ 11425603Skjc u_int32_t dtq_us; /* software copy of our pointer (byte offset) */ 11525603Skjc u_int32_t dtq_chip; /* chip's pointer (byte offset) */ 11625603Skjc u_int32_t need_dtqs; /* true if we ran out of DTQs */ 11725603Skjc 11825603Skjc /* recv dma */ 11925603Skjc u_int32_t drq[MID_DRQ_N]; /* sw copy of dma q (see ENIDQ macros) */ 12025603Skjc u_int32_t drq_free; /* # of drq's free */ 12125603Skjc u_int32_t drq_us; /* software copy of our pointer (byte offset) */ 12225603Skjc u_int32_t drq_chip; /* chip's pointer (byte offset) */ 12325603Skjc u_int32_t need_drqs; /* true if we ran out of DRQs */ 12425603Skjc 12525603Skjc /* xmit buf ctrl. (per channel) */ 12625603Skjc struct { 12725603Skjc u_int32_t mbsize; /* # mbuf bytes we are using (max=TXHIWAT) */ 12825603Skjc u_int32_t bfree; /* # free bytes in buffer (not dma or xmit) */ 12925603Skjc u_int32_t start, stop; /* ends of buffer area (byte offset) */ 13025603Skjc u_int32_t cur; /* next free area (byte offset) */ 13125603Skjc u_int32_t nref; /* # of VCs using this channel */ 13225603Skjc struct ifqueue indma; /* mbufs being dma'd now */ 13325603Skjc struct ifqueue q; /* mbufs waiting for dma now */ 13425603Skjc } txslot[MID_NTX_CH]; 13525603Skjc 13625603Skjc /* xmit vc ctrl. (per vc) */ 13725603Skjc u_int8_t txspeed[MID_N_VC]; /* speed of tx on a VC */ 13825603Skjc u_int8_t txvc2slot[MID_N_VC]; /* map VC to slot */ 13925603Skjc 14025603Skjc /* recv vc ctrl. (per vc). maps VC number to recv slot */ 14125603Skjc u_int16_t rxvc2slot[MID_N_VC]; 14225603Skjc int en_nrx; /* # of active rx slots */ 14325603Skjc 14425603Skjc /* recv buf ctrl. (per recv slot) */ 14525603Skjc struct { 14625603Skjc void *rxhand; /* recv. handle if doing direct delivery */ 14725603Skjc u_int32_t mode; /* saved copy of mode info */ 14825603Skjc u_int32_t start, stop; /* ends of my buffer area */ 14925603Skjc u_int32_t cur; /* where I am at */ 15025603Skjc u_int16_t atm_vci; /* backpointer to VCI */ 15125603Skjc u_int8_t atm_flags; /* copy of atm_flags from atm_ph */ 15225603Skjc u_int8_t oth_flags; /* other flags */ 15325603Skjc u_int32_t raw_threshold; /* for raw mode */ 15425603Skjc struct ifqueue indma; /* mbufs being dma'd now */ 15525603Skjc struct ifqueue q; /* mbufs waiting for dma now */ 15625603Skjc } rxslot[EN_MAXNRX]; /* recv info */ 15725603Skjc 15837939Skjc u_int8_t macaddr[6]; /* card unique mac address */ 15937939Skjc 16025603Skjc /* stats */ 16125603Skjc u_int32_t vtrash; /* sw copy of counter */ 16225603Skjc u_int32_t otrash; /* sw copy of counter */ 16325603Skjc u_int32_t ttrash; /* # of RBD's with T bit set */ 16425603Skjc u_int32_t mfix; /* # of times we had to call mfix */ 16525603Skjc u_int32_t mfixfail; /* # of times mfix failed */ 16625603Skjc u_int32_t headbyte; /* # of times we used BYTE DMA at front */ 16725603Skjc u_int32_t tailbyte; /* # of times we used BYTE DMA at end */ 16825603Skjc u_int32_t tailflush; /* # of times we had to FLUSH out DMA bytes */ 16925603Skjc u_int32_t txmbovr; /* # of times we dropped due to mbsize */ 17025603Skjc u_int32_t dmaovr; /* tx dma overflow count */ 17125603Skjc u_int32_t txoutspace; /* out of space in xmit buffer */ 17225603Skjc u_int32_t txdtqout; /* out of DTQs */ 17325603Skjc u_int32_t launch; /* total # of launches */ 17425603Skjc u_int32_t lheader; /* # of launches without OB header */ 17525603Skjc u_int32_t ltail; /* # of launches without OB tail */ 17625603Skjc u_int32_t hwpull; /* # of pulls off hardware service list */ 17725603Skjc u_int32_t swadd; /* # of pushes on sw service list */ 17825603Skjc u_int32_t rxqnotus; /* # of times we pull from rx q, but fail */ 17925603Skjc u_int32_t rxqus; /* # of good pulls from rx q */ 18025603Skjc u_int32_t rxoutboth; /* # of times out of mbufs and DRQs */ 18125603Skjc u_int32_t rxdrqout; /* # of times out of DRQs */ 18225603Skjc u_int32_t rxmbufout; /* # of time out of mbufs */ 18325603Skjc 18425603Skjc /* random stuff */ 18525603Skjc u_int32_t ipl; /* sbus interrupt lvl (1 on pci?) */ 18625603Skjc u_int8_t bestburstcode; /* code of best burst we can use */ 18725603Skjc u_int8_t bestburstlen; /* length of best burst (bytes) */ 18825603Skjc u_int8_t bestburstshift; /* (x >> shift) == (x / bestburstlen) */ 18925603Skjc u_int8_t bestburstmask; /* bits to check if not multiple of burst */ 19025603Skjc u_int8_t alburst; /* align dma bursts? */ 19125603Skjc u_int8_t is_adaptec; /* adaptec version of midway? */ 19225603Skjc}; 19325603Skjc 19425603Skjc/* 19525603Skjc * exported functions 19625603Skjc */ 19725603Skjc 19892739Salfredvoid en_attach(struct en_softc *); 19992739SalfredEN_INTR_TYPE en_intr(void *); 20092739Salfredvoid en_reset(struct en_softc *); 201