125603Skjc/*	$NetBSD: midwayvar.h,v 1.10 1997/03/20 21:34:46 chuck Exp $	*/
225603Skjc
3139749Simp/*-
425603Skjc * Copyright (c) 1996 Charles D. Cranor and Washington University.
525603Skjc * All rights reserved.
625603Skjc *
725603Skjc * Redistribution and use in source and binary forms, with or without
825603Skjc * modification, are permitted provided that the following conditions
925603Skjc * are met:
1025603Skjc * 1. Redistributions of source code must retain the above copyright
1125603Skjc *    notice, this list of conditions and the following disclaimer.
1225603Skjc * 2. Redistributions in binary form must reproduce the above copyright
1325603Skjc *    notice, this list of conditions and the following disclaimer in the
1425603Skjc *    documentation and/or other materials provided with the distribution.
1525603Skjc * 3. All advertising materials mentioning features or use of this software
1625603Skjc *    must display the following acknowledgement:
1725603Skjc *      This product includes software developed by Charles D. Cranor and
1825603Skjc *	Washington University.
1925603Skjc * 4. The name of the author may not be used to endorse or promote products
2025603Skjc *    derived from this software without specific prior written permission.
2125603Skjc *
2225603Skjc * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
2325603Skjc * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
2425603Skjc * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
2525603Skjc * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2625603Skjc * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2725603Skjc * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2825603Skjc * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2925603Skjc * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3025603Skjc * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3125603Skjc * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3268432Skjc *
3368432Skjc * $FreeBSD$
3425603Skjc */
3525603Skjc
3625603Skjc/*
3725603Skjc * m i d w a y v a r . h
3825603Skjc *
3925603Skjc * we define the en_softc here so that bus specific modules can allocate
40114018Sharti * it as the first item in their softc.
4125603Skjc *
4225603Skjc * author: Chuck Cranor <chuck@ccrc.wustl.edu>
4325603Skjc */
4425603Skjc
4525603Skjc/*
4625603Skjc * params needed to determine softc size
4725603Skjc */
4825603Skjc#ifndef EN_NTX
4925603Skjc#define EN_NTX          8       /* number of tx bufs to use */
5025603Skjc#endif
5125603Skjc#ifndef EN_TXSZ
5225603Skjc#define EN_TXSZ         32      /* trasmit buf size in KB */
5325603Skjc#endif
5425603Skjc#ifndef EN_RXSZ
5525603Skjc#define EN_RXSZ         32      /* recv buf size in KB */
5625603Skjc#endif
5725603Skjc
58114018Sharti/* largest possible NRX (depends on RAM size) */
59114018Sharti#define EN_MAXNRX       ((2048 - (EN_NTX * EN_TXSZ)) / EN_RXSZ)
6025603Skjc
61114018Sharti#ifndef EN_MAX_DMASEG
62114018Sharti#define EN_MAX_DMASEG	32
6325603Skjc#endif
6425603Skjc
65114018Sharti/* number of bytes to use in the first receive buffer. This must not be larger
66114018Sharti * than MHLEN, should be a multiple of 64 and must be a multiple of 4. */
67114018Sharti#define EN_RX1BUF	128
6825603Skjc
69114018Sharti/*
70114018Sharti * Structure to hold DMA maps. These are handle via a typestable uma zone.
71114018Sharti */
72114018Shartistruct en_map {
73114018Sharti	uintptr_t	flags;		/* map flags */
74114018Sharti	struct en_map	*rsvd2;		/* see uma_zalloc(9) */
75114018Sharti	struct en_softc	*sc;		/* back pointer */
76114018Sharti	bus_dmamap_t	map;		/* the map */
77114018Sharti};
78114018Sharti#define ENMAP_LOADED	0x02
79114018Sharti#define ENMAP_ALLOC	0x01
8025603Skjc
81114018Sharti#define EN_MAX_MAPS	400
82114018Sharti
83114018Sharti/*
84114018Sharti * Statistics
85114018Sharti */
86114018Shartistruct en_stats {
87114018Sharti	uint32_t vtrash;	/* sw copy of counter */
88114018Sharti	uint32_t otrash;	/* sw copy of counter */
89114018Sharti	uint32_t ttrash;	/* # of RBD's with T bit set */
90114018Sharti	uint32_t mfixaddr;	/* # of times we had to mfix an address */
91114018Sharti	uint32_t mfixlen;	/* # of times we had to mfix a lenght*/
92114018Sharti	uint32_t mfixfail;	/* # of times mfix failed */
93114018Sharti	uint32_t txmbovr;	/* # of times we dropped due to mbsize */
94114018Sharti	uint32_t dmaovr;	/* tx dma overflow count */
95114018Sharti	uint32_t txoutspace;	/* out of space in xmit buffer */
96114018Sharti	uint32_t txdtqout;	/* out of DTQs */
97114018Sharti	uint32_t launch;	/* total # of launches */
98114018Sharti	uint32_t hwpull;	/* # of pulls off hardware service list */
99114018Sharti	uint32_t swadd;		/* # of pushes on sw service list */
100114018Sharti	uint32_t rxqnotus;	/* # of times we pull from rx q, but fail */
101114018Sharti	uint32_t rxqus;		/* # of good pulls from rx q */
102114018Sharti	uint32_t rxdrqout;	/* # of times out of DRQs */
103114018Sharti	uint32_t rxmbufout;	/* # of time out of mbufs */
104114018Sharti	uint32_t txnomap;	/* out of DMA maps in TX */
10525603Skjc};
10625603Skjc
107114018Sharti/*
108114018Sharti * Each of these structures describes one of the eight transmit channels
109114018Sharti */
110114018Shartistruct en_txslot {
111114018Sharti	uint32_t	mbsize;		/* # mbuf bytes in use (max=TXHIWAT) */
112114018Sharti	uint32_t	bfree;		/* # free bytes in buffer */
113114018Sharti	uint32_t	start;		/* start of buffer area (byte offset) */
114114018Sharti	uint32_t	stop;		/* ends of buffer area (byte offset) */
115114018Sharti	uint32_t	cur;		/* next free area (byte offset) */
116114018Sharti	uint32_t	nref;		/* # of VCs using this channel */
117114018Sharti	struct ifqueue	q;		/* mbufs waiting for DMA now */
118114018Sharti	struct ifqueue	indma;		/* mbufs waiting for DMA now */
119114018Sharti};
12025603Skjc
121114018Sharti/*
122114018Sharti * Each of these structures is used for each of the receive buffers on the
123114018Sharti * card.
124114018Sharti */
125114018Shartistruct en_rxslot {
126114018Sharti	uint32_t	mode;		/* saved copy of mode info */
127114018Sharti	uint32_t	start;		/* begin of my buffer area */
128114018Sharti	uint32_t	stop;		/* end of my buffer area */
129114018Sharti	uint32_t	cur;		/* where I am at in the buffer */
130118487Sharti	struct en_vcc	*vcc;		/* backpointer to VCI */
131114018Sharti	struct ifqueue	q;		/* mbufs waiting for dma now */
132114018Sharti	struct ifqueue	indma;		/* mbufs being dma'd now */
133114018Sharti};
13425603Skjc
135118487Shartistruct en_vcc {
136118487Sharti	struct atmio_vcc vcc;		/* required by common code */
137118487Sharti	void		*rxhand;
138118607Sjhb	u_int		vflags;
139118487Sharti	uint32_t	ipackets;
140118487Sharti	uint32_t	opackets;
141118487Sharti	uint32_t	ibytes;
142118487Sharti	uint32_t	obytes;
143118487Sharti
144118487Sharti	uint8_t		txspeed;
145118487Sharti	struct en_txslot *txslot;	/* transmit slot */
146118487Sharti	struct en_rxslot *rxslot;	/* receive slot */
147118487Sharti};
148118487Sharti#define	VCC_DRAIN	0x0001		/* closed, but draining rx */
149118487Sharti#define	VCC_SWSL	0x0002		/* on rx software service list */
150118494Sharti#define	VCC_CLOSE_RX	0x0004		/* currently closing */
151118487Sharti
15225603Skjc/*
15325603Skjc * softc
15425603Skjc */
15525603Skjcstruct en_softc {
156147256Sbrooks	struct ifnet	*ifp;
157114018Sharti	device_t dev;
15825603Skjc
159114018Sharti	/* bus glue */
160114018Sharti	bus_space_tag_t en_memt;	/* for EN_READ/EN_WRITE */
161114018Sharti	bus_space_handle_t en_base;	/* base of en card */
162114018Sharti	bus_size_t en_obmemsz;		/* size of en card (bytes) */
163114018Sharti	void (*en_busreset)(void *);	/* bus specific reset function */
164114018Sharti	bus_dma_tag_t txtag;		/* TX DMA tag */
16525603Skjc
166114018Sharti	/* serv list */
167114018Sharti	uint32_t hwslistp;	/* hw pointer to service list (byte offset) */
168114018Sharti	uint16_t swslist[MID_SL_N]; /* software svc list (see en_service()) */
169114018Sharti	uint16_t swsl_head; 	/* ends of swslist (index into swslist) */
170114018Sharti	uint16_t swsl_tail;
171114018Sharti	uint32_t swsl_size;	/* # of items in swsl */
17225603Skjc
173114018Sharti	/* xmit dma */
174114018Sharti	uint32_t dtq[MID_DTQ_N];/* sw copy of dma q (see EN_DQ_MK macros) */
175114018Sharti	uint32_t dtq_free;	/* # of dtq's free */
176114018Sharti	uint32_t dtq_us;	/* software copy of our pointer (byte offset) */
177114018Sharti	uint32_t dtq_chip;	/* chip's pointer (byte offset) */
178114018Sharti	uint32_t need_dtqs;	/* true if we ran out of DTQs */
17925603Skjc
180114018Sharti	/* recv dma */
181114018Sharti	uint32_t drq[MID_DRQ_N];/* sw copy of dma q (see ENIDQ macros) */
182114018Sharti	uint32_t drq_free;	/* # of drq's free */
183114018Sharti	uint32_t drq_us;	/* software copy of our pointer (byte offset) */
184114018Sharti	uint32_t drq_chip;	/* chip's pointer (byte offset) */
185114018Sharti	uint32_t need_drqs;	/* true if we ran out of DRQs */
18625603Skjc
187114018Sharti	/* xmit buf ctrl. (per channel) */
188114018Sharti	struct en_txslot txslot[MID_NTX_CH];
18925603Skjc
190114018Sharti	/* recv buf ctrl. (per recv slot) */
191114018Sharti	struct en_rxslot rxslot[EN_MAXNRX];
192118487Sharti	int en_nrx;			/* # of active rx slots */
19325603Skjc
194118487Sharti	/* vccs */
195118487Sharti	struct en_vcc **vccs;
196118487Sharti	u_int vccs_open;
197118494Sharti	struct cv cv_close;		/* close CV */
198118487Sharti
199114018Sharti	/* stats */
200114018Sharti	struct en_stats stats;
20137939Skjc
202114018Sharti	/* random stuff */
203114018Sharti	uint32_t ipl;		/* sbus interrupt lvl (1 on pci?) */
204114018Sharti	uint8_t bestburstcode;	/* code of best burst we can use */
205114018Sharti	uint8_t bestburstlen;	/* length of best burst (bytes) */
206114018Sharti	uint8_t bestburstshift;	/* (x >> shift) == (x / bestburstlen) */
207114018Sharti	uint8_t bestburstmask;	/* bits to check if not multiple of burst */
208114018Sharti	uint8_t alburst;	/* align dma bursts? */
209114018Sharti	uint8_t noalbursts;	/* don't use unaligned > 4 byte bursts */
210114018Sharti	uint8_t is_adaptec;	/* adaptec version of midway? */
211114018Sharti	struct mbuf *padbuf;	/* buffer of zeros for TX padding */
21225603Skjc
213114018Sharti	/* mutex to protect this structure and the associated hardware */
214114018Sharti	struct mtx en_mtx;
215114018Sharti
216114018Sharti	/* sysctl support */
217114018Sharti	struct sysctl_ctx_list sysctl_ctx;
218114018Sharti	struct sysctl_oid *sysctl_tree;
219114018Sharti
220114018Sharti	/* memory zones */
221114018Sharti	uma_zone_t map_zone;
222114018Sharti
223116294Sharti	/* media and phy */
224116294Sharti	struct ifmedia media;
225116294Sharti	struct utopia utopia;
226116294Sharti
227114018Sharti#ifdef EN_DEBUG
228114018Sharti	/* debugging */
229114018Sharti	u_int debug;
230114018Sharti#endif
23125603Skjc};
23225603Skjc
23325603Skjc/*
23425603Skjc * exported functions
23525603Skjc */
236114018Shartiint	en_attach(struct en_softc *);
237114018Shartivoid	en_destroy(struct en_softc *);
238114018Shartivoid	en_intr(void *);
23992739Salfredvoid	en_reset(struct en_softc *);
240118487Shartiint	en_modevent(module_t, int, void *arg);
241