1235783Skib/*
2235783Skib * Copyright �� 1997-2003 by The XFree86 Project, Inc.
3235783Skib * Copyright �� 2007 Dave Airlie
4235783Skib * Copyright �� 2007-2008 Intel Corporation
5235783Skib *   Jesse Barnes <jesse.barnes@intel.com>
6235783Skib * Copyright 2005-2006 Luc Verhaegen
7235783Skib * Copyright (c) 2001, Andy Ritger  aritger@nvidia.com
8235783Skib *
9235783Skib * Permission is hereby granted, free of charge, to any person obtaining a
10235783Skib * copy of this software and associated documentation files (the "Software"),
11235783Skib * to deal in the Software without restriction, including without limitation
12235783Skib * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13235783Skib * and/or sell copies of the Software, and to permit persons to whom the
14235783Skib * Software is furnished to do so, subject to the following conditions:
15235783Skib *
16235783Skib * The above copyright notice and this permission notice shall be included in
17235783Skib * all copies or substantial portions of the Software.
18235783Skib *
19235783Skib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20235783Skib * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21235783Skib * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22235783Skib * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23235783Skib * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24235783Skib * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25235783Skib * OTHER DEALINGS IN THE SOFTWARE.
26235783Skib *
27235783Skib * Except as contained in this notice, the name of the copyright holder(s)
28235783Skib * and author(s) shall not be used in advertising or otherwise to promote
29235783Skib * the sale, use or other dealings in this Software without prior written
30235783Skib * authorization from the copyright holder(s) and author(s).
31235783Skib */
32235783Skib
33235783Skib#include <sys/cdefs.h>
34235783Skib__FBSDID("$FreeBSD$");
35235783Skib
36235783Skib#include <dev/drm2/drmP.h>
37235783Skib#include <dev/drm2/drm_crtc.h>
38235783Skib
39235783Skib/**
40235783Skib * drm_mode_debug_printmodeline - debug print a mode
41235783Skib * @dev: DRM device
42235783Skib * @mode: mode to print
43235783Skib *
44235783Skib * LOCKING:
45235783Skib * None.
46235783Skib *
47235783Skib * Describe @mode using DRM_DEBUG.
48235783Skib */
49282199Sdumbbellvoid drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
50235783Skib{
51235783Skib	DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
52235783Skib			"0x%x 0x%x\n",
53235783Skib		mode->base.id, mode->name, mode->vrefresh, mode->clock,
54235783Skib		mode->hdisplay, mode->hsync_start,
55235783Skib		mode->hsync_end, mode->htotal,
56235783Skib		mode->vdisplay, mode->vsync_start,
57235783Skib		mode->vsync_end, mode->vtotal, mode->type, mode->flags);
58235783Skib}
59282199SdumbbellEXPORT_SYMBOL(drm_mode_debug_printmodeline);
60235783Skib
61235783Skib/**
62235783Skib * drm_cvt_mode -create a modeline based on CVT algorithm
63235783Skib * @dev: DRM device
64235783Skib * @hdisplay: hdisplay size
65235783Skib * @vdisplay: vdisplay size
66235783Skib * @vrefresh  : vrefresh rate
67235783Skib * @reduced : Whether the GTF calculation is simplified
68235783Skib * @interlaced:Whether the interlace is supported
69235783Skib *
70235783Skib * LOCKING:
71235783Skib * none.
72235783Skib *
73235783Skib * return the modeline based on CVT algorithm
74235783Skib *
75235783Skib * This function is called to generate the modeline based on CVT algorithm
76235783Skib * according to the hdisplay, vdisplay, vrefresh.
77235783Skib * It is based from the VESA(TM) Coordinated Video Timing Generator by
78235783Skib * Graham Loveridge April 9, 2003 available at
79235783Skib * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
80235783Skib *
81235783Skib * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
82235783Skib * What I have done is to translate it by using integer calculation.
83235783Skib */
84235783Skib#define HV_FACTOR			1000
85235783Skibstruct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
86235783Skib				      int vdisplay, int vrefresh,
87235783Skib				      bool reduced, bool interlaced, bool margins)
88235783Skib{
89235783Skib	/* 1) top/bottom margin size (% of height) - default: 1.8, */
90235783Skib#define	CVT_MARGIN_PERCENTAGE		18
91235783Skib	/* 2) character cell horizontal granularity (pixels) - default 8 */
92235783Skib#define	CVT_H_GRANULARITY		8
93235783Skib	/* 3) Minimum vertical porch (lines) - default 3 */
94235783Skib#define	CVT_MIN_V_PORCH			3
95235783Skib	/* 4) Minimum number of vertical back porch lines - default 6 */
96235783Skib#define	CVT_MIN_V_BPORCH		6
97235783Skib	/* Pixel Clock step (kHz) */
98235783Skib#define CVT_CLOCK_STEP			250
99235783Skib	struct drm_display_mode *drm_mode;
100235783Skib	unsigned int vfieldrate, hperiod;
101235783Skib	int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
102235783Skib	int interlace;
103235783Skib
104235783Skib	/* allocate the drm_display_mode structure. If failure, we will
105235783Skib	 * return directly
106235783Skib	 */
107235783Skib	drm_mode = drm_mode_create(dev);
108235783Skib	if (!drm_mode)
109235783Skib		return NULL;
110235783Skib
111235783Skib	/* the CVT default refresh rate is 60Hz */
112235783Skib	if (!vrefresh)
113235783Skib		vrefresh = 60;
114235783Skib
115235783Skib	/* the required field fresh rate */
116235783Skib	if (interlaced)
117235783Skib		vfieldrate = vrefresh * 2;
118235783Skib	else
119235783Skib		vfieldrate = vrefresh;
120235783Skib
121235783Skib	/* horizontal pixels */
122235783Skib	hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
123235783Skib
124235783Skib	/* determine the left&right borders */
125235783Skib	hmargin = 0;
126235783Skib	if (margins) {
127235783Skib		hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
128235783Skib		hmargin -= hmargin % CVT_H_GRANULARITY;
129235783Skib	}
130235783Skib	/* find the total active pixels */
131235783Skib	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
132235783Skib
133235783Skib	/* find the number of lines per field */
134235783Skib	if (interlaced)
135235783Skib		vdisplay_rnd = vdisplay / 2;
136235783Skib	else
137235783Skib		vdisplay_rnd = vdisplay;
138235783Skib
139235783Skib	/* find the top & bottom borders */
140235783Skib	vmargin = 0;
141235783Skib	if (margins)
142235783Skib		vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
143235783Skib
144235783Skib	drm_mode->vdisplay = vdisplay + 2 * vmargin;
145235783Skib
146235783Skib	/* Interlaced */
147235783Skib	if (interlaced)
148235783Skib		interlace = 1;
149235783Skib	else
150235783Skib		interlace = 0;
151235783Skib
152235783Skib	/* Determine VSync Width from aspect ratio */
153235783Skib	if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
154235783Skib		vsync = 4;
155235783Skib	else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
156235783Skib		vsync = 5;
157235783Skib	else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
158235783Skib		vsync = 6;
159235783Skib	else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
160235783Skib		vsync = 7;
161235783Skib	else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
162235783Skib		vsync = 7;
163235783Skib	else /* custom */
164235783Skib		vsync = 10;
165235783Skib
166235783Skib	if (!reduced) {
167235783Skib		/* simplify the GTF calculation */
168235783Skib		/* 4) Minimum time of vertical sync + back porch interval (��s)
169235783Skib		 * default 550.0
170235783Skib		 */
171235783Skib		int tmp1, tmp2;
172235783Skib#define CVT_MIN_VSYNC_BP	550
173235783Skib		/* 3) Nominal HSync width (% of line period) - default 8 */
174235783Skib#define CVT_HSYNC_PERCENTAGE	8
175235783Skib		unsigned int hblank_percentage;
176235783Skib		int vsyncandback_porch, vback_porch, hblank;
177235783Skib
178235783Skib		/* estimated the horizontal period */
179235783Skib		tmp1 = HV_FACTOR * 1000000  -
180235783Skib				CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
181235783Skib		tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
182235783Skib				interlace;
183235783Skib		hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
184235783Skib
185235783Skib		tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
186235783Skib		/* 9. Find number of lines in sync + backporch */
187235783Skib		if (tmp1 < (vsync + CVT_MIN_V_PORCH))
188235783Skib			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
189235783Skib		else
190235783Skib			vsyncandback_porch = tmp1;
191235783Skib		/* 10. Find number of lines in back porch */
192235783Skib		vback_porch = vsyncandback_porch - vsync;
193235783Skib		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
194235783Skib				vsyncandback_porch + CVT_MIN_V_PORCH;
195235783Skib		/* 5) Definition of Horizontal blanking time limitation */
196235783Skib		/* Gradient (%/kHz) - default 600 */
197235783Skib#define CVT_M_FACTOR	600
198235783Skib		/* Offset (%) - default 40 */
199235783Skib#define CVT_C_FACTOR	40
200235783Skib		/* Blanking time scaling factor - default 128 */
201235783Skib#define CVT_K_FACTOR	128
202235783Skib		/* Scaling factor weighting - default 20 */
203235783Skib#define CVT_J_FACTOR	20
204235783Skib#define CVT_M_PRIME	(CVT_M_FACTOR * CVT_K_FACTOR / 256)
205235783Skib#define CVT_C_PRIME	((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
206235783Skib			 CVT_J_FACTOR)
207235783Skib		/* 12. Find ideal blanking duty cycle from formula */
208235783Skib		hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
209235783Skib					hperiod / 1000;
210235783Skib		/* 13. Blanking time */
211235783Skib		if (hblank_percentage < 20 * HV_FACTOR)
212235783Skib			hblank_percentage = 20 * HV_FACTOR;
213235783Skib		hblank = drm_mode->hdisplay * hblank_percentage /
214235783Skib			 (100 * HV_FACTOR - hblank_percentage);
215235783Skib		hblank -= hblank % (2 * CVT_H_GRANULARITY);
216235783Skib		/* 14. find the total pixes per line */
217235783Skib		drm_mode->htotal = drm_mode->hdisplay + hblank;
218235783Skib		drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
219235783Skib		drm_mode->hsync_start = drm_mode->hsync_end -
220235783Skib			(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
221235783Skib		drm_mode->hsync_start += CVT_H_GRANULARITY -
222235783Skib			drm_mode->hsync_start % CVT_H_GRANULARITY;
223235783Skib		/* fill the Vsync values */
224235783Skib		drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
225235783Skib		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
226235783Skib	} else {
227235783Skib		/* Reduced blanking */
228235783Skib		/* Minimum vertical blanking interval time (��s)- default 460 */
229235783Skib#define CVT_RB_MIN_VBLANK	460
230235783Skib		/* Fixed number of clocks for horizontal sync */
231235783Skib#define CVT_RB_H_SYNC		32
232235783Skib		/* Fixed number of clocks for horizontal blanking */
233235783Skib#define CVT_RB_H_BLANK		160
234235783Skib		/* Fixed number of lines for vertical front porch - default 3*/
235235783Skib#define CVT_RB_VFPORCH		3
236235783Skib		int vbilines;
237235783Skib		int tmp1, tmp2;
238235783Skib		/* 8. Estimate Horizontal period. */
239235783Skib		tmp1 = HV_FACTOR * 1000000 -
240235783Skib			CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
241235783Skib		tmp2 = vdisplay_rnd + 2 * vmargin;
242235783Skib		hperiod = tmp1 / (tmp2 * vfieldrate);
243235783Skib		/* 9. Find number of lines in vertical blanking */
244235783Skib		vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
245235783Skib		/* 10. Check if vertical blanking is sufficient */
246235783Skib		if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
247235783Skib			vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
248235783Skib		/* 11. Find total number of lines in vertical field */
249235783Skib		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
250235783Skib		/* 12. Find total number of pixels in a line */
251235783Skib		drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
252235783Skib		/* Fill in HSync values */
253235783Skib		drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
254235783Skib		drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
255235783Skib		/* Fill in VSync values */
256235783Skib		drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
257235783Skib		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
258235783Skib	}
259235783Skib	/* 15/13. Find pixel clock frequency (kHz for xf86) */
260235783Skib	drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
261235783Skib	drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
262235783Skib	/* 18/16. Find actual vertical frame frequency */
263235783Skib	/* ignore - just set the mode flag for interlaced */
264235783Skib	if (interlaced) {
265235783Skib		drm_mode->vtotal *= 2;
266235783Skib		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
267235783Skib	}
268235783Skib	/* Fill the mode line name */
269235783Skib	drm_mode_set_name(drm_mode);
270235783Skib	if (reduced)
271235783Skib		drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
272235783Skib					DRM_MODE_FLAG_NVSYNC);
273235783Skib	else
274235783Skib		drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
275235783Skib					DRM_MODE_FLAG_NHSYNC);
276235783Skib
277235783Skib	return drm_mode;
278235783Skib}
279282199SdumbbellEXPORT_SYMBOL(drm_cvt_mode);
280235783Skib
281235783Skib/**
282235783Skib * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
283235783Skib *
284235783Skib * @dev		:drm device
285235783Skib * @hdisplay	:hdisplay size
286235783Skib * @vdisplay	:vdisplay size
287235783Skib * @vrefresh	:vrefresh rate.
288235783Skib * @interlaced	:whether the interlace is supported
289235783Skib * @margins	:desired margin size
290235783Skib * @GTF_[MCKJ]  :extended GTF formula parameters
291235783Skib *
292235783Skib * LOCKING.
293235783Skib * none.
294235783Skib *
295235783Skib * return the modeline based on full GTF algorithm.
296235783Skib *
297235783Skib * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
298235783Skib * in here multiplied by two.  For a C of 40, pass in 80.
299235783Skib */
300235783Skibstruct drm_display_mode *
301235783Skibdrm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
302235783Skib		     int vrefresh, bool interlaced, int margins,
303235783Skib		     int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
304235783Skib{	/* 1) top/bottom margin size (% of height) - default: 1.8, */
305235783Skib#define	GTF_MARGIN_PERCENTAGE		18
306235783Skib	/* 2) character cell horizontal granularity (pixels) - default 8 */
307235783Skib#define	GTF_CELL_GRAN			8
308235783Skib	/* 3) Minimum vertical porch (lines) - default 3 */
309235783Skib#define	GTF_MIN_V_PORCH			1
310235783Skib	/* width of vsync in lines */
311235783Skib#define V_SYNC_RQD			3
312235783Skib	/* width of hsync as % of total line */
313235783Skib#define H_SYNC_PERCENT			8
314235783Skib	/* min time of vsync + back porch (microsec) */
315235783Skib#define MIN_VSYNC_PLUS_BP		550
316235783Skib	/* C' and M' are part of the Blanking Duty Cycle computation */
317235783Skib#define GTF_C_PRIME	((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
318235783Skib#define GTF_M_PRIME	(GTF_K * GTF_M / 256)
319235783Skib	struct drm_display_mode *drm_mode;
320235783Skib	unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
321235783Skib	int top_margin, bottom_margin;
322235783Skib	int interlace;
323235783Skib	unsigned int hfreq_est;
324235783Skib	int vsync_plus_bp, vback_porch;
325235783Skib	unsigned int vtotal_lines, vfieldrate_est, hperiod;
326235783Skib	unsigned int vfield_rate, vframe_rate;
327235783Skib	int left_margin, right_margin;
328235783Skib	unsigned int total_active_pixels, ideal_duty_cycle;
329235783Skib	unsigned int hblank, total_pixels, pixel_freq;
330235783Skib	int hsync, hfront_porch, vodd_front_porch_lines;
331235783Skib	unsigned int tmp1, tmp2;
332235783Skib
333235783Skib	drm_mode = drm_mode_create(dev);
334235783Skib	if (!drm_mode)
335235783Skib		return NULL;
336235783Skib
337235783Skib	/* 1. In order to give correct results, the number of horizontal
338235783Skib	 * pixels requested is first processed to ensure that it is divisible
339235783Skib	 * by the character size, by rounding it to the nearest character
340235783Skib	 * cell boundary:
341235783Skib	 */
342235783Skib	hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
343235783Skib	hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
344235783Skib
345235783Skib	/* 2. If interlace is requested, the number of vertical lines assumed
346235783Skib	 * by the calculation must be halved, as the computation calculates
347235783Skib	 * the number of vertical lines per field.
348235783Skib	 */
349235783Skib	if (interlaced)
350235783Skib		vdisplay_rnd = vdisplay / 2;
351235783Skib	else
352235783Skib		vdisplay_rnd = vdisplay;
353235783Skib
354235783Skib	/* 3. Find the frame rate required: */
355235783Skib	if (interlaced)
356235783Skib		vfieldrate_rqd = vrefresh * 2;
357235783Skib	else
358235783Skib		vfieldrate_rqd = vrefresh;
359235783Skib
360235783Skib	/* 4. Find number of lines in Top margin: */
361235783Skib	top_margin = 0;
362235783Skib	if (margins)
363235783Skib		top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
364235783Skib				1000;
365235783Skib	/* 5. Find number of lines in bottom margin: */
366235783Skib	bottom_margin = top_margin;
367235783Skib
368235783Skib	/* 6. If interlace is required, then set variable interlace: */
369235783Skib	if (interlaced)
370235783Skib		interlace = 1;
371235783Skib	else
372235783Skib		interlace = 0;
373235783Skib
374235783Skib	/* 7. Estimate the Horizontal frequency */
375235783Skib	{
376235783Skib		tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
377235783Skib		tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
378235783Skib				2 + interlace;
379235783Skib		hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
380235783Skib	}
381235783Skib
382235783Skib	/* 8. Find the number of lines in V sync + back porch */
383235783Skib	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
384235783Skib	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
385235783Skib	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
386235783Skib	/*  9. Find the number of lines in V back porch alone: */
387235783Skib	vback_porch = vsync_plus_bp - V_SYNC_RQD;
388235783Skib	/*  10. Find the total number of lines in Vertical field period: */
389235783Skib	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
390235783Skib			vsync_plus_bp + GTF_MIN_V_PORCH;
391235783Skib	/*  11. Estimate the Vertical field frequency: */
392235783Skib	vfieldrate_est = hfreq_est / vtotal_lines;
393235783Skib	/*  12. Find the actual horizontal period: */
394235783Skib	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
395235783Skib
396235783Skib	/*  13. Find the actual Vertical field frequency: */
397235783Skib	vfield_rate = hfreq_est / vtotal_lines;
398235783Skib	/*  14. Find the Vertical frame frequency: */
399235783Skib	if (interlaced)
400235783Skib		vframe_rate = vfield_rate / 2;
401235783Skib	else
402235783Skib		vframe_rate = vfield_rate;
403235783Skib	/*  15. Find number of pixels in left margin: */
404235783Skib	if (margins)
405235783Skib		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
406235783Skib				1000;
407235783Skib	else
408235783Skib		left_margin = 0;
409235783Skib
410235783Skib	/* 16.Find number of pixels in right margin: */
411235783Skib	right_margin = left_margin;
412235783Skib	/* 17.Find total number of active pixels in image and left and right */
413235783Skib	total_active_pixels = hdisplay_rnd + left_margin + right_margin;
414235783Skib	/* 18.Find the ideal blanking duty cycle from blanking duty cycle */
415235783Skib	ideal_duty_cycle = GTF_C_PRIME * 1000 -
416235783Skib				(GTF_M_PRIME * 1000000 / hfreq_est);
417235783Skib	/* 19.Find the number of pixels in the blanking time to the nearest
418235783Skib	 * double character cell: */
419235783Skib	hblank = total_active_pixels * ideal_duty_cycle /
420235783Skib			(100000 - ideal_duty_cycle);
421235783Skib	hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
422235783Skib	hblank = hblank * 2 * GTF_CELL_GRAN;
423235783Skib	/* 20.Find total number of pixels: */
424235783Skib	total_pixels = total_active_pixels + hblank;
425235783Skib	/* 21.Find pixel clock frequency: */
426235783Skib	pixel_freq = total_pixels * hfreq_est / 1000;
427235783Skib	/* Stage 1 computations are now complete; I should really pass
428235783Skib	 * the results to another function and do the Stage 2 computations,
429235783Skib	 * but I only need a few more values so I'll just append the
430235783Skib	 * computations here for now */
431235783Skib	/* 17. Find the number of pixels in the horizontal sync period: */
432235783Skib	hsync = H_SYNC_PERCENT * total_pixels / 100;
433235783Skib	hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
434235783Skib	hsync = hsync * GTF_CELL_GRAN;
435235783Skib	/* 18. Find the number of pixels in horizontal front porch period */
436235783Skib	hfront_porch = hblank / 2 - hsync;
437235783Skib	/*  36. Find the number of lines in the odd front porch period: */
438235783Skib	vodd_front_porch_lines = GTF_MIN_V_PORCH ;
439235783Skib
440235783Skib	/* finally, pack the results in the mode struct */
441235783Skib	drm_mode->hdisplay = hdisplay_rnd;
442235783Skib	drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
443235783Skib	drm_mode->hsync_end = drm_mode->hsync_start + hsync;
444235783Skib	drm_mode->htotal = total_pixels;
445235783Skib	drm_mode->vdisplay = vdisplay_rnd;
446235783Skib	drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
447235783Skib	drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
448235783Skib	drm_mode->vtotal = vtotal_lines;
449235783Skib
450235783Skib	drm_mode->clock = pixel_freq;
451235783Skib
452235783Skib	if (interlaced) {
453235783Skib		drm_mode->vtotal *= 2;
454235783Skib		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
455235783Skib	}
456235783Skib
457235783Skib	drm_mode_set_name(drm_mode);
458235783Skib	if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
459235783Skib		drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
460235783Skib	else
461235783Skib		drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
462235783Skib
463235783Skib	return drm_mode;
464235783Skib}
465282199SdumbbellEXPORT_SYMBOL(drm_gtf_mode_complex);
466235783Skib
467235783Skib/**
468235783Skib * drm_gtf_mode - create the modeline based on GTF algorithm
469235783Skib *
470235783Skib * @dev		:drm device
471235783Skib * @hdisplay	:hdisplay size
472235783Skib * @vdisplay	:vdisplay size
473235783Skib * @vrefresh	:vrefresh rate.
474235783Skib * @interlaced	:whether the interlace is supported
475235783Skib * @margins	:whether the margin is supported
476235783Skib *
477235783Skib * LOCKING.
478235783Skib * none.
479235783Skib *
480235783Skib * return the modeline based on GTF algorithm
481235783Skib *
482235783Skib * This function is to create the modeline based on the GTF algorithm.
483235783Skib * Generalized Timing Formula is derived from:
484235783Skib *	GTF Spreadsheet by Andy Morrish (1/5/97)
485235783Skib *	available at http://www.vesa.org
486235783Skib *
487235783Skib * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
488235783Skib * What I have done is to translate it by using integer calculation.
489235783Skib * I also refer to the function of fb_get_mode in the file of
490235783Skib * drivers/video/fbmon.c
491235783Skib *
492235783Skib * Standard GTF parameters:
493235783Skib * M = 600
494235783Skib * C = 40
495235783Skib * K = 128
496235783Skib * J = 20
497235783Skib */
498235783Skibstruct drm_display_mode *
499235783Skibdrm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
500235783Skib	     bool lace, int margins)
501235783Skib{
502235783Skib	return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
503235783Skib				    margins, 600, 40 * 2, 128, 20 * 2);
504235783Skib}
505282199SdumbbellEXPORT_SYMBOL(drm_gtf_mode);
506235783Skib
507235783Skib/**
508235783Skib * drm_mode_set_name - set the name on a mode
509235783Skib * @mode: name will be set in this mode
510235783Skib *
511235783Skib * LOCKING:
512235783Skib * None.
513235783Skib *
514235783Skib * Set the name of @mode to a standard format.
515235783Skib */
516235783Skibvoid drm_mode_set_name(struct drm_display_mode *mode)
517235783Skib{
518235783Skib	bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
519235783Skib
520235783Skib	snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
521235783Skib		 mode->hdisplay, mode->vdisplay,
522235783Skib		 interlaced ? "i" : "");
523235783Skib}
524282199SdumbbellEXPORT_SYMBOL(drm_mode_set_name);
525235783Skib
526235783Skib/**
527235783Skib * drm_mode_list_concat - move modes from one list to another
528235783Skib * @head: source list
529235783Skib * @new: dst list
530235783Skib *
531235783Skib * LOCKING:
532235783Skib * Caller must ensure both lists are locked.
533235783Skib *
534235783Skib * Move all the modes from @head to @new.
535235783Skib */
536235783Skibvoid drm_mode_list_concat(struct list_head *head, struct list_head *new)
537235783Skib{
538235783Skib
539235783Skib	struct list_head *entry, *tmp;
540235783Skib
541235783Skib	list_for_each_safe(entry, tmp, head) {
542235783Skib		list_move_tail(entry, new);
543235783Skib	}
544235783Skib}
545282199SdumbbellEXPORT_SYMBOL(drm_mode_list_concat);
546235783Skib
547235783Skib/**
548235783Skib * drm_mode_width - get the width of a mode
549235783Skib * @mode: mode
550235783Skib *
551235783Skib * LOCKING:
552235783Skib * None.
553235783Skib *
554235783Skib * Return @mode's width (hdisplay) value.
555235783Skib *
556235783Skib * FIXME: is this needed?
557235783Skib *
558235783Skib * RETURNS:
559235783Skib * @mode->hdisplay
560235783Skib */
561282199Sdumbbellint drm_mode_width(const struct drm_display_mode *mode)
562235783Skib{
563235783Skib	return mode->hdisplay;
564235783Skib
565235783Skib}
566282199SdumbbellEXPORT_SYMBOL(drm_mode_width);
567235783Skib
568235783Skib/**
569235783Skib * drm_mode_height - get the height of a mode
570235783Skib * @mode: mode
571235783Skib *
572235783Skib * LOCKING:
573235783Skib * None.
574235783Skib *
575235783Skib * Return @mode's height (vdisplay) value.
576235783Skib *
577235783Skib * FIXME: is this needed?
578235783Skib *
579235783Skib * RETURNS:
580235783Skib * @mode->vdisplay
581235783Skib */
582282199Sdumbbellint drm_mode_height(const struct drm_display_mode *mode)
583235783Skib{
584235783Skib	return mode->vdisplay;
585235783Skib}
586282199SdumbbellEXPORT_SYMBOL(drm_mode_height);
587235783Skib
588235783Skib/** drm_mode_hsync - get the hsync of a mode
589235783Skib * @mode: mode
590235783Skib *
591235783Skib * LOCKING:
592235783Skib * None.
593235783Skib *
594235783Skib * Return @modes's hsync rate in kHz, rounded to the nearest int.
595235783Skib */
596235783Skibint drm_mode_hsync(const struct drm_display_mode *mode)
597235783Skib{
598235783Skib	unsigned int calc_val;
599235783Skib
600235783Skib	if (mode->hsync)
601235783Skib		return mode->hsync;
602235783Skib
603235783Skib	if (mode->htotal < 0)
604235783Skib		return 0;
605235783Skib
606235783Skib	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
607235783Skib	calc_val += 500;				/* round to 1000Hz */
608235783Skib	calc_val /= 1000;				/* truncate to kHz */
609235783Skib
610235783Skib	return calc_val;
611235783Skib}
612282199SdumbbellEXPORT_SYMBOL(drm_mode_hsync);
613235783Skib
614235783Skib/**
615235783Skib * drm_mode_vrefresh - get the vrefresh of a mode
616235783Skib * @mode: mode
617235783Skib *
618235783Skib * LOCKING:
619235783Skib * None.
620235783Skib *
621235783Skib * Return @mode's vrefresh rate in Hz or calculate it if necessary.
622235783Skib *
623235783Skib * FIXME: why is this needed?  shouldn't vrefresh be set already?
624235783Skib *
625235783Skib * RETURNS:
626235783Skib * Vertical refresh rate. It will be the result of actual value plus 0.5.
627235783Skib * If it is 70.288, it will return 70Hz.
628235783Skib * If it is 59.6, it will return 60Hz.
629235783Skib */
630235783Skibint drm_mode_vrefresh(const struct drm_display_mode *mode)
631235783Skib{
632235783Skib	int refresh = 0;
633235783Skib	unsigned int calc_val;
634235783Skib
635235783Skib	if (mode->vrefresh > 0)
636235783Skib		refresh = mode->vrefresh;
637235783Skib	else if (mode->htotal > 0 && mode->vtotal > 0) {
638235783Skib		int vtotal;
639235783Skib		vtotal = mode->vtotal;
640235783Skib		/* work out vrefresh the value will be x1000 */
641235783Skib		calc_val = (mode->clock * 1000);
642235783Skib		calc_val /= mode->htotal;
643235783Skib		refresh = (calc_val + vtotal / 2) / vtotal;
644235783Skib
645235783Skib		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
646235783Skib			refresh *= 2;
647235783Skib		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
648235783Skib			refresh /= 2;
649235783Skib		if (mode->vscan > 1)
650235783Skib			refresh /= mode->vscan;
651235783Skib	}
652235783Skib	return refresh;
653235783Skib}
654282199SdumbbellEXPORT_SYMBOL(drm_mode_vrefresh);
655235783Skib
656235783Skib/**
657235783Skib * drm_mode_set_crtcinfo - set CRTC modesetting parameters
658235783Skib * @p: mode
659235783Skib * @adjust_flags: unused? (FIXME)
660235783Skib *
661235783Skib * LOCKING:
662235783Skib * None.
663235783Skib *
664235783Skib * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
665235783Skib */
666235783Skibvoid drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
667235783Skib{
668235783Skib	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
669235783Skib		return;
670235783Skib
671235783Skib	p->crtc_hdisplay = p->hdisplay;
672235783Skib	p->crtc_hsync_start = p->hsync_start;
673235783Skib	p->crtc_hsync_end = p->hsync_end;
674235783Skib	p->crtc_htotal = p->htotal;
675235783Skib	p->crtc_hskew = p->hskew;
676235783Skib	p->crtc_vdisplay = p->vdisplay;
677235783Skib	p->crtc_vsync_start = p->vsync_start;
678235783Skib	p->crtc_vsync_end = p->vsync_end;
679235783Skib	p->crtc_vtotal = p->vtotal;
680235783Skib
681235783Skib	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
682235783Skib		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
683235783Skib			p->crtc_vdisplay /= 2;
684235783Skib			p->crtc_vsync_start /= 2;
685235783Skib			p->crtc_vsync_end /= 2;
686235783Skib			p->crtc_vtotal /= 2;
687235783Skib		}
688235783Skib	}
689235783Skib
690235783Skib	if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
691235783Skib		p->crtc_vdisplay *= 2;
692235783Skib		p->crtc_vsync_start *= 2;
693235783Skib		p->crtc_vsync_end *= 2;
694235783Skib		p->crtc_vtotal *= 2;
695235783Skib	}
696235783Skib
697235783Skib	if (p->vscan > 1) {
698235783Skib		p->crtc_vdisplay *= p->vscan;
699235783Skib		p->crtc_vsync_start *= p->vscan;
700235783Skib		p->crtc_vsync_end *= p->vscan;
701235783Skib		p->crtc_vtotal *= p->vscan;
702235783Skib	}
703235783Skib
704235783Skib	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
705235783Skib	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
706235783Skib	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
707235783Skib	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
708235783Skib}
709282199SdumbbellEXPORT_SYMBOL(drm_mode_set_crtcinfo);
710235783Skib
711235783Skib
712235783Skib/**
713282199Sdumbbell * drm_mode_copy - copy the mode
714282199Sdumbbell * @dst: mode to overwrite
715282199Sdumbbell * @src: mode to copy
716282199Sdumbbell *
717282199Sdumbbell * LOCKING:
718282199Sdumbbell * None.
719282199Sdumbbell *
720282199Sdumbbell * Copy an existing mode into another mode, preserving the object id
721282199Sdumbbell * of the destination mode.
722282199Sdumbbell */
723282199Sdumbbellvoid drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
724282199Sdumbbell{
725282199Sdumbbell	int id = dst->base.id;
726282199Sdumbbell
727282199Sdumbbell	*dst = *src;
728282199Sdumbbell	dst->base.id = id;
729282199Sdumbbell	INIT_LIST_HEAD(&dst->head);
730282199Sdumbbell}
731282199SdumbbellEXPORT_SYMBOL(drm_mode_copy);
732282199Sdumbbell
733282199Sdumbbell/**
734235783Skib * drm_mode_duplicate - allocate and duplicate an existing mode
735235783Skib * @m: mode to duplicate
736235783Skib *
737235783Skib * LOCKING:
738235783Skib * None.
739235783Skib *
740235783Skib * Just allocate a new mode, copy the existing mode into it, and return
741235783Skib * a pointer to it.  Used to create new instances of established modes.
742235783Skib */
743235783Skibstruct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
744235783Skib					    const struct drm_display_mode *mode)
745235783Skib{
746235783Skib	struct drm_display_mode *nmode;
747235783Skib
748235783Skib	nmode = drm_mode_create(dev);
749235783Skib	if (!nmode)
750235783Skib		return NULL;
751235783Skib
752282199Sdumbbell	drm_mode_copy(nmode, mode);
753282199Sdumbbell
754235783Skib	return nmode;
755235783Skib}
756282199SdumbbellEXPORT_SYMBOL(drm_mode_duplicate);
757235783Skib
758235783Skib/**
759235783Skib * drm_mode_equal - test modes for equality
760235783Skib * @mode1: first mode
761235783Skib * @mode2: second mode
762235783Skib *
763235783Skib * LOCKING:
764235783Skib * None.
765235783Skib *
766235783Skib * Check to see if @mode1 and @mode2 are equivalent.
767235783Skib *
768235783Skib * RETURNS:
769282199Sdumbbell * True if the modes are equal, false otherwise.
770235783Skib */
771282199Sdumbbellbool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
772235783Skib{
773235783Skib	/* do clock check convert to PICOS so fb modes get matched
774235783Skib	 * the same */
775235783Skib	if (mode1->clock && mode2->clock) {
776235783Skib		if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
777235783Skib			return false;
778235783Skib	} else if (mode1->clock != mode2->clock)
779235783Skib		return false;
780235783Skib
781235783Skib	if (mode1->hdisplay == mode2->hdisplay &&
782235783Skib	    mode1->hsync_start == mode2->hsync_start &&
783235783Skib	    mode1->hsync_end == mode2->hsync_end &&
784235783Skib	    mode1->htotal == mode2->htotal &&
785235783Skib	    mode1->hskew == mode2->hskew &&
786235783Skib	    mode1->vdisplay == mode2->vdisplay &&
787235783Skib	    mode1->vsync_start == mode2->vsync_start &&
788235783Skib	    mode1->vsync_end == mode2->vsync_end &&
789235783Skib	    mode1->vtotal == mode2->vtotal &&
790235783Skib	    mode1->vscan == mode2->vscan &&
791235783Skib	    mode1->flags == mode2->flags)
792235783Skib		return true;
793235783Skib
794235783Skib	return false;
795235783Skib}
796282199SdumbbellEXPORT_SYMBOL(drm_mode_equal);
797235783Skib
798235783Skib/**
799235783Skib * drm_mode_validate_size - make sure modes adhere to size constraints
800235783Skib * @dev: DRM device
801235783Skib * @mode_list: list of modes to check
802235783Skib * @maxX: maximum width
803235783Skib * @maxY: maximum height
804235783Skib * @maxPitch: max pitch
805235783Skib *
806235783Skib * LOCKING:
807235783Skib * Caller must hold a lock protecting @mode_list.
808235783Skib *
809235783Skib * The DRM device (@dev) has size and pitch limits.  Here we validate the
810235783Skib * modes we probed for @dev against those limits and set their status as
811235783Skib * necessary.
812235783Skib */
813235783Skibvoid drm_mode_validate_size(struct drm_device *dev,
814235783Skib			    struct list_head *mode_list,
815235783Skib			    int maxX, int maxY, int maxPitch)
816235783Skib{
817235783Skib	struct drm_display_mode *mode;
818235783Skib
819235783Skib	list_for_each_entry(mode, mode_list, head) {
820235783Skib		if (maxPitch > 0 && mode->hdisplay > maxPitch)
821235783Skib			mode->status = MODE_BAD_WIDTH;
822235783Skib
823235783Skib		if (maxX > 0 && mode->hdisplay > maxX)
824235783Skib			mode->status = MODE_VIRTUAL_X;
825235783Skib
826235783Skib		if (maxY > 0 && mode->vdisplay > maxY)
827235783Skib			mode->status = MODE_VIRTUAL_Y;
828235783Skib	}
829235783Skib}
830282199SdumbbellEXPORT_SYMBOL(drm_mode_validate_size);
831235783Skib
832235783Skib/**
833235783Skib * drm_mode_validate_clocks - validate modes against clock limits
834235783Skib * @dev: DRM device
835235783Skib * @mode_list: list of modes to check
836235783Skib * @min: minimum clock rate array
837235783Skib * @max: maximum clock rate array
838235783Skib * @n_ranges: number of clock ranges (size of arrays)
839235783Skib *
840235783Skib * LOCKING:
841235783Skib * Caller must hold a lock protecting @mode_list.
842235783Skib *
843235783Skib * Some code may need to check a mode list against the clock limits of the
844235783Skib * device in question.  This function walks the mode list, testing to make
845235783Skib * sure each mode falls within a given range (defined by @min and @max
846235783Skib * arrays) and sets @mode->status as needed.
847235783Skib */
848235783Skibvoid drm_mode_validate_clocks(struct drm_device *dev,
849235783Skib			      struct list_head *mode_list,
850235783Skib			      int *min, int *max, int n_ranges)
851235783Skib{
852235783Skib	struct drm_display_mode *mode;
853235783Skib	int i;
854235783Skib
855235783Skib	list_for_each_entry(mode, mode_list, head) {
856235783Skib		bool good = false;
857235783Skib		for (i = 0; i < n_ranges; i++) {
858235783Skib			if (mode->clock >= min[i] && mode->clock <= max[i]) {
859235783Skib				good = true;
860235783Skib				break;
861235783Skib			}
862235783Skib		}
863235783Skib		if (!good)
864235783Skib			mode->status = MODE_CLOCK_RANGE;
865235783Skib	}
866235783Skib}
867282199SdumbbellEXPORT_SYMBOL(drm_mode_validate_clocks);
868235783Skib
869235783Skib/**
870235783Skib * drm_mode_prune_invalid - remove invalid modes from mode list
871235783Skib * @dev: DRM device
872235783Skib * @mode_list: list of modes to check
873235783Skib * @verbose: be verbose about it
874235783Skib *
875235783Skib * LOCKING:
876235783Skib * Caller must hold a lock protecting @mode_list.
877235783Skib *
878235783Skib * Once mode list generation is complete, a caller can use this routine to
879235783Skib * remove invalid modes from a mode list.  If any of the modes have a
880235783Skib * status other than %MODE_OK, they are removed from @mode_list and freed.
881235783Skib */
882235783Skibvoid drm_mode_prune_invalid(struct drm_device *dev,
883235783Skib			    struct list_head *mode_list, bool verbose)
884235783Skib{
885235783Skib	struct drm_display_mode *mode, *t;
886235783Skib
887235783Skib	list_for_each_entry_safe(mode, t, mode_list, head) {
888235783Skib		if (mode->status != MODE_OK) {
889235783Skib			list_del(&mode->head);
890235783Skib			if (verbose) {
891235783Skib				drm_mode_debug_printmodeline(mode);
892235783Skib				DRM_DEBUG_KMS("Not using %s mode %d\n",
893235783Skib					mode->name, mode->status);
894235783Skib			}
895235783Skib			drm_mode_destroy(dev, mode);
896235783Skib		}
897235783Skib	}
898235783Skib}
899282199SdumbbellEXPORT_SYMBOL(drm_mode_prune_invalid);
900235783Skib
901235783Skib/**
902235783Skib * drm_mode_compare - compare modes for favorability
903235783Skib * @priv: unused
904235783Skib * @lh_a: list_head for first mode
905235783Skib * @lh_b: list_head for second mode
906235783Skib *
907235783Skib * LOCKING:
908235783Skib * None.
909235783Skib *
910235783Skib * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
911235783Skib * which is better.
912235783Skib *
913235783Skib * RETURNS:
914235783Skib * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
915235783Skib * positive if @lh_b is better than @lh_a.
916235783Skib */
917235783Skibstatic int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
918235783Skib{
919235783Skib	struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
920235783Skib	struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
921235783Skib	int diff;
922235783Skib
923235783Skib	diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
924235783Skib		((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
925235783Skib	if (diff)
926235783Skib		return diff;
927235783Skib	diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
928235783Skib	if (diff)
929235783Skib		return diff;
930282199Sdumbbell
931282199Sdumbbell	diff = b->vrefresh - a->vrefresh;
932282199Sdumbbell	if (diff)
933282199Sdumbbell		return diff;
934282199Sdumbbell
935235783Skib	diff = b->clock - a->clock;
936235783Skib	return diff;
937235783Skib}
938235783Skib
939235783Skib/**
940235783Skib * drm_mode_sort - sort mode list
941235783Skib * @mode_list: list to sort
942235783Skib *
943235783Skib * LOCKING:
944235783Skib * Caller must hold a lock protecting @mode_list.
945235783Skib *
946235783Skib * Sort @mode_list by favorability, putting good modes first.
947235783Skib */
948235783Skibvoid drm_mode_sort(struct list_head *mode_list)
949235783Skib{
950235783Skib	drm_list_sort(NULL, mode_list, drm_mode_compare);
951235783Skib}
952282199SdumbbellEXPORT_SYMBOL(drm_mode_sort);
953235783Skib
954235783Skib/**
955235783Skib * drm_mode_connector_list_update - update the mode list for the connector
956235783Skib * @connector: the connector to update
957235783Skib *
958235783Skib * LOCKING:
959235783Skib * Caller must hold a lock protecting @mode_list.
960235783Skib *
961235783Skib * This moves the modes from the @connector probed_modes list
962235783Skib * to the actual mode list. It compares the probed mode against the current
963235783Skib * list and only adds different modes. All modes unverified after this point
964235783Skib * will be removed by the prune invalid modes.
965235783Skib */
966235783Skibvoid drm_mode_connector_list_update(struct drm_connector *connector)
967235783Skib{
968235783Skib	struct drm_display_mode *mode;
969235783Skib	struct drm_display_mode *pmode, *pt;
970235783Skib	int found_it;
971235783Skib
972235783Skib	list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
973235783Skib				 head) {
974235783Skib		found_it = 0;
975235783Skib		/* go through current modes checking for the new probed mode */
976235783Skib		list_for_each_entry(mode, &connector->modes, head) {
977235783Skib			if (drm_mode_equal(pmode, mode)) {
978235783Skib				found_it = 1;
979235783Skib				/* if equal delete the probed mode */
980235783Skib				mode->status = pmode->status;
981235783Skib				/* Merge type bits together */
982235783Skib				mode->type |= pmode->type;
983235783Skib				list_del(&pmode->head);
984235783Skib				drm_mode_destroy(connector->dev, pmode);
985235783Skib				break;
986235783Skib			}
987235783Skib		}
988235783Skib
989235783Skib		if (!found_it) {
990235783Skib			list_move_tail(&pmode->head, &connector->modes);
991235783Skib		}
992235783Skib	}
993235783Skib}
994282199SdumbbellEXPORT_SYMBOL(drm_mode_connector_list_update);
995235783Skib
996235783Skib/**
997235783Skib * drm_mode_parse_command_line_for_connector - parse command line for connector
998235783Skib * @mode_option - per connector mode option
999235783Skib * @connector - connector to parse line for
1000235783Skib *
1001235783Skib * This parses the connector specific then generic command lines for
1002235783Skib * modes and options to configure the connector.
1003235783Skib *
1004235783Skib * This uses the same parameters as the fb modedb.c, except for extra
1005235783Skib *	<xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1006235783Skib *
1007235783Skib * enable/enable Digital/disable bit at the end
1008235783Skib */
1009235783Skibbool drm_mode_parse_command_line_for_connector(const char *mode_option,
1010235783Skib					       struct drm_connector *connector,
1011235783Skib					       struct drm_cmdline_mode *mode)
1012235783Skib{
1013235783Skib	const char *name;
1014235783Skib	unsigned int namelen;
1015235783Skib	bool res_specified = false, bpp_specified = false, refresh_specified = false;
1016235783Skib	unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1017235783Skib	bool yres_specified = false, cvt = false, rb = false;
1018235783Skib	bool interlace = false, margins = false, was_digit = false;
1019235783Skib	int i;
1020235783Skib	enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1021235783Skib
1022282199Sdumbbell#ifdef CONFIG_FB
1023235783Skib	if (!mode_option)
1024235783Skib		mode_option = fb_mode_option;
1025235783Skib#endif
1026235783Skib
1027235783Skib	if (!mode_option) {
1028235783Skib		mode->specified = false;
1029235783Skib		return false;
1030235783Skib	}
1031235783Skib
1032235783Skib	name = mode_option;
1033235783Skib	namelen = strlen(name);
1034235783Skib	for (i = namelen-1; i >= 0; i--) {
1035235783Skib		switch (name[i]) {
1036235783Skib		case '@':
1037235783Skib			if (!refresh_specified && !bpp_specified &&
1038235783Skib			    !yres_specified && !cvt && !rb && was_digit) {
1039282199Sdumbbell				refresh = simple_strtol(&name[i+1], NULL, 10);
1040235783Skib				refresh_specified = true;
1041235783Skib				was_digit = false;
1042235783Skib			} else
1043235783Skib				goto done;
1044235783Skib			break;
1045235783Skib		case '-':
1046235783Skib			if (!bpp_specified && !yres_specified && !cvt &&
1047235783Skib			    !rb && was_digit) {
1048282199Sdumbbell				bpp = simple_strtol(&name[i+1], NULL, 10);
1049235783Skib				bpp_specified = true;
1050235783Skib				was_digit = false;
1051235783Skib			} else
1052235783Skib				goto done;
1053235783Skib			break;
1054235783Skib		case 'x':
1055235783Skib			if (!yres_specified && was_digit) {
1056282199Sdumbbell				yres = simple_strtol(&name[i+1], NULL, 10);
1057235783Skib				yres_specified = true;
1058235783Skib				was_digit = false;
1059235783Skib			} else
1060235783Skib				goto done;
1061235783Skib		case '0' ... '9':
1062235783Skib			was_digit = true;
1063235783Skib			break;
1064235783Skib		case 'M':
1065235783Skib			if (yres_specified || cvt || was_digit)
1066235783Skib				goto done;
1067235783Skib			cvt = true;
1068235783Skib			break;
1069235783Skib		case 'R':
1070235783Skib			if (yres_specified || cvt || rb || was_digit)
1071235783Skib				goto done;
1072235783Skib			rb = true;
1073235783Skib			break;
1074235783Skib		case 'm':
1075235783Skib			if (cvt || yres_specified || was_digit)
1076235783Skib				goto done;
1077235783Skib			margins = true;
1078235783Skib			break;
1079235783Skib		case 'i':
1080235783Skib			if (cvt || yres_specified || was_digit)
1081235783Skib				goto done;
1082235783Skib			interlace = true;
1083235783Skib			break;
1084235783Skib		case 'e':
1085235783Skib			if (yres_specified || bpp_specified || refresh_specified ||
1086235783Skib			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1087235783Skib				goto done;
1088235783Skib
1089235783Skib			force = DRM_FORCE_ON;
1090235783Skib			break;
1091235783Skib		case 'D':
1092235783Skib			if (yres_specified || bpp_specified || refresh_specified ||
1093235783Skib			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1094235783Skib				goto done;
1095235783Skib
1096235783Skib			if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1097235783Skib			    (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1098235783Skib				force = DRM_FORCE_ON;
1099235783Skib			else
1100235783Skib				force = DRM_FORCE_ON_DIGITAL;
1101235783Skib			break;
1102235783Skib		case 'd':
1103235783Skib			if (yres_specified || bpp_specified || refresh_specified ||
1104235783Skib			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1105235783Skib				goto done;
1106235783Skib
1107235783Skib			force = DRM_FORCE_OFF;
1108235783Skib			break;
1109235783Skib		default:
1110235783Skib			goto done;
1111235783Skib		}
1112235783Skib	}
1113235783Skib
1114235783Skib	if (i < 0 && yres_specified) {
1115235783Skib		char *ch;
1116282199Sdumbbell		xres = simple_strtol(name, &ch, 10);
1117235783Skib		if ((ch != NULL) && (*ch == 'x'))
1118235783Skib			res_specified = true;
1119235783Skib		else
1120235783Skib			i = ch - name;
1121235783Skib	} else if (!yres_specified && was_digit) {
1122235783Skib		/* catch mode that begins with digits but has no 'x' */
1123235783Skib		i = 0;
1124235783Skib	}
1125235783Skibdone:
1126235783Skib	if (i >= 0) {
1127282199Sdumbbell		DRM_WARNING(
1128282199Sdumbbell			"parse error at position %i in video mode '%s'\n",
1129235783Skib			i, name);
1130235783Skib		mode->specified = false;
1131235783Skib		return false;
1132235783Skib	}
1133235783Skib
1134235783Skib	if (res_specified) {
1135235783Skib		mode->specified = true;
1136235783Skib		mode->xres = xres;
1137235783Skib		mode->yres = yres;
1138235783Skib	}
1139235783Skib
1140235783Skib	if (refresh_specified) {
1141235783Skib		mode->refresh_specified = true;
1142235783Skib		mode->refresh = refresh;
1143235783Skib	}
1144235783Skib
1145235783Skib	if (bpp_specified) {
1146235783Skib		mode->bpp_specified = true;
1147235783Skib		mode->bpp = bpp;
1148235783Skib	}
1149235783Skib	mode->rb = rb;
1150235783Skib	mode->cvt = cvt;
1151235783Skib	mode->interlace = interlace;
1152235783Skib	mode->margins = margins;
1153235783Skib	mode->force = force;
1154235783Skib
1155235783Skib	return true;
1156235783Skib}
1157282199SdumbbellEXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1158235783Skib
1159235783Skibstruct drm_display_mode *
1160235783Skibdrm_mode_create_from_cmdline_mode(struct drm_device *dev,
1161235783Skib				  struct drm_cmdline_mode *cmd)
1162235783Skib{
1163235783Skib	struct drm_display_mode *mode;
1164235783Skib
1165235783Skib	if (cmd->cvt)
1166235783Skib		mode = drm_cvt_mode(dev,
1167235783Skib				    cmd->xres, cmd->yres,
1168235783Skib				    cmd->refresh_specified ? cmd->refresh : 60,
1169235783Skib				    cmd->rb, cmd->interlace,
1170235783Skib				    cmd->margins);
1171235783Skib	else
1172235783Skib		mode = drm_gtf_mode(dev,
1173235783Skib				    cmd->xres, cmd->yres,
1174235783Skib				    cmd->refresh_specified ? cmd->refresh : 60,
1175235783Skib				    cmd->interlace,
1176235783Skib				    cmd->margins);
1177235783Skib	if (!mode)
1178235783Skib		return NULL;
1179235783Skib
1180235783Skib	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1181235783Skib	return mode;
1182235783Skib}
1183282199SdumbbellEXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
1184