ati_pcigart.c revision 282199 
1/**
2 * \file ati_pcigart.c
3 * ATI PCI GART support
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
10 *
11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
12 * All Rights Reserved.
13 *
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
20 *
21 * The above copyright notice and this permission notice (including the next
22 * paragraph) shall be included in all copies or substantial portions of the
23 * Software.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
26 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
27 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
28 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
29 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
30 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
31 * DEALINGS IN THE SOFTWARE.
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: stable/10/sys/dev/drm2/ati_pcigart.c 282199 2015-04-28 19:35:05Z dumbbell $");
36
37#include <dev/drm2/drmP.h>
38
39# define ATI_PCIGART_PAGE_SIZE		4096	/**< PCI GART page size */
40
41static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
42				       struct drm_ati_pcigart_info *gart_info)
43{
44	gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
45						PAGE_SIZE, BUS_SPACE_MAXADDR);
46	if (gart_info->table_handle == NULL)
47		return -ENOMEM;
48
49	return 0;
50}
51
52static void drm_ati_free_pcigart_table(struct drm_device *dev,
53				       struct drm_ati_pcigart_info *gart_info)
54{
55	drm_pci_free(dev, gart_info->table_handle);
56	gart_info->table_handle = NULL;
57}
58
59int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
60{
61	struct drm_sg_mem *entry = dev->sg;
62#ifdef __linux__
63	unsigned long pages;
64	int i;
65	int max_pages;
66#endif
67
68	/* we need to support large memory configurations */
69	if (!entry) {
70		DRM_ERROR("no scatter/gather memory!\n");
71		return 0;
72	}
73
74	if (gart_info->bus_addr) {
75#ifdef __linux__
76
77		max_pages = (gart_info->table_size / sizeof(u32));
78		pages = (entry->pages <= max_pages)
79		  ? entry->pages : max_pages;
80
81		for (i = 0; i < pages; i++) {
82			if (!entry->busaddr[i])
83				break;
84			pci_unmap_page(dev->pdev, entry->busaddr[i],
85					 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
86		}
87#endif
88
89		if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
90			gart_info->bus_addr = 0;
91	}
92
93	if (gart_info->gart_table_location == DRM_ATI_GART_MAIN &&
94	    gart_info->table_handle) {
95		drm_ati_free_pcigart_table(dev, gart_info);
96	}
97
98	return 1;
99}
100EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
101
102int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
103{
104	struct drm_local_map *map = &gart_info->mapping;
105	struct drm_sg_mem *entry = dev->sg;
106	void *address = NULL;
107	unsigned long pages;
108	u32 *pci_gart = NULL, page_base, gart_idx;
109	dma_addr_t bus_address = 0;
110	int i, j, ret = 0;
111	int max_ati_pages, max_real_pages;
112
113	if (!entry) {
114		DRM_ERROR("no scatter/gather memory!\n");
115		goto done;
116	}
117
118	if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
119		DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
120
121#ifdef __linux__
122		if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) {
123			DRM_ERROR("fail to set dma mask to 0x%Lx\n",
124				  (unsigned long long)gart_info->table_mask);
125			ret = 1;
126			goto done;
127		}
128#endif
129
130		ret = drm_ati_alloc_pcigart_table(dev, gart_info);
131		if (ret) {
132			DRM_ERROR("cannot allocate PCI GART page!\n");
133			goto done;
134		}
135
136		pci_gart = gart_info->table_handle->vaddr;
137		address = gart_info->table_handle->vaddr;
138		bus_address = gart_info->table_handle->busaddr;
139	} else {
140		address = gart_info->addr;
141		bus_address = gart_info->bus_addr;
142		DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n",
143			  (unsigned long long)bus_address,
144			  (unsigned long)address);
145	}
146
147
148	max_ati_pages = (gart_info->table_size / sizeof(u32));
149	max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
150	pages = (entry->pages <= max_real_pages)
151	    ? entry->pages : max_real_pages;
152
153	if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
154		memset(pci_gart, 0, max_ati_pages * sizeof(u32));
155	} else {
156		memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u32));
157	}
158
159	gart_idx = 0;
160	for (i = 0; i < pages; i++) {
161#ifdef __linux__
162		/* we need to support large memory configurations */
163		entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
164						 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
165		if (pci_dma_mapping_error(dev->pdev, entry->busaddr[i])) {
166			DRM_ERROR("unable to map PCIGART pages!\n");
167			drm_ati_pcigart_cleanup(dev, gart_info);
168			address = NULL;
169			bus_address = 0;
170			goto done;
171		}
172#endif
173		page_base = (u32) entry->busaddr[i];
174
175		for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
176			u32 val;
177
178			switch(gart_info->gart_reg_if) {
179			case DRM_ATI_GART_IGP:
180				val = page_base | 0xc;
181				break;
182			case DRM_ATI_GART_PCIE:
183				val = (page_base >> 8) | 0xc;
184				break;
185			default:
186			case DRM_ATI_GART_PCI:
187				val = page_base;
188				break;
189			}
190			if (gart_info->gart_table_location ==
191			    DRM_ATI_GART_MAIN)
192				pci_gart[gart_idx] = cpu_to_le32(val);
193			else
194				DRM_WRITE32(map, gart_idx * sizeof(u32), val);
195			gart_idx++;
196			page_base += ATI_PCIGART_PAGE_SIZE;
197		}
198	}
199	ret = 1;
200
201#if defined(__i386__) || defined(__x86_64__)
202	wbinvd();
203#else
204	mb();
205#endif
206
207      done:
208	gart_info->addr = address;
209	gart_info->bus_addr = bus_address;
210	return ret;
211}
212EXPORT_SYMBOL(drm_ati_pcigart_init);
213