1196470Srnoland/*-
2196470Srnoland * Copyright 2009 Advanced Micro Devices, Inc.
3196470Srnoland *
4196470Srnoland * Permission is hereby granted, free of charge, to any person obtaining a
5196470Srnoland * copy of this software and associated documentation files (the "Software"),
6196470Srnoland * to deal in the Software without restriction, including without limitation
7196470Srnoland * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8196470Srnoland * and/or sell copies of the Software, and to permit persons to whom the
9196470Srnoland * Software is furnished to do so, subject to the following conditions:
10196470Srnoland *
11196470Srnoland * The above copyright notice and this permission notice (including the next
12196470Srnoland * paragraph) shall be included in all copies or substantial portions of the
13196470Srnoland * Software.
14196470Srnoland *
15196470Srnoland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16196470Srnoland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17196470Srnoland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18196470Srnoland * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19196470Srnoland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20196470Srnoland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21196470Srnoland * DEALINGS IN THE SOFTWARE.
22196470Srnoland *
23196470Srnoland * Authors:
24196470Srnoland *     Alex Deucher <alexander.deucher@amd.com>
25196470Srnoland */
26196470Srnoland
27196470Srnoland#include <sys/cdefs.h>
28196470Srnoland__FBSDID("$FreeBSD$");
29196470Srnoland
30196470Srnoland#include "dev/drm/drmP.h"
31196470Srnoland#include "dev/drm/drm.h"
32196470Srnoland#include "dev/drm/radeon_drm.h"
33196470Srnoland#include "dev/drm/radeon_drv.h"
34196470Srnoland
35196470Srnolandstatic u32 r6xx_default_state[] =
36196470Srnoland{
37196470Srnoland	0xc0002400,
38196470Srnoland	0x00000000,
39196470Srnoland	0xc0012800,
40196470Srnoland	0x80000000,
41196470Srnoland	0x80000000,
42196470Srnoland	0xc0004600,
43196470Srnoland	0x00000016,
44196470Srnoland	0xc0016800,
45196470Srnoland	0x00000010,
46196470Srnoland	0x00028000,
47196470Srnoland	0xc0016800,
48196470Srnoland	0x00000010,
49196470Srnoland	0x00008000,
50196470Srnoland	0xc0016800,
51196470Srnoland	0x00000542,
52196470Srnoland	0x07000003,
53196470Srnoland	0xc0016800,
54196470Srnoland	0x000005c5,
55196470Srnoland	0x00000000,
56196470Srnoland	0xc0016800,
57196470Srnoland	0x00000363,
58196470Srnoland	0x00000000,
59196470Srnoland	0xc0016800,
60196470Srnoland	0x0000060c,
61196470Srnoland	0x82000000,
62196470Srnoland	0xc0016800,
63196470Srnoland	0x0000060e,
64196470Srnoland	0x01020204,
65196470Srnoland	0xc0016f00,
66196470Srnoland	0x00000000,
67196470Srnoland	0x00000000,
68196470Srnoland	0xc0016f00,
69196470Srnoland	0x00000001,
70196470Srnoland	0x00000000,
71196470Srnoland	0xc0096900,
72196470Srnoland	0x0000022a,
73196470Srnoland	0x00000000,
74196470Srnoland	0x00000000,
75196470Srnoland	0x00000000,
76196470Srnoland	0x00000000,
77196470Srnoland	0x00000000,
78196470Srnoland	0x00000000,
79196470Srnoland	0x00000000,
80196470Srnoland	0x00000000,
81196470Srnoland	0x00000000,
82196470Srnoland	0xc0016900,
83196470Srnoland	0x00000004,
84196470Srnoland	0x00000000,
85196470Srnoland	0xc0016900,
86196470Srnoland	0x0000000a,
87196470Srnoland	0x00000000,
88196470Srnoland	0xc0016900,
89196470Srnoland	0x0000000b,
90196470Srnoland	0x00000000,
91196470Srnoland	0xc0016900,
92196470Srnoland	0x0000010c,
93196470Srnoland	0x00000000,
94196470Srnoland	0xc0016900,
95196470Srnoland	0x0000010d,
96196470Srnoland	0x00000000,
97196470Srnoland	0xc0016900,
98196470Srnoland	0x00000200,
99196470Srnoland	0x00000000,
100196470Srnoland	0xc0016900,
101196470Srnoland	0x00000343,
102196470Srnoland	0x00000060,
103196470Srnoland	0xc0016900,
104196470Srnoland	0x00000344,
105196470Srnoland	0x00000040,
106196470Srnoland	0xc0016900,
107196470Srnoland	0x00000351,
108196470Srnoland	0x0000aa00,
109196470Srnoland	0xc0016900,
110196470Srnoland	0x00000104,
111196470Srnoland	0x00000000,
112196470Srnoland	0xc0016900,
113196470Srnoland	0x0000010e,
114196470Srnoland	0x00000000,
115196470Srnoland	0xc0046900,
116196470Srnoland	0x00000105,
117196470Srnoland	0x00000000,
118196470Srnoland	0x00000000,
119196470Srnoland	0x00000000,
120196470Srnoland	0x00000000,
121196470Srnoland	0xc0036900,
122196470Srnoland	0x00000109,
123196470Srnoland	0x00000000,
124196470Srnoland	0x00000000,
125196470Srnoland	0x00000000,
126196470Srnoland	0xc0046900,
127196470Srnoland	0x0000030c,
128196470Srnoland	0x01000000,
129196470Srnoland	0x00000000,
130196470Srnoland	0x00000000,
131196470Srnoland	0x00000000,
132196470Srnoland	0xc0046900,
133196470Srnoland	0x00000048,
134196470Srnoland	0x3f800000,
135196470Srnoland	0x00000000,
136196470Srnoland	0x3f800000,
137196470Srnoland	0x3f800000,
138196470Srnoland	0xc0016900,
139196470Srnoland	0x0000008e,
140196470Srnoland	0x0000000f,
141196470Srnoland	0xc0016900,
142196470Srnoland	0x00000080,
143196470Srnoland	0x00000000,
144196470Srnoland	0xc0016900,
145196470Srnoland	0x00000083,
146196470Srnoland	0x0000ffff,
147196470Srnoland	0xc0016900,
148196470Srnoland	0x00000084,
149196470Srnoland	0x00000000,
150196470Srnoland	0xc0016900,
151196470Srnoland	0x00000085,
152196470Srnoland	0x20002000,
153196470Srnoland	0xc0016900,
154196470Srnoland	0x00000086,
155196470Srnoland	0x00000000,
156196470Srnoland	0xc0016900,
157196470Srnoland	0x00000087,
158196470Srnoland	0x20002000,
159196470Srnoland	0xc0016900,
160196470Srnoland	0x00000088,
161196470Srnoland	0x00000000,
162196470Srnoland	0xc0016900,
163196470Srnoland	0x00000089,
164196470Srnoland	0x20002000,
165196470Srnoland	0xc0016900,
166196470Srnoland	0x0000008a,
167196470Srnoland	0x00000000,
168196470Srnoland	0xc0016900,
169196470Srnoland	0x0000008b,
170196470Srnoland	0x20002000,
171196470Srnoland	0xc0016900,
172196470Srnoland	0x0000008c,
173196470Srnoland	0x00000000,
174196470Srnoland	0xc0016900,
175196470Srnoland	0x00000094,
176196470Srnoland	0x80000000,
177196470Srnoland	0xc0016900,
178196470Srnoland	0x00000095,
179196470Srnoland	0x20002000,
180196470Srnoland	0xc0026900,
181196470Srnoland	0x000000b4,
182196470Srnoland	0x00000000,
183196470Srnoland	0x3f800000,
184196470Srnoland	0xc0016900,
185196470Srnoland	0x00000096,
186196470Srnoland	0x80000000,
187196470Srnoland	0xc0016900,
188196470Srnoland	0x00000097,
189196470Srnoland	0x20002000,
190196470Srnoland	0xc0026900,
191196470Srnoland	0x000000b6,
192196470Srnoland	0x00000000,
193196470Srnoland	0x3f800000,
194196470Srnoland	0xc0016900,
195196470Srnoland	0x00000098,
196196470Srnoland	0x80000000,
197196470Srnoland	0xc0016900,
198196470Srnoland	0x00000099,
199196470Srnoland	0x20002000,
200196470Srnoland	0xc0026900,
201196470Srnoland	0x000000b8,
202196470Srnoland	0x00000000,
203196470Srnoland	0x3f800000,
204196470Srnoland	0xc0016900,
205196470Srnoland	0x0000009a,
206196470Srnoland	0x80000000,
207196470Srnoland	0xc0016900,
208196470Srnoland	0x0000009b,
209196470Srnoland	0x20002000,
210196470Srnoland	0xc0026900,
211196470Srnoland	0x000000ba,
212196470Srnoland	0x00000000,
213196470Srnoland	0x3f800000,
214196470Srnoland	0xc0016900,
215196470Srnoland	0x0000009c,
216196470Srnoland	0x80000000,
217196470Srnoland	0xc0016900,
218196470Srnoland	0x0000009d,
219196470Srnoland	0x20002000,
220196470Srnoland	0xc0026900,
221196470Srnoland	0x000000bc,
222196470Srnoland	0x00000000,
223196470Srnoland	0x3f800000,
224196470Srnoland	0xc0016900,
225196470Srnoland	0x0000009e,
226196470Srnoland	0x80000000,
227196470Srnoland	0xc0016900,
228196470Srnoland	0x0000009f,
229196470Srnoland	0x20002000,
230196470Srnoland	0xc0026900,
231196470Srnoland	0x000000be,
232196470Srnoland	0x00000000,
233196470Srnoland	0x3f800000,
234196470Srnoland	0xc0016900,
235196470Srnoland	0x000000a0,
236196470Srnoland	0x80000000,
237196470Srnoland	0xc0016900,
238196470Srnoland	0x000000a1,
239196470Srnoland	0x20002000,
240196470Srnoland	0xc0026900,
241196470Srnoland	0x000000c0,
242196470Srnoland	0x00000000,
243196470Srnoland	0x3f800000,
244196470Srnoland	0xc0016900,
245196470Srnoland	0x000000a2,
246196470Srnoland	0x80000000,
247196470Srnoland	0xc0016900,
248196470Srnoland	0x000000a3,
249196470Srnoland	0x20002000,
250196470Srnoland	0xc0026900,
251196470Srnoland	0x000000c2,
252196470Srnoland	0x00000000,
253196470Srnoland	0x3f800000,
254196470Srnoland	0xc0016900,
255196470Srnoland	0x000000a4,
256196470Srnoland	0x80000000,
257196470Srnoland	0xc0016900,
258196470Srnoland	0x000000a5,
259196470Srnoland	0x20002000,
260196470Srnoland	0xc0026900,
261196470Srnoland	0x000000c4,
262196470Srnoland	0x00000000,
263196470Srnoland	0x3f800000,
264196470Srnoland	0xc0016900,
265196470Srnoland	0x000000a6,
266196470Srnoland	0x80000000,
267196470Srnoland	0xc0016900,
268196470Srnoland	0x000000a7,
269196470Srnoland	0x20002000,
270196470Srnoland	0xc0026900,
271196470Srnoland	0x000000c6,
272196470Srnoland	0x00000000,
273196470Srnoland	0x3f800000,
274196470Srnoland	0xc0016900,
275196470Srnoland	0x000000a8,
276196470Srnoland	0x80000000,
277196470Srnoland	0xc0016900,
278196470Srnoland	0x000000a9,
279196470Srnoland	0x20002000,
280196470Srnoland	0xc0026900,
281196470Srnoland	0x000000c8,
282196470Srnoland	0x00000000,
283196470Srnoland	0x3f800000,
284196470Srnoland	0xc0016900,
285196470Srnoland	0x000000aa,
286196470Srnoland	0x80000000,
287196470Srnoland	0xc0016900,
288196470Srnoland	0x000000ab,
289196470Srnoland	0x20002000,
290196470Srnoland	0xc0026900,
291196470Srnoland	0x000000ca,
292196470Srnoland	0x00000000,
293196470Srnoland	0x3f800000,
294196470Srnoland	0xc0016900,
295196470Srnoland	0x000000ac,
296196470Srnoland	0x80000000,
297196470Srnoland	0xc0016900,
298196470Srnoland	0x000000ad,
299196470Srnoland	0x20002000,
300196470Srnoland	0xc0026900,
301196470Srnoland	0x000000cc,
302196470Srnoland	0x00000000,
303196470Srnoland	0x3f800000,
304196470Srnoland	0xc0016900,
305196470Srnoland	0x000000ae,
306196470Srnoland	0x80000000,
307196470Srnoland	0xc0016900,
308196470Srnoland	0x000000af,
309196470Srnoland	0x20002000,
310196470Srnoland	0xc0026900,
311196470Srnoland	0x000000ce,
312196470Srnoland	0x00000000,
313196470Srnoland	0x3f800000,
314196470Srnoland	0xc0016900,
315196470Srnoland	0x000000b0,
316196470Srnoland	0x80000000,
317196470Srnoland	0xc0016900,
318196470Srnoland	0x000000b1,
319196470Srnoland	0x20002000,
320196470Srnoland	0xc0026900,
321196470Srnoland	0x000000d0,
322196470Srnoland	0x00000000,
323196470Srnoland	0x3f800000,
324196470Srnoland	0xc0016900,
325196470Srnoland	0x000000b2,
326196470Srnoland	0x80000000,
327196470Srnoland	0xc0016900,
328196470Srnoland	0x000000b3,
329196470Srnoland	0x20002000,
330196470Srnoland	0xc0026900,
331196470Srnoland	0x000000d2,
332196470Srnoland	0x00000000,
333196470Srnoland	0x3f800000,
334196470Srnoland	0xc0016900,
335196470Srnoland	0x00000293,
336196470Srnoland	0x00004010,
337196470Srnoland	0xc0016900,
338196470Srnoland	0x00000300,
339196470Srnoland	0x00000000,
340196470Srnoland	0xc0016900,
341196470Srnoland	0x00000301,
342196470Srnoland	0x00000000,
343196470Srnoland	0xc0016900,
344196470Srnoland	0x00000312,
345196470Srnoland	0xffffffff,
346196470Srnoland	0xc0016900,
347196470Srnoland	0x00000307,
348196470Srnoland	0x00000000,
349196470Srnoland	0xc0016900,
350196470Srnoland	0x00000308,
351196470Srnoland	0x00000000,
352196470Srnoland	0xc0016900,
353196470Srnoland	0x00000283,
354196470Srnoland	0x00000000,
355196470Srnoland	0xc0016900,
356196470Srnoland	0x00000292,
357196470Srnoland	0x00000000,
358196470Srnoland	0xc0066900,
359196470Srnoland	0x0000010f,
360196470Srnoland	0x00000000,
361196470Srnoland	0x00000000,
362196470Srnoland	0x00000000,
363196470Srnoland	0x00000000,
364196470Srnoland	0x00000000,
365196470Srnoland	0x00000000,
366196470Srnoland	0xc0016900,
367196470Srnoland	0x00000206,
368196470Srnoland	0x00000000,
369196470Srnoland	0xc0016900,
370196470Srnoland	0x00000207,
371196470Srnoland	0x00000000,
372196470Srnoland	0xc0016900,
373196470Srnoland	0x00000208,
374196470Srnoland	0x00000000,
375196470Srnoland	0xc0046900,
376196470Srnoland	0x00000303,
377196470Srnoland	0x3f800000,
378196470Srnoland	0x3f800000,
379196470Srnoland	0x3f800000,
380196470Srnoland	0x3f800000,
381196470Srnoland	0xc0016900,
382196470Srnoland	0x00000205,
383196470Srnoland	0x00000004,
384196470Srnoland	0xc0016900,
385196470Srnoland	0x00000280,
386196470Srnoland	0x00000000,
387196470Srnoland	0xc0016900,
388196470Srnoland	0x00000281,
389196470Srnoland	0x00000000,
390196470Srnoland	0xc0016900,
391196470Srnoland	0x0000037e,
392196470Srnoland	0x00000000,
393196470Srnoland	0xc0016900,
394196470Srnoland	0x00000382,
395196470Srnoland	0x00000000,
396196470Srnoland	0xc0016900,
397196470Srnoland	0x00000380,
398196470Srnoland	0x00000000,
399196470Srnoland	0xc0016900,
400196470Srnoland	0x00000383,
401196470Srnoland	0x00000000,
402196470Srnoland	0xc0016900,
403196470Srnoland	0x00000381,
404196470Srnoland	0x00000000,
405196470Srnoland	0xc0016900,
406196470Srnoland	0x00000282,
407196470Srnoland	0x00000008,
408196470Srnoland	0xc0016900,
409196470Srnoland	0x00000302,
410196470Srnoland	0x0000002d,
411196470Srnoland	0xc0016900,
412196470Srnoland	0x0000037f,
413196470Srnoland	0x00000000,
414196470Srnoland	0xc0016900,
415196470Srnoland	0x000001b2,
416196470Srnoland	0x00000000,
417196470Srnoland	0xc0016900,
418196470Srnoland	0x000001b6,
419196470Srnoland	0x00000000,
420196470Srnoland	0xc0016900,
421196470Srnoland	0x000001b7,
422196470Srnoland	0x00000000,
423196470Srnoland	0xc0016900,
424196470Srnoland	0x000001b8,
425196470Srnoland	0x00000000,
426196470Srnoland	0xc0016900,
427196470Srnoland	0x000001b9,
428196470Srnoland	0x00000000,
429196470Srnoland	0xc0016900,
430196470Srnoland	0x00000225,
431196470Srnoland	0x00000000,
432196470Srnoland	0xc0016900,
433196470Srnoland	0x00000229,
434196470Srnoland	0x00000000,
435196470Srnoland	0xc0016900,
436196470Srnoland	0x00000237,
437196470Srnoland	0x00000000,
438196470Srnoland	0xc0016900,
439196470Srnoland	0x00000100,
440196470Srnoland	0x00000800,
441196470Srnoland	0xc0016900,
442196470Srnoland	0x00000101,
443196470Srnoland	0x00000000,
444196470Srnoland	0xc0016900,
445196470Srnoland	0x00000102,
446196470Srnoland	0x00000000,
447196470Srnoland	0xc0016900,
448196470Srnoland	0x000002a8,
449196470Srnoland	0x00000000,
450196470Srnoland	0xc0016900,
451196470Srnoland	0x000002a9,
452196470Srnoland	0x00000000,
453196470Srnoland	0xc0016900,
454196470Srnoland	0x00000103,
455196470Srnoland	0x00000000,
456196470Srnoland	0xc0016900,
457196470Srnoland	0x00000284,
458196470Srnoland	0x00000000,
459196470Srnoland	0xc0016900,
460196470Srnoland	0x00000290,
461196470Srnoland	0x00000000,
462196470Srnoland	0xc0016900,
463196470Srnoland	0x00000285,
464196470Srnoland	0x00000000,
465196470Srnoland	0xc0016900,
466196470Srnoland	0x00000286,
467196470Srnoland	0x00000000,
468196470Srnoland	0xc0016900,
469196470Srnoland	0x00000287,
470196470Srnoland	0x00000000,
471196470Srnoland	0xc0016900,
472196470Srnoland	0x00000288,
473196470Srnoland	0x00000000,
474196470Srnoland	0xc0016900,
475196470Srnoland	0x00000289,
476196470Srnoland	0x00000000,
477196470Srnoland	0xc0016900,
478196470Srnoland	0x0000028a,
479196470Srnoland	0x00000000,
480196470Srnoland	0xc0016900,
481196470Srnoland	0x0000028b,
482196470Srnoland	0x00000000,
483196470Srnoland	0xc0016900,
484196470Srnoland	0x0000028c,
485196470Srnoland	0x00000000,
486196470Srnoland	0xc0016900,
487196470Srnoland	0x0000028d,
488196470Srnoland	0x00000000,
489196470Srnoland	0xc0016900,
490196470Srnoland	0x0000028e,
491196470Srnoland	0x00000000,
492196470Srnoland	0xc0016900,
493196470Srnoland	0x0000028f,
494196470Srnoland	0x00000000,
495196470Srnoland	0xc0016900,
496196470Srnoland	0x000002a1,
497196470Srnoland	0x00000000,
498196470Srnoland	0xc0016900,
499196470Srnoland	0x000002a5,
500196470Srnoland	0x00000000,
501196470Srnoland	0xc0016900,
502196470Srnoland	0x000002ac,
503196470Srnoland	0x00000000,
504196470Srnoland	0xc0016900,
505196470Srnoland	0x000002ad,
506196470Srnoland	0x00000000,
507196470Srnoland	0xc0016900,
508196470Srnoland	0x000002ae,
509196470Srnoland	0x00000000,
510196470Srnoland	0xc0016900,
511196470Srnoland	0x000002c8,
512196470Srnoland	0x00000000,
513196470Srnoland	0xc0016900,
514196470Srnoland	0x00000206,
515196470Srnoland	0x00000100,
516196470Srnoland	0xc0016900,
517196470Srnoland	0x00000204,
518196470Srnoland	0x00010000,
519196470Srnoland	0xc0036e00,
520196470Srnoland	0x00000000,
521196470Srnoland	0x00000012,
522196470Srnoland	0x00000000,
523196470Srnoland	0x00000000,
524196470Srnoland	0xc0016900,
525196470Srnoland	0x0000008f,
526196470Srnoland	0x0000000f,
527196470Srnoland	0xc0016900,
528196470Srnoland	0x000001e8,
529196470Srnoland	0x00000001,
530196470Srnoland	0xc0016900,
531196470Srnoland	0x00000202,
532196470Srnoland	0x00cc0000,
533196470Srnoland	0xc0016900,
534196470Srnoland	0x00000205,
535196470Srnoland	0x00000244,
536196470Srnoland	0xc0016900,
537196470Srnoland	0x00000203,
538196470Srnoland	0x00000210,
539196470Srnoland	0xc0016900,
540196470Srnoland	0x000001b1,
541196470Srnoland	0x00000000,
542196470Srnoland	0xc0016900,
543196470Srnoland	0x00000185,
544196470Srnoland	0x00000000,
545196470Srnoland	0xc0016900,
546196470Srnoland	0x000001b3,
547196470Srnoland	0x00000001,
548196470Srnoland	0xc0016900,
549196470Srnoland	0x000001b4,
550196470Srnoland	0x00000000,
551196470Srnoland	0xc0016900,
552196470Srnoland	0x00000191,
553196470Srnoland	0x00000b00,
554196470Srnoland	0xc0016900,
555196470Srnoland	0x000001b5,
556196470Srnoland	0x00000000,
557196470Srnoland};
558196470Srnoland
559196470Srnolandstatic u32 r7xx_default_state[] =
560196470Srnoland{
561196470Srnoland	0xc0012800,
562196470Srnoland	0x80000000,
563196470Srnoland	0x80000000,
564196470Srnoland	0xc0004600,
565196470Srnoland	0x00000016,
566196470Srnoland	0xc0016800,
567196470Srnoland	0x00000010,
568196470Srnoland	0x00028000,
569196470Srnoland	0xc0016800,
570196470Srnoland	0x00000010,
571196470Srnoland	0x00008000,
572196470Srnoland	0xc0016800,
573196470Srnoland	0x00000542,
574196470Srnoland	0x07000002,
575196470Srnoland	0xc0016800,
576196470Srnoland	0x000005c5,
577196470Srnoland	0x00000000,
578196470Srnoland	0xc0016800,
579196470Srnoland	0x00000363,
580196470Srnoland	0x00004000,
581196470Srnoland	0xc0016800,
582196470Srnoland	0x0000060c,
583196470Srnoland	0x00000000,
584196470Srnoland	0xc0016800,
585196470Srnoland	0x0000060e,
586196470Srnoland	0x00420204,
587196470Srnoland	0xc0016f00,
588196470Srnoland	0x00000000,
589196470Srnoland	0x00000000,
590196470Srnoland	0xc0016f00,
591196470Srnoland	0x00000001,
592196470Srnoland	0x00000000,
593196470Srnoland	0xc0096900,
594196470Srnoland	0x0000022a,
595196470Srnoland	0x00000000,
596196470Srnoland	0x00000000,
597196470Srnoland	0x00000000,
598196470Srnoland	0x00000000,
599196470Srnoland	0x00000000,
600196470Srnoland	0x00000000,
601196470Srnoland	0x00000000,
602196470Srnoland	0x00000000,
603196470Srnoland	0x00000000,
604196470Srnoland	0xc0016900,
605196470Srnoland	0x00000004,
606196470Srnoland	0x00000000,
607196470Srnoland	0xc0016900,
608196470Srnoland	0x0000000a,
609196470Srnoland	0x00000000,
610196470Srnoland	0xc0016900,
611196470Srnoland	0x0000000b,
612196470Srnoland	0x00000000,
613196470Srnoland	0xc0016900,
614196470Srnoland	0x0000010c,
615196470Srnoland	0x00000000,
616196470Srnoland	0xc0016900,
617196470Srnoland	0x0000010d,
618196470Srnoland	0x00000000,
619196470Srnoland	0xc0016900,
620196470Srnoland	0x00000200,
621196470Srnoland	0x00000000,
622196470Srnoland	0xc0016900,
623196470Srnoland	0x00000343,
624196470Srnoland	0x00000060,
625196470Srnoland	0xc0016900,
626196470Srnoland	0x00000344,
627196470Srnoland	0x00000000,
628196470Srnoland	0xc0016900,
629196470Srnoland	0x00000351,
630196470Srnoland	0x0000aa00,
631196470Srnoland	0xc0016900,
632196470Srnoland	0x00000104,
633196470Srnoland	0x00000000,
634196470Srnoland	0xc0016900,
635196470Srnoland	0x0000010e,
636196470Srnoland	0x00000000,
637196470Srnoland	0xc0046900,
638196470Srnoland	0x00000105,
639196470Srnoland	0x00000000,
640196470Srnoland	0x00000000,
641196470Srnoland	0x00000000,
642196470Srnoland	0x00000000,
643196470Srnoland	0xc0046900,
644196470Srnoland	0x0000030c,
645196470Srnoland	0x01000000,
646196470Srnoland	0x00000000,
647196470Srnoland	0x00000000,
648196470Srnoland	0x00000000,
649196470Srnoland	0xc0016900,
650196470Srnoland	0x0000008e,
651196470Srnoland	0x0000000f,
652196470Srnoland	0xc0016900,
653196470Srnoland	0x00000080,
654196470Srnoland	0x00000000,
655196470Srnoland	0xc0016900,
656196470Srnoland	0x00000083,
657196470Srnoland	0x0000ffff,
658196470Srnoland	0xc0016900,
659196470Srnoland	0x00000084,
660196470Srnoland	0x00000000,
661196470Srnoland	0xc0016900,
662196470Srnoland	0x00000085,
663196470Srnoland	0x20002000,
664196470Srnoland	0xc0016900,
665196470Srnoland	0x00000086,
666196470Srnoland	0x00000000,
667196470Srnoland	0xc0016900,
668196470Srnoland	0x00000087,
669196470Srnoland	0x20002000,
670196470Srnoland	0xc0016900,
671196470Srnoland	0x00000088,
672196470Srnoland	0x00000000,
673196470Srnoland	0xc0016900,
674196470Srnoland	0x00000089,
675196470Srnoland	0x20002000,
676196470Srnoland	0xc0016900,
677196470Srnoland	0x0000008a,
678196470Srnoland	0x00000000,
679196470Srnoland	0xc0016900,
680196470Srnoland	0x0000008b,
681196470Srnoland	0x20002000,
682196470Srnoland	0xc0016900,
683196470Srnoland	0x0000008c,
684196470Srnoland	0xaaaaaaaa,
685196470Srnoland	0xc0016900,
686196470Srnoland	0x00000094,
687196470Srnoland	0x80000000,
688196470Srnoland	0xc0016900,
689196470Srnoland	0x00000095,
690196470Srnoland	0x20002000,
691196470Srnoland	0xc0026900,
692196470Srnoland	0x000000b4,
693196470Srnoland	0x00000000,
694196470Srnoland	0x3f800000,
695196470Srnoland	0xc0016900,
696196470Srnoland	0x00000096,
697196470Srnoland	0x80000000,
698196470Srnoland	0xc0016900,
699196470Srnoland	0x00000097,
700196470Srnoland	0x20002000,
701196470Srnoland	0xc0026900,
702196470Srnoland	0x000000b6,
703196470Srnoland	0x00000000,
704196470Srnoland	0x3f800000,
705196470Srnoland	0xc0016900,
706196470Srnoland	0x00000098,
707196470Srnoland	0x80000000,
708196470Srnoland	0xc0016900,
709196470Srnoland	0x00000099,
710196470Srnoland	0x20002000,
711196470Srnoland	0xc0026900,
712196470Srnoland	0x000000b8,
713196470Srnoland	0x00000000,
714196470Srnoland	0x3f800000,
715196470Srnoland	0xc0016900,
716196470Srnoland	0x0000009a,
717196470Srnoland	0x80000000,
718196470Srnoland	0xc0016900,
719196470Srnoland	0x0000009b,
720196470Srnoland	0x20002000,
721196470Srnoland	0xc0026900,
722196470Srnoland	0x000000ba,
723196470Srnoland	0x00000000,
724196470Srnoland	0x3f800000,
725196470Srnoland	0xc0016900,
726196470Srnoland	0x0000009c,
727196470Srnoland	0x80000000,
728196470Srnoland	0xc0016900,
729196470Srnoland	0x0000009d,
730196470Srnoland	0x20002000,
731196470Srnoland	0xc0026900,
732196470Srnoland	0x000000bc,
733196470Srnoland	0x00000000,
734196470Srnoland	0x3f800000,
735196470Srnoland	0xc0016900,
736196470Srnoland	0x0000009e,
737196470Srnoland	0x80000000,
738196470Srnoland	0xc0016900,
739196470Srnoland	0x0000009f,
740196470Srnoland	0x20002000,
741196470Srnoland	0xc0026900,
742196470Srnoland	0x000000be,
743196470Srnoland	0x00000000,
744196470Srnoland	0x3f800000,
745196470Srnoland	0xc0016900,
746196470Srnoland	0x000000a0,
747196470Srnoland	0x80000000,
748196470Srnoland	0xc0016900,
749196470Srnoland	0x000000a1,
750196470Srnoland	0x20002000,
751196470Srnoland	0xc0026900,
752196470Srnoland	0x000000c0,
753196470Srnoland	0x00000000,
754196470Srnoland	0x3f800000,
755196470Srnoland	0xc0016900,
756196470Srnoland	0x000000a2,
757196470Srnoland	0x80000000,
758196470Srnoland	0xc0016900,
759196470Srnoland	0x000000a3,
760196470Srnoland	0x20002000,
761196470Srnoland	0xc0026900,
762196470Srnoland	0x000000c2,
763196470Srnoland	0x00000000,
764196470Srnoland	0x3f800000,
765196470Srnoland	0xc0016900,
766196470Srnoland	0x000000a4,
767196470Srnoland	0x80000000,
768196470Srnoland	0xc0016900,
769196470Srnoland	0x000000a5,
770196470Srnoland	0x20002000,
771196470Srnoland	0xc0026900,
772196470Srnoland	0x000000c4,
773196470Srnoland	0x00000000,
774196470Srnoland	0x3f800000,
775196470Srnoland	0xc0016900,
776196470Srnoland	0x000000a6,
777196470Srnoland	0x80000000,
778196470Srnoland	0xc0016900,
779196470Srnoland	0x000000a7,
780196470Srnoland	0x20002000,
781196470Srnoland	0xc0026900,
782196470Srnoland	0x000000c6,
783196470Srnoland	0x00000000,
784196470Srnoland	0x3f800000,
785196470Srnoland	0xc0016900,
786196470Srnoland	0x000000a8,
787196470Srnoland	0x80000000,
788196470Srnoland	0xc0016900,
789196470Srnoland	0x000000a9,
790196470Srnoland	0x20002000,
791196470Srnoland	0xc0026900,
792196470Srnoland	0x000000c8,
793196470Srnoland	0x00000000,
794196470Srnoland	0x3f800000,
795196470Srnoland	0xc0016900,
796196470Srnoland	0x000000aa,
797196470Srnoland	0x80000000,
798196470Srnoland	0xc0016900,
799196470Srnoland	0x000000ab,
800196470Srnoland	0x20002000,
801196470Srnoland	0xc0026900,
802196470Srnoland	0x000000ca,
803196470Srnoland	0x00000000,
804196470Srnoland	0x3f800000,
805196470Srnoland	0xc0016900,
806196470Srnoland	0x000000ac,
807196470Srnoland	0x80000000,
808196470Srnoland	0xc0016900,
809196470Srnoland	0x000000ad,
810196470Srnoland	0x20002000,
811196470Srnoland	0xc0026900,
812196470Srnoland	0x000000cc,
813196470Srnoland	0x00000000,
814196470Srnoland	0x3f800000,
815196470Srnoland	0xc0016900,
816196470Srnoland	0x000000ae,
817196470Srnoland	0x80000000,
818196470Srnoland	0xc0016900,
819196470Srnoland	0x000000af,
820196470Srnoland	0x20002000,
821196470Srnoland	0xc0026900,
822196470Srnoland	0x000000ce,
823196470Srnoland	0x00000000,
824196470Srnoland	0x3f800000,
825196470Srnoland	0xc0016900,
826196470Srnoland	0x000000b0,
827196470Srnoland	0x80000000,
828196470Srnoland	0xc0016900,
829196470Srnoland	0x000000b1,
830196470Srnoland	0x20002000,
831196470Srnoland	0xc0026900,
832196470Srnoland	0x000000d0,
833196470Srnoland	0x00000000,
834196470Srnoland	0x3f800000,
835196470Srnoland	0xc0016900,
836196470Srnoland	0x000000b2,
837196470Srnoland	0x80000000,
838196470Srnoland	0xc0016900,
839196470Srnoland	0x000000b3,
840196470Srnoland	0x20002000,
841196470Srnoland	0xc0026900,
842196470Srnoland	0x000000d2,
843196470Srnoland	0x00000000,
844196470Srnoland	0x3f800000,
845196470Srnoland	0xc0016900,
846196470Srnoland	0x00000293,
847196470Srnoland	0x00514000,
848196470Srnoland	0xc0016900,
849196470Srnoland	0x00000300,
850196470Srnoland	0x00000000,
851196470Srnoland	0xc0016900,
852196470Srnoland	0x00000301,
853196470Srnoland	0x00000000,
854196470Srnoland	0xc0016900,
855196470Srnoland	0x00000312,
856196470Srnoland	0xffffffff,
857196470Srnoland	0xc0016900,
858196470Srnoland	0x00000307,
859196470Srnoland	0x00000000,
860196470Srnoland	0xc0016900,
861196470Srnoland	0x00000308,
862196470Srnoland	0x00000000,
863196470Srnoland	0xc0016900,
864196470Srnoland	0x00000283,
865196470Srnoland	0x00000000,
866196470Srnoland	0xc0016900,
867196470Srnoland	0x00000292,
868196470Srnoland	0x00000000,
869196470Srnoland	0xc0066900,
870196470Srnoland	0x0000010f,
871196470Srnoland	0x00000000,
872196470Srnoland	0x00000000,
873196470Srnoland	0x00000000,
874196470Srnoland	0x00000000,
875196470Srnoland	0x00000000,
876196470Srnoland	0x00000000,
877196470Srnoland	0xc0016900,
878196470Srnoland	0x00000206,
879196470Srnoland	0x00000000,
880196470Srnoland	0xc0016900,
881196470Srnoland	0x00000207,
882196470Srnoland	0x00000000,
883196470Srnoland	0xc0016900,
884196470Srnoland	0x00000208,
885196470Srnoland	0x00000000,
886196470Srnoland	0xc0046900,
887196470Srnoland	0x00000303,
888196470Srnoland	0x3f800000,
889196470Srnoland	0x3f800000,
890196470Srnoland	0x3f800000,
891196470Srnoland	0x3f800000,
892196470Srnoland	0xc0016900,
893196470Srnoland	0x00000205,
894196470Srnoland	0x00000004,
895196470Srnoland	0xc0016900,
896196470Srnoland	0x00000280,
897196470Srnoland	0x00000000,
898196470Srnoland	0xc0016900,
899196470Srnoland	0x00000281,
900196470Srnoland	0x00000000,
901196470Srnoland	0xc0016900,
902196470Srnoland	0x0000037e,
903196470Srnoland	0x00000000,
904196470Srnoland	0xc0016900,
905196470Srnoland	0x00000382,
906196470Srnoland	0x00000000,
907196470Srnoland	0xc0016900,
908196470Srnoland	0x00000380,
909196470Srnoland	0x00000000,
910196470Srnoland	0xc0016900,
911196470Srnoland	0x00000383,
912196470Srnoland	0x00000000,
913196470Srnoland	0xc0016900,
914196470Srnoland	0x00000381,
915196470Srnoland	0x00000000,
916196470Srnoland	0xc0016900,
917196470Srnoland	0x00000282,
918196470Srnoland	0x00000008,
919196470Srnoland	0xc0016900,
920196470Srnoland	0x00000302,
921196470Srnoland	0x0000002d,
922196470Srnoland	0xc0016900,
923196470Srnoland	0x0000037f,
924196470Srnoland	0x00000000,
925196470Srnoland	0xc0016900,
926196470Srnoland	0x000001b2,
927196470Srnoland	0x00000001,
928196470Srnoland	0xc0016900,
929196470Srnoland	0x000001b6,
930196470Srnoland	0x00000000,
931196470Srnoland	0xc0016900,
932196470Srnoland	0x000001b7,
933196470Srnoland	0x00000000,
934196470Srnoland	0xc0016900,
935196470Srnoland	0x000001b8,
936196470Srnoland	0x00000000,
937196470Srnoland	0xc0016900,
938196470Srnoland	0x000001b9,
939196470Srnoland	0x00000000,
940196470Srnoland	0xc0016900,
941196470Srnoland	0x00000225,
942196470Srnoland	0x00000000,
943196470Srnoland	0xc0016900,
944196470Srnoland	0x00000229,
945196470Srnoland	0x00000000,
946196470Srnoland	0xc0016900,
947196470Srnoland	0x00000237,
948196470Srnoland	0x00000000,
949196470Srnoland	0xc0016900,
950196470Srnoland	0x00000100,
951196470Srnoland	0x00000800,
952196470Srnoland	0xc0016900,
953196470Srnoland	0x00000101,
954196470Srnoland	0x00000000,
955196470Srnoland	0xc0016900,
956196470Srnoland	0x00000102,
957196470Srnoland	0x00000000,
958196470Srnoland	0xc0016900,
959196470Srnoland	0x000002a8,
960196470Srnoland	0x00000000,
961196470Srnoland	0xc0016900,
962196470Srnoland	0x000002a9,
963196470Srnoland	0x00000000,
964196470Srnoland	0xc0016900,
965196470Srnoland	0x00000103,
966196470Srnoland	0x00000000,
967196470Srnoland	0xc0016900,
968196470Srnoland	0x00000284,
969196470Srnoland	0x00000000,
970196470Srnoland	0xc0016900,
971196470Srnoland	0x00000290,
972196470Srnoland	0x00000000,
973196470Srnoland	0xc0016900,
974196470Srnoland	0x00000285,
975196470Srnoland	0x00000000,
976196470Srnoland	0xc0016900,
977196470Srnoland	0x00000286,
978196470Srnoland	0x00000000,
979196470Srnoland	0xc0016900,
980196470Srnoland	0x00000287,
981196470Srnoland	0x00000000,
982196470Srnoland	0xc0016900,
983196470Srnoland	0x00000288,
984196470Srnoland	0x00000000,
985196470Srnoland	0xc0016900,
986196470Srnoland	0x00000289,
987196470Srnoland	0x00000000,
988196470Srnoland	0xc0016900,
989196470Srnoland	0x0000028a,
990196470Srnoland	0x00000000,
991196470Srnoland	0xc0016900,
992196470Srnoland	0x0000028b,
993196470Srnoland	0x00000000,
994196470Srnoland	0xc0016900,
995196470Srnoland	0x0000028c,
996196470Srnoland	0x00000000,
997196470Srnoland	0xc0016900,
998196470Srnoland	0x0000028d,
999196470Srnoland	0x00000000,
1000196470Srnoland	0xc0016900,
1001196470Srnoland	0x0000028e,
1002196470Srnoland	0x00000000,
1003196470Srnoland	0xc0016900,
1004196470Srnoland	0x0000028f,
1005196470Srnoland	0x00000000,
1006196470Srnoland	0xc0016900,
1007196470Srnoland	0x000002a1,
1008196470Srnoland	0x00000000,
1009196470Srnoland	0xc0016900,
1010196470Srnoland	0x000002a5,
1011196470Srnoland	0x00000000,
1012196470Srnoland	0xc0016900,
1013196470Srnoland	0x000002ac,
1014196470Srnoland	0x00000000,
1015196470Srnoland	0xc0016900,
1016196470Srnoland	0x000002ad,
1017196470Srnoland	0x00000000,
1018196470Srnoland	0xc0016900,
1019196470Srnoland	0x000002ae,
1020196470Srnoland	0x00000000,
1021196470Srnoland	0xc0016900,
1022196470Srnoland	0x000002c8,
1023196470Srnoland	0x00000000,
1024196470Srnoland	0xc0016900,
1025196470Srnoland	0x00000206,
1026196470Srnoland	0x00000100,
1027196470Srnoland	0xc0016900,
1028196470Srnoland	0x00000204,
1029196470Srnoland	0x00010000,
1030196470Srnoland	0xc0036e00,
1031196470Srnoland	0x00000000,
1032196470Srnoland	0x00000012,
1033196470Srnoland	0x00000000,
1034196470Srnoland	0x00000000,
1035196470Srnoland	0xc0016900,
1036196470Srnoland	0x0000008f,
1037196470Srnoland	0x0000000f,
1038196470Srnoland	0xc0016900,
1039196470Srnoland	0x000001e8,
1040196470Srnoland	0x00000001,
1041196470Srnoland	0xc0016900,
1042196470Srnoland	0x00000202,
1043196470Srnoland	0x00cc0000,
1044196470Srnoland	0xc0016900,
1045196470Srnoland	0x00000205,
1046196470Srnoland	0x00000244,
1047196470Srnoland	0xc0016900,
1048196470Srnoland	0x00000203,
1049196470Srnoland	0x00000210,
1050196470Srnoland	0xc0016900,
1051196470Srnoland	0x000001b1,
1052196470Srnoland	0x00000000,
1053196470Srnoland	0xc0016900,
1054196470Srnoland	0x00000185,
1055196470Srnoland	0x00000000,
1056196470Srnoland	0xc0016900,
1057196470Srnoland	0x000001b3,
1058196470Srnoland	0x00000001,
1059196470Srnoland	0xc0016900,
1060196470Srnoland	0x000001b4,
1061196470Srnoland	0x00000000,
1062196470Srnoland	0xc0016900,
1063196470Srnoland	0x00000191,
1064196470Srnoland	0x00000b00,
1065196470Srnoland	0xc0016900,
1066196470Srnoland	0x000001b5,
1067196470Srnoland	0x00000000,
1068196470Srnoland};
1069196470Srnoland
1070196470Srnoland/* same for r6xx/r7xx */
1071196470Srnolandstatic u32 r6xx_vs[] =
1072196470Srnoland{
1073196470Srnoland	0x00000004,
1074196470Srnoland	0x81000000,
1075196470Srnoland	0x0000203c,
1076196470Srnoland	0x94000b08,
1077196470Srnoland	0x00004000,
1078196470Srnoland	0x14200b1a,
1079196470Srnoland	0x00000000,
1080196470Srnoland	0x00000000,
1081196470Srnoland	0x3c000000,
1082196470Srnoland	0x68cd1000,
1083196470Srnoland	0x00080000,
1084196470Srnoland	0x00000000,
1085196470Srnoland};
1086196470Srnoland
1087196470Srnolandstatic u32 r6xx_ps[] =
1088196470Srnoland{
1089196470Srnoland	0x00000002,
1090196470Srnoland	0x80800000,
1091196470Srnoland	0x00000000,
1092196470Srnoland	0x94200688,
1093196470Srnoland	0x00000010,
1094196470Srnoland	0x000d1000,
1095196470Srnoland	0xb0800000,
1096196470Srnoland	0x00000000,
1097196470Srnoland};
1098196470Srnoland
1099196470Srnoland#define DI_PT_RECTLIST 0x11
1100196470Srnoland#define DI_INDEX_SIZE_16_BIT 0x0
1101196470Srnoland#define DI_SRC_SEL_AUTO_INDEX 0x2
1102196470Srnoland
1103196470Srnoland#define FMT_8 1
1104196470Srnoland#define FMT_5_6_5 8
1105196470Srnoland#define FMT_8_8_8_8 0x1a
1106196470Srnoland#define COLOR_8 1
1107196470Srnoland#define COLOR_5_6_5 8
1108196470Srnoland#define COLOR_8_8_8_8 0x1a
1109196470Srnoland
1110196470Srnoland#define R600_CB0_DEST_BASE_ENA (1 << 6)
1111196470Srnoland#define R600_TC_ACTION_ENA (1 << 23)
1112196470Srnoland#define R600_VC_ACTION_ENA (1 << 24)
1113196470Srnoland#define R600_CB_ACTION_ENA (1 << 25)
1114196470Srnoland#define R600_DB_ACTION_ENA (1 << 26)
1115196470Srnoland#define R600_SH_ACTION_ENA (1 << 27)
1116196470Srnoland#define R600_SMX_ACTION_ENA (1 << 28)
1117196470Srnoland
1118196470Srnoland#define R600_CB_COLOR0_SIZE 0x28060
1119196470Srnoland#define R600_CB_COLOR0_VIEW 0x28080
1120196470Srnoland#define R600_CB_COLOR0_INFO 0x280a0
1121196470Srnoland#define R600_CB_COLOR0_TILE 0x280c0
1122196470Srnoland#define R600_CB_COLOR0_FRAG 0x280e0
1123196470Srnoland#define R600_CB_COLOR0_MASK 0x28100
1124196470Srnoland
1125196470Srnoland#define R600_SQ_PGM_START_VS                                   0x28858
1126196470Srnoland#define R600_SQ_PGM_RESOURCES_VS 0x28868
1127196470Srnoland#define R600_SQ_PGM_CF_OFFSET_VS 0x288d0
1128196470Srnoland#define R600_SQ_PGM_START_PS                                   0x28840
1129196470Srnoland#define R600_SQ_PGM_RESOURCES_PS 0x28850
1130196470Srnoland#define R600_SQ_PGM_EXPORTS_PS 0x28854
1131196470Srnoland#define R600_SQ_PGM_CF_OFFSET_PS 0x288cc
1132196470Srnoland
1133196470Srnoland#define R600_VGT_PRIMITIVE_TYPE 0x8958
1134196470Srnoland
1135196470Srnoland#define R600_PA_SC_SCREEN_SCISSOR_TL 0x28030
1136196470Srnoland#define R600_PA_SC_GENERIC_SCISSOR_TL 0x28240
1137196470Srnoland#define R600_PA_SC_WINDOW_SCISSOR_TL 0x28204
1138196470Srnoland
1139196470Srnoland#define R600_SQ_TEX_VTX_INVALID_TEXTURE                        0x0
1140196470Srnoland#define R600_SQ_TEX_VTX_INVALID_BUFFER                         0x1
1141196470Srnoland#define R600_SQ_TEX_VTX_VALID_TEXTURE                          0x2
1142196470Srnoland#define R600_SQ_TEX_VTX_VALID_BUFFER                           0x3
1143196470Srnoland
1144196470Srnoland/* packet 3 type offsets */
1145196470Srnoland#define R600_SET_CONFIG_REG_OFFSET                             0x00008000
1146196470Srnoland#define R600_SET_CONFIG_REG_END                                0x0000ac00
1147196470Srnoland#define R600_SET_CONTEXT_REG_OFFSET                            0x00028000
1148196470Srnoland#define R600_SET_CONTEXT_REG_END                               0x00029000
1149196470Srnoland#define R600_SET_ALU_CONST_OFFSET                              0x00030000
1150196470Srnoland#define R600_SET_ALU_CONST_END                                 0x00032000
1151196470Srnoland#define R600_SET_RESOURCE_OFFSET                               0x00038000
1152196470Srnoland#define R600_SET_RESOURCE_END                                  0x0003c000
1153196470Srnoland#define R600_SET_SAMPLER_OFFSET                                0x0003c000
1154196470Srnoland#define R600_SET_SAMPLER_END                                   0x0003cff0
1155196470Srnoland#define R600_SET_CTL_CONST_OFFSET                              0x0003cff0
1156196470Srnoland#define R600_SET_CTL_CONST_END                                 0x0003e200
1157196470Srnoland#define R600_SET_LOOP_CONST_OFFSET                             0x0003e200
1158196470Srnoland#define R600_SET_LOOP_CONST_END                                0x0003e380
1159196470Srnoland#define R600_SET_BOOL_CONST_OFFSET                             0x0003e380
1160196470Srnoland#define R600_SET_BOOL_CONST_END                                0x00040000
1161196470Srnoland
1162196470Srnoland/* Packet 3 types */
1163196470Srnoland#define R600_IT_INDIRECT_BUFFER_END               0x00001700
1164196470Srnoland#define R600_IT_SET_PREDICATION                   0x00002000
1165196470Srnoland#define R600_IT_REG_RMW                           0x00002100
1166196470Srnoland#define R600_IT_COND_EXEC                         0x00002200
1167196470Srnoland#define R600_IT_PRED_EXEC                         0x00002300
1168196470Srnoland#define R600_IT_START_3D_CMDBUF                   0x00002400
1169196470Srnoland#define R600_IT_DRAW_INDEX_2                      0x00002700
1170196470Srnoland#define R600_IT_CONTEXT_CONTROL                   0x00002800
1171196470Srnoland#define R600_IT_DRAW_INDEX_IMMD_BE                0x00002900
1172196470Srnoland#define R600_IT_INDEX_TYPE                        0x00002A00
1173196470Srnoland#define R600_IT_DRAW_INDEX                        0x00002B00
1174196470Srnoland#define R600_IT_DRAW_INDEX_AUTO                   0x00002D00
1175196470Srnoland#define R600_IT_DRAW_INDEX_IMMD                   0x00002E00
1176196470Srnoland#define R600_IT_NUM_INSTANCES                     0x00002F00
1177196470Srnoland#define R600_IT_STRMOUT_BUFFER_UPDATE             0x00003400
1178196470Srnoland#define R600_IT_INDIRECT_BUFFER_MP                0x00003800
1179196470Srnoland#define R600_IT_MEM_SEMAPHORE                     0x00003900
1180196470Srnoland#define R600_IT_MPEG_INDEX                        0x00003A00
1181196470Srnoland#define R600_IT_WAIT_REG_MEM                      0x00003C00
1182196470Srnoland#define R600_IT_MEM_WRITE                         0x00003D00
1183196470Srnoland#define R600_IT_INDIRECT_BUFFER                   0x00003200
1184196470Srnoland#define R600_IT_CP_INTERRUPT                      0x00004000
1185196470Srnoland#define R600_IT_SURFACE_SYNC                      0x00004300
1186196470Srnoland#define R600_IT_ME_INITIALIZE                     0x00004400
1187196470Srnoland#define R600_IT_COND_WRITE                        0x00004500
1188196470Srnoland#define R600_IT_EVENT_WRITE                       0x00004600
1189196470Srnoland#define R600_IT_EVENT_WRITE_EOP                   0x00004700
1190196470Srnoland#define R600_IT_ONE_REG_WRITE                     0x00005700
1191196470Srnoland#define R600_IT_SET_CONFIG_REG                    0x00006800
1192196470Srnoland#define R600_IT_SET_CONTEXT_REG                   0x00006900
1193196470Srnoland#define R600_IT_SET_ALU_CONST                     0x00006A00
1194196470Srnoland#define R600_IT_SET_BOOL_CONST                    0x00006B00
1195196470Srnoland#define R600_IT_SET_LOOP_CONST                    0x00006C00
1196196470Srnoland#define R600_IT_SET_RESOURCE                      0x00006D00
1197196470Srnoland#define R600_IT_SET_SAMPLER                       0x00006E00
1198196470Srnoland#define R600_IT_SET_CTL_CONST                     0x00006F00
1199196470Srnoland#define R600_IT_SURFACE_BASE_UPDATE               0x00007300
1200196470Srnoland
1201196470Srnolandstatic inline void
1202196470Srnolandset_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64 gpu_addr)
1203196470Srnoland{
1204196470Srnoland	u32 cb_color_info;
1205196470Srnoland	int pitch, slice;
1206196470Srnoland	RING_LOCALS;
1207196470Srnoland	DRM_DEBUG("\n");
1208196470Srnoland
1209196470Srnoland	h = (h + 7) & ~7;
1210196470Srnoland	if (h < 8)
1211196470Srnoland		h = 8;
1212196470Srnoland
1213196470Srnoland	cb_color_info = ((format << 2) | (1 << 27));
1214196470Srnoland	pitch = (w / 8) - 1;
1215196470Srnoland	slice = ((w * h) / 64) - 1;
1216196470Srnoland
1217196470Srnoland	if (((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_R600) &&
1218196470Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770)) {
1219196470Srnoland		BEGIN_RING(21 + 2);
1220196470Srnoland		OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1221196470Srnoland		OUT_RING((R600_CB_COLOR0_BASE - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1222196470Srnoland		OUT_RING(gpu_addr >> 8);
1223196470Srnoland		OUT_RING(CP_PACKET3(R600_IT_SURFACE_BASE_UPDATE, 0));
1224196470Srnoland		OUT_RING(2 << 0);
1225196470Srnoland	} else {
1226196470Srnoland		BEGIN_RING(21);
1227196470Srnoland		OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1228196470Srnoland		OUT_RING((R600_CB_COLOR0_BASE - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1229196470Srnoland		OUT_RING(gpu_addr >> 8);
1230196470Srnoland	}
1231196470Srnoland
1232196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1233196470Srnoland        OUT_RING((R600_CB_COLOR0_SIZE - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1234196470Srnoland	OUT_RING((pitch << 0) | (slice << 10));
1235196470Srnoland
1236196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1237196470Srnoland        OUT_RING((R600_CB_COLOR0_VIEW - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1238196470Srnoland	OUT_RING(0);
1239196470Srnoland
1240196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1241196470Srnoland        OUT_RING((R600_CB_COLOR0_INFO - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1242196470Srnoland	OUT_RING(cb_color_info);
1243196470Srnoland
1244196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1245196470Srnoland        OUT_RING((R600_CB_COLOR0_TILE - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1246196470Srnoland	OUT_RING(0);
1247196470Srnoland
1248196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1249196470Srnoland        OUT_RING((R600_CB_COLOR0_FRAG - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1250196470Srnoland	OUT_RING(0);
1251196470Srnoland
1252196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1253196470Srnoland        OUT_RING((R600_CB_COLOR0_MASK - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1254196470Srnoland	OUT_RING(0);
1255196470Srnoland
1256196470Srnoland	ADVANCE_RING();
1257196470Srnoland}
1258196470Srnoland
1259196470Srnolandstatic inline void
1260196470Srnolandcp_set_surface_sync(drm_radeon_private_t *dev_priv,
1261196470Srnoland		    u32 sync_type, u32 size, u64 mc_addr)
1262196470Srnoland{
1263196470Srnoland	u32 cp_coher_size;
1264196470Srnoland	RING_LOCALS;
1265196470Srnoland	DRM_DEBUG("\n");
1266196470Srnoland
1267196470Srnoland	if (size == 0xffffffff)
1268196470Srnoland		cp_coher_size = 0xffffffff;
1269196470Srnoland	else
1270196470Srnoland		cp_coher_size = ((size + 255) >> 8);
1271196470Srnoland
1272196470Srnoland	BEGIN_RING(5);
1273196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SURFACE_SYNC, 3));
1274196470Srnoland	OUT_RING(sync_type);
1275196470Srnoland	OUT_RING(cp_coher_size);
1276196470Srnoland	OUT_RING((mc_addr >> 8));
1277196470Srnoland	OUT_RING(10); /* poll interval */
1278196470Srnoland	ADVANCE_RING();
1279196470Srnoland}
1280196470Srnoland
1281196470Srnolandstatic inline void
1282196470Srnolandset_shaders(struct drm_device *dev)
1283196470Srnoland{
1284196470Srnoland	drm_radeon_private_t *dev_priv = dev->dev_private;
1285196470Srnoland	u64 gpu_addr;
1286196470Srnoland	int shader_size, i;
1287196470Srnoland	u32 *vs, *ps;
1288196470Srnoland	uint32_t sq_pgm_resources;
1289196470Srnoland	RING_LOCALS;
1290196470Srnoland	DRM_DEBUG("\n");
1291196470Srnoland
1292196470Srnoland	/* load shaders */
1293207066Srnoland	vs = (u32 *) ((char *)dev->agp_buffer_map->virtual + dev_priv->blit_vb->offset);
1294207066Srnoland	ps = (u32 *) ((char *)dev->agp_buffer_map->virtual + dev_priv->blit_vb->offset + 256);
1295196470Srnoland
1296196470Srnoland	shader_size = sizeof(r6xx_vs) / 4;
1297196470Srnoland	for (i= 0; i < shader_size; i++)
1298196470Srnoland		vs[i] = r6xx_vs[i];
1299196470Srnoland	shader_size = sizeof(r6xx_ps) / 4;
1300196470Srnoland	for (i= 0; i < shader_size; i++)
1301196470Srnoland		ps[i] = r6xx_ps[i];
1302196470Srnoland
1303196470Srnoland	dev_priv->blit_vb->used = 512;
1304196470Srnoland
1305196470Srnoland	gpu_addr = dev_priv->gart_buffers_offset + dev_priv->blit_vb->offset;
1306196470Srnoland
1307196470Srnoland	/* setup shader regs */
1308196470Srnoland	sq_pgm_resources = (1 << 0);
1309196470Srnoland
1310196470Srnoland	BEGIN_RING(9 + 12);
1311196470Srnoland	/* VS */
1312196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1313196470Srnoland        OUT_RING((R600_SQ_PGM_START_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1314196470Srnoland	OUT_RING(gpu_addr >> 8);
1315196470Srnoland
1316196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1317196470Srnoland        OUT_RING((R600_SQ_PGM_RESOURCES_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1318196470Srnoland	OUT_RING(sq_pgm_resources);
1319196470Srnoland
1320196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1321196470Srnoland        OUT_RING((R600_SQ_PGM_CF_OFFSET_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1322196470Srnoland	OUT_RING(0);
1323196470Srnoland
1324196470Srnoland	/* PS */
1325196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1326196470Srnoland        OUT_RING((R600_SQ_PGM_START_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1327196470Srnoland	OUT_RING((gpu_addr + 256) >> 8);
1328196470Srnoland
1329196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1330196470Srnoland        OUT_RING((R600_SQ_PGM_RESOURCES_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1331196470Srnoland	OUT_RING(sq_pgm_resources | (1 << 28));
1332196470Srnoland
1333196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1334196470Srnoland        OUT_RING((R600_SQ_PGM_EXPORTS_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1335196470Srnoland	OUT_RING(2);
1336196470Srnoland
1337196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1));
1338196470Srnoland        OUT_RING((R600_SQ_PGM_CF_OFFSET_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1339196470Srnoland	OUT_RING(0);
1340196470Srnoland	ADVANCE_RING();
1341196470Srnoland
1342196470Srnoland	cp_set_surface_sync(dev_priv,
1343196470Srnoland			    R600_SH_ACTION_ENA, 512, gpu_addr);
1344196470Srnoland}
1345196470Srnoland
1346196470Srnolandstatic inline void
1347196470Srnolandset_vtx_resource(drm_radeon_private_t *dev_priv, u64 gpu_addr)
1348196470Srnoland{
1349196470Srnoland	uint32_t sq_vtx_constant_word2;
1350196470Srnoland	RING_LOCALS;
1351196470Srnoland	DRM_DEBUG("\n");
1352196470Srnoland
1353196470Srnoland	sq_vtx_constant_word2 = (((gpu_addr >> 32) & 0xff) | (16 << 8));
1354196470Srnoland
1355196470Srnoland	BEGIN_RING(9);
1356196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_RESOURCE, 7));
1357196470Srnoland	OUT_RING(0x460);
1358196470Srnoland	OUT_RING(gpu_addr & 0xffffffff);
1359196470Srnoland	OUT_RING(48 - 1);
1360196470Srnoland	OUT_RING(sq_vtx_constant_word2);
1361196470Srnoland	OUT_RING(1 << 0);
1362196470Srnoland	OUT_RING(0);
1363196470Srnoland	OUT_RING(0);
1364196470Srnoland	OUT_RING(R600_SQ_TEX_VTX_VALID_BUFFER << 30);
1365196470Srnoland	ADVANCE_RING();
1366196470Srnoland
1367196470Srnoland	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
1368196470Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
1369196470Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
1370198691Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) ||
1371196470Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710))
1372196470Srnoland		cp_set_surface_sync(dev_priv,
1373196470Srnoland				    R600_TC_ACTION_ENA, 48, gpu_addr);
1374196470Srnoland	else
1375196470Srnoland		cp_set_surface_sync(dev_priv,
1376196470Srnoland				    R600_VC_ACTION_ENA, 48, gpu_addr);
1377196470Srnoland}
1378196470Srnoland
1379196470Srnolandstatic inline void
1380196470Srnolandset_tex_resource(drm_radeon_private_t *dev_priv,
1381196470Srnoland		 int format, int w, int h, int pitch, u64 gpu_addr)
1382196470Srnoland{
1383196470Srnoland	uint32_t sq_tex_resource_word0, sq_tex_resource_word1, sq_tex_resource_word4;
1384196470Srnoland	RING_LOCALS;
1385196470Srnoland	DRM_DEBUG("\n");
1386196470Srnoland
1387196470Srnoland	if (h < 1)
1388196470Srnoland		h = 1;
1389196470Srnoland
1390196470Srnoland	sq_tex_resource_word0 = (1 << 0);
1391196470Srnoland	sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 8) |
1392196470Srnoland				  ((w - 1) << 19));
1393196470Srnoland
1394196470Srnoland	sq_tex_resource_word1 = (format << 26);
1395196470Srnoland	sq_tex_resource_word1 |= ((h - 1) << 0);
1396196470Srnoland
1397196470Srnoland	sq_tex_resource_word4 = ((1 << 14) |
1398196470Srnoland				 (0 << 16) |
1399196470Srnoland				 (1 << 19) |
1400196470Srnoland				 (2 << 22) |
1401196470Srnoland				 (3 << 25));
1402196470Srnoland
1403196470Srnoland	BEGIN_RING(9);
1404196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_RESOURCE, 7));
1405196470Srnoland	OUT_RING(0);
1406196470Srnoland	OUT_RING(sq_tex_resource_word0);
1407196470Srnoland	OUT_RING(sq_tex_resource_word1);
1408196470Srnoland	OUT_RING(gpu_addr >> 8);
1409196470Srnoland	OUT_RING(gpu_addr >> 8);
1410196470Srnoland	OUT_RING(sq_tex_resource_word4);
1411196470Srnoland	OUT_RING(0);
1412196470Srnoland	OUT_RING(R600_SQ_TEX_VTX_VALID_TEXTURE << 30);
1413196470Srnoland	ADVANCE_RING();
1414196470Srnoland
1415196470Srnoland}
1416196470Srnoland
1417196470Srnolandstatic inline void
1418196470Srnolandset_scissors(drm_radeon_private_t *dev_priv, int x1, int y1, int x2, int y2)
1419196470Srnoland{
1420196470Srnoland	RING_LOCALS;
1421196470Srnoland	DRM_DEBUG("\n");
1422196470Srnoland
1423196470Srnoland	BEGIN_RING(12);
1424196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2));
1425196470Srnoland        OUT_RING((R600_PA_SC_SCREEN_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1426196470Srnoland	OUT_RING((x1 << 0) | (y1 << 16));
1427196470Srnoland	OUT_RING((x2 << 0) | (y2 << 16));
1428196470Srnoland
1429196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2));
1430196470Srnoland        OUT_RING((R600_PA_SC_GENERIC_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1431261455Seadler	OUT_RING((x1 << 0) | (y1 << 16) | (1U << 31));
1432196470Srnoland	OUT_RING((x2 << 0) | (y2 << 16));
1433196470Srnoland
1434196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2));
1435196470Srnoland        OUT_RING((R600_PA_SC_WINDOW_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2);
1436261455Seadler	OUT_RING((x1 << 0) | (y1 << 16) | (1U << 31));
1437196470Srnoland	OUT_RING((x2 << 0) | (y2 << 16));
1438196470Srnoland	ADVANCE_RING();
1439196470Srnoland}
1440196470Srnoland
1441196470Srnolandstatic inline void
1442196470Srnolanddraw_auto(drm_radeon_private_t *dev_priv)
1443196470Srnoland{
1444196470Srnoland	RING_LOCALS;
1445196470Srnoland	DRM_DEBUG("\n");
1446196470Srnoland
1447196470Srnoland	BEGIN_RING(10);
1448196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));
1449196470Srnoland        OUT_RING((R600_VGT_PRIMITIVE_TYPE - R600_SET_CONFIG_REG_OFFSET) >> 2);
1450196470Srnoland	OUT_RING(DI_PT_RECTLIST);
1451196470Srnoland
1452196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_INDEX_TYPE, 0));
1453196470Srnoland	OUT_RING(DI_INDEX_SIZE_16_BIT);
1454196470Srnoland
1455196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_NUM_INSTANCES, 0));
1456196470Srnoland	OUT_RING(1);
1457196470Srnoland
1458196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_DRAW_INDEX_AUTO, 1));
1459196470Srnoland	OUT_RING(3);
1460196470Srnoland	OUT_RING(DI_SRC_SEL_AUTO_INDEX);
1461196470Srnoland
1462196470Srnoland	ADVANCE_RING();
1463196470Srnoland	COMMIT_RING();
1464196470Srnoland}
1465196470Srnoland
1466196470Srnolandstatic inline void
1467196470Srnolandset_default_state(drm_radeon_private_t *dev_priv)
1468196470Srnoland{
1469196470Srnoland	int default_state_dw, i;
1470196470Srnoland	u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2;
1471196470Srnoland	u32 sq_thread_resource_mgmt, sq_stack_resource_mgmt_1, sq_stack_resource_mgmt_2;
1472196470Srnoland	int num_ps_gprs, num_vs_gprs, num_temp_gprs, num_gs_gprs, num_es_gprs;
1473196470Srnoland	int num_ps_threads, num_vs_threads, num_gs_threads, num_es_threads;
1474196470Srnoland	int num_ps_stack_entries, num_vs_stack_entries, num_gs_stack_entries, num_es_stack_entries;
1475196470Srnoland	RING_LOCALS;
1476196470Srnoland
1477196470Srnoland	switch ((dev_priv->flags & RADEON_FAMILY_MASK)) {
1478196470Srnoland	case CHIP_R600:
1479196470Srnoland		num_ps_gprs = 192;
1480196470Srnoland		num_vs_gprs = 56;
1481196470Srnoland		num_temp_gprs = 4;
1482196470Srnoland		num_gs_gprs = 0;
1483196470Srnoland		num_es_gprs = 0;
1484196470Srnoland		num_ps_threads = 136;
1485196470Srnoland		num_vs_threads = 48;
1486196470Srnoland		num_gs_threads = 4;
1487196470Srnoland		num_es_threads = 4;
1488196470Srnoland		num_ps_stack_entries = 128;
1489196470Srnoland		num_vs_stack_entries = 128;
1490196470Srnoland		num_gs_stack_entries = 0;
1491196470Srnoland		num_es_stack_entries = 0;
1492196470Srnoland		break;
1493196470Srnoland	case CHIP_RV630:
1494196470Srnoland	case CHIP_RV635:
1495196470Srnoland		num_ps_gprs = 84;
1496196470Srnoland		num_vs_gprs = 36;
1497196470Srnoland		num_temp_gprs = 4;
1498196470Srnoland		num_gs_gprs = 0;
1499196470Srnoland		num_es_gprs = 0;
1500196470Srnoland		num_ps_threads = 144;
1501196470Srnoland		num_vs_threads = 40;
1502196470Srnoland		num_gs_threads = 4;
1503196470Srnoland		num_es_threads = 4;
1504196470Srnoland		num_ps_stack_entries = 40;
1505196470Srnoland		num_vs_stack_entries = 40;
1506196470Srnoland		num_gs_stack_entries = 32;
1507196470Srnoland		num_es_stack_entries = 16;
1508196470Srnoland		break;
1509196470Srnoland	case CHIP_RV610:
1510196470Srnoland	case CHIP_RV620:
1511196470Srnoland	case CHIP_RS780:
1512198691Srnoland	case CHIP_RS880:
1513196470Srnoland	default:
1514196470Srnoland		num_ps_gprs = 84;
1515196470Srnoland		num_vs_gprs = 36;
1516196470Srnoland		num_temp_gprs = 4;
1517196470Srnoland		num_gs_gprs = 0;
1518196470Srnoland		num_es_gprs = 0;
1519196470Srnoland		num_ps_threads = 136;
1520196470Srnoland		num_vs_threads = 48;
1521196470Srnoland		num_gs_threads = 4;
1522196470Srnoland		num_es_threads = 4;
1523196470Srnoland		num_ps_stack_entries = 40;
1524196470Srnoland		num_vs_stack_entries = 40;
1525196470Srnoland		num_gs_stack_entries = 32;
1526196470Srnoland		num_es_stack_entries = 16;
1527196470Srnoland		break;
1528196470Srnoland	case CHIP_RV670:
1529196470Srnoland		num_ps_gprs = 144;
1530196470Srnoland		num_vs_gprs = 40;
1531196470Srnoland		num_temp_gprs = 4;
1532196470Srnoland		num_gs_gprs = 0;
1533196470Srnoland		num_es_gprs = 0;
1534196470Srnoland		num_ps_threads = 136;
1535196470Srnoland		num_vs_threads = 48;
1536196470Srnoland		num_gs_threads = 4;
1537196470Srnoland		num_es_threads = 4;
1538196470Srnoland		num_ps_stack_entries = 40;
1539196470Srnoland		num_vs_stack_entries = 40;
1540196470Srnoland		num_gs_stack_entries = 32;
1541196470Srnoland		num_es_stack_entries = 16;
1542196470Srnoland		break;
1543196470Srnoland	case CHIP_RV770:
1544196470Srnoland		num_ps_gprs = 192;
1545196470Srnoland		num_vs_gprs = 56;
1546196470Srnoland		num_temp_gprs = 4;
1547196470Srnoland		num_gs_gprs = 0;
1548196470Srnoland		num_es_gprs = 0;
1549196470Srnoland		num_ps_threads = 188;
1550196470Srnoland		num_vs_threads = 60;
1551196470Srnoland		num_gs_threads = 0;
1552196470Srnoland		num_es_threads = 0;
1553196470Srnoland		num_ps_stack_entries = 256;
1554196470Srnoland		num_vs_stack_entries = 256;
1555196470Srnoland		num_gs_stack_entries = 0;
1556196470Srnoland		num_es_stack_entries = 0;
1557196470Srnoland		break;
1558196470Srnoland	case CHIP_RV730:
1559196470Srnoland	case CHIP_RV740:
1560196470Srnoland		num_ps_gprs = 84;
1561196470Srnoland		num_vs_gprs = 36;
1562196470Srnoland		num_temp_gprs = 4;
1563196470Srnoland		num_gs_gprs = 0;
1564196470Srnoland		num_es_gprs = 0;
1565196470Srnoland		num_ps_threads = 188;
1566196470Srnoland		num_vs_threads = 60;
1567196470Srnoland		num_gs_threads = 0;
1568196470Srnoland		num_es_threads = 0;
1569196470Srnoland		num_ps_stack_entries = 128;
1570196470Srnoland		num_vs_stack_entries = 128;
1571196470Srnoland		num_gs_stack_entries = 0;
1572196470Srnoland		num_es_stack_entries = 0;
1573196470Srnoland		break;
1574196470Srnoland	case CHIP_RV710:
1575196470Srnoland		num_ps_gprs = 192;
1576196470Srnoland		num_vs_gprs = 56;
1577196470Srnoland		num_temp_gprs = 4;
1578196470Srnoland		num_gs_gprs = 0;
1579196470Srnoland		num_es_gprs = 0;
1580196470Srnoland		num_ps_threads = 144;
1581196470Srnoland		num_vs_threads = 48;
1582196470Srnoland		num_gs_threads = 0;
1583196470Srnoland		num_es_threads = 0;
1584196470Srnoland		num_ps_stack_entries = 128;
1585196470Srnoland		num_vs_stack_entries = 128;
1586196470Srnoland		num_gs_stack_entries = 0;
1587196470Srnoland		num_es_stack_entries = 0;
1588196470Srnoland		break;
1589196470Srnoland	}
1590196470Srnoland
1591196470Srnoland	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
1592196470Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
1593196470Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
1594198691Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) ||
1595196470Srnoland	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710))
1596196470Srnoland		sq_config = 0;
1597196470Srnoland	else
1598196470Srnoland		sq_config = R600_VC_ENABLE;
1599196470Srnoland
1600196470Srnoland	sq_config |= (R600_DX9_CONSTS |
1601196470Srnoland		      R600_ALU_INST_PREFER_VECTOR |
1602196470Srnoland		      R600_PS_PRIO(0) |
1603196470Srnoland		      R600_VS_PRIO(1) |
1604196470Srnoland		      R600_GS_PRIO(2) |
1605196470Srnoland		      R600_ES_PRIO(3));
1606196470Srnoland
1607196470Srnoland	sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(num_ps_gprs) |
1608196470Srnoland				  R600_NUM_VS_GPRS(num_vs_gprs) |
1609196470Srnoland				  R600_NUM_CLAUSE_TEMP_GPRS(num_temp_gprs));
1610196470Srnoland	sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(num_gs_gprs) |
1611196470Srnoland				  R600_NUM_ES_GPRS(num_es_gprs));
1612196470Srnoland	sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(num_ps_threads) |
1613196470Srnoland				   R600_NUM_VS_THREADS(num_vs_threads) |
1614196470Srnoland				   R600_NUM_GS_THREADS(num_gs_threads) |
1615196470Srnoland				   R600_NUM_ES_THREADS(num_es_threads));
1616196470Srnoland	sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(num_ps_stack_entries) |
1617196470Srnoland				    R600_NUM_VS_STACK_ENTRIES(num_vs_stack_entries));
1618196470Srnoland	sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(num_gs_stack_entries) |
1619196470Srnoland				    R600_NUM_ES_STACK_ENTRIES(num_es_stack_entries));
1620196470Srnoland
1621196470Srnoland	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) {
1622196470Srnoland		default_state_dw = sizeof(r7xx_default_state) / 4;
1623196470Srnoland		BEGIN_RING(default_state_dw + 10);
1624196470Srnoland		for (i = 0; i < default_state_dw; i++)
1625196470Srnoland			OUT_RING(r7xx_default_state[i]);
1626196470Srnoland	} else {
1627196470Srnoland		default_state_dw = sizeof(r6xx_default_state) / 4;
1628196470Srnoland		BEGIN_RING(default_state_dw + 10);
1629196470Srnoland		for (i = 0; i < default_state_dw; i++)
1630196470Srnoland			OUT_RING(r6xx_default_state[i]);
1631196470Srnoland	}
1632196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0));
1633196470Srnoland	OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT);
1634196470Srnoland	/* SQ config */
1635196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 6));
1636196470Srnoland        OUT_RING((R600_SQ_CONFIG - R600_SET_CONFIG_REG_OFFSET) >> 2);
1637196470Srnoland	OUT_RING(sq_config);
1638196470Srnoland	OUT_RING(sq_gpr_resource_mgmt_1);
1639196470Srnoland	OUT_RING(sq_gpr_resource_mgmt_2);
1640196470Srnoland	OUT_RING(sq_thread_resource_mgmt);
1641196470Srnoland	OUT_RING(sq_stack_resource_mgmt_1);
1642196470Srnoland	OUT_RING(sq_stack_resource_mgmt_2);
1643196470Srnoland	ADVANCE_RING();
1644196470Srnoland}
1645196470Srnoland
1646196470Srnolandstatic inline uint32_t i2f(uint32_t input)
1647196470Srnoland{
1648196470Srnoland	u32 result, i, exponent, fraction;
1649196470Srnoland
1650196470Srnoland	if ((input & 0x3fff) == 0)
1651196470Srnoland		result = 0; /* 0 is a special case */
1652196470Srnoland	else {
1653196470Srnoland		exponent = 140; /* exponent biased by 127; */
1654196470Srnoland		fraction = (input & 0x3fff) << 10; /* cheat and only
1655196470Srnoland						      handle numbers below 2^^15 */
1656196470Srnoland		for (i = 0; i < 14; i++) {
1657196470Srnoland			if (fraction & 0x800000)
1658196470Srnoland				break;
1659196470Srnoland			else {
1660196470Srnoland				fraction = fraction << 1; /* keep
1661196470Srnoland							     shifting left until top bit = 1 */
1662196470Srnoland				exponent = exponent -1;
1663196470Srnoland			}
1664196470Srnoland		}
1665196470Srnoland		result = exponent << 23 | (fraction & 0x7fffff); /* mask
1666196470Srnoland								    off top bit; assumed 1 */
1667196470Srnoland	}
1668196470Srnoland	return result;
1669196470Srnoland}
1670196470Srnoland
1671196470Srnolandint
1672196470Srnolandr600_prepare_blit_copy(struct drm_device *dev)
1673196470Srnoland{
1674196470Srnoland	drm_radeon_private_t *dev_priv = dev->dev_private;
1675196470Srnoland	DRM_DEBUG("\n");
1676196470Srnoland
1677196470Srnoland	dev_priv->blit_vb = radeon_freelist_get(dev);
1678196470Srnoland	if (!dev_priv->blit_vb) {
1679196470Srnoland		DRM_ERROR("Unable to allocate vertex buffer for blit\n");
1680196470Srnoland		return -EAGAIN;
1681196470Srnoland	}
1682196470Srnoland
1683196470Srnoland	set_default_state(dev_priv);
1684196470Srnoland	set_shaders(dev);
1685196470Srnoland
1686196470Srnoland	return 0;
1687196470Srnoland}
1688196470Srnoland
1689196470Srnolandvoid
1690196470Srnolandr600_done_blit_copy(struct drm_device *dev)
1691196470Srnoland{
1692196470Srnoland	drm_radeon_private_t *dev_priv = dev->dev_private;
1693196470Srnoland	RING_LOCALS;
1694196470Srnoland	DRM_DEBUG("\n");
1695196470Srnoland
1696196470Srnoland	BEGIN_RING(5);
1697196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0));
1698196470Srnoland	OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT);
1699196470Srnoland	/* wait for 3D idle clean */
1700196470Srnoland	OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));
1701196470Srnoland	OUT_RING((R600_WAIT_UNTIL - R600_SET_CONFIG_REG_OFFSET) >> 2);
1702196470Srnoland	OUT_RING(RADEON_WAIT_3D_IDLE | RADEON_WAIT_3D_IDLECLEAN);
1703196470Srnoland
1704196470Srnoland	ADVANCE_RING();
1705196470Srnoland	COMMIT_RING();
1706196470Srnoland
1707196470Srnoland	dev_priv->blit_vb->used = 0;
1708196470Srnoland	radeon_cp_discard_buffer(dev, dev_priv->blit_vb);
1709196470Srnoland}
1710196470Srnoland
1711196470Srnolandvoid
1712196470Srnolandr600_blit_copy(struct drm_device *dev,
1713196470Srnoland	       uint64_t src_gpu_addr, uint64_t dst_gpu_addr,
1714196470Srnoland	       int size_bytes)
1715196470Srnoland{
1716196470Srnoland	drm_radeon_private_t *dev_priv = dev->dev_private;
1717196470Srnoland	int max_bytes;
1718196470Srnoland	u64 vb_addr;
1719196470Srnoland	u32 *vb;
1720196470Srnoland
1721207066Srnoland	vb = (u32 *) ((char *)dev->agp_buffer_map->virtual +
1722198696Srnoland	    dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
1723207066Srnoland	DRM_DEBUG("src=0x%016jx, dst=0x%016jx, size=%d\n",
1724207066Srnoland	    src_gpu_addr, dst_gpu_addr, size_bytes);
1725196470Srnoland
1726196470Srnoland	if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
1727196470Srnoland		max_bytes = 8192;
1728196470Srnoland
1729196470Srnoland		while (size_bytes) {
1730196470Srnoland			int cur_size = size_bytes;
1731196470Srnoland			int src_x = src_gpu_addr & 255;
1732196470Srnoland			int dst_x = dst_gpu_addr & 255;
1733196470Srnoland			int h = 1;
1734196470Srnoland			src_gpu_addr = src_gpu_addr & ~255;
1735196470Srnoland			dst_gpu_addr = dst_gpu_addr & ~255;
1736196470Srnoland
1737196470Srnoland			if (!src_x && !dst_x) {
1738196470Srnoland				h = (cur_size / max_bytes);
1739197155Srnoland				if (h > 8192)
1740197155Srnoland					h = 8192;
1741196470Srnoland				if (h == 0)
1742196470Srnoland					h = 1;
1743196470Srnoland				else
1744196470Srnoland					cur_size = max_bytes;
1745196470Srnoland			} else {
1746196470Srnoland				if (cur_size > max_bytes)
1747196470Srnoland					cur_size = max_bytes;
1748196470Srnoland				if (cur_size > (max_bytes - dst_x))
1749196470Srnoland					cur_size = (max_bytes - dst_x);
1750196470Srnoland				if (cur_size > (max_bytes - src_x))
1751196470Srnoland					cur_size = (max_bytes - src_x);
1752196470Srnoland			}
1753196470Srnoland
1754196470Srnoland			if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) {
1755196470Srnoland				dev_priv->blit_vb->used = 0;
1756196470Srnoland				radeon_cp_discard_buffer(dev, dev_priv->blit_vb);
1757196470Srnoland				dev_priv->blit_vb = radeon_freelist_get(dev);
1758196470Srnoland				if (!dev_priv->blit_vb)
1759196470Srnoland					return;
1760196470Srnoland				set_shaders(dev);
1761207066Srnoland				vb = (u32 *) ((char *)dev->agp_buffer_map->virtual +
1762198696Srnoland				    dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
1763196470Srnoland			}
1764196470Srnoland
1765196470Srnoland			vb[0] = i2f(dst_x);
1766196470Srnoland			vb[1] = 0;
1767196470Srnoland			vb[2] = i2f(src_x);
1768196470Srnoland			vb[3] = 0;
1769196470Srnoland
1770196470Srnoland			vb[4] = i2f(dst_x);
1771196470Srnoland			vb[5] = i2f(h);
1772196470Srnoland			vb[6] = i2f(src_x);
1773196470Srnoland			vb[7] = i2f(h);
1774196470Srnoland
1775196470Srnoland			vb[8] = i2f(dst_x + cur_size);
1776196470Srnoland			vb[9] = i2f(h);
1777196470Srnoland			vb[10] = i2f(src_x + cur_size);
1778196470Srnoland			vb[11] = i2f(h);
1779196470Srnoland
1780196470Srnoland			/* src */
1781196470Srnoland			set_tex_resource(dev_priv, FMT_8,
1782196470Srnoland					 src_x + cur_size, h, src_x + cur_size,
1783196470Srnoland					 src_gpu_addr);
1784196470Srnoland
1785196470Srnoland			cp_set_surface_sync(dev_priv,
1786196470Srnoland					    R600_TC_ACTION_ENA, (src_x + cur_size * h), src_gpu_addr);
1787196470Srnoland
1788196470Srnoland			/* dst */
1789196470Srnoland			set_render_target(dev_priv, COLOR_8,
1790196470Srnoland					  dst_x + cur_size, h,
1791196470Srnoland					  dst_gpu_addr);
1792196470Srnoland
1793196470Srnoland			/* scissors */
1794196470Srnoland			set_scissors(dev_priv, dst_x, 0, dst_x + cur_size, h);
1795196470Srnoland
1796196470Srnoland			/* Vertex buffer setup */
1797196470Srnoland			vb_addr = dev_priv->gart_buffers_offset +
1798196470Srnoland                                dev_priv->blit_vb->offset +
1799196470Srnoland				dev_priv->blit_vb->used;
1800196470Srnoland			set_vtx_resource(dev_priv, vb_addr);
1801196470Srnoland
1802196470Srnoland			/* draw */
1803196470Srnoland			draw_auto(dev_priv);
1804196470Srnoland
1805196470Srnoland			cp_set_surface_sync(dev_priv,
1806196470Srnoland					    R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
1807196470Srnoland					    cur_size * h, dst_gpu_addr);
1808196470Srnoland
1809196470Srnoland			vb += 12;
1810196470Srnoland			dev_priv->blit_vb->used += 12 * 4;
1811196470Srnoland
1812197155Srnoland			src_gpu_addr += cur_size * h;
1813197155Srnoland			dst_gpu_addr += cur_size * h;
1814196470Srnoland			size_bytes -= cur_size * h;
1815196470Srnoland		}
1816196470Srnoland	} else {
1817196470Srnoland		max_bytes = 8192 * 4;
1818196470Srnoland
1819196470Srnoland		while (size_bytes) {
1820196470Srnoland			int cur_size = size_bytes;
1821196470Srnoland			int src_x = (src_gpu_addr & 255);
1822196470Srnoland			int dst_x = (dst_gpu_addr & 255);
1823196470Srnoland			int h = 1;
1824196470Srnoland			src_gpu_addr = src_gpu_addr & ~255;
1825196470Srnoland			dst_gpu_addr = dst_gpu_addr & ~255;
1826196470Srnoland
1827196470Srnoland			if (!src_x && !dst_x) {
1828196470Srnoland				h = (cur_size / max_bytes);
1829197155Srnoland				if (h > 8192)
1830197155Srnoland					h = 8192;
1831196470Srnoland				if (h == 0)
1832196470Srnoland					h = 1;
1833196470Srnoland				else
1834196470Srnoland					cur_size = max_bytes;
1835196470Srnoland			} else {
1836196470Srnoland				if (cur_size > max_bytes)
1837196470Srnoland				    cur_size = max_bytes;
1838196470Srnoland				if (cur_size > (max_bytes - dst_x))
1839196470Srnoland					cur_size = (max_bytes - dst_x);
1840196470Srnoland				if (cur_size > (max_bytes - src_x))
1841196470Srnoland					cur_size = (max_bytes - src_x);
1842196470Srnoland			}
1843196470Srnoland
1844196470Srnoland			if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) {
1845196470Srnoland				dev_priv->blit_vb->used = 0;
1846196470Srnoland				radeon_cp_discard_buffer(dev, dev_priv->blit_vb);
1847196470Srnoland				dev_priv->blit_vb = radeon_freelist_get(dev);
1848196470Srnoland				if (!dev_priv->blit_vb)
1849196470Srnoland					return;
1850196470Srnoland				set_shaders(dev);
1851207066Srnoland				vb = (u32 *) ((char *)dev->agp_buffer_map->virtual +
1852198696Srnoland				    dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
1853196470Srnoland			}
1854196470Srnoland
1855196470Srnoland			vb[0] = i2f(dst_x / 4);
1856196470Srnoland			vb[1] = 0;
1857196470Srnoland			vb[2] = i2f(src_x / 4);
1858196470Srnoland			vb[3] = 0;
1859196470Srnoland
1860196470Srnoland			vb[4] = i2f(dst_x / 4);
1861196470Srnoland			vb[5] = i2f(h);
1862196470Srnoland			vb[6] = i2f(src_x / 4);
1863196470Srnoland			vb[7] = i2f(h);
1864196470Srnoland
1865196470Srnoland			vb[8] = i2f((dst_x + cur_size) / 4);
1866196470Srnoland			vb[9] = i2f(h);
1867196470Srnoland			vb[10] = i2f((src_x + cur_size) / 4);
1868196470Srnoland			vb[11] = i2f(h);
1869196470Srnoland
1870196470Srnoland			/* src */
1871196470Srnoland			set_tex_resource(dev_priv, FMT_8_8_8_8,
1872196470Srnoland					 (src_x + cur_size) / 4,
1873196470Srnoland					 h, (src_x + cur_size) / 4,
1874196470Srnoland					 src_gpu_addr);
1875196470Srnoland
1876196470Srnoland			cp_set_surface_sync(dev_priv,
1877196470Srnoland					    R600_TC_ACTION_ENA, (src_x + cur_size * h), src_gpu_addr);
1878196470Srnoland
1879196470Srnoland			/* dst */
1880196470Srnoland			set_render_target(dev_priv, COLOR_8_8_8_8,
1881197604Srnoland					  (dst_x + cur_size) / 4, h,
1882196470Srnoland					  dst_gpu_addr);
1883196470Srnoland
1884196470Srnoland			/* scissors */
1885196470Srnoland			set_scissors(dev_priv, (dst_x / 4), 0, (dst_x + cur_size / 4), h);
1886196470Srnoland
1887196470Srnoland			/* Vertex buffer setup */
1888196470Srnoland			vb_addr = dev_priv->gart_buffers_offset +
1889196470Srnoland                                dev_priv->blit_vb->offset +
1890196470Srnoland				dev_priv->blit_vb->used;
1891196470Srnoland			set_vtx_resource(dev_priv, vb_addr);
1892196470Srnoland
1893196470Srnoland			/* draw */
1894196470Srnoland			draw_auto(dev_priv);
1895196470Srnoland
1896196470Srnoland			cp_set_surface_sync(dev_priv,
1897196470Srnoland					    R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
1898196470Srnoland					    cur_size * h, dst_gpu_addr);
1899196470Srnoland
1900196470Srnoland			vb += 12;
1901196470Srnoland			dev_priv->blit_vb->used += 12 * 4;
1902196470Srnoland
1903197155Srnoland			src_gpu_addr += cur_size * h;
1904197155Srnoland			dst_gpu_addr += cur_size * h;
1905196470Srnoland			size_bytes -= cur_size * h;
1906196470Srnoland		}
1907196470Srnoland	}
1908196470Srnoland}
1909196470Srnoland
1910196470Srnolandvoid
1911196470Srnolandr600_blit_swap(struct drm_device *dev,
1912196470Srnoland	       uint64_t src_gpu_addr, uint64_t dst_gpu_addr,
1913196470Srnoland	       int sx, int sy, int dx, int dy,
1914196470Srnoland	       int w, int h, int src_pitch, int dst_pitch, int cpp)
1915196470Srnoland{
1916196470Srnoland	drm_radeon_private_t *dev_priv = dev->dev_private;
1917196470Srnoland	int cb_format, tex_format;
1918198696Srnoland	int sx2, sy2, dx2, dy2;
1919196470Srnoland	u64 vb_addr;
1920196470Srnoland	u32 *vb;
1921196470Srnoland
1922196470Srnoland	if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) {
1923196470Srnoland		dev_priv->blit_vb->used = 0;
1924196470Srnoland		radeon_cp_discard_buffer(dev, dev_priv->blit_vb);
1925196470Srnoland		dev_priv->blit_vb = radeon_freelist_get(dev);
1926196470Srnoland		if (!dev_priv->blit_vb)
1927196470Srnoland			return;
1928196470Srnoland		set_shaders(dev);
1929196470Srnoland	}
1930207066Srnoland	vb = (u32 *) ((char *)dev->agp_buffer_map->virtual +
1931198696Srnoland	    dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
1932196470Srnoland
1933198696Srnoland	sx2 = sx + w;
1934198696Srnoland	sy2 = sy + h;
1935198696Srnoland	dx2 = dx + w;
1936198696Srnoland	dy2 = dy + h;
1937196470Srnoland
1938196470Srnoland	vb[0] = i2f(dx);
1939196470Srnoland	vb[1] = i2f(dy);
1940196470Srnoland	vb[2] = i2f(sx);
1941196470Srnoland	vb[3] = i2f(sy);
1942196470Srnoland
1943196470Srnoland	vb[4] = i2f(dx);
1944198696Srnoland	vb[5] = i2f(dy2);
1945196470Srnoland	vb[6] = i2f(sx);
1946198696Srnoland	vb[7] = i2f(sy2);
1947196470Srnoland
1948198696Srnoland	vb[8] = i2f(dx2);
1949198696Srnoland	vb[9] = i2f(dy2);
1950198696Srnoland	vb[10] = i2f(sx2);
1951198696Srnoland	vb[11] = i2f(sy2);
1952196470Srnoland
1953198696Srnoland	switch(cpp) {
1954198696Srnoland	case 4:
1955198696Srnoland		cb_format = COLOR_8_8_8_8;
1956198696Srnoland		tex_format = FMT_8_8_8_8;
1957198696Srnoland		break;
1958198696Srnoland	case 2:
1959198696Srnoland		cb_format = COLOR_5_6_5;
1960198696Srnoland		tex_format = FMT_5_6_5;
1961198696Srnoland		break;
1962198696Srnoland	default:
1963198696Srnoland		cb_format = COLOR_8;
1964198696Srnoland		tex_format = FMT_8;
1965198696Srnoland		break;
1966198696Srnoland	}
1967198696Srnoland
1968196470Srnoland	/* src */
1969196470Srnoland	set_tex_resource(dev_priv, tex_format,
1970196470Srnoland			 src_pitch / cpp,
1971198696Srnoland			 sy2, src_pitch / cpp,
1972196470Srnoland			 src_gpu_addr);
1973196470Srnoland
1974196470Srnoland	cp_set_surface_sync(dev_priv,
1975198696Srnoland			    R600_TC_ACTION_ENA, src_pitch * sy2, src_gpu_addr);
1976196470Srnoland
1977196470Srnoland	/* dst */
1978196470Srnoland	set_render_target(dev_priv, cb_format,
1979198696Srnoland			  dst_pitch / cpp, dy2,
1980196470Srnoland			  dst_gpu_addr);
1981196470Srnoland
1982196470Srnoland	/* scissors */
1983198696Srnoland	set_scissors(dev_priv, dx, dy, dx2, dy2);
1984196470Srnoland
1985196470Srnoland	/* Vertex buffer setup */
1986196470Srnoland	vb_addr = dev_priv->gart_buffers_offset +
1987196470Srnoland		dev_priv->blit_vb->offset +
1988196470Srnoland		dev_priv->blit_vb->used;
1989196470Srnoland	set_vtx_resource(dev_priv, vb_addr);
1990196470Srnoland
1991196470Srnoland	/* draw */
1992196470Srnoland	draw_auto(dev_priv);
1993196470Srnoland
1994196470Srnoland	cp_set_surface_sync(dev_priv,
1995196470Srnoland			    R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
1996198696Srnoland			    dst_pitch * dy2, dst_gpu_addr);
1997196470Srnoland
1998196470Srnoland	dev_priv->blit_vb->used += 12 * 4;
1999196470Srnoland}
2000