t4_ioctl.h revision 308304
154359Sroberto/*- 254359Sroberto * Copyright (c) 2011 Chelsio Communications, Inc. 354359Sroberto * All rights reserved. 454359Sroberto * Written by: Navdeep Parhar <np@FreeBSD.org> 554359Sroberto * 654359Sroberto * Redistribution and use in source and binary forms, with or without 754359Sroberto * modification, are permitted provided that the following conditions 854359Sroberto * are met: 954359Sroberto * 1. Redistributions of source code must retain the above copyright 1054359Sroberto * notice, this list of conditions and the following disclaimer. 1154359Sroberto * 2. Redistributions in binary form must reproduce the above copyright 1254359Sroberto * notice, this list of conditions and the following disclaimer in the 1354359Sroberto * documentation and/or other materials provided with the distribution. 1454359Sroberto * 1554359Sroberto * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1654359Sroberto * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1754359Sroberto * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1854359Sroberto * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1954359Sroberto * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2054359Sroberto * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2154359Sroberto * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2254359Sroberto * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2354359Sroberto * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2454359Sroberto * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2554359Sroberto * SUCH DAMAGE. 2654359Sroberto * 2754359Sroberto * $FreeBSD: stable/10/sys/dev/cxgbe/t4_ioctl.h 308304 2016-11-04 18:45:06Z jhb $ 2854359Sroberto * 2954359Sroberto */ 3054359Sroberto 3154359Sroberto#ifndef __T4_IOCTL_H__ 3254359Sroberto#define __T4_IOCTL_H__ 3354359Sroberto 3454359Sroberto#include <sys/types.h> 3554359Sroberto#include <net/ethernet.h> 3654359Sroberto 3754359Sroberto/* 3854359Sroberto * Ioctl commands specific to this driver. 3954359Sroberto */ 4054359Srobertoenum { 4154359Sroberto T4_GETREG = 0x40, /* read register */ 4254359Sroberto T4_SETREG, /* write register */ 4354359Sroberto T4_REGDUMP, /* dump of all registers */ 4454359Sroberto T4_GET_FILTER_MODE, /* get global filter mode */ 4554359Sroberto T4_SET_FILTER_MODE, /* set global filter mode */ 4654359Sroberto T4_GET_FILTER, /* get information about a filter */ 4754359Sroberto T4_SET_FILTER, /* program a filter */ 4854359Sroberto T4_DEL_FILTER, /* delete a filter */ 4954359Sroberto T4_GET_SGE_CONTEXT, /* get SGE context for a queue */ 50280849Scy T4_LOAD_FW, /* flash firmware */ 51280849Scy T4_GET_MEM, /* read memory */ 52280849Scy T4_GET_I2C, /* read from i2c addressible device */ 5354359Sroberto T4_CLEAR_STATS, /* clear a port's MAC statistics */ 5454359Sroberto T4_SET_OFLD_POLICY, /* Set offload policy */ 5554359Sroberto T4_SET_SCHED_CLASS, /* set sched class */ 5654359Sroberto T4_SET_SCHED_QUEUE, /* set queue class */ 5754359Sroberto T4_GET_TRACER, /* get information about a tracer */ 5854359Sroberto T4_SET_TRACER, /* program a tracer */ 5954359Sroberto}; 6054359Sroberto 6154359Srobertostruct t4_reg { 6254359Sroberto uint32_t addr; 6354359Sroberto uint32_t size; 6454359Sroberto uint64_t val; 6554359Sroberto}; 6654359Sroberto 6754359Sroberto#define T4_REGDUMP_SIZE (160 * 1024) 6854359Sroberto#define T5_REGDUMP_SIZE (332 * 1024) 6954359Srobertostruct t4_regdump { 7054359Sroberto uint32_t version; 7154359Sroberto uint32_t len; /* bytes */ 7254359Sroberto uint32_t *data; 7354359Sroberto}; 7454359Sroberto 7554359Srobertostruct t4_data { 7654359Sroberto uint32_t len; 7754359Sroberto uint8_t *data; 7854359Sroberto}; 7954359Sroberto 8054359Srobertostruct t4_i2c_data { 8154359Sroberto uint8_t port_id; 8254359Sroberto uint8_t dev_addr; 8354359Sroberto uint8_t offset; 8454359Sroberto uint8_t len; 8554359Sroberto uint8_t data[8]; 8654359Sroberto}; 8754359Sroberto 8854359Sroberto/* 8954359Sroberto * A hardware filter is some valid combination of these. 9054359Sroberto */ 9154359Sroberto#define T4_FILTER_IPv4 0x1 /* IPv4 packet */ 9254359Sroberto#define T4_FILTER_IPv6 0x2 /* IPv6 packet */ 9354359Sroberto#define T4_FILTER_IP_SADDR 0x4 /* Source IP address or network */ 9454359Sroberto#define T4_FILTER_IP_DADDR 0x8 /* Destination IP address or network */ 9554359Sroberto#define T4_FILTER_IP_SPORT 0x10 /* Source IP port */ 9654359Sroberto#define T4_FILTER_IP_DPORT 0x20 /* Destination IP port */ 9754359Sroberto#define T4_FILTER_FCoE 0x40 /* Fibre Channel over Ethernet packet */ 9854359Sroberto#define T4_FILTER_PORT 0x80 /* Physical ingress port */ 9954359Sroberto#define T4_FILTER_VNIC 0x100 /* VNIC id or outer VLAN */ 10054359Sroberto#define T4_FILTER_VLAN 0x200 /* VLAN ID */ 10154359Sroberto#define T4_FILTER_IP_TOS 0x400 /* IPv4 TOS/IPv6 Traffic Class */ 10254359Sroberto#define T4_FILTER_IP_PROTO 0x800 /* IP protocol */ 10354359Sroberto#define T4_FILTER_ETH_TYPE 0x1000 /* Ethernet Type */ 10454359Sroberto#define T4_FILTER_MAC_IDX 0x2000 /* MPS MAC address match index */ 10554359Sroberto#define T4_FILTER_MPS_HIT_TYPE 0x4000 /* MPS match type */ 10654359Sroberto#define T4_FILTER_IP_FRAGMENT 0x8000 /* IP fragment */ 10754359Sroberto 10854359Sroberto#define T4_FILTER_IC_VNIC 0x80000000 /* TP Ingress Config's F_VNIC 10954359Sroberto bit. It indicates whether 11054359Sroberto T4_FILTER_VNIC bit means VNIC 11154359Sroberto id (PF/VF) or outer VLAN. 11254359Sroberto 0 = oVLAN, 1 = VNIC */ 11354359Sroberto 11454359Sroberto/* Filter action */ 11554359Srobertoenum { 11654359Sroberto FILTER_PASS = 0, /* default */ 11754359Sroberto FILTER_DROP, 11854359Sroberto FILTER_SWITCH 11954359Sroberto}; 120289764Sglebius 12154359Sroberto/* 802.1q manipulation on FILTER_SWITCH */ 12254359Srobertoenum { 12354359Sroberto VLAN_NOCHANGE = 0, /* default */ 12454359Sroberto VLAN_REMOVE, 12554359Sroberto VLAN_INSERT, 12654359Sroberto VLAN_REWRITE 12754359Sroberto}; 12854359Sroberto 12954359Sroberto/* MPS match type */ 13054359Srobertoenum { 13154359Sroberto UCAST_EXACT = 0, /* exact unicast match */ 13254359Sroberto UCAST_HASH = 1, /* inexact (hashed) unicast match */ 13354359Sroberto MCAST_EXACT = 2, /* exact multicast match */ 13454359Sroberto MCAST_HASH = 3, /* inexact (hashed) multicast match */ 13554359Sroberto PROMISC = 4, /* no match but port is promiscuous */ 13654359Sroberto HYPPROMISC = 5, /* port is hypervisor-promisuous + not bcast */ 13754359Sroberto BCAST = 6, /* broadcast packet */ 13854359Sroberto}; 13954359Sroberto 14054359Sroberto/* Rx steering */ 14154359Srobertoenum { 14254359Sroberto DST_MODE_QUEUE, /* queue is directly specified by filter */ 14354359Sroberto DST_MODE_RSS_QUEUE, /* filter specifies RSS entry containing queue */ 14454359Sroberto DST_MODE_RSS, /* queue selected by default RSS hash lookup */ 14554359Sroberto DST_MODE_FILT_RSS /* queue selected by hashing in filter-specified 14654359Sroberto RSS subtable */ 147280849Scy}; 148280849Scy 14954359Srobertostruct t4_filter_tuple { 15054359Sroberto /* 15154359Sroberto * These are always available. 15254359Sroberto */ 15354359Sroberto uint8_t sip[16]; /* source IP address (IPv4 in [3:0]) */ 15454359Sroberto uint8_t dip[16]; /* destinatin IP address (IPv4 in [3:0]) */ 15554359Sroberto uint16_t sport; /* source port */ 15654359Sroberto uint16_t dport; /* destination port */ 15754359Sroberto 15854359Sroberto /* 15954359Sroberto * A combination of these (upto 36 bits) is available. TP_VLAN_PRI_MAP 16054359Sroberto * is used to select the global mode and all filters are limited to the 16154359Sroberto * set of fields allowed by the global mode. 16254359Sroberto */ 16354359Sroberto uint16_t vnic; /* VNIC id (PF/VF) or outer VLAN tag */ 16454359Sroberto uint16_t vlan; /* VLAN tag */ 16554359Sroberto uint16_t ethtype; /* Ethernet type */ 16654359Sroberto uint8_t tos; /* TOS/Traffic Type */ 16754359Sroberto uint8_t proto; /* protocol type */ 16854359Sroberto uint32_t fcoe:1; /* FCoE packet */ 16954359Sroberto uint32_t iport:3; /* ingress port */ 17054359Sroberto uint32_t matchtype:3; /* MPS match type */ 17154359Sroberto uint32_t frag:1; /* fragmentation extension header */ 17254359Sroberto uint32_t macidx:9; /* exact match MAC index */ 17354359Sroberto uint32_t vlan_vld:1; /* VLAN valid */ 17454359Sroberto uint32_t ovlan_vld:1; /* outer VLAN tag valid, value in "vnic" */ 17554359Sroberto uint32_t pfvf_vld:1; /* VNIC id (PF/VF) valid, value in "vnic" */ 17654359Sroberto}; 17754359Sroberto 17854359Srobertostruct t4_filter_specification { 17954359Sroberto uint32_t hitcnts:1; /* count filter hits in TCB */ 18054359Sroberto uint32_t prio:1; /* filter has priority over active/server */ 18154359Sroberto uint32_t type:1; /* 0 => IPv4, 1 => IPv6 */ 18254359Sroberto uint32_t action:2; /* drop, pass, switch */ 18354359Sroberto uint32_t rpttid:1; /* report TID in RSS hash field */ 18454359Sroberto uint32_t dirsteer:1; /* 0 => RSS, 1 => steer to iq */ 18554359Sroberto uint32_t iq:10; /* ingress queue */ 18654359Sroberto uint32_t maskhash:1; /* dirsteer=0: store RSS hash in TCB */ 18754359Sroberto uint32_t dirsteerhash:1;/* dirsteer=1: 0 => TCB contains RSS hash */ 18854359Sroberto /* 1 => TCB contains IQ ID */ 18954359Sroberto 19054359Sroberto /* 19154359Sroberto * Switch proxy/rewrite fields. An ingress packet which matches a 19254359Sroberto * filter with "switch" set will be looped back out as an egress 19354359Sroberto * packet -- potentially with some Ethernet header rewriting. 19454359Sroberto */ 19554359Sroberto uint32_t eport:2; /* egress port to switch packet out */ 19654359Sroberto uint32_t newdmac:1; /* rewrite destination MAC address */ 19754359Sroberto uint32_t newsmac:1; /* rewrite source MAC address */ 19854359Sroberto uint32_t newvlan:2; /* rewrite VLAN Tag */ 19954359Sroberto uint8_t dmac[ETHER_ADDR_LEN]; /* new destination MAC address */ 20054359Sroberto uint8_t smac[ETHER_ADDR_LEN]; /* new source MAC address */ 20154359Sroberto uint16_t vlan; /* VLAN Tag to insert */ 20254359Sroberto 20354359Sroberto /* 20454359Sroberto * Filter rule value/mask pairs. 20554359Sroberto */ 20654359Sroberto struct t4_filter_tuple val; 20754359Sroberto struct t4_filter_tuple mask; 20854359Sroberto}; 20954359Sroberto 21054359Srobertostruct t4_filter { 21154359Sroberto uint32_t idx; 21254359Sroberto uint16_t l2tidx; 21354359Sroberto uint16_t smtidx; 21454359Sroberto uint64_t hits; 21554359Sroberto struct t4_filter_specification fs; 21654359Sroberto}; 21754359Sroberto 21854359Sroberto/* 21954359Sroberto * Support for "sched-class" command to allow a TX Scheduling Class to be 22054359Sroberto * programmed with various parameters. 22154359Sroberto */ 22254359Srobertostruct t4_sched_params { 22354359Sroberto int8_t subcmd; /* sub-command */ 22454359Sroberto int8_t type; /* packet or flow */ 22554359Sroberto union { 22654359Sroberto struct { /* sub-command SCHED_CLASS_CONFIG */ 22754359Sroberto int8_t minmax; /* minmax enable */ 22854359Sroberto } config; 22954359Sroberto struct { /* sub-command SCHED_CLASS_PARAMS */ 23054359Sroberto int8_t level; /* scheduler hierarchy level */ 23154359Sroberto int8_t mode; /* per-class or per-flow */ 23254359Sroberto int8_t rateunit; /* bit or packet rate */ 23354359Sroberto int8_t ratemode; /* %port relative or kbps 23454359Sroberto absolute */ 23554359Sroberto int8_t channel; /* scheduler channel [0..N] */ 23654359Sroberto int8_t cl; /* scheduler class [0..N] */ 23754359Sroberto int32_t minrate; /* minimum rate */ 23854359Sroberto int32_t maxrate; /* maximum rate */ 23954359Sroberto int16_t weight; /* percent weight */ 24054359Sroberto int16_t pktsize; /* average packet size */ 24154359Sroberto } params; 24254359Sroberto uint8_t reserved[6 + 8 * 8]; 24354359Sroberto } u; 24454359Sroberto}; 24554359Sroberto 24654359Srobertoenum { 24754359Sroberto SCHED_CLASS_SUBCMD_CONFIG, /* config sub-command */ 24854359Sroberto SCHED_CLASS_SUBCMD_PARAMS, /* params sub-command */ 24954359Sroberto}; 25054359Sroberto 25154359Srobertoenum { 25254359Sroberto SCHED_CLASS_TYPE_PACKET, 25354359Sroberto}; 25454359Sroberto 25554359Srobertoenum { 25654359Sroberto SCHED_CLASS_LEVEL_CL_RL, /* class rate limiter */ 25754359Sroberto SCHED_CLASS_LEVEL_CL_WRR, /* class weighted round robin */ 25854359Sroberto SCHED_CLASS_LEVEL_CH_RL, /* channel rate limiter */ 25954359Sroberto}; 26054359Sroberto 26154359Srobertoenum { 26254359Sroberto SCHED_CLASS_MODE_CLASS, /* per-class scheduling */ 26354359Sroberto SCHED_CLASS_MODE_FLOW, /* per-flow scheduling */ 26454359Sroberto}; 26554359Sroberto 26654359Srobertoenum { 26754359Sroberto SCHED_CLASS_RATEUNIT_BITS, /* bit rate scheduling */ 26854359Sroberto SCHED_CLASS_RATEUNIT_PKTS, /* packet rate scheduling */ 26954359Sroberto}; 27054359Sroberto 27154359Srobertoenum { 27254359Sroberto SCHED_CLASS_RATEMODE_REL, /* percent of port bandwidth */ 27354359Sroberto SCHED_CLASS_RATEMODE_ABS, /* Kb/s */ 27454359Sroberto}; 27554359Sroberto 27654359Sroberto/* 27754359Sroberto * Support for "sched_queue" command to allow one or more NIC TX Queues to be 27854359Sroberto * bound to a TX Scheduling Class. 27954359Sroberto */ 28054359Srobertostruct t4_sched_queue { 28154359Sroberto uint8_t port; 28254359Sroberto int8_t queue; /* queue index; -1 => all queues */ 28354359Sroberto int8_t cl; /* class index; -1 => unbind */ 28454359Sroberto}; 28554359Sroberto 28654359Sroberto#define T4_SGE_CONTEXT_SIZE 24 28754359Srobertoenum { 28854359Sroberto SGE_CONTEXT_EGRESS, 28954359Sroberto SGE_CONTEXT_INGRESS, 29054359Sroberto SGE_CONTEXT_FLM, 29154359Sroberto SGE_CONTEXT_CNM 29254359Sroberto}; 29354359Sroberto 29454359Srobertostruct t4_sge_context { 29554359Sroberto uint32_t mem_id; 29654359Sroberto uint32_t cid; 29754359Sroberto uint32_t data[T4_SGE_CONTEXT_SIZE / 4]; 29854359Sroberto}; 29954359Sroberto 30054359Srobertostruct t4_mem_range { 30154359Sroberto uint32_t addr; 30254359Sroberto uint32_t len; 30354359Sroberto uint32_t *data; 30454359Sroberto}; 305182007Sroberto 30654359Sroberto#define T4_TRACE_LEN 112 30754359Srobertostruct t4_trace_params { 30854359Sroberto uint32_t data[T4_TRACE_LEN / 4]; 30954359Sroberto uint32_t mask[T4_TRACE_LEN / 4]; 31054359Sroberto uint16_t snap_len; 31154359Sroberto uint16_t min_len; 31254359Sroberto uint8_t skip_ofst; 31354359Sroberto uint8_t skip_len; 31454359Sroberto uint8_t invert; 31554359Sroberto uint8_t port; 31654359Sroberto}; 31754359Sroberto 31854359Srobertostruct t4_tracer { 31954359Sroberto uint8_t idx; 32054359Sroberto uint8_t enabled; 32154359Sroberto uint8_t valid; 32254359Sroberto struct t4_trace_params tp; 32354359Sroberto}; 32454359Sroberto 32554359Sroberto#define CHELSIO_T4_GETREG _IOWR('f', T4_GETREG, struct t4_reg) 32654359Sroberto#define CHELSIO_T4_SETREG _IOW('f', T4_SETREG, struct t4_reg) 32754359Sroberto#define CHELSIO_T4_REGDUMP _IOWR('f', T4_REGDUMP, struct t4_regdump) 32854359Sroberto#define CHELSIO_T4_GET_FILTER_MODE _IOWR('f', T4_GET_FILTER_MODE, uint32_t) 32954359Sroberto#define CHELSIO_T4_SET_FILTER_MODE _IOW('f', T4_SET_FILTER_MODE, uint32_t) 33054359Sroberto#define CHELSIO_T4_GET_FILTER _IOWR('f', T4_GET_FILTER, struct t4_filter) 33154359Sroberto#define CHELSIO_T4_SET_FILTER _IOW('f', T4_SET_FILTER, struct t4_filter) 33254359Sroberto#define CHELSIO_T4_DEL_FILTER _IOW('f', T4_DEL_FILTER, struct t4_filter) 33354359Sroberto#define CHELSIO_T4_GET_SGE_CONTEXT _IOWR('f', T4_GET_SGE_CONTEXT, \ 33454359Sroberto struct t4_sge_context) 33554359Sroberto#define CHELSIO_T4_LOAD_FW _IOW('f', T4_LOAD_FW, struct t4_data) 33654359Sroberto#define CHELSIO_T4_GET_MEM _IOW('f', T4_GET_MEM, struct t4_mem_range) 33754359Sroberto#define CHELSIO_T4_GET_I2C _IOWR('f', T4_GET_I2C, struct t4_i2c_data) 33854359Sroberto#define CHELSIO_T4_CLEAR_STATS _IOW('f', T4_CLEAR_STATS, uint32_t) 33954359Sroberto#define CHELSIO_T4_SCHED_CLASS _IOW('f', T4_SET_SCHED_CLASS, \ 34054359Sroberto struct t4_sched_params) 34154359Sroberto#define CHELSIO_T4_SCHED_QUEUE _IOW('f', T4_SET_SCHED_QUEUE, \ 34254359Sroberto struct t4_sched_queue) 34354359Sroberto#define CHELSIO_T4_GET_TRACER _IOWR('f', T4_GET_TRACER, struct t4_tracer) 34454359Sroberto#define CHELSIO_T4_SET_TRACER _IOW('f', T4_SET_TRACER, struct t4_tracer) 34554359Sroberto#endif 34654359Sroberto