1218792Snp/*- 2308304Sjhb * Copyright (c) 2011, 2016 Chelsio Communications, Inc. 3218792Snp * All rights reserved. 4218792Snp * 5218792Snp * Redistribution and use in source and binary forms, with or without 6218792Snp * modification, are permitted provided that the following conditions 7218792Snp * are met: 8218792Snp * 1. Redistributions of source code must retain the above copyright 9218792Snp * notice, this list of conditions and the following disclaimer. 10218792Snp * 2. Redistributions in binary form must reproduce the above copyright 11218792Snp * notice, this list of conditions and the following disclaimer in the 12218792Snp * documentation and/or other materials provided with the distribution. 13218792Snp * 14218792Snp * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15218792Snp * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16218792Snp * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17218792Snp * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18218792Snp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19218792Snp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20218792Snp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21218792Snp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22218792Snp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23218792Snp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24218792Snp * SUCH DAMAGE. 25218792Snp * 26218792Snp * $FreeBSD: stable/10/sys/dev/cxgbe/common/t4_msg.h 318775 2017-05-24 05:30:36Z np $ 27218792Snp * 28218792Snp */ 29218792Snp 30218792Snp#ifndef T4_MSG_H 31218792Snp#define T4_MSG_H 32218792Snp 33218792Snpenum { 34218792Snp CPL_PASS_OPEN_REQ = 0x1, 35218792Snp CPL_PASS_ACCEPT_RPL = 0x2, 36218792Snp CPL_ACT_OPEN_REQ = 0x3, 37218792Snp CPL_SET_TCB = 0x4, 38218792Snp CPL_SET_TCB_FIELD = 0x5, 39218792Snp CPL_GET_TCB = 0x6, 40218792Snp CPL_CLOSE_CON_REQ = 0x8, 41218792Snp CPL_CLOSE_LISTSRV_REQ = 0x9, 42218792Snp CPL_ABORT_REQ = 0xA, 43218792Snp CPL_ABORT_RPL = 0xB, 44218792Snp CPL_TX_DATA = 0xC, 45218792Snp CPL_RX_DATA_ACK = 0xD, 46218792Snp CPL_TX_PKT = 0xE, 47218792Snp CPL_RTE_DELETE_REQ = 0xF, 48218792Snp CPL_RTE_WRITE_REQ = 0x10, 49218792Snp CPL_RTE_READ_REQ = 0x11, 50218792Snp CPL_L2T_WRITE_REQ = 0x12, 51218792Snp CPL_L2T_READ_REQ = 0x13, 52218792Snp CPL_SMT_WRITE_REQ = 0x14, 53218792Snp CPL_SMT_READ_REQ = 0x15, 54237436Snp CPL_TAG_WRITE_REQ = 0x16, 55218792Snp CPL_BARRIER = 0x18, 56218792Snp CPL_TID_RELEASE = 0x1A, 57237436Snp CPL_TAG_READ_REQ = 0x1B, 58308304Sjhb CPL_SRQ_TABLE_REQ = 0x1C, 59237436Snp CPL_TX_PKT_FSO = 0x1E, 60308304Sjhb CPL_TX_DATA_ISO = 0x1F, 61218792Snp 62218792Snp CPL_CLOSE_LISTSRV_RPL = 0x20, 63218792Snp CPL_ERROR = 0x21, 64218792Snp CPL_GET_TCB_RPL = 0x22, 65218792Snp CPL_L2T_WRITE_RPL = 0x23, 66218792Snp CPL_PASS_OPEN_RPL = 0x24, 67218792Snp CPL_ACT_OPEN_RPL = 0x25, 68218792Snp CPL_PEER_CLOSE = 0x26, 69218792Snp CPL_RTE_DELETE_RPL = 0x27, 70218792Snp CPL_RTE_WRITE_RPL = 0x28, 71218792Snp CPL_RX_URG_PKT = 0x29, 72237436Snp CPL_TAG_WRITE_RPL = 0x2A, 73218792Snp CPL_ABORT_REQ_RSS = 0x2B, 74218792Snp CPL_RX_URG_NOTIFY = 0x2C, 75218792Snp CPL_ABORT_RPL_RSS = 0x2D, 76218792Snp CPL_SMT_WRITE_RPL = 0x2E, 77218792Snp CPL_TX_DATA_ACK = 0x2F, 78218792Snp 79218792Snp CPL_RX_PHYS_ADDR = 0x30, 80218792Snp CPL_PCMD_READ_RPL = 0x31, 81218792Snp CPL_CLOSE_CON_RPL = 0x32, 82218792Snp CPL_ISCSI_HDR = 0x33, 83218792Snp CPL_L2T_READ_RPL = 0x34, 84218792Snp CPL_RDMA_CQE = 0x35, 85218792Snp CPL_RDMA_CQE_READ_RSP = 0x36, 86218792Snp CPL_RDMA_CQE_ERR = 0x37, 87218792Snp CPL_RTE_READ_RPL = 0x38, 88218792Snp CPL_RX_DATA = 0x39, 89218792Snp CPL_SET_TCB_RPL = 0x3A, 90218792Snp CPL_RX_PKT = 0x3B, 91237436Snp CPL_TAG_READ_RPL = 0x3C, 92218792Snp CPL_HIT_NOTIFY = 0x3D, 93218792Snp CPL_PKT_NOTIFY = 0x3E, 94218792Snp CPL_RX_DDP_COMPLETE = 0x3F, 95218792Snp 96218792Snp CPL_ACT_ESTABLISH = 0x40, 97218792Snp CPL_PASS_ESTABLISH = 0x41, 98218792Snp CPL_RX_DATA_DDP = 0x42, 99218792Snp CPL_SMT_READ_RPL = 0x43, 100218792Snp CPL_PASS_ACCEPT_REQ = 0x44, 101308304Sjhb CPL_RX_ISCSI_CMP = 0x45, 102218792Snp CPL_RX_FCOE_DDP = 0x46, 103218792Snp CPL_FCOE_HDR = 0x47, 104237436Snp CPL_T5_TRACE_PKT = 0x48, 105237436Snp CPL_RX_ISCSI_DDP = 0x49, 106237436Snp CPL_RX_FCOE_DIF = 0x4A, 107237436Snp CPL_RX_DATA_DIF = 0x4B, 108248925Snp CPL_ERR_NOTIFY = 0x4D, 109318775Snp CPL_RX_TLS_CMP = 0x4E, 110218792Snp 111218792Snp CPL_RDMA_READ_REQ = 0x60, 112237436Snp CPL_RX_ISCSI_DIF = 0x60, 113218792Snp 114218792Snp CPL_SET_LE_REQ = 0x80, 115218792Snp CPL_PASS_OPEN_REQ6 = 0x81, 116218792Snp CPL_ACT_OPEN_REQ6 = 0x83, 117318775Snp CPL_TX_TLS_PDU = 0x88, 118318775Snp CPL_TX_TLS_SFO = 0x89, 119218792Snp 120318775Snp CPL_TX_SEC_PDU = 0x8A, 121318775Snp CPL_TX_TLS_ACK = 0x8B, 122318775Snp 123218792Snp CPL_RDMA_TERMINATE = 0xA2, 124218792Snp CPL_RDMA_WRITE = 0xA4, 125218792Snp CPL_SGE_EGR_UPDATE = 0xA5, 126218792Snp CPL_SET_LE_RPL = 0xA6, 127218792Snp CPL_FW2_MSG = 0xA7, 128218792Snp CPL_FW2_PLD = 0xA8, 129237436Snp CPL_T5_RDMA_READ_REQ = 0xA9, 130237436Snp CPL_RDMA_ATOMIC_REQ = 0xAA, 131237436Snp CPL_RDMA_ATOMIC_RPL = 0xAB, 132237436Snp CPL_RDMA_IMM_DATA = 0xAC, 133237436Snp CPL_RDMA_IMM_DATA_SE = 0xAD, 134308304Sjhb CPL_RX_MPS_PKT = 0xAF, 135218792Snp 136218792Snp CPL_TRACE_PKT = 0xB0, 137218792Snp CPL_RX2TX_DATA = 0xB1, 138318775Snp CPL_TLS_DATA = 0xB1, 139237436Snp CPL_ISCSI_DATA = 0xB2, 140237436Snp CPL_FCOE_DATA = 0xB3, 141218792Snp 142218792Snp CPL_FW4_MSG = 0xC0, 143218792Snp CPL_FW4_PLD = 0xC1, 144218792Snp CPL_FW4_ACK = 0xC3, 145308304Sjhb CPL_SRQ_TABLE_RPL = 0xCC, 146318775Snp CPL_RX_PHYS_DSGL = 0xD0, 147218792Snp 148218792Snp CPL_FW6_MSG = 0xE0, 149218792Snp CPL_FW6_PLD = 0xE1, 150308304Sjhb CPL_TX_TNL_LSO = 0xEC, 151218792Snp CPL_TX_PKT_LSO = 0xED, 152218792Snp CPL_TX_PKT_XT = 0xEE, 153218792Snp 154218792Snp NUM_CPL_CMDS /* must be last and previous entries must be sorted */ 155218792Snp}; 156218792Snp 157218792Snpenum CPL_error { 158218792Snp CPL_ERR_NONE = 0, 159218792Snp CPL_ERR_TCAM_PARITY = 1, 160308304Sjhb CPL_ERR_TCAM_MISS = 2, 161218792Snp CPL_ERR_TCAM_FULL = 3, 162218792Snp CPL_ERR_BAD_LENGTH = 15, 163218792Snp CPL_ERR_BAD_ROUTE = 18, 164218792Snp CPL_ERR_CONN_RESET = 20, 165218792Snp CPL_ERR_CONN_EXIST_SYNRECV = 21, 166218792Snp CPL_ERR_CONN_EXIST = 22, 167218792Snp CPL_ERR_ARP_MISS = 23, 168218792Snp CPL_ERR_BAD_SYN = 24, 169218792Snp CPL_ERR_CONN_TIMEDOUT = 30, 170218792Snp CPL_ERR_XMIT_TIMEDOUT = 31, 171218792Snp CPL_ERR_PERSIST_TIMEDOUT = 32, 172218792Snp CPL_ERR_FINWAIT2_TIMEDOUT = 33, 173218792Snp CPL_ERR_KEEPALIVE_TIMEDOUT = 34, 174218792Snp CPL_ERR_RTX_NEG_ADVICE = 35, 175218792Snp CPL_ERR_PERSIST_NEG_ADVICE = 36, 176245935Snp CPL_ERR_KEEPALV_NEG_ADVICE = 37, 177245935Snp CPL_ERR_WAIT_ARP_RPL = 41, 178218792Snp CPL_ERR_ABORT_FAILED = 42, 179218792Snp CPL_ERR_IWARP_FLM = 50, 180308304Sjhb CPL_CONTAINS_READ_RPL = 60, 181308304Sjhb CPL_CONTAINS_WRITE_RPL = 61, 182218792Snp}; 183218792Snp 184308304Sjhb/* 185308304Sjhb * Some of the error codes above implicitly indicate that there is no TID 186308304Sjhb * allocated with the result of an ACT_OPEN. We use this predicate to make 187308304Sjhb * that explicit. 188308304Sjhb */ 189308304Sjhbstatic inline int act_open_has_tid(int status) 190308304Sjhb{ 191308304Sjhb return (status != CPL_ERR_TCAM_PARITY && 192308304Sjhb status != CPL_ERR_TCAM_MISS && 193308304Sjhb status != CPL_ERR_TCAM_FULL && 194308304Sjhb status != CPL_ERR_CONN_EXIST_SYNRECV && 195308304Sjhb status != CPL_ERR_CONN_EXIST); 196308304Sjhb} 197308304Sjhb 198218792Snpenum { 199218792Snp CPL_CONN_POLICY_AUTO = 0, 200218792Snp CPL_CONN_POLICY_ASK = 1, 201218792Snp CPL_CONN_POLICY_FILTER = 2, 202218792Snp CPL_CONN_POLICY_DENY = 3 203218792Snp}; 204218792Snp 205218792Snpenum { 206218792Snp ULP_MODE_NONE = 0, 207218792Snp ULP_MODE_ISCSI = 2, 208218792Snp ULP_MODE_RDMA = 4, 209218792Snp ULP_MODE_TCPDDP = 5, 210218792Snp ULP_MODE_FCOE = 6, 211318775Snp ULP_MODE_TLS = 8, 212218792Snp}; 213218792Snp 214218792Snpenum { 215218792Snp ULP_CRC_HEADER = 1 << 0, 216218792Snp ULP_CRC_DATA = 1 << 1 217218792Snp}; 218218792Snp 219218792Snpenum { 220218792Snp CPL_PASS_OPEN_ACCEPT, 221218792Snp CPL_PASS_OPEN_REJECT, 222218792Snp CPL_PASS_OPEN_ACCEPT_TNL 223218792Snp}; 224218792Snp 225218792Snpenum { 226218792Snp CPL_ABORT_SEND_RST = 0, 227218792Snp CPL_ABORT_NO_RST, 228218792Snp}; 229218792Snp 230218792Snpenum { /* TX_PKT_XT checksum types */ 231218792Snp TX_CSUM_TCP = 0, 232218792Snp TX_CSUM_UDP = 1, 233218792Snp TX_CSUM_CRC16 = 4, 234218792Snp TX_CSUM_CRC32 = 5, 235218792Snp TX_CSUM_CRC32C = 6, 236218792Snp TX_CSUM_FCOE = 7, 237218792Snp TX_CSUM_TCPIP = 8, 238218792Snp TX_CSUM_UDPIP = 9, 239218792Snp TX_CSUM_TCPIP6 = 10, 240218792Snp TX_CSUM_UDPIP6 = 11, 241218792Snp TX_CSUM_IP = 12, 242218792Snp}; 243218792Snp 244218792Snpenum { /* packet type in CPL_RX_PKT */ 245218792Snp PKTYPE_XACT_UCAST = 0, 246218792Snp PKTYPE_HASH_UCAST = 1, 247218792Snp PKTYPE_XACT_MCAST = 2, 248218792Snp PKTYPE_HASH_MCAST = 3, 249218792Snp PKTYPE_PROMISC = 4, 250218792Snp PKTYPE_HPROMISC = 5, 251218792Snp PKTYPE_BCAST = 6 252218792Snp}; 253218792Snp 254218792Snpenum { /* DMAC type in CPL_RX_PKT */ 255218792Snp DATYPE_UCAST, 256218792Snp DATYPE_MCAST, 257218792Snp DATYPE_BCAST 258218792Snp}; 259218792Snp 260218792Snpenum { /* TCP congestion control algorithms */ 261218792Snp CONG_ALG_RENO, 262218792Snp CONG_ALG_TAHOE, 263218792Snp CONG_ALG_NEWRENO, 264218792Snp CONG_ALG_HIGHSPEED 265218792Snp}; 266218792Snp 267218792Snpenum { /* RSS hash type */ 268218792Snp RSS_HASH_NONE = 0, /* no hash computed */ 269218792Snp RSS_HASH_IP = 1, /* IP or IPv6 2-tuple hash */ 270218792Snp RSS_HASH_TCP = 2, /* TCP 4-tuple hash */ 271218792Snp RSS_HASH_UDP = 3 /* UDP 4-tuple hash */ 272218792Snp}; 273218792Snp 274218792Snpenum { /* LE commands */ 275218792Snp LE_CMD_READ = 0x4, 276218792Snp LE_CMD_WRITE = 0xb 277218792Snp}; 278218792Snp 279218792Snpenum { /* LE request size */ 280218792Snp LE_SZ_NONE = 0, 281218792Snp LE_SZ_33 = 1, 282218792Snp LE_SZ_66 = 2, 283218792Snp LE_SZ_132 = 3, 284218792Snp LE_SZ_264 = 4, 285218792Snp LE_SZ_528 = 5 286218792Snp}; 287218792Snp 288218792Snpunion opcode_tid { 289218792Snp __be32 opcode_tid; 290218792Snp __u8 opcode; 291218792Snp}; 292218792Snp 293218792Snp#define S_CPL_OPCODE 24 294218792Snp#define V_CPL_OPCODE(x) ((x) << S_CPL_OPCODE) 295218792Snp#define G_CPL_OPCODE(x) (((x) >> S_CPL_OPCODE) & 0xFF) 296218792Snp#define G_TID(x) ((x) & 0xFFFFFF) 297218792Snp 298218792Snp/* tid is assumed to be 24-bits */ 299218792Snp#define MK_OPCODE_TID(opcode, tid) (V_CPL_OPCODE(opcode) | (tid)) 300218792Snp 301218792Snp#define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid) 302218792Snp 303218792Snp/* extract the TID from a CPL command */ 304218792Snp#define GET_TID(cmd) (G_TID(ntohl(OPCODE_TID(cmd)))) 305283854Snp#define GET_OPCODE(cmd) ((cmd)->ot.opcode) 306218792Snp 307218792Snp/* partitioning of TID fields that also carry a queue id */ 308218792Snp#define S_TID_TID 0 309218792Snp#define M_TID_TID 0x3fff 310218792Snp#define V_TID_TID(x) ((x) << S_TID_TID) 311218792Snp#define G_TID_TID(x) (((x) >> S_TID_TID) & M_TID_TID) 312218792Snp 313218792Snp#define S_TID_QID 14 314218792Snp#define M_TID_QID 0x3ff 315218792Snp#define V_TID_QID(x) ((x) << S_TID_QID) 316218792Snp#define G_TID_QID(x) (((x) >> S_TID_QID) & M_TID_QID) 317218792Snp 318218792Snpunion opcode_info { 319218792Snp __be64 opcode_info; 320218792Snp __u8 opcode; 321218792Snp}; 322218792Snp 323218792Snpstruct tcp_options { 324218792Snp __be16 mss; 325218792Snp __u8 wsf; 326218792Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 327218792Snp __u8 :4; 328218792Snp __u8 unknown:1; 329237436Snp __u8 ecn:1; 330218792Snp __u8 sack:1; 331218792Snp __u8 tstamp:1; 332218792Snp#else 333218792Snp __u8 tstamp:1; 334218792Snp __u8 sack:1; 335237436Snp __u8 ecn:1; 336218792Snp __u8 unknown:1; 337218792Snp __u8 :4; 338218792Snp#endif 339218792Snp}; 340218792Snp 341218792Snpstruct rss_header { 342218792Snp __u8 opcode; 343218792Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 344218792Snp __u8 channel:2; 345218792Snp __u8 filter_hit:1; 346218792Snp __u8 filter_tid:1; 347218792Snp __u8 hash_type:2; 348218792Snp __u8 ipv6:1; 349218792Snp __u8 send2fw:1; 350218792Snp#else 351218792Snp __u8 send2fw:1; 352218792Snp __u8 ipv6:1; 353218792Snp __u8 hash_type:2; 354218792Snp __u8 filter_tid:1; 355218792Snp __u8 filter_hit:1; 356218792Snp __u8 channel:2; 357218792Snp#endif 358218792Snp __be16 qid; 359218792Snp __be32 hash_val; 360218792Snp}; 361218792Snp 362218792Snp#define S_HASHTYPE 20 363218792Snp#define M_HASHTYPE 0x3 364218792Snp#define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE) 365218792Snp 366218792Snp#define S_QNUM 0 367218792Snp#define M_QNUM 0xFFFF 368218792Snp#define G_QNUM(x) (((x) >> S_QNUM) & M_QNUM) 369218792Snp 370308304Sjhb#if defined(RSS_HDR_VLD) || defined(CHELSIO_FW) 371308304Sjhb# define RSS_HDR struct rss_header rss_hdr; 372308304Sjhb#else 373308304Sjhb# define RSS_HDR 374308304Sjhb#endif 375308304Sjhb 376218792Snp#ifndef CHELSIO_FW 377218792Snpstruct work_request_hdr { 378218792Snp __be32 wr_hi; 379218792Snp __be32 wr_mid; 380218792Snp __be64 wr_lo; 381218792Snp}; 382218792Snp 383218792Snp/* wr_mid fields */ 384218792Snp#define S_WR_LEN16 0 385218792Snp#define M_WR_LEN16 0xFF 386218792Snp#define V_WR_LEN16(x) ((x) << S_WR_LEN16) 387218792Snp#define G_WR_LEN16(x) (((x) >> S_WR_LEN16) & M_WR_LEN16) 388218792Snp 389218792Snp/* wr_hi fields */ 390218792Snp#define S_WR_OP 24 391218792Snp#define M_WR_OP 0xFF 392218792Snp#define V_WR_OP(x) ((__u64)(x) << S_WR_OP) 393218792Snp#define G_WR_OP(x) (((x) >> S_WR_OP) & M_WR_OP) 394218792Snp 395218792Snp# define WR_HDR struct work_request_hdr wr 396218792Snp# define WR_HDR_SIZE sizeof(struct work_request_hdr) 397218792Snp#else 398218792Snp# define WR_HDR 399218792Snp# define WR_HDR_SIZE 0 400218792Snp#endif 401218792Snp 402218792Snp/* option 0 fields */ 403218792Snp#define S_ACCEPT_MODE 0 404218792Snp#define M_ACCEPT_MODE 0x3 405218792Snp#define V_ACCEPT_MODE(x) ((x) << S_ACCEPT_MODE) 406218792Snp#define G_ACCEPT_MODE(x) (((x) >> S_ACCEPT_MODE) & M_ACCEPT_MODE) 407218792Snp 408218792Snp#define S_TX_CHAN 2 409218792Snp#define M_TX_CHAN 0x3 410218792Snp#define V_TX_CHAN(x) ((x) << S_TX_CHAN) 411218792Snp#define G_TX_CHAN(x) (((x) >> S_TX_CHAN) & M_TX_CHAN) 412218792Snp 413218792Snp#define S_NO_CONG 4 414218792Snp#define V_NO_CONG(x) ((x) << S_NO_CONG) 415218792Snp#define F_NO_CONG V_NO_CONG(1U) 416218792Snp 417218792Snp#define S_DELACK 5 418218792Snp#define V_DELACK(x) ((x) << S_DELACK) 419218792Snp#define F_DELACK V_DELACK(1U) 420218792Snp 421218792Snp#define S_INJECT_TIMER 6 422218792Snp#define V_INJECT_TIMER(x) ((x) << S_INJECT_TIMER) 423218792Snp#define F_INJECT_TIMER V_INJECT_TIMER(1U) 424218792Snp 425218792Snp#define S_NON_OFFLOAD 7 426218792Snp#define V_NON_OFFLOAD(x) ((x) << S_NON_OFFLOAD) 427218792Snp#define F_NON_OFFLOAD V_NON_OFFLOAD(1U) 428218792Snp 429218792Snp#define S_ULP_MODE 8 430218792Snp#define M_ULP_MODE 0xF 431218792Snp#define V_ULP_MODE(x) ((x) << S_ULP_MODE) 432218792Snp#define G_ULP_MODE(x) (((x) >> S_ULP_MODE) & M_ULP_MODE) 433218792Snp 434218792Snp#define S_RCV_BUFSIZ 12 435218792Snp#define M_RCV_BUFSIZ 0x3FFU 436218792Snp#define V_RCV_BUFSIZ(x) ((x) << S_RCV_BUFSIZ) 437218792Snp#define G_RCV_BUFSIZ(x) (((x) >> S_RCV_BUFSIZ) & M_RCV_BUFSIZ) 438218792Snp 439218792Snp#define S_DSCP 22 440218792Snp#define M_DSCP 0x3F 441218792Snp#define V_DSCP(x) ((x) << S_DSCP) 442218792Snp#define G_DSCP(x) (((x) >> S_DSCP) & M_DSCP) 443218792Snp 444218792Snp#define S_SMAC_SEL 28 445218792Snp#define M_SMAC_SEL 0xFF 446218792Snp#define V_SMAC_SEL(x) ((__u64)(x) << S_SMAC_SEL) 447218792Snp#define G_SMAC_SEL(x) (((x) >> S_SMAC_SEL) & M_SMAC_SEL) 448218792Snp 449218792Snp#define S_L2T_IDX 36 450218792Snp#define M_L2T_IDX 0xFFF 451218792Snp#define V_L2T_IDX(x) ((__u64)(x) << S_L2T_IDX) 452218792Snp#define G_L2T_IDX(x) (((x) >> S_L2T_IDX) & M_L2T_IDX) 453218792Snp 454218792Snp#define S_TCAM_BYPASS 48 455218792Snp#define V_TCAM_BYPASS(x) ((__u64)(x) << S_TCAM_BYPASS) 456218792Snp#define F_TCAM_BYPASS V_TCAM_BYPASS(1ULL) 457218792Snp 458218792Snp#define S_NAGLE 49 459218792Snp#define V_NAGLE(x) ((__u64)(x) << S_NAGLE) 460218792Snp#define F_NAGLE V_NAGLE(1ULL) 461218792Snp 462218792Snp#define S_WND_SCALE 50 463218792Snp#define M_WND_SCALE 0xF 464218792Snp#define V_WND_SCALE(x) ((__u64)(x) << S_WND_SCALE) 465218792Snp#define G_WND_SCALE(x) (((x) >> S_WND_SCALE) & M_WND_SCALE) 466218792Snp 467218792Snp#define S_KEEP_ALIVE 54 468218792Snp#define V_KEEP_ALIVE(x) ((__u64)(x) << S_KEEP_ALIVE) 469218792Snp#define F_KEEP_ALIVE V_KEEP_ALIVE(1ULL) 470218792Snp 471218792Snp#define S_MAX_RT 55 472218792Snp#define M_MAX_RT 0xF 473218792Snp#define V_MAX_RT(x) ((__u64)(x) << S_MAX_RT) 474218792Snp#define G_MAX_RT(x) (((x) >> S_MAX_RT) & M_MAX_RT) 475218792Snp 476218792Snp#define S_MAX_RT_OVERRIDE 59 477218792Snp#define V_MAX_RT_OVERRIDE(x) ((__u64)(x) << S_MAX_RT_OVERRIDE) 478218792Snp#define F_MAX_RT_OVERRIDE V_MAX_RT_OVERRIDE(1ULL) 479218792Snp 480218792Snp#define S_MSS_IDX 60 481218792Snp#define M_MSS_IDX 0xF 482218792Snp#define V_MSS_IDX(x) ((__u64)(x) << S_MSS_IDX) 483218792Snp#define G_MSS_IDX(x) (((x) >> S_MSS_IDX) & M_MSS_IDX) 484218792Snp 485218792Snp/* option 1 fields */ 486218792Snp#define S_SYN_RSS_ENABLE 0 487218792Snp#define V_SYN_RSS_ENABLE(x) ((x) << S_SYN_RSS_ENABLE) 488218792Snp#define F_SYN_RSS_ENABLE V_SYN_RSS_ENABLE(1U) 489218792Snp 490218792Snp#define S_SYN_RSS_USE_HASH 1 491218792Snp#define V_SYN_RSS_USE_HASH(x) ((x) << S_SYN_RSS_USE_HASH) 492218792Snp#define F_SYN_RSS_USE_HASH V_SYN_RSS_USE_HASH(1U) 493218792Snp 494218792Snp#define S_SYN_RSS_QUEUE 2 495218792Snp#define M_SYN_RSS_QUEUE 0x3FF 496218792Snp#define V_SYN_RSS_QUEUE(x) ((x) << S_SYN_RSS_QUEUE) 497218792Snp#define G_SYN_RSS_QUEUE(x) (((x) >> S_SYN_RSS_QUEUE) & M_SYN_RSS_QUEUE) 498218792Snp 499218792Snp#define S_LISTEN_INTF 12 500218792Snp#define M_LISTEN_INTF 0xFF 501218792Snp#define V_LISTEN_INTF(x) ((x) << S_LISTEN_INTF) 502218792Snp#define G_LISTEN_INTF(x) (((x) >> S_LISTEN_INTF) & M_LISTEN_INTF) 503218792Snp 504218792Snp#define S_LISTEN_FILTER 20 505218792Snp#define V_LISTEN_FILTER(x) ((x) << S_LISTEN_FILTER) 506218792Snp#define F_LISTEN_FILTER V_LISTEN_FILTER(1U) 507218792Snp 508218792Snp#define S_SYN_DEFENSE 21 509218792Snp#define V_SYN_DEFENSE(x) ((x) << S_SYN_DEFENSE) 510218792Snp#define F_SYN_DEFENSE V_SYN_DEFENSE(1U) 511218792Snp 512218792Snp#define S_CONN_POLICY 22 513218792Snp#define M_CONN_POLICY 0x3 514218792Snp#define V_CONN_POLICY(x) ((x) << S_CONN_POLICY) 515218792Snp#define G_CONN_POLICY(x) (((x) >> S_CONN_POLICY) & M_CONN_POLICY) 516218792Snp 517308304Sjhb#define S_T5_FILT_INFO 24 518308304Sjhb#define M_T5_FILT_INFO 0xffffffffffULL 519308304Sjhb#define V_T5_FILT_INFO(x) ((x) << S_T5_FILT_INFO) 520308304Sjhb#define G_T5_FILT_INFO(x) (((x) >> S_T5_FILT_INFO) & M_T5_FILT_INFO) 521308304Sjhb 522248925Snp#define S_FILT_INFO 28 523248925Snp#define M_FILT_INFO 0xfffffffffULL 524248925Snp#define V_FILT_INFO(x) ((x) << S_FILT_INFO) 525248925Snp#define G_FILT_INFO(x) (((x) >> S_FILT_INFO) & M_FILT_INFO) 526248925Snp 527218792Snp/* option 2 fields */ 528218792Snp#define S_RSS_QUEUE 0 529218792Snp#define M_RSS_QUEUE 0x3FF 530218792Snp#define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE) 531218792Snp#define G_RSS_QUEUE(x) (((x) >> S_RSS_QUEUE) & M_RSS_QUEUE) 532218792Snp 533218792Snp#define S_RSS_QUEUE_VALID 10 534218792Snp#define V_RSS_QUEUE_VALID(x) ((x) << S_RSS_QUEUE_VALID) 535218792Snp#define F_RSS_QUEUE_VALID V_RSS_QUEUE_VALID(1U) 536218792Snp 537218792Snp#define S_RX_COALESCE_VALID 11 538218792Snp#define V_RX_COALESCE_VALID(x) ((x) << S_RX_COALESCE_VALID) 539218792Snp#define F_RX_COALESCE_VALID V_RX_COALESCE_VALID(1U) 540218792Snp 541218792Snp#define S_RX_COALESCE 12 542218792Snp#define M_RX_COALESCE 0x3 543218792Snp#define V_RX_COALESCE(x) ((x) << S_RX_COALESCE) 544218792Snp#define G_RX_COALESCE(x) (((x) >> S_RX_COALESCE) & M_RX_COALESCE) 545218792Snp 546218792Snp#define S_CONG_CNTRL 14 547218792Snp#define M_CONG_CNTRL 0x3 548218792Snp#define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL) 549218792Snp#define G_CONG_CNTRL(x) (((x) >> S_CONG_CNTRL) & M_CONG_CNTRL) 550218792Snp 551218792Snp#define S_PACE 16 552218792Snp#define M_PACE 0x3 553218792Snp#define V_PACE(x) ((x) << S_PACE) 554218792Snp#define G_PACE(x) (((x) >> S_PACE) & M_PACE) 555218792Snp 556218792Snp#define S_CONG_CNTRL_VALID 18 557218792Snp#define V_CONG_CNTRL_VALID(x) ((x) << S_CONG_CNTRL_VALID) 558218792Snp#define F_CONG_CNTRL_VALID V_CONG_CNTRL_VALID(1U) 559218792Snp 560308304Sjhb#define S_T5_ISS 18 561308304Sjhb#define V_T5_ISS(x) ((x) << S_T5_ISS) 562308304Sjhb#define F_T5_ISS V_T5_ISS(1U) 563308304Sjhb 564218792Snp#define S_PACE_VALID 19 565218792Snp#define V_PACE_VALID(x) ((x) << S_PACE_VALID) 566218792Snp#define F_PACE_VALID V_PACE_VALID(1U) 567218792Snp 568218792Snp#define S_RX_FC_DISABLE 20 569218792Snp#define V_RX_FC_DISABLE(x) ((x) << S_RX_FC_DISABLE) 570218792Snp#define F_RX_FC_DISABLE V_RX_FC_DISABLE(1U) 571218792Snp 572218792Snp#define S_RX_FC_DDP 21 573218792Snp#define V_RX_FC_DDP(x) ((x) << S_RX_FC_DDP) 574218792Snp#define F_RX_FC_DDP V_RX_FC_DDP(1U) 575218792Snp 576218792Snp#define S_RX_FC_VALID 22 577218792Snp#define V_RX_FC_VALID(x) ((x) << S_RX_FC_VALID) 578218792Snp#define F_RX_FC_VALID V_RX_FC_VALID(1U) 579218792Snp 580218792Snp#define S_TX_QUEUE 23 581218792Snp#define M_TX_QUEUE 0x7 582218792Snp#define V_TX_QUEUE(x) ((x) << S_TX_QUEUE) 583218792Snp#define G_TX_QUEUE(x) (((x) >> S_TX_QUEUE) & M_TX_QUEUE) 584218792Snp 585218792Snp#define S_RX_CHANNEL 26 586218792Snp#define V_RX_CHANNEL(x) ((x) << S_RX_CHANNEL) 587218792Snp#define F_RX_CHANNEL V_RX_CHANNEL(1U) 588218792Snp 589218792Snp#define S_CCTRL_ECN 27 590218792Snp#define V_CCTRL_ECN(x) ((x) << S_CCTRL_ECN) 591218792Snp#define F_CCTRL_ECN V_CCTRL_ECN(1U) 592218792Snp 593218792Snp#define S_WND_SCALE_EN 28 594218792Snp#define V_WND_SCALE_EN(x) ((x) << S_WND_SCALE_EN) 595218792Snp#define F_WND_SCALE_EN V_WND_SCALE_EN(1U) 596218792Snp 597218792Snp#define S_TSTAMPS_EN 29 598218792Snp#define V_TSTAMPS_EN(x) ((x) << S_TSTAMPS_EN) 599218792Snp#define F_TSTAMPS_EN V_TSTAMPS_EN(1U) 600218792Snp 601218792Snp#define S_SACK_EN 30 602218792Snp#define V_SACK_EN(x) ((x) << S_SACK_EN) 603218792Snp#define F_SACK_EN V_SACK_EN(1U) 604218792Snp 605248925Snp#define S_T5_OPT_2_VALID 31 606248925Snp#define V_T5_OPT_2_VALID(x) ((x) << S_T5_OPT_2_VALID) 607248925Snp#define F_T5_OPT_2_VALID V_T5_OPT_2_VALID(1U) 608248925Snp 609218792Snpstruct cpl_pass_open_req { 610218792Snp WR_HDR; 611218792Snp union opcode_tid ot; 612218792Snp __be16 local_port; 613218792Snp __be16 peer_port; 614218792Snp __be32 local_ip; 615218792Snp __be32 peer_ip; 616218792Snp __be64 opt0; 617218792Snp __be64 opt1; 618218792Snp}; 619218792Snp 620218792Snpstruct cpl_pass_open_req6 { 621218792Snp WR_HDR; 622218792Snp union opcode_tid ot; 623218792Snp __be16 local_port; 624218792Snp __be16 peer_port; 625218792Snp __be64 local_ip_hi; 626218792Snp __be64 local_ip_lo; 627218792Snp __be64 peer_ip_hi; 628218792Snp __be64 peer_ip_lo; 629218792Snp __be64 opt0; 630218792Snp __be64 opt1; 631218792Snp}; 632218792Snp 633218792Snpstruct cpl_pass_open_rpl { 634218792Snp RSS_HDR 635218792Snp union opcode_tid ot; 636218792Snp __u8 rsvd[3]; 637218792Snp __u8 status; 638218792Snp}; 639218792Snp 640218792Snpstruct cpl_pass_establish { 641218792Snp RSS_HDR 642218792Snp union opcode_tid ot; 643218792Snp __be32 rsvd; 644218792Snp __be32 tos_stid; 645218792Snp __be16 mac_idx; 646218792Snp __be16 tcp_opt; 647218792Snp __be32 snd_isn; 648218792Snp __be32 rcv_isn; 649218792Snp}; 650218792Snp 651218792Snp/* cpl_pass_establish.tos_stid fields */ 652218792Snp#define S_PASS_OPEN_TID 0 653218792Snp#define M_PASS_OPEN_TID 0xFFFFFF 654218792Snp#define V_PASS_OPEN_TID(x) ((x) << S_PASS_OPEN_TID) 655218792Snp#define G_PASS_OPEN_TID(x) (((x) >> S_PASS_OPEN_TID) & M_PASS_OPEN_TID) 656218792Snp 657218792Snp#define S_PASS_OPEN_TOS 24 658218792Snp#define M_PASS_OPEN_TOS 0xFF 659218792Snp#define V_PASS_OPEN_TOS(x) ((x) << S_PASS_OPEN_TOS) 660218792Snp#define G_PASS_OPEN_TOS(x) (((x) >> S_PASS_OPEN_TOS) & M_PASS_OPEN_TOS) 661218792Snp 662218792Snp/* cpl_pass_establish.tcp_opt fields (also applies to act_open_establish) */ 663308304Sjhb#define S_TCPOPT_WSCALE_OK 5 664308304Sjhb#define M_TCPOPT_WSCALE_OK 0x1 665308304Sjhb#define V_TCPOPT_WSCALE_OK(x) ((x) << S_TCPOPT_WSCALE_OK) 666308304Sjhb#define G_TCPOPT_WSCALE_OK(x) (((x) >> S_TCPOPT_WSCALE_OK) & M_TCPOPT_WSCALE_OK) 667218792Snp 668308304Sjhb#define S_TCPOPT_SACK 6 669308304Sjhb#define M_TCPOPT_SACK 0x1 670308304Sjhb#define V_TCPOPT_SACK(x) ((x) << S_TCPOPT_SACK) 671308304Sjhb#define G_TCPOPT_SACK(x) (((x) >> S_TCPOPT_SACK) & M_TCPOPT_SACK) 672308304Sjhb 673308304Sjhb#define S_TCPOPT_TSTAMP 7 674308304Sjhb#define M_TCPOPT_TSTAMP 0x1 675308304Sjhb#define V_TCPOPT_TSTAMP(x) ((x) << S_TCPOPT_TSTAMP) 676308304Sjhb#define G_TCPOPT_TSTAMP(x) (((x) >> S_TCPOPT_TSTAMP) & M_TCPOPT_TSTAMP) 677308304Sjhb 678308304Sjhb#define S_TCPOPT_SND_WSCALE 8 679308304Sjhb#define M_TCPOPT_SND_WSCALE 0xF 680308304Sjhb#define V_TCPOPT_SND_WSCALE(x) ((x) << S_TCPOPT_SND_WSCALE) 681308304Sjhb#define G_TCPOPT_SND_WSCALE(x) (((x) >> S_TCPOPT_SND_WSCALE) & M_TCPOPT_SND_WSCALE) 682308304Sjhb 683308304Sjhb#define S_TCPOPT_MSS 12 684308304Sjhb#define M_TCPOPT_MSS 0xF 685308304Sjhb#define V_TCPOPT_MSS(x) ((x) << S_TCPOPT_MSS) 686308304Sjhb#define G_TCPOPT_MSS(x) (((x) >> S_TCPOPT_MSS) & M_TCPOPT_MSS) 687308304Sjhb 688218792Snpstruct cpl_pass_accept_req { 689218792Snp RSS_HDR 690218792Snp union opcode_tid ot; 691218792Snp __be16 rsvd; 692218792Snp __be16 len; 693218792Snp __be32 hdr_len; 694218792Snp __be16 vlan; 695218792Snp __be16 l2info; 696218792Snp __be32 tos_stid; 697218792Snp struct tcp_options tcpopt; 698218792Snp}; 699218792Snp 700218792Snp/* cpl_pass_accept_req.hdr_len fields */ 701218792Snp#define S_SYN_RX_CHAN 0 702218792Snp#define M_SYN_RX_CHAN 0xF 703218792Snp#define V_SYN_RX_CHAN(x) ((x) << S_SYN_RX_CHAN) 704218792Snp#define G_SYN_RX_CHAN(x) (((x) >> S_SYN_RX_CHAN) & M_SYN_RX_CHAN) 705218792Snp 706218792Snp#define S_TCP_HDR_LEN 10 707218792Snp#define M_TCP_HDR_LEN 0x3F 708218792Snp#define V_TCP_HDR_LEN(x) ((x) << S_TCP_HDR_LEN) 709218792Snp#define G_TCP_HDR_LEN(x) (((x) >> S_TCP_HDR_LEN) & M_TCP_HDR_LEN) 710218792Snp 711308304Sjhb#define S_T6_TCP_HDR_LEN 8 712308304Sjhb#define V_T6_TCP_HDR_LEN(x) ((x) << S_T6_TCP_HDR_LEN) 713308304Sjhb#define G_T6_TCP_HDR_LEN(x) (((x) >> S_T6_TCP_HDR_LEN) & M_TCP_HDR_LEN) 714308304Sjhb 715218792Snp#define S_IP_HDR_LEN 16 716218792Snp#define M_IP_HDR_LEN 0x3FF 717218792Snp#define V_IP_HDR_LEN(x) ((x) << S_IP_HDR_LEN) 718218792Snp#define G_IP_HDR_LEN(x) (((x) >> S_IP_HDR_LEN) & M_IP_HDR_LEN) 719218792Snp 720308304Sjhb#define S_T6_IP_HDR_LEN 14 721308304Sjhb#define V_T6_IP_HDR_LEN(x) ((x) << S_T6_IP_HDR_LEN) 722308304Sjhb#define G_T6_IP_HDR_LEN(x) (((x) >> S_T6_IP_HDR_LEN) & M_IP_HDR_LEN) 723308304Sjhb 724218792Snp#define S_ETH_HDR_LEN 26 725237436Snp#define M_ETH_HDR_LEN 0x3F 726218792Snp#define V_ETH_HDR_LEN(x) ((x) << S_ETH_HDR_LEN) 727218792Snp#define G_ETH_HDR_LEN(x) (((x) >> S_ETH_HDR_LEN) & M_ETH_HDR_LEN) 728218792Snp 729308304Sjhb#define S_T6_ETH_HDR_LEN 24 730308304Sjhb#define M_T6_ETH_HDR_LEN 0xFF 731308304Sjhb#define V_T6_ETH_HDR_LEN(x) ((x) << S_T6_ETH_HDR_LEN) 732308304Sjhb#define G_T6_ETH_HDR_LEN(x) (((x) >> S_T6_ETH_HDR_LEN) & M_T6_ETH_HDR_LEN) 733308304Sjhb 734218792Snp/* cpl_pass_accept_req.l2info fields */ 735218792Snp#define S_SYN_MAC_IDX 0 736218792Snp#define M_SYN_MAC_IDX 0x1FF 737218792Snp#define V_SYN_MAC_IDX(x) ((x) << S_SYN_MAC_IDX) 738218792Snp#define G_SYN_MAC_IDX(x) (((x) >> S_SYN_MAC_IDX) & M_SYN_MAC_IDX) 739218792Snp 740218792Snp#define S_SYN_XACT_MATCH 9 741218792Snp#define V_SYN_XACT_MATCH(x) ((x) << S_SYN_XACT_MATCH) 742218792Snp#define F_SYN_XACT_MATCH V_SYN_XACT_MATCH(1U) 743218792Snp 744218792Snp#define S_SYN_INTF 12 745218792Snp#define M_SYN_INTF 0xF 746218792Snp#define V_SYN_INTF(x) ((x) << S_SYN_INTF) 747218792Snp#define G_SYN_INTF(x) (((x) >> S_SYN_INTF) & M_SYN_INTF) 748218792Snp 749218792Snpstruct cpl_pass_accept_rpl { 750218792Snp WR_HDR; 751218792Snp union opcode_tid ot; 752218792Snp __be32 opt2; 753218792Snp __be64 opt0; 754218792Snp}; 755218792Snp 756252711Snpstruct cpl_t5_pass_accept_rpl { 757252711Snp WR_HDR; 758252711Snp union opcode_tid ot; 759252711Snp __be32 opt2; 760252711Snp __be64 opt0; 761252711Snp __be32 iss; 762308304Sjhb union { 763308304Sjhb __be32 rsvd; /* T5 */ 764308304Sjhb __be32 opt3; /* T6 */ 765308304Sjhb } u; 766252711Snp}; 767252711Snp 768218792Snpstruct cpl_act_open_req { 769218792Snp WR_HDR; 770218792Snp union opcode_tid ot; 771218792Snp __be16 local_port; 772218792Snp __be16 peer_port; 773218792Snp __be32 local_ip; 774218792Snp __be32 peer_ip; 775218792Snp __be64 opt0; 776218792Snp __be32 params; 777218792Snp __be32 opt2; 778218792Snp}; 779218792Snp 780248925Snp#define S_FILTER_TUPLE 24 781248925Snp#define M_FILTER_TUPLE 0xFFFFFFFFFF 782248925Snp#define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE) 783248925Snp#define G_FILTER_TUPLE(x) (((x) >> S_FILTER_TUPLE) & M_FILTER_TUPLE) 784237436Snpstruct cpl_t5_act_open_req { 785237436Snp WR_HDR; 786237436Snp union opcode_tid ot; 787237436Snp __be16 local_port; 788237436Snp __be16 peer_port; 789237436Snp __be32 local_ip; 790237436Snp __be32 peer_ip; 791237436Snp __be64 opt0; 792252711Snp __be32 iss; 793237436Snp __be32 opt2; 794237436Snp __be64 params; 795237436Snp}; 796218792Snp 797308304Sjhbstruct cpl_t6_act_open_req { 798308304Sjhb WR_HDR; 799308304Sjhb union opcode_tid ot; 800308304Sjhb __be16 local_port; 801308304Sjhb __be16 peer_port; 802308304Sjhb __be32 local_ip; 803308304Sjhb __be32 peer_ip; 804308304Sjhb __be64 opt0; 805308304Sjhb __be32 iss; 806308304Sjhb __be32 opt2; 807308304Sjhb __be64 params; 808308304Sjhb __be32 rsvd2; 809308304Sjhb __be32 opt3; 810308304Sjhb}; 811308304Sjhb 812308304Sjhb/* cpl_{t5,t6}_act_open_req.params field */ 813308304Sjhb#define S_AOPEN_FCOEMASK 0 814308304Sjhb#define V_AOPEN_FCOEMASK(x) ((x) << S_AOPEN_FCOEMASK) 815308304Sjhb#define F_AOPEN_FCOEMASK V_AOPEN_FCOEMASK(1U) 816308304Sjhb 817218792Snpstruct cpl_act_open_req6 { 818218792Snp WR_HDR; 819218792Snp union opcode_tid ot; 820218792Snp __be16 local_port; 821218792Snp __be16 peer_port; 822218792Snp __be64 local_ip_hi; 823218792Snp __be64 local_ip_lo; 824218792Snp __be64 peer_ip_hi; 825218792Snp __be64 peer_ip_lo; 826218792Snp __be64 opt0; 827218792Snp __be32 params; 828218792Snp __be32 opt2; 829218792Snp}; 830218792Snp 831237436Snpstruct cpl_t5_act_open_req6 { 832237436Snp WR_HDR; 833237436Snp union opcode_tid ot; 834237436Snp __be16 local_port; 835237436Snp __be16 peer_port; 836237436Snp __be64 local_ip_hi; 837237436Snp __be64 local_ip_lo; 838237436Snp __be64 peer_ip_hi; 839237436Snp __be64 peer_ip_lo; 840237436Snp __be64 opt0; 841252711Snp __be32 iss; 842237436Snp __be32 opt2; 843237436Snp __be64 params; 844237436Snp}; 845237436Snp 846308304Sjhbstruct cpl_t6_act_open_req6 { 847308304Sjhb WR_HDR; 848308304Sjhb union opcode_tid ot; 849308304Sjhb __be16 local_port; 850308304Sjhb __be16 peer_port; 851308304Sjhb __be64 local_ip_hi; 852308304Sjhb __be64 local_ip_lo; 853308304Sjhb __be64 peer_ip_hi; 854308304Sjhb __be64 peer_ip_lo; 855308304Sjhb __be64 opt0; 856308304Sjhb __be32 iss; 857308304Sjhb __be32 opt2; 858308304Sjhb __be64 params; 859308304Sjhb __be32 rsvd2; 860308304Sjhb __be32 opt3; 861308304Sjhb}; 862308304Sjhb 863218792Snpstruct cpl_act_open_rpl { 864218792Snp RSS_HDR 865218792Snp union opcode_tid ot; 866218792Snp __be32 atid_status; 867218792Snp}; 868218792Snp 869218792Snp/* cpl_act_open_rpl.atid_status fields */ 870218792Snp#define S_AOPEN_STATUS 0 871218792Snp#define M_AOPEN_STATUS 0xFF 872218792Snp#define V_AOPEN_STATUS(x) ((x) << S_AOPEN_STATUS) 873218792Snp#define G_AOPEN_STATUS(x) (((x) >> S_AOPEN_STATUS) & M_AOPEN_STATUS) 874218792Snp 875218792Snp#define S_AOPEN_ATID 8 876218792Snp#define M_AOPEN_ATID 0xFFFFFF 877218792Snp#define V_AOPEN_ATID(x) ((x) << S_AOPEN_ATID) 878218792Snp#define G_AOPEN_ATID(x) (((x) >> S_AOPEN_ATID) & M_AOPEN_ATID) 879218792Snp 880218792Snpstruct cpl_act_establish { 881218792Snp RSS_HDR 882218792Snp union opcode_tid ot; 883218792Snp __be32 rsvd; 884218792Snp __be32 tos_atid; 885218792Snp __be16 mac_idx; 886218792Snp __be16 tcp_opt; 887218792Snp __be32 snd_isn; 888218792Snp __be32 rcv_isn; 889218792Snp}; 890218792Snp 891218792Snpstruct cpl_get_tcb { 892218792Snp WR_HDR; 893218792Snp union opcode_tid ot; 894218792Snp __be16 reply_ctrl; 895218792Snp __be16 cookie; 896218792Snp}; 897218792Snp 898218792Snp/* cpl_get_tcb.reply_ctrl fields */ 899218792Snp#define S_QUEUENO 0 900218792Snp#define M_QUEUENO 0x3FF 901218792Snp#define V_QUEUENO(x) ((x) << S_QUEUENO) 902218792Snp#define G_QUEUENO(x) (((x) >> S_QUEUENO) & M_QUEUENO) 903218792Snp 904218792Snp#define S_REPLY_CHAN 14 905218792Snp#define V_REPLY_CHAN(x) ((x) << S_REPLY_CHAN) 906218792Snp#define F_REPLY_CHAN V_REPLY_CHAN(1U) 907218792Snp 908218792Snp#define S_NO_REPLY 15 909218792Snp#define V_NO_REPLY(x) ((x) << S_NO_REPLY) 910218792Snp#define F_NO_REPLY V_NO_REPLY(1U) 911218792Snp 912218792Snpstruct cpl_get_tcb_rpl { 913218792Snp RSS_HDR 914218792Snp union opcode_tid ot; 915218792Snp __u8 cookie; 916218792Snp __u8 status; 917218792Snp __be16 len; 918218792Snp}; 919218792Snp 920218792Snpstruct cpl_set_tcb { 921218792Snp WR_HDR; 922218792Snp union opcode_tid ot; 923218792Snp __be16 reply_ctrl; 924218792Snp __be16 cookie; 925218792Snp}; 926218792Snp 927218792Snpstruct cpl_set_tcb_field { 928218792Snp WR_HDR; 929218792Snp union opcode_tid ot; 930218792Snp __be16 reply_ctrl; 931218792Snp __be16 word_cookie; 932218792Snp __be64 mask; 933218792Snp __be64 val; 934218792Snp}; 935218792Snp 936239344Snpstruct cpl_set_tcb_field_core { 937239344Snp union opcode_tid ot; 938239344Snp __be16 reply_ctrl; 939239344Snp __be16 word_cookie; 940239344Snp __be64 mask; 941239344Snp __be64 val; 942239344Snp}; 943239344Snp 944218792Snp/* cpl_set_tcb_field.word_cookie fields */ 945218792Snp#define S_WORD 0 946218792Snp#define M_WORD 0x1F 947218792Snp#define V_WORD(x) ((x) << S_WORD) 948218792Snp#define G_WORD(x) (((x) >> S_WORD) & M_WORD) 949218792Snp 950218792Snp#define S_COOKIE 5 951218792Snp#define M_COOKIE 0x7 952218792Snp#define V_COOKIE(x) ((x) << S_COOKIE) 953218792Snp#define G_COOKIE(x) (((x) >> S_COOKIE) & M_COOKIE) 954218792Snp 955218792Snpstruct cpl_set_tcb_rpl { 956218792Snp RSS_HDR 957218792Snp union opcode_tid ot; 958218792Snp __be16 rsvd; 959218792Snp __u8 cookie; 960218792Snp __u8 status; 961218792Snp __be64 oldval; 962218792Snp}; 963218792Snp 964218792Snpstruct cpl_close_con_req { 965218792Snp WR_HDR; 966218792Snp union opcode_tid ot; 967218792Snp __be32 rsvd; 968218792Snp}; 969218792Snp 970218792Snpstruct cpl_close_con_rpl { 971218792Snp RSS_HDR 972218792Snp union opcode_tid ot; 973218792Snp __u8 rsvd[3]; 974218792Snp __u8 status; 975218792Snp __be32 snd_nxt; 976218792Snp __be32 rcv_nxt; 977218792Snp}; 978218792Snp 979218792Snpstruct cpl_close_listsvr_req { 980218792Snp WR_HDR; 981218792Snp union opcode_tid ot; 982218792Snp __be16 reply_ctrl; 983218792Snp __be16 rsvd; 984218792Snp}; 985218792Snp 986218792Snp/* additional cpl_close_listsvr_req.reply_ctrl field */ 987218792Snp#define S_LISTSVR_IPV6 14 988218792Snp#define V_LISTSVR_IPV6(x) ((x) << S_LISTSVR_IPV6) 989218792Snp#define F_LISTSVR_IPV6 V_LISTSVR_IPV6(1U) 990218792Snp 991218792Snpstruct cpl_close_listsvr_rpl { 992218792Snp RSS_HDR 993218792Snp union opcode_tid ot; 994218792Snp __u8 rsvd[3]; 995218792Snp __u8 status; 996218792Snp}; 997218792Snp 998218792Snpstruct cpl_abort_req_rss { 999218792Snp RSS_HDR 1000218792Snp union opcode_tid ot; 1001218792Snp __u8 rsvd[3]; 1002218792Snp __u8 status; 1003218792Snp}; 1004218792Snp 1005318775Snpstruct cpl_abort_req_rss6 { 1006318775Snp RSS_HDR 1007318775Snp union opcode_tid ot; 1008318775Snp __u32 srqidx_status; 1009318775Snp}; 1010318775Snp 1011318775Snp#define S_ABORT_RSS_STATUS 0 1012318775Snp#define M_ABORT_RSS_STATUS 0xff 1013318775Snp#define V_ABORT_RSS_STATUS(x) ((x) << S_ABORT_RSS_STATUS) 1014318775Snp#define G_ABORT_RSS_STATUS(x) (((x) >> S_ABORT_RSS_STATUS) & M_ABORT_RSS_STATUS) 1015318775Snp 1016318775Snp#define S_ABORT_RSS_SRQIDX 8 1017318775Snp#define M_ABORT_RSS_SRQIDX 0xffffff 1018318775Snp#define V_ABORT_RSS_SRQIDX(x) ((x) << S_ABORT_RSS_SRQIDX) 1019318775Snp#define G_ABORT_RSS_SRQIDX(x) (((x) >> S_ABORT_RSS_SRQIDX) & M_ABORT_RSS_SRQIDX) 1020318775Snp 1021318775Snp 1022308304Sjhb/* cpl_abort_req status command code in case of T6, 1023308304Sjhb * bit[0] specifies whether to send RST (0) to remote peer or suppress it (1) 1024308304Sjhb * bit[1] indicates ABORT_REQ was sent after a CLOSE_CON_REQ 1025308304Sjhb * bit[2] specifies whether to disable the mmgr (1) or not (0) 1026308304Sjhb */ 1027218792Snpstruct cpl_abort_req { 1028218792Snp WR_HDR; 1029218792Snp union opcode_tid ot; 1030218792Snp __be32 rsvd0; 1031218792Snp __u8 rsvd1; 1032218792Snp __u8 cmd; 1033218792Snp __u8 rsvd2[6]; 1034218792Snp}; 1035218792Snp 1036218792Snpstruct cpl_abort_rpl_rss { 1037218792Snp RSS_HDR 1038218792Snp union opcode_tid ot; 1039218792Snp __u8 rsvd[3]; 1040218792Snp __u8 status; 1041218792Snp}; 1042218792Snp 1043318775Snpstruct cpl_abort_rpl_rss6 { 1044318775Snp RSS_HDR 1045318775Snp union opcode_tid ot; 1046318775Snp __u32 srqidx_status; 1047318775Snp}; 1048318775Snp 1049218792Snpstruct cpl_abort_rpl { 1050218792Snp WR_HDR; 1051218792Snp union opcode_tid ot; 1052218792Snp __be32 rsvd0; 1053218792Snp __u8 rsvd1; 1054218792Snp __u8 cmd; 1055218792Snp __u8 rsvd2[6]; 1056218792Snp}; 1057218792Snp 1058218792Snpstruct cpl_peer_close { 1059218792Snp RSS_HDR 1060218792Snp union opcode_tid ot; 1061218792Snp __be32 rcv_nxt; 1062218792Snp}; 1063218792Snp 1064218792Snpstruct cpl_tid_release { 1065218792Snp WR_HDR; 1066218792Snp union opcode_tid ot; 1067218792Snp __be32 rsvd; 1068218792Snp}; 1069218792Snp 1070218792Snpstruct tx_data_wr { 1071218792Snp __be32 wr_hi; 1072218792Snp __be32 wr_lo; 1073218792Snp __be32 len; 1074218792Snp __be32 flags; 1075218792Snp __be32 sndseq; 1076218792Snp __be32 param; 1077218792Snp}; 1078218792Snp 1079218792Snp/* tx_data_wr.flags fields */ 1080218792Snp#define S_TX_ACK_PAGES 21 1081218792Snp#define M_TX_ACK_PAGES 0x7 1082218792Snp#define V_TX_ACK_PAGES(x) ((x) << S_TX_ACK_PAGES) 1083218792Snp#define G_TX_ACK_PAGES(x) (((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES) 1084218792Snp 1085218792Snp/* tx_data_wr.param fields */ 1086218792Snp#define S_TX_PORT 0 1087218792Snp#define M_TX_PORT 0x7 1088218792Snp#define V_TX_PORT(x) ((x) << S_TX_PORT) 1089218792Snp#define G_TX_PORT(x) (((x) >> S_TX_PORT) & M_TX_PORT) 1090218792Snp 1091218792Snp#define S_TX_MSS 4 1092218792Snp#define M_TX_MSS 0xF 1093218792Snp#define V_TX_MSS(x) ((x) << S_TX_MSS) 1094218792Snp#define G_TX_MSS(x) (((x) >> S_TX_MSS) & M_TX_MSS) 1095218792Snp 1096218792Snp#define S_TX_QOS 8 1097218792Snp#define M_TX_QOS 0xFF 1098218792Snp#define V_TX_QOS(x) ((x) << S_TX_QOS) 1099218792Snp#define G_TX_QOS(x) (((x) >> S_TX_QOS) & M_TX_QOS) 1100218792Snp 1101218792Snp#define S_TX_SNDBUF 16 1102218792Snp#define M_TX_SNDBUF 0xFFFF 1103218792Snp#define V_TX_SNDBUF(x) ((x) << S_TX_SNDBUF) 1104218792Snp#define G_TX_SNDBUF(x) (((x) >> S_TX_SNDBUF) & M_TX_SNDBUF) 1105218792Snp 1106218792Snpstruct cpl_tx_data { 1107218792Snp union opcode_tid ot; 1108218792Snp __be32 len; 1109218792Snp __be32 rsvd; 1110218792Snp __be32 flags; 1111218792Snp}; 1112218792Snp 1113218792Snp/* cpl_tx_data.flags fields */ 1114218792Snp#define S_TX_PROXY 5 1115218792Snp#define V_TX_PROXY(x) ((x) << S_TX_PROXY) 1116218792Snp#define F_TX_PROXY V_TX_PROXY(1U) 1117218792Snp 1118218792Snp#define S_TX_ULP_SUBMODE 6 1119218792Snp#define M_TX_ULP_SUBMODE 0xF 1120218792Snp#define V_TX_ULP_SUBMODE(x) ((x) << S_TX_ULP_SUBMODE) 1121218792Snp#define G_TX_ULP_SUBMODE(x) (((x) >> S_TX_ULP_SUBMODE) & M_TX_ULP_SUBMODE) 1122218792Snp 1123218792Snp#define S_TX_ULP_MODE 10 1124308304Sjhb#define M_TX_ULP_MODE 0x7 1125218792Snp#define V_TX_ULP_MODE(x) ((x) << S_TX_ULP_MODE) 1126218792Snp#define G_TX_ULP_MODE(x) (((x) >> S_TX_ULP_MODE) & M_TX_ULP_MODE) 1127218792Snp 1128308304Sjhb#define S_TX_FORCE 13 1129308304Sjhb#define V_TX_FORCE(x) ((x) << S_TX_FORCE) 1130308304Sjhb#define F_TX_FORCE V_TX_FORCE(1U) 1131308304Sjhb 1132218792Snp#define S_TX_SHOVE 14 1133218792Snp#define V_TX_SHOVE(x) ((x) << S_TX_SHOVE) 1134218792Snp#define F_TX_SHOVE V_TX_SHOVE(1U) 1135218792Snp 1136218792Snp#define S_TX_MORE 15 1137218792Snp#define V_TX_MORE(x) ((x) << S_TX_MORE) 1138218792Snp#define F_TX_MORE V_TX_MORE(1U) 1139218792Snp 1140218792Snp#define S_TX_URG 16 1141218792Snp#define V_TX_URG(x) ((x) << S_TX_URG) 1142218792Snp#define F_TX_URG V_TX_URG(1U) 1143218792Snp 1144218792Snp#define S_TX_FLUSH 17 1145218792Snp#define V_TX_FLUSH(x) ((x) << S_TX_FLUSH) 1146218792Snp#define F_TX_FLUSH V_TX_FLUSH(1U) 1147218792Snp 1148218792Snp#define S_TX_SAVE 18 1149218792Snp#define V_TX_SAVE(x) ((x) << S_TX_SAVE) 1150218792Snp#define F_TX_SAVE V_TX_SAVE(1U) 1151218792Snp 1152218792Snp#define S_TX_TNL 19 1153218792Snp#define V_TX_TNL(x) ((x) << S_TX_TNL) 1154218792Snp#define F_TX_TNL V_TX_TNL(1U) 1155218792Snp 1156308304Sjhb#define S_T6_TX_FORCE 20 1157308304Sjhb#define V_T6_TX_FORCE(x) ((x) << S_T6_TX_FORCE) 1158308304Sjhb#define F_T6_TX_FORCE V_T6_TX_FORCE(1U) 1159308304Sjhb 1160218792Snp/* additional tx_data_wr.flags fields */ 1161218792Snp#define S_TX_CPU_IDX 0 1162218792Snp#define M_TX_CPU_IDX 0x3F 1163218792Snp#define V_TX_CPU_IDX(x) ((x) << S_TX_CPU_IDX) 1164218792Snp#define G_TX_CPU_IDX(x) (((x) >> S_TX_CPU_IDX) & M_TX_CPU_IDX) 1165218792Snp 1166218792Snp#define S_TX_CLOSE 17 1167218792Snp#define V_TX_CLOSE(x) ((x) << S_TX_CLOSE) 1168218792Snp#define F_TX_CLOSE V_TX_CLOSE(1U) 1169218792Snp 1170218792Snp#define S_TX_INIT 18 1171218792Snp#define V_TX_INIT(x) ((x) << S_TX_INIT) 1172218792Snp#define F_TX_INIT V_TX_INIT(1U) 1173218792Snp 1174218792Snp#define S_TX_IMM_ACK 19 1175218792Snp#define V_TX_IMM_ACK(x) ((x) << S_TX_IMM_ACK) 1176218792Snp#define F_TX_IMM_ACK V_TX_IMM_ACK(1U) 1177218792Snp 1178218792Snp#define S_TX_IMM_DMA 20 1179218792Snp#define V_TX_IMM_DMA(x) ((x) << S_TX_IMM_DMA) 1180218792Snp#define F_TX_IMM_DMA V_TX_IMM_DMA(1U) 1181218792Snp 1182218792Snpstruct cpl_tx_data_ack { 1183218792Snp RSS_HDR 1184218792Snp union opcode_tid ot; 1185218792Snp __be32 snd_una; 1186218792Snp}; 1187218792Snp 1188218792Snpstruct cpl_wr_ack { /* XXX */ 1189218792Snp RSS_HDR 1190218792Snp union opcode_tid ot; 1191218792Snp __be16 credits; 1192218792Snp __be16 rsvd; 1193218792Snp __be32 snd_nxt; 1194218792Snp __be32 snd_una; 1195218792Snp}; 1196218792Snp 1197218792Snpstruct cpl_tx_pkt_core { 1198218792Snp __be32 ctrl0; 1199218792Snp __be16 pack; 1200218792Snp __be16 len; 1201218792Snp __be64 ctrl1; 1202218792Snp}; 1203218792Snp 1204218792Snpstruct cpl_tx_pkt { 1205218792Snp WR_HDR; 1206218792Snp struct cpl_tx_pkt_core c; 1207218792Snp}; 1208218792Snp 1209218792Snp#define cpl_tx_pkt_xt cpl_tx_pkt 1210218792Snp 1211218792Snp/* cpl_tx_pkt_core.ctrl0 fields */ 1212218792Snp#define S_TXPKT_VF 0 1213218792Snp#define M_TXPKT_VF 0xFF 1214218792Snp#define V_TXPKT_VF(x) ((x) << S_TXPKT_VF) 1215218792Snp#define G_TXPKT_VF(x) (((x) >> S_TXPKT_VF) & M_TXPKT_VF) 1216218792Snp 1217218792Snp#define S_TXPKT_PF 8 1218218792Snp#define M_TXPKT_PF 0x7 1219218792Snp#define V_TXPKT_PF(x) ((x) << S_TXPKT_PF) 1220218792Snp#define G_TXPKT_PF(x) (((x) >> S_TXPKT_PF) & M_TXPKT_PF) 1221218792Snp 1222218792Snp#define S_TXPKT_VF_VLD 11 1223218792Snp#define V_TXPKT_VF_VLD(x) ((x) << S_TXPKT_VF_VLD) 1224218792Snp#define F_TXPKT_VF_VLD V_TXPKT_VF_VLD(1U) 1225218792Snp 1226218792Snp#define S_TXPKT_OVLAN_IDX 12 1227218792Snp#define M_TXPKT_OVLAN_IDX 0xF 1228218792Snp#define V_TXPKT_OVLAN_IDX(x) ((x) << S_TXPKT_OVLAN_IDX) 1229218792Snp#define G_TXPKT_OVLAN_IDX(x) (((x) >> S_TXPKT_OVLAN_IDX) & M_TXPKT_OVLAN_IDX) 1230218792Snp 1231248925Snp#define S_TXPKT_T5_OVLAN_IDX 12 1232248925Snp#define M_TXPKT_T5_OVLAN_IDX 0x7 1233248925Snp#define V_TXPKT_T5_OVLAN_IDX(x) ((x) << S_TXPKT_T5_OVLAN_IDX) 1234248925Snp#define G_TXPKT_T5_OVLAN_IDX(x) (((x) >> S_TXPKT_T5_OVLAN_IDX) & \ 1235248925Snp M_TXPKT_T5_OVLAN_IDX) 1236248925Snp 1237218792Snp#define S_TXPKT_INTF 16 1238218792Snp#define M_TXPKT_INTF 0xF 1239218792Snp#define V_TXPKT_INTF(x) ((x) << S_TXPKT_INTF) 1240218792Snp#define G_TXPKT_INTF(x) (((x) >> S_TXPKT_INTF) & M_TXPKT_INTF) 1241218792Snp 1242218792Snp#define S_TXPKT_SPECIAL_STAT 20 1243218792Snp#define V_TXPKT_SPECIAL_STAT(x) ((x) << S_TXPKT_SPECIAL_STAT) 1244218792Snp#define F_TXPKT_SPECIAL_STAT V_TXPKT_SPECIAL_STAT(1U) 1245218792Snp 1246248925Snp#define S_TXPKT_T5_FCS_DIS 21 1247248925Snp#define V_TXPKT_T5_FCS_DIS(x) ((x) << S_TXPKT_T5_FCS_DIS) 1248248925Snp#define F_TXPKT_T5_FCS_DIS V_TXPKT_T5_FCS_DIS(1U) 1249248925Snp 1250218792Snp#define S_TXPKT_INS_OVLAN 21 1251218792Snp#define V_TXPKT_INS_OVLAN(x) ((x) << S_TXPKT_INS_OVLAN) 1252218792Snp#define F_TXPKT_INS_OVLAN V_TXPKT_INS_OVLAN(1U) 1253218792Snp 1254248925Snp#define S_TXPKT_T5_INS_OVLAN 15 1255248925Snp#define V_TXPKT_T5_INS_OVLAN(x) ((x) << S_TXPKT_T5_INS_OVLAN) 1256248925Snp#define F_TXPKT_T5_INS_OVLAN V_TXPKT_T5_INS_OVLAN(1U) 1257248925Snp 1258218792Snp#define S_TXPKT_STAT_DIS 22 1259218792Snp#define V_TXPKT_STAT_DIS(x) ((x) << S_TXPKT_STAT_DIS) 1260218792Snp#define F_TXPKT_STAT_DIS V_TXPKT_STAT_DIS(1U) 1261218792Snp 1262218792Snp#define S_TXPKT_LOOPBACK 23 1263218792Snp#define V_TXPKT_LOOPBACK(x) ((x) << S_TXPKT_LOOPBACK) 1264218792Snp#define F_TXPKT_LOOPBACK V_TXPKT_LOOPBACK(1U) 1265218792Snp 1266237436Snp#define S_TXPKT_TSTAMP 23 1267237436Snp#define V_TXPKT_TSTAMP(x) ((x) << S_TXPKT_TSTAMP) 1268237436Snp#define F_TXPKT_TSTAMP V_TXPKT_TSTAMP(1U) 1269237436Snp 1270218792Snp#define S_TXPKT_OPCODE 24 1271218792Snp#define M_TXPKT_OPCODE 0xFF 1272218792Snp#define V_TXPKT_OPCODE(x) ((x) << S_TXPKT_OPCODE) 1273218792Snp#define G_TXPKT_OPCODE(x) (((x) >> S_TXPKT_OPCODE) & M_TXPKT_OPCODE) 1274218792Snp 1275218792Snp/* cpl_tx_pkt_core.ctrl1 fields */ 1276218792Snp#define S_TXPKT_SA_IDX 0 1277218792Snp#define M_TXPKT_SA_IDX 0xFFF 1278218792Snp#define V_TXPKT_SA_IDX(x) ((x) << S_TXPKT_SA_IDX) 1279218792Snp#define G_TXPKT_SA_IDX(x) (((x) >> S_TXPKT_SA_IDX) & M_TXPKT_SA_IDX) 1280218792Snp 1281218792Snp#define S_TXPKT_CSUM_END 12 1282218792Snp#define M_TXPKT_CSUM_END 0xFF 1283218792Snp#define V_TXPKT_CSUM_END(x) ((x) << S_TXPKT_CSUM_END) 1284218792Snp#define G_TXPKT_CSUM_END(x) (((x) >> S_TXPKT_CSUM_END) & M_TXPKT_CSUM_END) 1285218792Snp 1286218792Snp#define S_TXPKT_CSUM_START 20 1287218792Snp#define M_TXPKT_CSUM_START 0x3FF 1288218792Snp#define V_TXPKT_CSUM_START(x) ((x) << S_TXPKT_CSUM_START) 1289218792Snp#define G_TXPKT_CSUM_START(x) (((x) >> S_TXPKT_CSUM_START) & M_TXPKT_CSUM_START) 1290218792Snp 1291218792Snp#define S_TXPKT_IPHDR_LEN 20 1292218792Snp#define M_TXPKT_IPHDR_LEN 0x3FFF 1293218792Snp#define V_TXPKT_IPHDR_LEN(x) ((__u64)(x) << S_TXPKT_IPHDR_LEN) 1294218792Snp#define G_TXPKT_IPHDR_LEN(x) (((x) >> S_TXPKT_IPHDR_LEN) & M_TXPKT_IPHDR_LEN) 1295218792Snp 1296308304Sjhb#define M_T6_TXPKT_IPHDR_LEN 0xFFF 1297308304Sjhb#define G_T6_TXPKT_IPHDR_LEN(x) \ 1298308304Sjhb (((x) >> S_TXPKT_IPHDR_LEN) & M_T6_TXPKT_IPHDR_LEN) 1299308304Sjhb 1300218792Snp#define S_TXPKT_CSUM_LOC 30 1301218792Snp#define M_TXPKT_CSUM_LOC 0x3FF 1302218792Snp#define V_TXPKT_CSUM_LOC(x) ((__u64)(x) << S_TXPKT_CSUM_LOC) 1303218792Snp#define G_TXPKT_CSUM_LOC(x) (((x) >> S_TXPKT_CSUM_LOC) & M_TXPKT_CSUM_LOC) 1304218792Snp 1305218792Snp#define S_TXPKT_ETHHDR_LEN 34 1306218792Snp#define M_TXPKT_ETHHDR_LEN 0x3F 1307218792Snp#define V_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_TXPKT_ETHHDR_LEN) 1308218792Snp#define G_TXPKT_ETHHDR_LEN(x) (((x) >> S_TXPKT_ETHHDR_LEN) & M_TXPKT_ETHHDR_LEN) 1309218792Snp 1310308304Sjhb#define S_T6_TXPKT_ETHHDR_LEN 32 1311308304Sjhb#define M_T6_TXPKT_ETHHDR_LEN 0xFF 1312308304Sjhb#define V_T6_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_T6_TXPKT_ETHHDR_LEN) 1313308304Sjhb#define G_T6_TXPKT_ETHHDR_LEN(x) \ 1314308304Sjhb (((x) >> S_T6_TXPKT_ETHHDR_LEN) & M_T6_TXPKT_ETHHDR_LEN) 1315308304Sjhb 1316218792Snp#define S_TXPKT_CSUM_TYPE 40 1317218792Snp#define M_TXPKT_CSUM_TYPE 0xF 1318218792Snp#define V_TXPKT_CSUM_TYPE(x) ((__u64)(x) << S_TXPKT_CSUM_TYPE) 1319218792Snp#define G_TXPKT_CSUM_TYPE(x) (((x) >> S_TXPKT_CSUM_TYPE) & M_TXPKT_CSUM_TYPE) 1320218792Snp 1321218792Snp#define S_TXPKT_VLAN 44 1322218792Snp#define M_TXPKT_VLAN 0xFFFF 1323218792Snp#define V_TXPKT_VLAN(x) ((__u64)(x) << S_TXPKT_VLAN) 1324218792Snp#define G_TXPKT_VLAN(x) (((x) >> S_TXPKT_VLAN) & M_TXPKT_VLAN) 1325218792Snp 1326218792Snp#define S_TXPKT_VLAN_VLD 60 1327218792Snp#define V_TXPKT_VLAN_VLD(x) ((__u64)(x) << S_TXPKT_VLAN_VLD) 1328218792Snp#define F_TXPKT_VLAN_VLD V_TXPKT_VLAN_VLD(1ULL) 1329218792Snp 1330218792Snp#define S_TXPKT_IPSEC 61 1331218792Snp#define V_TXPKT_IPSEC(x) ((__u64)(x) << S_TXPKT_IPSEC) 1332218792Snp#define F_TXPKT_IPSEC V_TXPKT_IPSEC(1ULL) 1333218792Snp 1334218792Snp#define S_TXPKT_IPCSUM_DIS 62 1335218792Snp#define V_TXPKT_IPCSUM_DIS(x) ((__u64)(x) << S_TXPKT_IPCSUM_DIS) 1336218792Snp#define F_TXPKT_IPCSUM_DIS V_TXPKT_IPCSUM_DIS(1ULL) 1337218792Snp 1338218792Snp#define S_TXPKT_L4CSUM_DIS 63 1339218792Snp#define V_TXPKT_L4CSUM_DIS(x) ((__u64)(x) << S_TXPKT_L4CSUM_DIS) 1340218792Snp#define F_TXPKT_L4CSUM_DIS V_TXPKT_L4CSUM_DIS(1ULL) 1341218792Snp 1342237436Snpstruct cpl_tx_pkt_lso_core { 1343218792Snp __be32 lso_ctrl; 1344218792Snp __be16 ipid_ofst; 1345218792Snp __be16 mss; 1346218792Snp __be32 seqno_offset; 1347218792Snp __be32 len; 1348218792Snp /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 1349218792Snp}; 1350218792Snp 1351237436Snpstruct cpl_tx_pkt_lso { 1352237436Snp WR_HDR; 1353237436Snp struct cpl_tx_pkt_lso_core c; 1354237436Snp /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 1355237436Snp}; 1356237436Snp 1357237436Snpstruct cpl_tx_pkt_ufo_core { 1358237436Snp __be16 ethlen; 1359237436Snp __be16 iplen; 1360237436Snp __be16 udplen; 1361237436Snp __be16 mss; 1362237436Snp __be32 len; 1363237436Snp __be32 r1; 1364237436Snp /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 1365237436Snp}; 1366237436Snp 1367237436Snpstruct cpl_tx_pkt_ufo { 1368237436Snp WR_HDR; 1369237436Snp struct cpl_tx_pkt_ufo_core c; 1370237436Snp /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 1371237436Snp}; 1372237436Snp 1373237436Snp/* cpl_tx_pkt_lso_core.lso_ctrl fields */ 1374218792Snp#define S_LSO_TCPHDR_LEN 0 1375218792Snp#define M_LSO_TCPHDR_LEN 0xF 1376218792Snp#define V_LSO_TCPHDR_LEN(x) ((x) << S_LSO_TCPHDR_LEN) 1377218792Snp#define G_LSO_TCPHDR_LEN(x) (((x) >> S_LSO_TCPHDR_LEN) & M_LSO_TCPHDR_LEN) 1378218792Snp 1379218792Snp#define S_LSO_IPHDR_LEN 4 1380218792Snp#define M_LSO_IPHDR_LEN 0xFFF 1381218792Snp#define V_LSO_IPHDR_LEN(x) ((x) << S_LSO_IPHDR_LEN) 1382218792Snp#define G_LSO_IPHDR_LEN(x) (((x) >> S_LSO_IPHDR_LEN) & M_LSO_IPHDR_LEN) 1383218792Snp 1384218792Snp#define S_LSO_ETHHDR_LEN 16 1385218792Snp#define M_LSO_ETHHDR_LEN 0xF 1386218792Snp#define V_LSO_ETHHDR_LEN(x) ((x) << S_LSO_ETHHDR_LEN) 1387218792Snp#define G_LSO_ETHHDR_LEN(x) (((x) >> S_LSO_ETHHDR_LEN) & M_LSO_ETHHDR_LEN) 1388218792Snp 1389218792Snp#define S_LSO_IPV6 20 1390218792Snp#define V_LSO_IPV6(x) ((x) << S_LSO_IPV6) 1391218792Snp#define F_LSO_IPV6 V_LSO_IPV6(1U) 1392218792Snp 1393218792Snp#define S_LSO_OFLD_ENCAP 21 1394218792Snp#define V_LSO_OFLD_ENCAP(x) ((x) << S_LSO_OFLD_ENCAP) 1395218792Snp#define F_LSO_OFLD_ENCAP V_LSO_OFLD_ENCAP(1U) 1396218792Snp 1397218792Snp#define S_LSO_LAST_SLICE 22 1398218792Snp#define V_LSO_LAST_SLICE(x) ((x) << S_LSO_LAST_SLICE) 1399218792Snp#define F_LSO_LAST_SLICE V_LSO_LAST_SLICE(1U) 1400218792Snp 1401218792Snp#define S_LSO_FIRST_SLICE 23 1402218792Snp#define V_LSO_FIRST_SLICE(x) ((x) << S_LSO_FIRST_SLICE) 1403218792Snp#define F_LSO_FIRST_SLICE V_LSO_FIRST_SLICE(1U) 1404218792Snp 1405218792Snp#define S_LSO_OPCODE 24 1406218792Snp#define M_LSO_OPCODE 0xFF 1407218792Snp#define V_LSO_OPCODE(x) ((x) << S_LSO_OPCODE) 1408218792Snp#define G_LSO_OPCODE(x) (((x) >> S_LSO_OPCODE) & M_LSO_OPCODE) 1409218792Snp 1410248925Snp#define S_LSO_T5_XFER_SIZE 0 1411248925Snp#define M_LSO_T5_XFER_SIZE 0xFFFFFFF 1412248925Snp#define V_LSO_T5_XFER_SIZE(x) ((x) << S_LSO_T5_XFER_SIZE) 1413248925Snp#define G_LSO_T5_XFER_SIZE(x) (((x) >> S_LSO_T5_XFER_SIZE) & M_LSO_T5_XFER_SIZE) 1414248925Snp 1415237436Snp/* cpl_tx_pkt_lso_core.mss fields */ 1416218792Snp#define S_LSO_MSS 0 1417218792Snp#define M_LSO_MSS 0x3FFF 1418218792Snp#define V_LSO_MSS(x) ((x) << S_LSO_MSS) 1419218792Snp#define G_LSO_MSS(x) (((x) >> S_LSO_MSS) & M_LSO_MSS) 1420218792Snp 1421218792Snp#define S_LSO_IPID_SPLIT 15 1422218792Snp#define V_LSO_IPID_SPLIT(x) ((x) << S_LSO_IPID_SPLIT) 1423218792Snp#define F_LSO_IPID_SPLIT V_LSO_IPID_SPLIT(1U) 1424218792Snp 1425237436Snpstruct cpl_tx_pkt_fso { 1426237436Snp WR_HDR; 1427237436Snp __be32 fso_ctrl; 1428237436Snp __be16 seqcnt_ofst; 1429237436Snp __be16 mtu; 1430237436Snp __be32 param_offset; 1431218792Snp __be32 len; 1432237436Snp /* encapsulated CPL (TX_PKT or TX_PKT_XT) follows here */ 1433218792Snp}; 1434218792Snp 1435237436Snp/* cpl_tx_pkt_fso.fso_ctrl fields different from cpl_tx_pkt_lso.lso_ctrl */ 1436237436Snp#define S_FSO_XCHG_CLASS 21 1437237436Snp#define V_FSO_XCHG_CLASS(x) ((x) << S_FSO_XCHG_CLASS) 1438237436Snp#define F_FSO_XCHG_CLASS V_FSO_XCHG_CLASS(1U) 1439218792Snp 1440237436Snp#define S_FSO_INITIATOR 20 1441237436Snp#define V_FSO_INITIATOR(x) ((x) << S_FSO_INITIATOR) 1442237436Snp#define F_FSO_INITIATOR V_FSO_INITIATOR(1U) 1443218792Snp 1444237436Snp#define S_FSO_FCHDR_LEN 12 1445237436Snp#define M_FSO_FCHDR_LEN 0xF 1446237436Snp#define V_FSO_FCHDR_LEN(x) ((x) << S_FSO_FCHDR_LEN) 1447237436Snp#define G_FSO_FCHDR_LEN(x) (((x) >> S_FSO_FCHDR_LEN) & M_FSO_FCHDR_LEN) 1448237436Snp 1449218792Snpstruct cpl_iscsi_hdr_no_rss { 1450218792Snp union opcode_tid ot; 1451218792Snp __be16 pdu_len_ddp; 1452218792Snp __be16 len; 1453218792Snp __be32 seq; 1454218792Snp __be16 urg; 1455218792Snp __u8 rsvd; 1456218792Snp __u8 status; 1457218792Snp}; 1458218792Snp 1459237436Snpstruct cpl_tx_data_iso { 1460308304Sjhb __be32 op_to_scsi; 1461308304Sjhb __u8 reserved1; 1462237436Snp __u8 ahs_len; 1463308304Sjhb __be16 mpdu; 1464237436Snp __be32 burst_size; 1465237436Snp __be32 len; 1466308304Sjhb __be32 reserved2_seglen_offset; 1467308304Sjhb __be32 datasn_offset; 1468308304Sjhb __be32 buffer_offset; 1469308304Sjhb __be32 reserved3; 1470308304Sjhb 1471237436Snp /* encapsulated CPL_TX_DATA follows here */ 1472237436Snp}; 1473237436Snp 1474308304Sjhb/* cpl_tx_data_iso.op_to_scsi fields */ 1475308304Sjhb#define S_CPL_TX_DATA_ISO_OP 24 1476308304Sjhb#define M_CPL_TX_DATA_ISO_OP 0xff 1477308304Sjhb#define V_CPL_TX_DATA_ISO_OP(x) ((x) << S_CPL_TX_DATA_ISO_OP) 1478308304Sjhb#define G_CPL_TX_DATA_ISO_OP(x) \ 1479308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_OP) & M_CPL_TX_DATA_ISO_OP) 1480237436Snp 1481308304Sjhb#define S_CPL_TX_DATA_ISO_FIRST 23 1482308304Sjhb#define M_CPL_TX_DATA_ISO_FIRST 0x1 1483308304Sjhb#define V_CPL_TX_DATA_ISO_FIRST(x) ((x) << S_CPL_TX_DATA_ISO_FIRST) 1484308304Sjhb#define G_CPL_TX_DATA_ISO_FIRST(x) \ 1485308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_FIRST) & M_CPL_TX_DATA_ISO_FIRST) 1486308304Sjhb#define F_CPL_TX_DATA_ISO_FIRST V_CPL_TX_DATA_ISO_FIRST(1U) 1487237436Snp 1488308304Sjhb#define S_CPL_TX_DATA_ISO_LAST 22 1489308304Sjhb#define M_CPL_TX_DATA_ISO_LAST 0x1 1490308304Sjhb#define V_CPL_TX_DATA_ISO_LAST(x) ((x) << S_CPL_TX_DATA_ISO_LAST) 1491308304Sjhb#define G_CPL_TX_DATA_ISO_LAST(x) \ 1492308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_LAST) & M_CPL_TX_DATA_ISO_LAST) 1493308304Sjhb#define F_CPL_TX_DATA_ISO_LAST V_CPL_TX_DATA_ISO_LAST(1U) 1494237436Snp 1495308304Sjhb#define S_CPL_TX_DATA_ISO_CPLHDRLEN 21 1496308304Sjhb#define M_CPL_TX_DATA_ISO_CPLHDRLEN 0x1 1497308304Sjhb#define V_CPL_TX_DATA_ISO_CPLHDRLEN(x) ((x) << S_CPL_TX_DATA_ISO_CPLHDRLEN) 1498308304Sjhb#define G_CPL_TX_DATA_ISO_CPLHDRLEN(x) \ 1499308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_CPLHDRLEN) & M_CPL_TX_DATA_ISO_CPLHDRLEN) 1500308304Sjhb#define F_CPL_TX_DATA_ISO_CPLHDRLEN V_CPL_TX_DATA_ISO_CPLHDRLEN(1U) 1501237436Snp 1502308304Sjhb#define S_CPL_TX_DATA_ISO_HDRCRC 20 1503308304Sjhb#define M_CPL_TX_DATA_ISO_HDRCRC 0x1 1504308304Sjhb#define V_CPL_TX_DATA_ISO_HDRCRC(x) ((x) << S_CPL_TX_DATA_ISO_HDRCRC) 1505308304Sjhb#define G_CPL_TX_DATA_ISO_HDRCRC(x) \ 1506308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_HDRCRC) & M_CPL_TX_DATA_ISO_HDRCRC) 1507308304Sjhb#define F_CPL_TX_DATA_ISO_HDRCRC V_CPL_TX_DATA_ISO_HDRCRC(1U) 1508237436Snp 1509308304Sjhb#define S_CPL_TX_DATA_ISO_PLDCRC 19 1510308304Sjhb#define M_CPL_TX_DATA_ISO_PLDCRC 0x1 1511308304Sjhb#define V_CPL_TX_DATA_ISO_PLDCRC(x) ((x) << S_CPL_TX_DATA_ISO_PLDCRC) 1512308304Sjhb#define G_CPL_TX_DATA_ISO_PLDCRC(x) \ 1513308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_PLDCRC) & M_CPL_TX_DATA_ISO_PLDCRC) 1514308304Sjhb#define F_CPL_TX_DATA_ISO_PLDCRC V_CPL_TX_DATA_ISO_PLDCRC(1U) 1515308304Sjhb 1516308304Sjhb#define S_CPL_TX_DATA_ISO_IMMEDIATE 18 1517308304Sjhb#define M_CPL_TX_DATA_ISO_IMMEDIATE 0x1 1518308304Sjhb#define V_CPL_TX_DATA_ISO_IMMEDIATE(x) ((x) << S_CPL_TX_DATA_ISO_IMMEDIATE) 1519308304Sjhb#define G_CPL_TX_DATA_ISO_IMMEDIATE(x) \ 1520308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_IMMEDIATE) & M_CPL_TX_DATA_ISO_IMMEDIATE) 1521308304Sjhb#define F_CPL_TX_DATA_ISO_IMMEDIATE V_CPL_TX_DATA_ISO_IMMEDIATE(1U) 1522308304Sjhb 1523308304Sjhb#define S_CPL_TX_DATA_ISO_SCSI 16 1524308304Sjhb#define M_CPL_TX_DATA_ISO_SCSI 0x3 1525308304Sjhb#define V_CPL_TX_DATA_ISO_SCSI(x) ((x) << S_CPL_TX_DATA_ISO_SCSI) 1526308304Sjhb#define G_CPL_TX_DATA_ISO_SCSI(x) \ 1527308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_SCSI) & M_CPL_TX_DATA_ISO_SCSI) 1528308304Sjhb 1529308304Sjhb/* cpl_tx_data_iso.reserved2_seglen_offset fields */ 1530308304Sjhb#define S_CPL_TX_DATA_ISO_SEGLEN_OFFSET 0 1531308304Sjhb#define M_CPL_TX_DATA_ISO_SEGLEN_OFFSET 0xffffff 1532308304Sjhb#define V_CPL_TX_DATA_ISO_SEGLEN_OFFSET(x) \ 1533308304Sjhb ((x) << S_CPL_TX_DATA_ISO_SEGLEN_OFFSET) 1534308304Sjhb#define G_CPL_TX_DATA_ISO_SEGLEN_OFFSET(x) \ 1535308304Sjhb (((x) >> S_CPL_TX_DATA_ISO_SEGLEN_OFFSET) & \ 1536308304Sjhb M_CPL_TX_DATA_ISO_SEGLEN_OFFSET) 1537308304Sjhb 1538218792Snpstruct cpl_iscsi_hdr { 1539218792Snp RSS_HDR 1540218792Snp union opcode_tid ot; 1541218792Snp __be16 pdu_len_ddp; 1542218792Snp __be16 len; 1543218792Snp __be32 seq; 1544218792Snp __be16 urg; 1545218792Snp __u8 rsvd; 1546218792Snp __u8 status; 1547218792Snp}; 1548218792Snp 1549218792Snp/* cpl_iscsi_hdr.pdu_len_ddp fields */ 1550218792Snp#define S_ISCSI_PDU_LEN 0 1551218792Snp#define M_ISCSI_PDU_LEN 0x7FFF 1552218792Snp#define V_ISCSI_PDU_LEN(x) ((x) << S_ISCSI_PDU_LEN) 1553218792Snp#define G_ISCSI_PDU_LEN(x) (((x) >> S_ISCSI_PDU_LEN) & M_ISCSI_PDU_LEN) 1554218792Snp 1555218792Snp#define S_ISCSI_DDP 15 1556218792Snp#define V_ISCSI_DDP(x) ((x) << S_ISCSI_DDP) 1557218792Snp#define F_ISCSI_DDP V_ISCSI_DDP(1U) 1558218792Snp 1559237436Snpstruct cpl_iscsi_data { 1560237436Snp RSS_HDR 1561237436Snp union opcode_tid ot; 1562237436Snp __u8 rsvd0[2]; 1563237436Snp __be16 len; 1564237436Snp __be32 seq; 1565237436Snp __be16 urg; 1566237436Snp __u8 rsvd1; 1567237436Snp __u8 status; 1568237436Snp}; 1569237436Snp 1570218792Snpstruct cpl_rx_data { 1571218792Snp RSS_HDR 1572218792Snp union opcode_tid ot; 1573218792Snp __be16 rsvd; 1574218792Snp __be16 len; 1575218792Snp __be32 seq; 1576218792Snp __be16 urg; 1577218792Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 1578218792Snp __u8 dack_mode:2; 1579218792Snp __u8 psh:1; 1580218792Snp __u8 heartbeat:1; 1581218792Snp __u8 ddp_off:1; 1582218792Snp __u8 :3; 1583218792Snp#else 1584218792Snp __u8 :3; 1585218792Snp __u8 ddp_off:1; 1586218792Snp __u8 heartbeat:1; 1587218792Snp __u8 psh:1; 1588218792Snp __u8 dack_mode:2; 1589218792Snp#endif 1590218792Snp __u8 status; 1591218792Snp}; 1592218792Snp 1593218792Snpstruct cpl_fcoe_hdr { 1594218792Snp RSS_HDR 1595218792Snp union opcode_tid ot; 1596218792Snp __be16 oxid; 1597218792Snp __be16 len; 1598218792Snp __be32 rctl_fctl; 1599218792Snp __u8 cs_ctl; 1600218792Snp __u8 df_ctl; 1601218792Snp __u8 sof; 1602218792Snp __u8 eof; 1603218792Snp __be16 seq_cnt; 1604218792Snp __u8 seq_id; 1605218792Snp __u8 type; 1606218792Snp __be32 param; 1607218792Snp}; 1608218792Snp 1609308304Sjhb/* cpl_fcoe_hdr.rctl_fctl fields */ 1610308304Sjhb#define S_FCOE_FCHDR_RCTL 24 1611308304Sjhb#define M_FCOE_FCHDR_RCTL 0xff 1612308304Sjhb#define V_FCOE_FCHDR_RCTL(x) ((x) << S_FCOE_FCHDR_RCTL) 1613308304Sjhb#define G_FCOE_FCHDR_RCTL(x) \ 1614308304Sjhb (((x) >> S_FCOE_FCHDR_RCTL) & M_FCOE_FCHDR_RCTL) 1615308304Sjhb 1616308304Sjhb#define S_FCOE_FCHDR_FCTL 0 1617308304Sjhb#define M_FCOE_FCHDR_FCTL 0xffffff 1618308304Sjhb#define V_FCOE_FCHDR_FCTL(x) ((x) << S_FCOE_FCHDR_FCTL) 1619308304Sjhb#define G_FCOE_FCHDR_FCTL(x) \ 1620308304Sjhb (((x) >> S_FCOE_FCHDR_FCTL) & M_FCOE_FCHDR_FCTL) 1621308304Sjhb 1622237436Snpstruct cpl_fcoe_data { 1623237436Snp RSS_HDR 1624237436Snp union opcode_tid ot; 1625237436Snp __u8 rsvd0[2]; 1626237436Snp __be16 len; 1627237436Snp __be32 seq; 1628237436Snp __u8 rsvd1[3]; 1629237436Snp __u8 status; 1630237436Snp}; 1631237436Snp 1632218792Snpstruct cpl_rx_urg_notify { 1633218792Snp RSS_HDR 1634218792Snp union opcode_tid ot; 1635218792Snp __be32 seq; 1636218792Snp}; 1637218792Snp 1638218792Snpstruct cpl_rx_urg_pkt { 1639218792Snp RSS_HDR 1640218792Snp union opcode_tid ot; 1641218792Snp __be16 rsvd; 1642218792Snp __be16 len; 1643218792Snp}; 1644218792Snp 1645218792Snpstruct cpl_rx_data_ack { 1646218792Snp WR_HDR; 1647218792Snp union opcode_tid ot; 1648218792Snp __be32 credit_dack; 1649218792Snp}; 1650218792Snp 1651239344Snpstruct cpl_rx_data_ack_core { 1652239344Snp union opcode_tid ot; 1653239344Snp __be32 credit_dack; 1654239344Snp}; 1655239344Snp 1656218792Snp/* cpl_rx_data_ack.ack_seq fields */ 1657218792Snp#define S_RX_CREDITS 0 1658218792Snp#define M_RX_CREDITS 0x3FFFFFF 1659218792Snp#define V_RX_CREDITS(x) ((x) << S_RX_CREDITS) 1660218792Snp#define G_RX_CREDITS(x) (((x) >> S_RX_CREDITS) & M_RX_CREDITS) 1661218792Snp 1662218792Snp#define S_RX_MODULATE_TX 26 1663218792Snp#define V_RX_MODULATE_TX(x) ((x) << S_RX_MODULATE_TX) 1664218792Snp#define F_RX_MODULATE_TX V_RX_MODULATE_TX(1U) 1665218792Snp 1666218792Snp#define S_RX_MODULATE_RX 27 1667218792Snp#define V_RX_MODULATE_RX(x) ((x) << S_RX_MODULATE_RX) 1668218792Snp#define F_RX_MODULATE_RX V_RX_MODULATE_RX(1U) 1669218792Snp 1670218792Snp#define S_RX_FORCE_ACK 28 1671218792Snp#define V_RX_FORCE_ACK(x) ((x) << S_RX_FORCE_ACK) 1672218792Snp#define F_RX_FORCE_ACK V_RX_FORCE_ACK(1U) 1673218792Snp 1674218792Snp#define S_RX_DACK_MODE 29 1675218792Snp#define M_RX_DACK_MODE 0x3 1676218792Snp#define V_RX_DACK_MODE(x) ((x) << S_RX_DACK_MODE) 1677218792Snp#define G_RX_DACK_MODE(x) (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE) 1678218792Snp 1679218792Snp#define S_RX_DACK_CHANGE 31 1680218792Snp#define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE) 1681218792Snp#define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U) 1682218792Snp 1683218792Snpstruct cpl_rx_ddp_complete { 1684218792Snp RSS_HDR 1685218792Snp union opcode_tid ot; 1686218792Snp __be32 ddp_report; 1687218792Snp __be32 rcv_nxt; 1688218792Snp __be32 rsvd; 1689218792Snp}; 1690218792Snp 1691218792Snpstruct cpl_rx_data_ddp { 1692218792Snp RSS_HDR 1693218792Snp union opcode_tid ot; 1694218792Snp __be16 urg; 1695218792Snp __be16 len; 1696218792Snp __be32 seq; 1697218792Snp union { 1698218792Snp __be32 nxt_seq; 1699218792Snp __be32 ddp_report; 1700218792Snp } u; 1701218792Snp __be32 ulp_crc; 1702218792Snp __be32 ddpvld; 1703218792Snp}; 1704218792Snp 1705237436Snp#define cpl_rx_iscsi_ddp cpl_rx_data_ddp 1706237436Snp 1707218792Snpstruct cpl_rx_fcoe_ddp { 1708218792Snp RSS_HDR 1709218792Snp union opcode_tid ot; 1710218792Snp __be16 rsvd; 1711218792Snp __be16 len; 1712218792Snp __be32 seq; 1713218792Snp __be32 ddp_report; 1714218792Snp __be32 ulp_crc; 1715218792Snp __be32 ddpvld; 1716218792Snp}; 1717218792Snp 1718237436Snpstruct cpl_rx_data_dif { 1719237436Snp RSS_HDR 1720237436Snp union opcode_tid ot; 1721237436Snp __be16 ddp_len; 1722237436Snp __be16 msg_len; 1723237436Snp __be32 seq; 1724237436Snp union { 1725237436Snp __be32 nxt_seq; 1726237436Snp __be32 ddp_report; 1727237436Snp } u; 1728237436Snp __be32 err_vec; 1729237436Snp __be32 ddpvld; 1730237436Snp}; 1731237436Snp 1732237436Snpstruct cpl_rx_iscsi_dif { 1733237436Snp RSS_HDR 1734237436Snp union opcode_tid ot; 1735237436Snp __be16 ddp_len; 1736237436Snp __be16 msg_len; 1737237436Snp __be32 seq; 1738237436Snp union { 1739237436Snp __be32 nxt_seq; 1740237436Snp __be32 ddp_report; 1741237436Snp } u; 1742237436Snp __be32 ulp_crc; 1743237436Snp __be32 ddpvld; 1744237436Snp __u8 rsvd0[8]; 1745237436Snp __be32 err_vec; 1746237436Snp __u8 rsvd1[4]; 1747237436Snp}; 1748237436Snp 1749308304Sjhbstruct cpl_rx_iscsi_cmp { 1750308304Sjhb RSS_HDR 1751308304Sjhb union opcode_tid ot; 1752308304Sjhb __be16 pdu_len_ddp; 1753308304Sjhb __be16 len; 1754308304Sjhb __be32 seq; 1755308304Sjhb __be16 urg; 1756308304Sjhb __u8 rsvd; 1757308304Sjhb __u8 status; 1758308304Sjhb __be32 ulp_crc; 1759308304Sjhb __be32 ddpvld; 1760308304Sjhb}; 1761308304Sjhb 1762237436Snpstruct cpl_rx_fcoe_dif { 1763237436Snp RSS_HDR 1764237436Snp union opcode_tid ot; 1765237436Snp __be16 ddp_len; 1766237436Snp __be16 msg_len; 1767237436Snp __be32 seq; 1768237436Snp __be32 ddp_report; 1769237436Snp __be32 err_vec; 1770237436Snp __be32 ddpvld; 1771237436Snp}; 1772237436Snp 1773237436Snp/* cpl_rx_{data,iscsi,fcoe}_{ddp,dif}.ddpvld fields */ 1774218792Snp#define S_DDP_VALID 15 1775218792Snp#define M_DDP_VALID 0x1FFFF 1776218792Snp#define V_DDP_VALID(x) ((x) << S_DDP_VALID) 1777218792Snp#define G_DDP_VALID(x) (((x) >> S_DDP_VALID) & M_DDP_VALID) 1778218792Snp 1779218792Snp#define S_DDP_PPOD_MISMATCH 15 1780218792Snp#define V_DDP_PPOD_MISMATCH(x) ((x) << S_DDP_PPOD_MISMATCH) 1781218792Snp#define F_DDP_PPOD_MISMATCH V_DDP_PPOD_MISMATCH(1U) 1782218792Snp 1783218792Snp#define S_DDP_PDU 16 1784218792Snp#define V_DDP_PDU(x) ((x) << S_DDP_PDU) 1785218792Snp#define F_DDP_PDU V_DDP_PDU(1U) 1786218792Snp 1787218792Snp#define S_DDP_LLIMIT_ERR 17 1788218792Snp#define V_DDP_LLIMIT_ERR(x) ((x) << S_DDP_LLIMIT_ERR) 1789218792Snp#define F_DDP_LLIMIT_ERR V_DDP_LLIMIT_ERR(1U) 1790218792Snp 1791218792Snp#define S_DDP_PPOD_PARITY_ERR 18 1792218792Snp#define V_DDP_PPOD_PARITY_ERR(x) ((x) << S_DDP_PPOD_PARITY_ERR) 1793218792Snp#define F_DDP_PPOD_PARITY_ERR V_DDP_PPOD_PARITY_ERR(1U) 1794218792Snp 1795218792Snp#define S_DDP_PADDING_ERR 19 1796218792Snp#define V_DDP_PADDING_ERR(x) ((x) << S_DDP_PADDING_ERR) 1797218792Snp#define F_DDP_PADDING_ERR V_DDP_PADDING_ERR(1U) 1798218792Snp 1799218792Snp#define S_DDP_HDRCRC_ERR 20 1800218792Snp#define V_DDP_HDRCRC_ERR(x) ((x) << S_DDP_HDRCRC_ERR) 1801218792Snp#define F_DDP_HDRCRC_ERR V_DDP_HDRCRC_ERR(1U) 1802218792Snp 1803218792Snp#define S_DDP_DATACRC_ERR 21 1804218792Snp#define V_DDP_DATACRC_ERR(x) ((x) << S_DDP_DATACRC_ERR) 1805218792Snp#define F_DDP_DATACRC_ERR V_DDP_DATACRC_ERR(1U) 1806218792Snp 1807218792Snp#define S_DDP_INVALID_TAG 22 1808218792Snp#define V_DDP_INVALID_TAG(x) ((x) << S_DDP_INVALID_TAG) 1809218792Snp#define F_DDP_INVALID_TAG V_DDP_INVALID_TAG(1U) 1810218792Snp 1811218792Snp#define S_DDP_ULIMIT_ERR 23 1812218792Snp#define V_DDP_ULIMIT_ERR(x) ((x) << S_DDP_ULIMIT_ERR) 1813218792Snp#define F_DDP_ULIMIT_ERR V_DDP_ULIMIT_ERR(1U) 1814218792Snp 1815218792Snp#define S_DDP_OFFSET_ERR 24 1816218792Snp#define V_DDP_OFFSET_ERR(x) ((x) << S_DDP_OFFSET_ERR) 1817218792Snp#define F_DDP_OFFSET_ERR V_DDP_OFFSET_ERR(1U) 1818218792Snp 1819218792Snp#define S_DDP_COLOR_ERR 25 1820218792Snp#define V_DDP_COLOR_ERR(x) ((x) << S_DDP_COLOR_ERR) 1821218792Snp#define F_DDP_COLOR_ERR V_DDP_COLOR_ERR(1U) 1822218792Snp 1823218792Snp#define S_DDP_TID_MISMATCH 26 1824218792Snp#define V_DDP_TID_MISMATCH(x) ((x) << S_DDP_TID_MISMATCH) 1825218792Snp#define F_DDP_TID_MISMATCH V_DDP_TID_MISMATCH(1U) 1826218792Snp 1827218792Snp#define S_DDP_INVALID_PPOD 27 1828218792Snp#define V_DDP_INVALID_PPOD(x) ((x) << S_DDP_INVALID_PPOD) 1829218792Snp#define F_DDP_INVALID_PPOD V_DDP_INVALID_PPOD(1U) 1830218792Snp 1831218792Snp#define S_DDP_ULP_MODE 28 1832218792Snp#define M_DDP_ULP_MODE 0xF 1833218792Snp#define V_DDP_ULP_MODE(x) ((x) << S_DDP_ULP_MODE) 1834218792Snp#define G_DDP_ULP_MODE(x) (((x) >> S_DDP_ULP_MODE) & M_DDP_ULP_MODE) 1835218792Snp 1836237436Snp/* cpl_rx_{data,iscsi,fcoe}_{ddp,dif}.ddp_report fields */ 1837218792Snp#define S_DDP_OFFSET 0 1838218792Snp#define M_DDP_OFFSET 0xFFFFFF 1839218792Snp#define V_DDP_OFFSET(x) ((x) << S_DDP_OFFSET) 1840218792Snp#define G_DDP_OFFSET(x) (((x) >> S_DDP_OFFSET) & M_DDP_OFFSET) 1841218792Snp 1842218792Snp#define S_DDP_DACK_MODE 24 1843218792Snp#define M_DDP_DACK_MODE 0x3 1844218792Snp#define V_DDP_DACK_MODE(x) ((x) << S_DDP_DACK_MODE) 1845218792Snp#define G_DDP_DACK_MODE(x) (((x) >> S_DDP_DACK_MODE) & M_DDP_DACK_MODE) 1846218792Snp 1847218792Snp#define S_DDP_BUF_IDX 26 1848218792Snp#define V_DDP_BUF_IDX(x) ((x) << S_DDP_BUF_IDX) 1849218792Snp#define F_DDP_BUF_IDX V_DDP_BUF_IDX(1U) 1850218792Snp 1851218792Snp#define S_DDP_URG 27 1852218792Snp#define V_DDP_URG(x) ((x) << S_DDP_URG) 1853218792Snp#define F_DDP_URG V_DDP_URG(1U) 1854218792Snp 1855218792Snp#define S_DDP_PSH 28 1856218792Snp#define V_DDP_PSH(x) ((x) << S_DDP_PSH) 1857218792Snp#define F_DDP_PSH V_DDP_PSH(1U) 1858218792Snp 1859218792Snp#define S_DDP_BUF_COMPLETE 29 1860218792Snp#define V_DDP_BUF_COMPLETE(x) ((x) << S_DDP_BUF_COMPLETE) 1861218792Snp#define F_DDP_BUF_COMPLETE V_DDP_BUF_COMPLETE(1U) 1862218792Snp 1863218792Snp#define S_DDP_BUF_TIMED_OUT 30 1864218792Snp#define V_DDP_BUF_TIMED_OUT(x) ((x) << S_DDP_BUF_TIMED_OUT) 1865218792Snp#define F_DDP_BUF_TIMED_OUT V_DDP_BUF_TIMED_OUT(1U) 1866218792Snp 1867218792Snp#define S_DDP_INV 31 1868218792Snp#define V_DDP_INV(x) ((x) << S_DDP_INV) 1869218792Snp#define F_DDP_INV V_DDP_INV(1U) 1870218792Snp 1871218792Snpstruct cpl_rx_pkt { 1872218792Snp RSS_HDR 1873218792Snp __u8 opcode; 1874218792Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 1875218792Snp __u8 iff:4; 1876218792Snp __u8 csum_calc:1; 1877218792Snp __u8 ipmi_pkt:1; 1878218792Snp __u8 vlan_ex:1; 1879218792Snp __u8 ip_frag:1; 1880218792Snp#else 1881218792Snp __u8 ip_frag:1; 1882218792Snp __u8 vlan_ex:1; 1883218792Snp __u8 ipmi_pkt:1; 1884218792Snp __u8 csum_calc:1; 1885218792Snp __u8 iff:4; 1886218792Snp#endif 1887218792Snp __be16 csum; 1888218792Snp __be16 vlan; 1889218792Snp __be16 len; 1890218792Snp __be32 l2info; 1891218792Snp __be16 hdr_len; 1892218792Snp __be16 err_vec; 1893218792Snp}; 1894218792Snp 1895218792Snp/* rx_pkt.l2info fields */ 1896218792Snp#define S_RX_ETHHDR_LEN 0 1897218792Snp#define M_RX_ETHHDR_LEN 0x1F 1898218792Snp#define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN) 1899218792Snp#define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN) 1900218792Snp 1901237436Snp#define S_RX_T5_ETHHDR_LEN 0 1902237436Snp#define M_RX_T5_ETHHDR_LEN 0x3F 1903237436Snp#define V_RX_T5_ETHHDR_LEN(x) ((x) << S_RX_T5_ETHHDR_LEN) 1904237436Snp#define G_RX_T5_ETHHDR_LEN(x) (((x) >> S_RX_T5_ETHHDR_LEN) & M_RX_T5_ETHHDR_LEN) 1905237436Snp 1906308304Sjhb#define M_RX_T6_ETHHDR_LEN 0xFF 1907308304Sjhb#define G_RX_T6_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_T6_ETHHDR_LEN) 1908308304Sjhb 1909218792Snp#define S_RX_PKTYPE 5 1910218792Snp#define M_RX_PKTYPE 0x7 1911218792Snp#define V_RX_PKTYPE(x) ((x) << S_RX_PKTYPE) 1912218792Snp#define G_RX_PKTYPE(x) (((x) >> S_RX_PKTYPE) & M_RX_PKTYPE) 1913218792Snp 1914237436Snp#define S_RX_T5_DATYPE 6 1915237436Snp#define M_RX_T5_DATYPE 0x3 1916237436Snp#define V_RX_T5_DATYPE(x) ((x) << S_RX_T5_DATYPE) 1917237436Snp#define G_RX_T5_DATYPE(x) (((x) >> S_RX_T5_DATYPE) & M_RX_T5_DATYPE) 1918237436Snp 1919218792Snp#define S_RX_MACIDX 8 1920218792Snp#define M_RX_MACIDX 0x1FF 1921218792Snp#define V_RX_MACIDX(x) ((x) << S_RX_MACIDX) 1922218792Snp#define G_RX_MACIDX(x) (((x) >> S_RX_MACIDX) & M_RX_MACIDX) 1923218792Snp 1924237436Snp#define S_RX_T5_PKTYPE 17 1925237436Snp#define M_RX_T5_PKTYPE 0x7 1926237436Snp#define V_RX_T5_PKTYPE(x) ((x) << S_RX_T5_PKTYPE) 1927237436Snp#define G_RX_T5_PKTYPE(x) (((x) >> S_RX_T5_PKTYPE) & M_RX_T5_PKTYPE) 1928237436Snp 1929218792Snp#define S_RX_DATYPE 18 1930218792Snp#define M_RX_DATYPE 0x3 1931218792Snp#define V_RX_DATYPE(x) ((x) << S_RX_DATYPE) 1932218792Snp#define G_RX_DATYPE(x) (((x) >> S_RX_DATYPE) & M_RX_DATYPE) 1933218792Snp 1934218792Snp#define S_RXF_PSH 20 1935218792Snp#define V_RXF_PSH(x) ((x) << S_RXF_PSH) 1936218792Snp#define F_RXF_PSH V_RXF_PSH(1U) 1937218792Snp 1938218792Snp#define S_RXF_SYN 21 1939218792Snp#define V_RXF_SYN(x) ((x) << S_RXF_SYN) 1940218792Snp#define F_RXF_SYN V_RXF_SYN(1U) 1941218792Snp 1942218792Snp#define S_RXF_UDP 22 1943218792Snp#define V_RXF_UDP(x) ((x) << S_RXF_UDP) 1944218792Snp#define F_RXF_UDP V_RXF_UDP(1U) 1945218792Snp 1946218792Snp#define S_RXF_TCP 23 1947218792Snp#define V_RXF_TCP(x) ((x) << S_RXF_TCP) 1948218792Snp#define F_RXF_TCP V_RXF_TCP(1U) 1949218792Snp 1950218792Snp#define S_RXF_IP 24 1951218792Snp#define V_RXF_IP(x) ((x) << S_RXF_IP) 1952218792Snp#define F_RXF_IP V_RXF_IP(1U) 1953218792Snp 1954218792Snp#define S_RXF_IP6 25 1955218792Snp#define V_RXF_IP6(x) ((x) << S_RXF_IP6) 1956218792Snp#define F_RXF_IP6 V_RXF_IP6(1U) 1957218792Snp 1958218792Snp#define S_RXF_SYN_COOKIE 26 1959218792Snp#define V_RXF_SYN_COOKIE(x) ((x) << S_RXF_SYN_COOKIE) 1960218792Snp#define F_RXF_SYN_COOKIE V_RXF_SYN_COOKIE(1U) 1961218792Snp 1962218792Snp#define S_RXF_FCOE 26 1963218792Snp#define V_RXF_FCOE(x) ((x) << S_RXF_FCOE) 1964218792Snp#define F_RXF_FCOE V_RXF_FCOE(1U) 1965218792Snp 1966218792Snp#define S_RXF_LRO 27 1967218792Snp#define V_RXF_LRO(x) ((x) << S_RXF_LRO) 1968218792Snp#define F_RXF_LRO V_RXF_LRO(1U) 1969218792Snp 1970218792Snp#define S_RX_CHAN 28 1971218792Snp#define M_RX_CHAN 0xF 1972218792Snp#define V_RX_CHAN(x) ((x) << S_RX_CHAN) 1973218792Snp#define G_RX_CHAN(x) (((x) >> S_RX_CHAN) & M_RX_CHAN) 1974218792Snp 1975218792Snp/* rx_pkt.hdr_len fields */ 1976218792Snp#define S_RX_TCPHDR_LEN 0 1977218792Snp#define M_RX_TCPHDR_LEN 0x3F 1978218792Snp#define V_RX_TCPHDR_LEN(x) ((x) << S_RX_TCPHDR_LEN) 1979218792Snp#define G_RX_TCPHDR_LEN(x) (((x) >> S_RX_TCPHDR_LEN) & M_RX_TCPHDR_LEN) 1980218792Snp 1981218792Snp#define S_RX_IPHDR_LEN 6 1982218792Snp#define M_RX_IPHDR_LEN 0x3FF 1983218792Snp#define V_RX_IPHDR_LEN(x) ((x) << S_RX_IPHDR_LEN) 1984218792Snp#define G_RX_IPHDR_LEN(x) (((x) >> S_RX_IPHDR_LEN) & M_RX_IPHDR_LEN) 1985218792Snp 1986218792Snp/* rx_pkt.err_vec fields */ 1987218792Snp#define S_RXERR_OR 0 1988218792Snp#define V_RXERR_OR(x) ((x) << S_RXERR_OR) 1989218792Snp#define F_RXERR_OR V_RXERR_OR(1U) 1990218792Snp 1991218792Snp#define S_RXERR_MAC 1 1992218792Snp#define V_RXERR_MAC(x) ((x) << S_RXERR_MAC) 1993218792Snp#define F_RXERR_MAC V_RXERR_MAC(1U) 1994218792Snp 1995218792Snp#define S_RXERR_IPVERS 2 1996218792Snp#define V_RXERR_IPVERS(x) ((x) << S_RXERR_IPVERS) 1997218792Snp#define F_RXERR_IPVERS V_RXERR_IPVERS(1U) 1998218792Snp 1999218792Snp#define S_RXERR_FRAG 3 2000218792Snp#define V_RXERR_FRAG(x) ((x) << S_RXERR_FRAG) 2001218792Snp#define F_RXERR_FRAG V_RXERR_FRAG(1U) 2002218792Snp 2003218792Snp#define S_RXERR_ATTACK 4 2004218792Snp#define V_RXERR_ATTACK(x) ((x) << S_RXERR_ATTACK) 2005218792Snp#define F_RXERR_ATTACK V_RXERR_ATTACK(1U) 2006218792Snp 2007218792Snp#define S_RXERR_ETHHDR_LEN 5 2008218792Snp#define V_RXERR_ETHHDR_LEN(x) ((x) << S_RXERR_ETHHDR_LEN) 2009218792Snp#define F_RXERR_ETHHDR_LEN V_RXERR_ETHHDR_LEN(1U) 2010218792Snp 2011218792Snp#define S_RXERR_IPHDR_LEN 6 2012218792Snp#define V_RXERR_IPHDR_LEN(x) ((x) << S_RXERR_IPHDR_LEN) 2013218792Snp#define F_RXERR_IPHDR_LEN V_RXERR_IPHDR_LEN(1U) 2014218792Snp 2015218792Snp#define S_RXERR_TCPHDR_LEN 7 2016218792Snp#define V_RXERR_TCPHDR_LEN(x) ((x) << S_RXERR_TCPHDR_LEN) 2017218792Snp#define F_RXERR_TCPHDR_LEN V_RXERR_TCPHDR_LEN(1U) 2018218792Snp 2019218792Snp#define S_RXERR_PKT_LEN 8 2020218792Snp#define V_RXERR_PKT_LEN(x) ((x) << S_RXERR_PKT_LEN) 2021218792Snp#define F_RXERR_PKT_LEN V_RXERR_PKT_LEN(1U) 2022218792Snp 2023218792Snp#define S_RXERR_TCP_OPT 9 2024218792Snp#define V_RXERR_TCP_OPT(x) ((x) << S_RXERR_TCP_OPT) 2025218792Snp#define F_RXERR_TCP_OPT V_RXERR_TCP_OPT(1U) 2026218792Snp 2027218792Snp#define S_RXERR_IPCSUM 12 2028218792Snp#define V_RXERR_IPCSUM(x) ((x) << S_RXERR_IPCSUM) 2029218792Snp#define F_RXERR_IPCSUM V_RXERR_IPCSUM(1U) 2030218792Snp 2031218792Snp#define S_RXERR_CSUM 13 2032218792Snp#define V_RXERR_CSUM(x) ((x) << S_RXERR_CSUM) 2033218792Snp#define F_RXERR_CSUM V_RXERR_CSUM(1U) 2034218792Snp 2035218792Snp#define S_RXERR_PING 14 2036218792Snp#define V_RXERR_PING(x) ((x) << S_RXERR_PING) 2037218792Snp#define F_RXERR_PING V_RXERR_PING(1U) 2038218792Snp 2039308304Sjhb/* In T6, rx_pkt.err_vec indicates 2040308304Sjhb * RxError Error vector (16b) or 2041308304Sjhb * Encapsulating header length (8b), 2042308304Sjhb * Outer encapsulation type (2b) and 2043308304Sjhb * compressed error vector (6b) if CRxPktEnc is 2044308304Sjhb * enabled in TP_OUT_CONFIG 2045308304Sjhb */ 2046308304Sjhb 2047308304Sjhb#define S_T6_COMPR_RXERR_VEC 0 2048308304Sjhb#define M_T6_COMPR_RXERR_VEC 0x3F 2049311261Snp#define V_T6_COMPR_RXERR_VEC(x) ((x) << S_T6_COMPR_RXERR_VEC) 2050308304Sjhb#define G_T6_COMPR_RXERR_VEC(x) \ 2051308304Sjhb (((x) >> S_T6_COMPR_RXERR_VEC) & M_T6_COMPR_RXERR_VEC) 2052308304Sjhb 2053308304Sjhb#define S_T6_COMPR_RXERR_MAC 0 2054308304Sjhb#define V_T6_COMPR_RXERR_MAC(x) ((x) << S_T6_COMPR_RXERR_MAC) 2055308304Sjhb#define F_T6_COMPR_RXERR_MAC V_T6_COMPR_RXERR_MAC(1U) 2056308304Sjhb 2057308304Sjhb/* Logical OR of RX_ERROR_PKT_LEN, RX_ERROR_TCP_HDR_LEN 2058308304Sjhb * RX_ERROR_IP_HDR_LEN, RX_ERROR_ETH_HDR_LEN 2059308304Sjhb */ 2060308304Sjhb#define S_T6_COMPR_RXERR_LEN 1 2061311261Snp#define V_T6_COMPR_RXERR_LEN(x) ((x) << S_T6_COMPR_RXERR_LEN) 2062308304Sjhb#define F_T6_COMPR_RXERR_LEN V_COMPR_T6_RXERR_LEN(1U) 2063308304Sjhb 2064308304Sjhb#define S_T6_COMPR_RXERR_TCP_OPT 2 2065308304Sjhb#define V_T6_COMPR_RXERR_TCP_OPT(x) ((x) << S_T6_COMPR_RXERR_TCP_OPT) 2066308304Sjhb#define F_T6_COMPR_RXERR_TCP_OPT V_T6_COMPR_RXERR_TCP_OPT(1U) 2067308304Sjhb 2068308304Sjhb#define S_T6_COMPR_RXERR_IPV6_EXT 3 2069308304Sjhb#define V_T6_COMPR_RXERR_IPV6_EXT(x) ((x) << S_T6_COMPR_RXERR_IPV6_EXT) 2070308304Sjhb#define F_T6_COMPR_RXERR_IPV6_EXT V_T6_COMPR_RXERR_IPV6_EXT(1U) 2071308304Sjhb 2072308304Sjhb/* Logical OR of RX_ERROR_CSUM, RX_ERROR_CSIP */ 2073308304Sjhb#define S_T6_COMPR_RXERR_SUM 4 2074308304Sjhb#define V_T6_COMPR_RXERR_SUM(x) ((x) << S_T6_COMPR_RXERR_SUM) 2075308304Sjhb#define F_T6_COMPR_RXERR_SUM V_T6_COMPR_RXERR_SUM(1U) 2076308304Sjhb 2077308304Sjhb/* Logical OR of RX_ERROR_FPMA, RX_ERROR_PING_DROP, 2078308304Sjhb * RX_ERROR_ATTACK, RX_ERROR_FRAG,RX_ERROR_IPVERSION 2079308304Sjhb */ 2080308304Sjhb#define S_T6_COMPR_RXERR_MISC 5 2081308304Sjhb#define V_T6_COMPR_RXERR_MISC(x) ((x) << S_T6_COMPR_RXERR_MISC) 2082308304Sjhb#define F_T6_COMPR_RXERR_MISC V_T6_COMPR_RXERR_MISC(1U) 2083308304Sjhb 2084308304Sjhb#define S_T6_RX_TNL_TYPE 6 2085308304Sjhb#define M_T6_RX_TNL_TYPE 0x3 2086308304Sjhb#define V_T6_RX_TNL_TYPE(x) ((x) << S_T6_RX_TNL_TYPE) 2087308304Sjhb#define G_T6_RX_TNL_TYPE(x) (((x) >> S_T6_RX_TNL_TYPE) & M_T6_RX_TNL_TYPE) 2088308304Sjhb 2089308304Sjhb#define RX_PKT_TNL_TYPE_NVGRE 1 2090308304Sjhb#define RX_PKT_TNL_TYPE_VXLAN 2 2091308304Sjhb#define RX_PKT_TNL_TYPE_GENEVE 3 2092308304Sjhb 2093308304Sjhb#define S_T6_RX_TNLHDR_LEN 8 2094308304Sjhb#define M_T6_RX_TNLHDR_LEN 0xFF 2095308304Sjhb#define V_T6_RX_TNLHDR_LEN(x) ((x) << S_T6_RX_TNLHDR_LEN) 2096308304Sjhb#define G_T6_RX_TNLHDR_LEN(x) (((x) >> S_T6_RX_TNLHDR_LEN) & M_T6_RX_TNLHDR_LEN) 2097308304Sjhb 2098218792Snpstruct cpl_trace_pkt { 2099218792Snp RSS_HDR 2100218792Snp __u8 opcode; 2101218792Snp __u8 intf; 2102218792Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 2103218792Snp __u8 runt:4; 2104218792Snp __u8 filter_hit:4; 2105218792Snp __u8 :6; 2106218792Snp __u8 err:1; 2107218792Snp __u8 trunc:1; 2108218792Snp#else 2109218792Snp __u8 filter_hit:4; 2110218792Snp __u8 runt:4; 2111218792Snp __u8 trunc:1; 2112218792Snp __u8 err:1; 2113218792Snp __u8 :6; 2114218792Snp#endif 2115218792Snp __be16 rsvd; 2116218792Snp __be16 len; 2117218792Snp __be64 tstamp; 2118218792Snp}; 2119218792Snp 2120237436Snpstruct cpl_t5_trace_pkt { 2121237436Snp RSS_HDR 2122237436Snp __u8 opcode; 2123237436Snp __u8 intf; 2124237436Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 2125237436Snp __u8 runt:4; 2126237436Snp __u8 filter_hit:4; 2127237436Snp __u8 :6; 2128237436Snp __u8 err:1; 2129237436Snp __u8 trunc:1; 2130237436Snp#else 2131237436Snp __u8 filter_hit:4; 2132237436Snp __u8 runt:4; 2133237436Snp __u8 trunc:1; 2134237436Snp __u8 err:1; 2135237436Snp __u8 :6; 2136237436Snp#endif 2137237436Snp __be16 rsvd; 2138237436Snp __be16 len; 2139237436Snp __be64 tstamp; 2140237436Snp __be64 rsvd1; 2141237436Snp}; 2142237436Snp 2143218792Snpstruct cpl_rte_delete_req { 2144218792Snp WR_HDR; 2145218792Snp union opcode_tid ot; 2146218792Snp __be32 params; 2147218792Snp}; 2148218792Snp 2149218792Snp/* {cpl_rte_delete_req, cpl_rte_read_req}.params fields */ 2150218792Snp#define S_RTE_REQ_LUT_IX 8 2151218792Snp#define M_RTE_REQ_LUT_IX 0x7FF 2152218792Snp#define V_RTE_REQ_LUT_IX(x) ((x) << S_RTE_REQ_LUT_IX) 2153218792Snp#define G_RTE_REQ_LUT_IX(x) (((x) >> S_RTE_REQ_LUT_IX) & M_RTE_REQ_LUT_IX) 2154218792Snp 2155218792Snp#define S_RTE_REQ_LUT_BASE 19 2156218792Snp#define M_RTE_REQ_LUT_BASE 0x7FF 2157218792Snp#define V_RTE_REQ_LUT_BASE(x) ((x) << S_RTE_REQ_LUT_BASE) 2158218792Snp#define G_RTE_REQ_LUT_BASE(x) (((x) >> S_RTE_REQ_LUT_BASE) & M_RTE_REQ_LUT_BASE) 2159218792Snp 2160218792Snp#define S_RTE_READ_REQ_SELECT 31 2161218792Snp#define V_RTE_READ_REQ_SELECT(x) ((x) << S_RTE_READ_REQ_SELECT) 2162218792Snp#define F_RTE_READ_REQ_SELECT V_RTE_READ_REQ_SELECT(1U) 2163218792Snp 2164218792Snpstruct cpl_rte_delete_rpl { 2165218792Snp RSS_HDR 2166218792Snp union opcode_tid ot; 2167218792Snp __u8 status; 2168218792Snp __u8 rsvd[3]; 2169218792Snp}; 2170218792Snp 2171218792Snpstruct cpl_rte_write_req { 2172218792Snp WR_HDR; 2173218792Snp union opcode_tid ot; 2174218792Snp __u32 write_sel; 2175218792Snp __be32 lut_params; 2176218792Snp __be32 l2t_idx; 2177218792Snp __be32 netmask; 2178218792Snp __be32 faddr; 2179218792Snp}; 2180218792Snp 2181218792Snp/* cpl_rte_write_req.write_sel fields */ 2182218792Snp#define S_RTE_WR_L2TIDX 31 2183218792Snp#define V_RTE_WR_L2TIDX(x) ((x) << S_RTE_WR_L2TIDX) 2184218792Snp#define F_RTE_WR_L2TIDX V_RTE_WR_L2TIDX(1U) 2185218792Snp 2186218792Snp#define S_RTE_WR_FADDR 30 2187218792Snp#define V_RTE_WR_FADDR(x) ((x) << S_RTE_WR_FADDR) 2188218792Snp#define F_RTE_WR_FADDR V_RTE_WR_FADDR(1U) 2189218792Snp 2190218792Snp/* cpl_rte_write_req.lut_params fields */ 2191218792Snp#define S_RTE_WR_LUT_IX 10 2192218792Snp#define M_RTE_WR_LUT_IX 0x7FF 2193218792Snp#define V_RTE_WR_LUT_IX(x) ((x) << S_RTE_WR_LUT_IX) 2194218792Snp#define G_RTE_WR_LUT_IX(x) (((x) >> S_RTE_WR_LUT_IX) & M_RTE_WR_LUT_IX) 2195218792Snp 2196218792Snp#define S_RTE_WR_LUT_BASE 21 2197218792Snp#define M_RTE_WR_LUT_BASE 0x7FF 2198218792Snp#define V_RTE_WR_LUT_BASE(x) ((x) << S_RTE_WR_LUT_BASE) 2199218792Snp#define G_RTE_WR_LUT_BASE(x) (((x) >> S_RTE_WR_LUT_BASE) & M_RTE_WR_LUT_BASE) 2200218792Snp 2201218792Snpstruct cpl_rte_write_rpl { 2202218792Snp RSS_HDR 2203218792Snp union opcode_tid ot; 2204218792Snp __u8 status; 2205218792Snp __u8 rsvd[3]; 2206218792Snp}; 2207218792Snp 2208218792Snpstruct cpl_rte_read_req { 2209218792Snp WR_HDR; 2210218792Snp union opcode_tid ot; 2211218792Snp __be32 params; 2212218792Snp}; 2213218792Snp 2214218792Snpstruct cpl_rte_read_rpl { 2215218792Snp RSS_HDR 2216218792Snp union opcode_tid ot; 2217218792Snp __u8 status; 2218218792Snp __u8 rsvd; 2219218792Snp __be16 l2t_idx; 2220218792Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 2221218792Snp __u32 :30; 2222218792Snp __u32 select:1; 2223218792Snp#else 2224218792Snp __u32 select:1; 2225218792Snp __u32 :30; 2226218792Snp#endif 2227218792Snp __be32 addr; 2228218792Snp}; 2229218792Snp 2230218792Snpstruct cpl_l2t_write_req { 2231218792Snp WR_HDR; 2232218792Snp union opcode_tid ot; 2233218792Snp __be16 params; 2234218792Snp __be16 l2t_idx; 2235218792Snp __be16 vlan; 2236218792Snp __u8 dst_mac[6]; 2237218792Snp}; 2238218792Snp 2239218792Snp/* cpl_l2t_write_req.params fields */ 2240218792Snp#define S_L2T_W_INFO 2 2241218792Snp#define M_L2T_W_INFO 0x3F 2242218792Snp#define V_L2T_W_INFO(x) ((x) << S_L2T_W_INFO) 2243218792Snp#define G_L2T_W_INFO(x) (((x) >> S_L2T_W_INFO) & M_L2T_W_INFO) 2244218792Snp 2245218792Snp#define S_L2T_W_PORT 8 2246248925Snp#define M_L2T_W_PORT 0x3 2247218792Snp#define V_L2T_W_PORT(x) ((x) << S_L2T_W_PORT) 2248218792Snp#define G_L2T_W_PORT(x) (((x) >> S_L2T_W_PORT) & M_L2T_W_PORT) 2249218792Snp 2250248925Snp#define S_L2T_W_LPBK 10 2251248925Snp#define V_L2T_W_LPBK(x) ((x) << S_L2T_W_LPBK) 2252248925Snp#define F_L2T_W_PKBK V_L2T_W_LPBK(1U) 2253248925Snp 2254248925Snp#define S_L2T_W_ARPMISS 11 2255248925Snp#define V_L2T_W_ARPMISS(x) ((x) << S_L2T_W_ARPMISS) 2256248925Snp#define F_L2T_W_ARPMISS V_L2T_W_ARPMISS(1U) 2257248925Snp 2258218792Snp#define S_L2T_W_NOREPLY 15 2259218792Snp#define V_L2T_W_NOREPLY(x) ((x) << S_L2T_W_NOREPLY) 2260218792Snp#define F_L2T_W_NOREPLY V_L2T_W_NOREPLY(1U) 2261218792Snp 2262248925Snp#define CPL_L2T_VLAN_NONE 0xfff 2263248925Snp 2264218792Snpstruct cpl_l2t_write_rpl { 2265218792Snp RSS_HDR 2266218792Snp union opcode_tid ot; 2267218792Snp __u8 status; 2268218792Snp __u8 rsvd[3]; 2269218792Snp}; 2270218792Snp 2271218792Snpstruct cpl_l2t_read_req { 2272218792Snp WR_HDR; 2273218792Snp union opcode_tid ot; 2274218792Snp __be32 l2t_idx; 2275218792Snp}; 2276218792Snp 2277218792Snpstruct cpl_l2t_read_rpl { 2278218792Snp RSS_HDR 2279218792Snp union opcode_tid ot; 2280218792Snp __u8 status; 2281218792Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 2282218792Snp __u8 :4; 2283218792Snp __u8 iff:4; 2284218792Snp#else 2285218792Snp __u8 iff:4; 2286218792Snp __u8 :4; 2287218792Snp#endif 2288218792Snp __be16 vlan; 2289218792Snp __be16 info; 2290218792Snp __u8 dst_mac[6]; 2291218792Snp}; 2292218792Snp 2293308304Sjhbstruct cpl_srq_table_req { 2294308304Sjhb WR_HDR; 2295308304Sjhb union opcode_tid ot; 2296308304Sjhb __u8 status; 2297308304Sjhb __u8 rsvd[2]; 2298308304Sjhb __u8 idx; 2299308304Sjhb __be64 rsvd_pdid; 2300308304Sjhb __be32 qlen_qbase; 2301308304Sjhb __be16 cur_msn; 2302308304Sjhb __be16 max_msn; 2303308304Sjhb}; 2304308304Sjhb 2305308304Sjhbstruct cpl_srq_table_rpl { 2306308304Sjhb RSS_HDR 2307308304Sjhb union opcode_tid ot; 2308308304Sjhb __u8 status; 2309308304Sjhb __u8 rsvd[2]; 2310308304Sjhb __u8 idx; 2311308304Sjhb __be64 rsvd_pdid; 2312308304Sjhb __be32 qlen_qbase; 2313308304Sjhb __be16 cur_msn; 2314308304Sjhb __be16 max_msn; 2315308304Sjhb}; 2316308304Sjhb 2317308304Sjhb/* cpl_srq_table_{req,rpl}.params fields */ 2318308304Sjhb#define S_SRQT_QLEN 28 2319308304Sjhb#define M_SRQT_QLEN 0xF 2320308304Sjhb#define V_SRQT_QLEN(x) ((x) << S_SRQT_QLEN) 2321308304Sjhb#define G_SRQT_QLEN(x) (((x) >> S_SRQT_QLEN) & M_SRQT_QLEN) 2322308304Sjhb 2323308304Sjhb#define S_SRQT_QBASE 0 2324308304Sjhb#define M_SRQT_QBASE 0x3FFFFFF 2325308304Sjhb#define V_SRQT_QBASE(x) ((x) << S_SRQT_QBASE) 2326308304Sjhb#define G_SRQT_QBASE(x) (((x) >> S_SRQT_QBASE) & M_SRQT_QBASE) 2327308304Sjhb 2328308304Sjhb#define S_SRQT_PDID 0 2329308304Sjhb#define M_SRQT_PDID 0xFF 2330308304Sjhb#define V_SRQT_PDID(x) ((x) << S_SRQT_PDID) 2331308304Sjhb#define G_SRQT_PDID(x) (((x) >> S_SRQT_PDID) & M_SRQT_PDID) 2332308304Sjhb 2333308304Sjhb#define S_SRQT_IDX 0 2334308304Sjhb#define M_SRQT_IDX 0xF 2335308304Sjhb#define V_SRQT_IDX(x) ((x) << S_SRQT_IDX) 2336308304Sjhb#define G_SRQT_IDX(x) (((x) >> S_SRQT_IDX) & M_SRQT_IDX) 2337308304Sjhb 2338218792Snpstruct cpl_smt_write_req { 2339218792Snp WR_HDR; 2340218792Snp union opcode_tid ot; 2341218792Snp __be32 params; 2342218792Snp __be16 pfvf1; 2343218792Snp __u8 src_mac1[6]; 2344218792Snp __be16 pfvf0; 2345218792Snp __u8 src_mac0[6]; 2346218792Snp}; 2347218792Snp 2348308304Sjhbstruct cpl_t6_smt_write_req { 2349308304Sjhb WR_HDR; 2350308304Sjhb union opcode_tid ot; 2351308304Sjhb __be32 params; 2352308304Sjhb __be64 tag; 2353308304Sjhb __be16 pfvf0; 2354308304Sjhb __u8 src_mac0[6]; 2355308304Sjhb __be32 local_ip; 2356308304Sjhb __be32 rsvd; 2357308304Sjhb}; 2358308304Sjhb 2359237436Snpstruct cpl_smt_write_rpl { 2360237436Snp RSS_HDR 2361237436Snp union opcode_tid ot; 2362237436Snp __u8 status; 2363237436Snp __u8 rsvd[3]; 2364237436Snp}; 2365237436Snp 2366237436Snpstruct cpl_smt_read_req { 2367237436Snp WR_HDR; 2368237436Snp union opcode_tid ot; 2369237436Snp __be32 params; 2370237436Snp}; 2371237436Snp 2372237436Snpstruct cpl_smt_read_rpl { 2373237436Snp RSS_HDR 2374237436Snp union opcode_tid ot; 2375237436Snp __u8 status; 2376237436Snp __u8 ovlan_idx; 2377237436Snp __be16 rsvd; 2378237436Snp __be16 pfvf1; 2379237436Snp __u8 src_mac1[6]; 2380237436Snp __be16 pfvf0; 2381237436Snp __u8 src_mac0[6]; 2382237436Snp}; 2383237436Snp 2384218792Snp/* cpl_smt_{read,write}_req.params fields */ 2385218792Snp#define S_SMTW_OVLAN_IDX 16 2386218792Snp#define M_SMTW_OVLAN_IDX 0xF 2387218792Snp#define V_SMTW_OVLAN_IDX(x) ((x) << S_SMTW_OVLAN_IDX) 2388218792Snp#define G_SMTW_OVLAN_IDX(x) (((x) >> S_SMTW_OVLAN_IDX) & M_SMTW_OVLAN_IDX) 2389218792Snp 2390218792Snp#define S_SMTW_IDX 20 2391218792Snp#define M_SMTW_IDX 0x7F 2392218792Snp#define V_SMTW_IDX(x) ((x) << S_SMTW_IDX) 2393218792Snp#define G_SMTW_IDX(x) (((x) >> S_SMTW_IDX) & M_SMTW_IDX) 2394218792Snp 2395308304Sjhb#define M_T6_SMTW_IDX 0xFF 2396308304Sjhb#define G_T6_SMTW_IDX(x) (((x) >> S_SMTW_IDX) & M_T6_SMTW_IDX) 2397308304Sjhb 2398218792Snp#define S_SMTW_NORPL 31 2399218792Snp#define V_SMTW_NORPL(x) ((x) << S_SMTW_NORPL) 2400218792Snp#define F_SMTW_NORPL V_SMTW_NORPL(1U) 2401218792Snp 2402218792Snp/* cpl_smt_{read,write}_req.pfvf? fields */ 2403218792Snp#define S_SMTW_VF 0 2404218792Snp#define M_SMTW_VF 0xFF 2405218792Snp#define V_SMTW_VF(x) ((x) << S_SMTW_VF) 2406218792Snp#define G_SMTW_VF(x) (((x) >> S_SMTW_VF) & M_SMTW_VF) 2407218792Snp 2408218792Snp#define S_SMTW_PF 8 2409218792Snp#define M_SMTW_PF 0x7 2410218792Snp#define V_SMTW_PF(x) ((x) << S_SMTW_PF) 2411218792Snp#define G_SMTW_PF(x) (((x) >> S_SMTW_PF) & M_SMTW_PF) 2412218792Snp 2413218792Snp#define S_SMTW_VF_VLD 11 2414218792Snp#define V_SMTW_VF_VLD(x) ((x) << S_SMTW_VF_VLD) 2415218792Snp#define F_SMTW_VF_VLD V_SMTW_VF_VLD(1U) 2416218792Snp 2417237436Snpstruct cpl_tag_write_req { 2418237436Snp WR_HDR; 2419237436Snp union opcode_tid ot; 2420237436Snp __be32 params; 2421237436Snp __be64 tag_val; 2422237436Snp}; 2423237436Snp 2424237436Snpstruct cpl_tag_write_rpl { 2425218792Snp RSS_HDR 2426218792Snp union opcode_tid ot; 2427218792Snp __u8 status; 2428237436Snp __u8 rsvd[2]; 2429237436Snp __u8 idx; 2430218792Snp}; 2431218792Snp 2432237436Snpstruct cpl_tag_read_req { 2433218792Snp WR_HDR; 2434218792Snp union opcode_tid ot; 2435218792Snp __be32 params; 2436218792Snp}; 2437218792Snp 2438237436Snpstruct cpl_tag_read_rpl { 2439218792Snp RSS_HDR 2440218792Snp union opcode_tid ot; 2441218792Snp __u8 status; 2442237436Snp#if defined(__LITTLE_ENDIAN_BITFIELD) 2443237436Snp __u8 :4; 2444237436Snp __u8 tag_len:1; 2445237436Snp __u8 :2; 2446237436Snp __u8 ins_enable:1; 2447237436Snp#else 2448237436Snp __u8 ins_enable:1; 2449237436Snp __u8 :2; 2450237436Snp __u8 tag_len:1; 2451237436Snp __u8 :4; 2452237436Snp#endif 2453237436Snp __u8 rsvd; 2454237436Snp __u8 tag_idx; 2455237436Snp __be64 tag_val; 2456218792Snp}; 2457218792Snp 2458237436Snp/* cpl_tag{read,write}_req.params fields */ 2459237436Snp#define S_TAGW_IDX 0 2460237436Snp#define M_TAGW_IDX 0x7F 2461237436Snp#define V_TAGW_IDX(x) ((x) << S_TAGW_IDX) 2462237436Snp#define G_TAGW_IDX(x) (((x) >> S_TAGW_IDX) & M_TAGW_IDX) 2463237436Snp 2464237436Snp#define S_TAGW_LEN 20 2465237436Snp#define V_TAGW_LEN(x) ((x) << S_TAGW_LEN) 2466237436Snp#define F_TAGW_LEN V_TAGW_LEN(1U) 2467237436Snp 2468237436Snp#define S_TAGW_INS_ENABLE 23 2469237436Snp#define V_TAGW_INS_ENABLE(x) ((x) << S_TAGW_INS_ENABLE) 2470237436Snp#define F_TAGW_INS_ENABLE V_TAGW_INS_ENABLE(1U) 2471237436Snp 2472237436Snp#define S_TAGW_NORPL 31 2473237436Snp#define V_TAGW_NORPL(x) ((x) << S_TAGW_NORPL) 2474237436Snp#define F_TAGW_NORPL V_TAGW_NORPL(1U) 2475237436Snp 2476218792Snpstruct cpl_barrier { 2477218792Snp WR_HDR; 2478218792Snp __u8 opcode; 2479218792Snp __u8 chan_map; 2480218792Snp __be16 rsvd0; 2481218792Snp __be32 rsvd1; 2482218792Snp}; 2483218792Snp 2484218792Snp/* cpl_barrier.chan_map fields */ 2485218792Snp#define S_CHAN_MAP 4 2486218792Snp#define M_CHAN_MAP 0xF 2487218792Snp#define V_CHAN_MAP(x) ((x) << S_CHAN_MAP) 2488218792Snp#define G_CHAN_MAP(x) (((x) >> S_CHAN_MAP) & M_CHAN_MAP) 2489218792Snp 2490218792Snpstruct cpl_error { 2491218792Snp RSS_HDR 2492218792Snp union opcode_tid ot; 2493218792Snp __be32 error; 2494218792Snp}; 2495218792Snp 2496218792Snpstruct cpl_hit_notify { 2497218792Snp RSS_HDR 2498218792Snp union opcode_tid ot; 2499218792Snp __be32 rsvd; 2500218792Snp __be32 info; 2501218792Snp __be32 reason; 2502218792Snp}; 2503218792Snp 2504218792Snpstruct cpl_pkt_notify { 2505218792Snp RSS_HDR 2506218792Snp union opcode_tid ot; 2507218792Snp __be16 rsvd; 2508218792Snp __be16 len; 2509218792Snp __be32 info; 2510218792Snp __be32 reason; 2511218792Snp}; 2512218792Snp 2513218792Snp/* cpl_{hit,pkt}_notify.info fields */ 2514218792Snp#define S_NTFY_MAC_IDX 0 2515218792Snp#define M_NTFY_MAC_IDX 0x1FF 2516218792Snp#define V_NTFY_MAC_IDX(x) ((x) << S_NTFY_MAC_IDX) 2517218792Snp#define G_NTFY_MAC_IDX(x) (((x) >> S_NTFY_MAC_IDX) & M_NTFY_MAC_IDX) 2518218792Snp 2519218792Snp#define S_NTFY_INTF 10 2520218792Snp#define M_NTFY_INTF 0xF 2521218792Snp#define V_NTFY_INTF(x) ((x) << S_NTFY_INTF) 2522218792Snp#define G_NTFY_INTF(x) (((x) >> S_NTFY_INTF) & M_NTFY_INTF) 2523218792Snp 2524218792Snp#define S_NTFY_TCPHDR_LEN 14 2525218792Snp#define M_NTFY_TCPHDR_LEN 0xF 2526218792Snp#define V_NTFY_TCPHDR_LEN(x) ((x) << S_NTFY_TCPHDR_LEN) 2527218792Snp#define G_NTFY_TCPHDR_LEN(x) (((x) >> S_NTFY_TCPHDR_LEN) & M_NTFY_TCPHDR_LEN) 2528218792Snp 2529218792Snp#define S_NTFY_IPHDR_LEN 18 2530218792Snp#define M_NTFY_IPHDR_LEN 0x1FF 2531218792Snp#define V_NTFY_IPHDR_LEN(x) ((x) << S_NTFY_IPHDR_LEN) 2532218792Snp#define G_NTFY_IPHDR_LEN(x) (((x) >> S_NTFY_IPHDR_LEN) & M_NTFY_IPHDR_LEN) 2533218792Snp 2534218792Snp#define S_NTFY_ETHHDR_LEN 27 2535218792Snp#define M_NTFY_ETHHDR_LEN 0x1F 2536218792Snp#define V_NTFY_ETHHDR_LEN(x) ((x) << S_NTFY_ETHHDR_LEN) 2537218792Snp#define G_NTFY_ETHHDR_LEN(x) (((x) >> S_NTFY_ETHHDR_LEN) & M_NTFY_ETHHDR_LEN) 2538218792Snp 2539237436Snp#define S_NTFY_T5_IPHDR_LEN 18 2540237436Snp#define M_NTFY_T5_IPHDR_LEN 0xFF 2541237436Snp#define V_NTFY_T5_IPHDR_LEN(x) ((x) << S_NTFY_T5_IPHDR_LEN) 2542237436Snp#define G_NTFY_T5_IPHDR_LEN(x) (((x) >> S_NTFY_T5_IPHDR_LEN) & M_NTFY_T5_IPHDR_LEN) 2543237436Snp 2544237436Snp#define S_NTFY_T5_ETHHDR_LEN 26 2545237436Snp#define M_NTFY_T5_ETHHDR_LEN 0x3F 2546237436Snp#define V_NTFY_T5_ETHHDR_LEN(x) ((x) << S_NTFY_T5_ETHHDR_LEN) 2547237436Snp#define G_NTFY_T5_ETHHDR_LEN(x) (((x) >> S_NTFY_T5_ETHHDR_LEN) & M_NTFY_T5_ETHHDR_LEN) 2548237436Snp 2549218792Snpstruct cpl_rdma_terminate { 2550218792Snp RSS_HDR 2551218792Snp union opcode_tid ot; 2552218792Snp __be16 rsvd; 2553218792Snp __be16 len; 2554218792Snp}; 2555218792Snp 2556218792Snpstruct cpl_set_le_req { 2557218792Snp WR_HDR; 2558218792Snp union opcode_tid ot; 2559218792Snp __be16 reply_ctrl; 2560218792Snp __be16 params; 2561218792Snp __be64 mask_hi; 2562218792Snp __be64 mask_lo; 2563218792Snp __be64 val_hi; 2564218792Snp __be64 val_lo; 2565218792Snp}; 2566218792Snp 2567218792Snp/* cpl_set_le_req.reply_ctrl additional fields */ 2568218792Snp#define S_LE_REQ_IP6 13 2569218792Snp#define V_LE_REQ_IP6(x) ((x) << S_LE_REQ_IP6) 2570218792Snp#define F_LE_REQ_IP6 V_LE_REQ_IP6(1U) 2571218792Snp 2572218792Snp/* cpl_set_le_req.params fields */ 2573218792Snp#define S_LE_CHAN 0 2574218792Snp#define M_LE_CHAN 0x3 2575218792Snp#define V_LE_CHAN(x) ((x) << S_LE_CHAN) 2576218792Snp#define G_LE_CHAN(x) (((x) >> S_LE_CHAN) & M_LE_CHAN) 2577218792Snp 2578218792Snp#define S_LE_OFFSET 5 2579218792Snp#define M_LE_OFFSET 0x7 2580218792Snp#define V_LE_OFFSET(x) ((x) << S_LE_OFFSET) 2581218792Snp#define G_LE_OFFSET(x) (((x) >> S_LE_OFFSET) & M_LE_OFFSET) 2582218792Snp 2583218792Snp#define S_LE_MORE 8 2584218792Snp#define V_LE_MORE(x) ((x) << S_LE_MORE) 2585218792Snp#define F_LE_MORE V_LE_MORE(1U) 2586218792Snp 2587218792Snp#define S_LE_REQSIZE 9 2588218792Snp#define M_LE_REQSIZE 0x7 2589218792Snp#define V_LE_REQSIZE(x) ((x) << S_LE_REQSIZE) 2590218792Snp#define G_LE_REQSIZE(x) (((x) >> S_LE_REQSIZE) & M_LE_REQSIZE) 2591218792Snp 2592218792Snp#define S_LE_REQCMD 12 2593218792Snp#define M_LE_REQCMD 0xF 2594218792Snp#define V_LE_REQCMD(x) ((x) << S_LE_REQCMD) 2595218792Snp#define G_LE_REQCMD(x) (((x) >> S_LE_REQCMD) & M_LE_REQCMD) 2596218792Snp 2597218792Snpstruct cpl_set_le_rpl { 2598218792Snp RSS_HDR 2599218792Snp union opcode_tid ot; 2600218792Snp __u8 chan; 2601218792Snp __u8 info; 2602218792Snp __be16 len; 2603218792Snp}; 2604218792Snp 2605218792Snp/* cpl_set_le_rpl.info fields */ 2606218792Snp#define S_LE_RSPCMD 0 2607218792Snp#define M_LE_RSPCMD 0xF 2608218792Snp#define V_LE_RSPCMD(x) ((x) << S_LE_RSPCMD) 2609218792Snp#define G_LE_RSPCMD(x) (((x) >> S_LE_RSPCMD) & M_LE_RSPCMD) 2610218792Snp 2611218792Snp#define S_LE_RSPSIZE 4 2612218792Snp#define M_LE_RSPSIZE 0x7 2613218792Snp#define V_LE_RSPSIZE(x) ((x) << S_LE_RSPSIZE) 2614218792Snp#define G_LE_RSPSIZE(x) (((x) >> S_LE_RSPSIZE) & M_LE_RSPSIZE) 2615218792Snp 2616218792Snp#define S_LE_RSPTYPE 7 2617218792Snp#define V_LE_RSPTYPE(x) ((x) << S_LE_RSPTYPE) 2618218792Snp#define F_LE_RSPTYPE V_LE_RSPTYPE(1U) 2619218792Snp 2620218792Snpstruct cpl_sge_egr_update { 2621218792Snp RSS_HDR 2622218792Snp __be32 opcode_qid; 2623218792Snp __be16 cidx; 2624218792Snp __be16 pidx; 2625218792Snp}; 2626218792Snp 2627218792Snp/* cpl_sge_egr_update.ot fields */ 2628308304Sjhb#define S_AUTOEQU 22 2629308304Sjhb#define M_AUTOEQU 0x1 2630308304Sjhb#define V_AUTOEQU(x) ((x) << S_AUTOEQU) 2631308304Sjhb#define G_AUTOEQU(x) (((x) >> S_AUTOEQU) & M_AUTOEQU) 2632308304Sjhb 2633218792Snp#define S_EGR_QID 0 2634218792Snp#define M_EGR_QID 0x1FFFF 2635218792Snp#define V_EGR_QID(x) ((x) << S_EGR_QID) 2636218792Snp#define G_EGR_QID(x) (((x) >> S_EGR_QID) & M_EGR_QID) 2637218792Snp 2638247291Snp/* cpl_fw*.type values */ 2639247291Snpenum { 2640247291Snp FW_TYPE_CMD_RPL = 0, 2641247291Snp FW_TYPE_WR_RPL = 1, 2642247291Snp FW_TYPE_CQE = 2, 2643247291Snp FW_TYPE_OFLD_CONNECTION_WR_RPL = 3, 2644247291Snp FW_TYPE_RSSCPL = 4, 2645308304Sjhb FW_TYPE_WRERR_RPL = 5, 2646308304Sjhb FW_TYPE_PI_ERR = 6, 2647318775Snp FW_TYPE_TLS_KEY = 7, 2648247291Snp}; 2649247291Snp 2650218792Snpstruct cpl_fw2_pld { 2651218792Snp RSS_HDR 2652218792Snp u8 opcode; 2653218792Snp u8 rsvd[5]; 2654218792Snp __be16 len; 2655218792Snp}; 2656218792Snp 2657218792Snpstruct cpl_fw4_pld { 2658218792Snp RSS_HDR 2659218792Snp u8 opcode; 2660218792Snp u8 rsvd0[3]; 2661218792Snp u8 type; 2662218792Snp u8 rsvd1; 2663218792Snp __be16 len; 2664218792Snp __be64 data; 2665218792Snp __be64 rsvd2; 2666218792Snp}; 2667218792Snp 2668218792Snpstruct cpl_fw6_pld { 2669218792Snp RSS_HDR 2670218792Snp u8 opcode; 2671218792Snp u8 rsvd[5]; 2672218792Snp __be16 len; 2673218792Snp __be64 data[4]; 2674218792Snp}; 2675218792Snp 2676218792Snpstruct cpl_fw2_msg { 2677218792Snp RSS_HDR 2678218792Snp union opcode_info oi; 2679218792Snp}; 2680218792Snp 2681218792Snpstruct cpl_fw4_msg { 2682218792Snp RSS_HDR 2683218792Snp u8 opcode; 2684218792Snp u8 type; 2685218792Snp __be16 rsvd0; 2686218792Snp __be32 rsvd1; 2687218792Snp __be64 data[2]; 2688218792Snp}; 2689218792Snp 2690218792Snpstruct cpl_fw4_ack { 2691218792Snp RSS_HDR 2692218792Snp union opcode_tid ot; 2693218792Snp u8 credits; 2694218792Snp u8 rsvd0[2]; 2695237436Snp u8 flags; 2696218792Snp __be32 snd_nxt; 2697218792Snp __be32 snd_una; 2698218792Snp __be64 rsvd1; 2699218792Snp}; 2700218792Snp 2701237436Snpenum { 2702237436Snp CPL_FW4_ACK_FLAGS_SEQVAL = 0x1, /* seqn valid */ 2703237436Snp CPL_FW4_ACK_FLAGS_CH = 0x2, /* channel change complete */ 2704237436Snp CPL_FW4_ACK_FLAGS_FLOWC = 0x4, /* fw_flowc_wr complete */ 2705237436Snp}; 2706237436Snp 2707218792Snpstruct cpl_fw6_msg { 2708218792Snp RSS_HDR 2709218792Snp u8 opcode; 2710218792Snp u8 type; 2711218792Snp __be16 rsvd0; 2712218792Snp __be32 rsvd1; 2713218792Snp __be64 data[4]; 2714218792Snp}; 2715218792Snp 2716218792Snp/* cpl_fw6_msg.type values */ 2717218792Snpenum { 2718247291Snp FW6_TYPE_CMD_RPL = FW_TYPE_CMD_RPL, 2719247291Snp FW6_TYPE_WR_RPL = FW_TYPE_WR_RPL, 2720247291Snp FW6_TYPE_CQE = FW_TYPE_CQE, 2721247291Snp FW6_TYPE_OFLD_CONNECTION_WR_RPL = FW_TYPE_OFLD_CONNECTION_WR_RPL, 2722247291Snp FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL, 2723308304Sjhb FW6_TYPE_WRERR_RPL = FW_TYPE_WRERR_RPL, 2724308304Sjhb FW6_TYPE_PI_ERR = FW_TYPE_PI_ERR, 2725239336Snp NUM_FW6_TYPES 2726218792Snp}; 2727218792Snp 2728237436Snpstruct cpl_fw6_msg_ofld_connection_wr_rpl { 2729237436Snp __u64 cookie; 2730237436Snp __be32 tid; /* or atid in case of active failure */ 2731237436Snp __u8 t_state; 2732237436Snp __u8 retval; 2733237436Snp __u8 rsvd[2]; 2734237436Snp}; 2735237436Snp 2736218792Snp/* ULP_TX opcodes */ 2737218792Snpenum { 2738218792Snp ULP_TX_MEM_READ = 2, 2739218792Snp ULP_TX_MEM_WRITE = 3, 2740218792Snp ULP_TX_PKT = 4 2741218792Snp}; 2742218792Snp 2743218792Snpenum { 2744218792Snp ULP_TX_SC_NOOP = 0x80, 2745218792Snp ULP_TX_SC_IMM = 0x81, 2746218792Snp ULP_TX_SC_DSGL = 0x82, 2747308304Sjhb ULP_TX_SC_ISGL = 0x83, 2748318775Snp ULP_TX_SC_PICTRL = 0x84, 2749318775Snp ULP_TX_SC_MEMRD = 0x86 2750218792Snp}; 2751218792Snp 2752218792Snp#define S_ULPTX_CMD 24 2753218792Snp#define M_ULPTX_CMD 0xFF 2754218792Snp#define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD) 2755218792Snp 2756218792Snp#define S_ULPTX_LEN16 0 2757218792Snp#define M_ULPTX_LEN16 0xFF 2758218792Snp#define V_ULPTX_LEN16(x) ((x) << S_ULPTX_LEN16) 2759218792Snp 2760218792Snp#define S_ULP_TX_SC_MORE 23 2761218792Snp#define V_ULP_TX_SC_MORE(x) ((x) << S_ULP_TX_SC_MORE) 2762218792Snp#define F_ULP_TX_SC_MORE V_ULP_TX_SC_MORE(1U) 2763218792Snp 2764218792Snpstruct ulptx_sge_pair { 2765218792Snp __be32 len[2]; 2766218792Snp __be64 addr[2]; 2767218792Snp}; 2768218792Snp 2769218792Snpstruct ulptx_sgl { 2770218792Snp __be32 cmd_nsge; 2771218792Snp __be32 len0; 2772218792Snp __be64 addr0; 2773218792Snp#if !(defined C99_NOT_SUPPORTED) 2774218792Snp struct ulptx_sge_pair sge[0]; 2775218792Snp#endif 2776218792Snp}; 2777218792Snp 2778218792Snpstruct ulptx_isge { 2779218792Snp __be32 stag; 2780218792Snp __be32 len; 2781218792Snp __be64 target_ofst; 2782218792Snp}; 2783218792Snp 2784218792Snpstruct ulptx_isgl { 2785218792Snp __be32 cmd_nisge; 2786218792Snp __be32 rsvd; 2787218792Snp#if !(defined C99_NOT_SUPPORTED) 2788218792Snp struct ulptx_isge sge[0]; 2789218792Snp#endif 2790218792Snp}; 2791218792Snp 2792218792Snpstruct ulptx_idata { 2793218792Snp __be32 cmd_more; 2794218792Snp __be32 len; 2795218792Snp}; 2796218792Snp 2797218792Snp#define S_ULPTX_NSGE 0 2798218792Snp#define M_ULPTX_NSGE 0xFFFF 2799218792Snp#define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE) 2800318775Snp#define G_ULPTX_NSGE(x) (((x) >> S_ULPTX_NSGE) & M_ULPTX_NSGE) 2801218792Snp 2802318775Snpstruct ulptx_sc_memrd { 2803318775Snp __be32 cmd_to_len; 2804318775Snp __be32 addr; 2805318775Snp}; 2806318775Snp 2807218792Snpstruct ulp_mem_io { 2808218792Snp WR_HDR; 2809218792Snp __be32 cmd; 2810218792Snp __be32 len16; /* command length */ 2811218792Snp __be32 dlen; /* data length in 32-byte units */ 2812218792Snp __be32 lock_addr; 2813218792Snp}; 2814218792Snp 2815218792Snp/* additional ulp_mem_io.cmd fields */ 2816218792Snp#define S_ULP_MEMIO_ORDER 23 2817218792Snp#define V_ULP_MEMIO_ORDER(x) ((x) << S_ULP_MEMIO_ORDER) 2818218792Snp#define F_ULP_MEMIO_ORDER V_ULP_MEMIO_ORDER(1U) 2819218792Snp 2820248925Snp#define S_T5_ULP_MEMIO_IMM 23 2821248925Snp#define V_T5_ULP_MEMIO_IMM(x) ((x) << S_T5_ULP_MEMIO_IMM) 2822248925Snp#define F_T5_ULP_MEMIO_IMM V_T5_ULP_MEMIO_IMM(1U) 2823248925Snp 2824248925Snp#define S_T5_ULP_MEMIO_ORDER 22 2825248925Snp#define V_T5_ULP_MEMIO_ORDER(x) ((x) << S_T5_ULP_MEMIO_ORDER) 2826248925Snp#define F_T5_ULP_MEMIO_ORDER V_T5_ULP_MEMIO_ORDER(1U) 2827248925Snp 2828308304Sjhb#define S_T5_ULP_MEMIO_FID 4 2829308304Sjhb#define M_T5_ULP_MEMIO_FID 0x7ff 2830308304Sjhb#define V_T5_ULP_MEMIO_FID(x) ((x) << S_T5_ULP_MEMIO_FID) 2831308304Sjhb 2832218792Snp/* ulp_mem_io.lock_addr fields */ 2833218792Snp#define S_ULP_MEMIO_ADDR 0 2834218792Snp#define M_ULP_MEMIO_ADDR 0x7FFFFFF 2835218792Snp#define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR) 2836218792Snp 2837218792Snp#define S_ULP_MEMIO_LOCK 31 2838218792Snp#define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK) 2839218792Snp#define F_ULP_MEMIO_LOCK V_ULP_MEMIO_LOCK(1U) 2840218792Snp 2841218792Snp/* ulp_mem_io.dlen fields */ 2842218792Snp#define S_ULP_MEMIO_DATA_LEN 0 2843218792Snp#define M_ULP_MEMIO_DATA_LEN 0x1F 2844218792Snp#define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN) 2845218792Snp 2846248925Snp/* ULP_TXPKT field values */ 2847248925Snpenum { 2848248925Snp ULP_TXPKT_DEST_TP = 0, 2849248925Snp ULP_TXPKT_DEST_SGE, 2850248925Snp ULP_TXPKT_DEST_UP, 2851248925Snp ULP_TXPKT_DEST_DEVNULL, 2852248925Snp}; 2853248925Snp 2854218792Snpstruct ulp_txpkt { 2855218792Snp __be32 cmd_dest; 2856218792Snp __be32 len; 2857218792Snp}; 2858218792Snp 2859218792Snp/* ulp_txpkt.cmd_dest fields */ 2860318775Snp#define S_ULP_TXPKT_DATAMODIFY 23 2861318775Snp#define M_ULP_TXPKT_DATAMODIFY 0x1 2862318775Snp#define V_ULP_TXPKT_DATAMODIFY(x) ((x) << S_ULP_TXPKT_DATAMODIFY) 2863318775Snp#define G_ULP_TXPKT_DATAMODIFY(x) \ 2864318775Snp (((x) >> S_ULP_TXPKT_DATAMODIFY) & M_ULP_TXPKT_DATAMODIFY_) 2865318775Snp#define F_ULP_TXPKT_DATAMODIFY V_ULP_TXPKT_DATAMODIFY(1U) 2866318775Snp 2867318775Snp#define S_ULP_TXPKT_CHANNELID 22 2868318775Snp#define M_ULP_TXPKT_CHANNELID 0x1 2869318775Snp#define V_ULP_TXPKT_CHANNELID(x) ((x) << S_ULP_TXPKT_CHANNELID) 2870318775Snp#define G_ULP_TXPKT_CHANNELID(x) \ 2871318775Snp (((x) >> S_ULP_TXPKT_CHANNELID) & M_ULP_TXPKT_CHANNELID) 2872318775Snp#define F_ULP_TXPKT_CHANNELID V_ULP_TXPKT_CHANNELID(1U) 2873318775Snp 2874318775Snp/* ulp_txpkt.cmd_dest fields */ 2875218792Snp#define S_ULP_TXPKT_DEST 16 2876218792Snp#define M_ULP_TXPKT_DEST 0x3 2877218792Snp#define V_ULP_TXPKT_DEST(x) ((x) << S_ULP_TXPKT_DEST) 2878218792Snp 2879218792Snp#define S_ULP_TXPKT_FID 4 2880218792Snp#define M_ULP_TXPKT_FID 0x7ff 2881218792Snp#define V_ULP_TXPKT_FID(x) ((x) << S_ULP_TXPKT_FID) 2882218792Snp 2883237436Snp#define S_ULP_TXPKT_RO 3 2884237436Snp#define V_ULP_TXPKT_RO(x) ((x) << S_ULP_TXPKT_RO) 2885237436Snp#define F_ULP_TXPKT_RO V_ULP_TXPKT_RO(1U) 2886237436Snp 2887308304Sjhbenum cpl_tx_tnl_lso_type { 2888308304Sjhb TX_TNL_TYPE_OPAQUE, 2889308304Sjhb TX_TNL_TYPE_NVGRE, 2890308304Sjhb TX_TNL_TYPE_VXLAN, 2891308304Sjhb TX_TNL_TYPE_GENEVE, 2892308304Sjhb}; 2893308304Sjhb 2894308304Sjhbstruct cpl_tx_tnl_lso { 2895308304Sjhb __be32 op_to_IpIdSplitOut; 2896308304Sjhb __be16 IpIdOffsetOut; 2897308304Sjhb __be16 UdpLenSetOut_to_TnlHdrLen; 2898308304Sjhb __be64 r1; 2899308304Sjhb __be32 Flow_to_TcpHdrLen; 2900308304Sjhb __be16 IpIdOffset; 2901308304Sjhb __be16 IpIdSplit_to_Mss; 2902308304Sjhb __be32 TCPSeqOffset; 2903308304Sjhb __be32 EthLenOffset_Size; 2904308304Sjhb /* encapsulated CPL (TX_PKT_XT) follows here */ 2905308304Sjhb}; 2906308304Sjhb 2907308304Sjhb#define S_CPL_TX_TNL_LSO_OPCODE 24 2908308304Sjhb#define M_CPL_TX_TNL_LSO_OPCODE 0xff 2909308304Sjhb#define V_CPL_TX_TNL_LSO_OPCODE(x) ((x) << S_CPL_TX_TNL_LSO_OPCODE) 2910308304Sjhb#define G_CPL_TX_TNL_LSO_OPCODE(x) \ 2911308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_OPCODE) & M_CPL_TX_TNL_LSO_OPCODE) 2912308304Sjhb 2913308304Sjhb#define S_CPL_TX_TNL_LSO_FIRST 23 2914308304Sjhb#define M_CPL_TX_TNL_LSO_FIRST 0x1 2915308304Sjhb#define V_CPL_TX_TNL_LSO_FIRST(x) ((x) << S_CPL_TX_TNL_LSO_FIRST) 2916308304Sjhb#define G_CPL_TX_TNL_LSO_FIRST(x) \ 2917308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_FIRST) & M_CPL_TX_TNL_LSO_FIRST) 2918308304Sjhb#define F_CPL_TX_TNL_LSO_FIRST V_CPL_TX_TNL_LSO_FIRST(1U) 2919308304Sjhb 2920308304Sjhb#define S_CPL_TX_TNL_LSO_LAST 22 2921308304Sjhb#define M_CPL_TX_TNL_LSO_LAST 0x1 2922308304Sjhb#define V_CPL_TX_TNL_LSO_LAST(x) ((x) << S_CPL_TX_TNL_LSO_LAST) 2923308304Sjhb#define G_CPL_TX_TNL_LSO_LAST(x) \ 2924308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_LAST) & M_CPL_TX_TNL_LSO_LAST) 2925308304Sjhb#define F_CPL_TX_TNL_LSO_LAST V_CPL_TX_TNL_LSO_LAST(1U) 2926308304Sjhb 2927308304Sjhb#define S_CPL_TX_TNL_LSO_ETHHDRLENXOUT 21 2928308304Sjhb#define M_CPL_TX_TNL_LSO_ETHHDRLENXOUT 0x1 2929308304Sjhb#define V_CPL_TX_TNL_LSO_ETHHDRLENXOUT(x) \ 2930308304Sjhb ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENXOUT) 2931308304Sjhb#define G_CPL_TX_TNL_LSO_ETHHDRLENXOUT(x) \ 2932308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENXOUT) & M_CPL_TX_TNL_LSO_ETHHDRLENXOUT) 2933308304Sjhb#define F_CPL_TX_TNL_LSO_ETHHDRLENXOUT V_CPL_TX_TNL_LSO_ETHHDRLENXOUT(1U) 2934308304Sjhb 2935308304Sjhb#define S_CPL_TX_TNL_LSO_IPV6OUT 20 2936308304Sjhb#define M_CPL_TX_TNL_LSO_IPV6OUT 0x1 2937308304Sjhb#define V_CPL_TX_TNL_LSO_IPV6OUT(x) ((x) << S_CPL_TX_TNL_LSO_IPV6OUT) 2938308304Sjhb#define G_CPL_TX_TNL_LSO_IPV6OUT(x) \ 2939308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPV6OUT) & M_CPL_TX_TNL_LSO_IPV6OUT) 2940308304Sjhb#define F_CPL_TX_TNL_LSO_IPV6OUT V_CPL_TX_TNL_LSO_IPV6OUT(1U) 2941308304Sjhb 2942308304Sjhb#define S_CPL_TX_TNL_LSO_ETHHDRLENOUT 16 2943308304Sjhb#define M_CPL_TX_TNL_LSO_ETHHDRLENOUT 0xf 2944308304Sjhb#define V_CPL_TX_TNL_LSO_ETHHDRLENOUT(x) \ 2945308304Sjhb ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENOUT) 2946308304Sjhb#define G_CPL_TX_TNL_LSO_ETHHDRLENOUT(x) \ 2947308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENOUT) & M_CPL_TX_TNL_LSO_ETHHDRLENOUT) 2948308304Sjhb 2949308304Sjhb#define S_CPL_TX_TNL_LSO_IPHDRLENOUT 4 2950308304Sjhb#define M_CPL_TX_TNL_LSO_IPHDRLENOUT 0xfff 2951308304Sjhb#define V_CPL_TX_TNL_LSO_IPHDRLENOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRLENOUT) 2952308304Sjhb#define G_CPL_TX_TNL_LSO_IPHDRLENOUT(x) \ 2953308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPHDRLENOUT) & M_CPL_TX_TNL_LSO_IPHDRLENOUT) 2954308304Sjhb 2955308304Sjhb#define S_CPL_TX_TNL_LSO_IPHDRCHKOUT 3 2956308304Sjhb#define M_CPL_TX_TNL_LSO_IPHDRCHKOUT 0x1 2957308304Sjhb#define V_CPL_TX_TNL_LSO_IPHDRCHKOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRCHKOUT) 2958308304Sjhb#define G_CPL_TX_TNL_LSO_IPHDRCHKOUT(x) \ 2959308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPHDRCHKOUT) & M_CPL_TX_TNL_LSO_IPHDRCHKOUT) 2960308304Sjhb#define F_CPL_TX_TNL_LSO_IPHDRCHKOUT V_CPL_TX_TNL_LSO_IPHDRCHKOUT(1U) 2961308304Sjhb 2962308304Sjhb#define S_CPL_TX_TNL_LSO_IPLENSETOUT 2 2963308304Sjhb#define M_CPL_TX_TNL_LSO_IPLENSETOUT 0x1 2964308304Sjhb#define V_CPL_TX_TNL_LSO_IPLENSETOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPLENSETOUT) 2965308304Sjhb#define G_CPL_TX_TNL_LSO_IPLENSETOUT(x) \ 2966308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPLENSETOUT) & M_CPL_TX_TNL_LSO_IPLENSETOUT) 2967308304Sjhb#define F_CPL_TX_TNL_LSO_IPLENSETOUT V_CPL_TX_TNL_LSO_IPLENSETOUT(1U) 2968308304Sjhb 2969308304Sjhb#define S_CPL_TX_TNL_LSO_IPIDINCOUT 1 2970308304Sjhb#define M_CPL_TX_TNL_LSO_IPIDINCOUT 0x1 2971308304Sjhb#define V_CPL_TX_TNL_LSO_IPIDINCOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPIDINCOUT) 2972308304Sjhb#define G_CPL_TX_TNL_LSO_IPIDINCOUT(x) \ 2973308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPIDINCOUT) & M_CPL_TX_TNL_LSO_IPIDINCOUT) 2974308304Sjhb#define F_CPL_TX_TNL_LSO_IPIDINCOUT V_CPL_TX_TNL_LSO_IPIDINCOUT(1U) 2975308304Sjhb 2976308304Sjhb#define S_CPL_TX_TNL_LSO_IPIDSPLITOUT 0 2977308304Sjhb#define M_CPL_TX_TNL_LSO_IPIDSPLITOUT 0x1 2978308304Sjhb#define V_CPL_TX_TNL_LSO_IPIDSPLITOUT(x) \ 2979308304Sjhb ((x) << S_CPL_TX_TNL_LSO_IPIDSPLITOUT) 2980308304Sjhb#define G_CPL_TX_TNL_LSO_IPIDSPLITOUT(x) \ 2981308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPIDSPLITOUT) & M_CPL_TX_TNL_LSO_IPIDSPLITOUT) 2982308304Sjhb#define F_CPL_TX_TNL_LSO_IPIDSPLITOUT V_CPL_TX_TNL_LSO_IPIDSPLITOUT(1U) 2983308304Sjhb 2984308304Sjhb#define S_CPL_TX_TNL_LSO_UDPLENSETOUT 15 2985308304Sjhb#define M_CPL_TX_TNL_LSO_UDPLENSETOUT 0x1 2986308304Sjhb#define V_CPL_TX_TNL_LSO_UDPLENSETOUT(x) \ 2987308304Sjhb ((x) << S_CPL_TX_TNL_LSO_UDPLENSETOUT) 2988308304Sjhb#define G_CPL_TX_TNL_LSO_UDPLENSETOUT(x) \ 2989308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_UDPLENSETOUT) & M_CPL_TX_TNL_LSO_UDPLENSETOUT) 2990308304Sjhb#define F_CPL_TX_TNL_LSO_UDPLENSETOUT V_CPL_TX_TNL_LSO_UDPLENSETOUT(1U) 2991308304Sjhb 2992308304Sjhb#define S_CPL_TX_TNL_LSO_UDPCHKCLROUT 14 2993308304Sjhb#define M_CPL_TX_TNL_LSO_UDPCHKCLROUT 0x1 2994308304Sjhb#define V_CPL_TX_TNL_LSO_UDPCHKCLROUT(x) \ 2995308304Sjhb ((x) << S_CPL_TX_TNL_LSO_UDPCHKCLROUT) 2996308304Sjhb#define G_CPL_TX_TNL_LSO_UDPCHKCLROUT(x) \ 2997308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_UDPCHKCLROUT) & M_CPL_TX_TNL_LSO_UDPCHKCLROUT) 2998308304Sjhb#define F_CPL_TX_TNL_LSO_UDPCHKCLROUT V_CPL_TX_TNL_LSO_UDPCHKCLROUT(1U) 2999308304Sjhb 3000308304Sjhb#define S_CPL_TX_TNL_LSO_TNLTYPE 12 3001308304Sjhb#define M_CPL_TX_TNL_LSO_TNLTYPE 0x3 3002308304Sjhb#define V_CPL_TX_TNL_LSO_TNLTYPE(x) ((x) << S_CPL_TX_TNL_LSO_TNLTYPE) 3003308304Sjhb#define G_CPL_TX_TNL_LSO_TNLTYPE(x) \ 3004308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_TNLTYPE) & M_CPL_TX_TNL_LSO_TNLTYPE) 3005308304Sjhb 3006308304Sjhb#define S_CPL_TX_TNL_LSO_TNLHDRLEN 0 3007308304Sjhb#define M_CPL_TX_TNL_LSO_TNLHDRLEN 0xfff 3008308304Sjhb#define V_CPL_TX_TNL_LSO_TNLHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_TNLHDRLEN) 3009308304Sjhb#define G_CPL_TX_TNL_LSO_TNLHDRLEN(x) \ 3010308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_TNLHDRLEN) & M_CPL_TX_TNL_LSO_TNLHDRLEN) 3011308304Sjhb 3012308304Sjhb#define S_CPL_TX_TNL_LSO_FLOW 21 3013308304Sjhb#define M_CPL_TX_TNL_LSO_FLOW 0x1 3014308304Sjhb#define V_CPL_TX_TNL_LSO_FLOW(x) ((x) << S_CPL_TX_TNL_LSO_FLOW) 3015308304Sjhb#define G_CPL_TX_TNL_LSO_FLOW(x) \ 3016308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_FLOW) & M_CPL_TX_TNL_LSO_FLOW) 3017308304Sjhb#define F_CPL_TX_TNL_LSO_FLOW V_CPL_TX_TNL_LSO_FLOW(1U) 3018308304Sjhb 3019308304Sjhb#define S_CPL_TX_TNL_LSO_IPV6 20 3020308304Sjhb#define M_CPL_TX_TNL_LSO_IPV6 0x1 3021308304Sjhb#define V_CPL_TX_TNL_LSO_IPV6(x) ((x) << S_CPL_TX_TNL_LSO_IPV6) 3022308304Sjhb#define G_CPL_TX_TNL_LSO_IPV6(x) \ 3023308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPV6) & M_CPL_TX_TNL_LSO_IPV6) 3024308304Sjhb#define F_CPL_TX_TNL_LSO_IPV6 V_CPL_TX_TNL_LSO_IPV6(1U) 3025308304Sjhb 3026308304Sjhb#define S_CPL_TX_TNL_LSO_ETHHDRLEN 16 3027308304Sjhb#define M_CPL_TX_TNL_LSO_ETHHDRLEN 0xf 3028308304Sjhb#define V_CPL_TX_TNL_LSO_ETHHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_ETHHDRLEN) 3029308304Sjhb#define G_CPL_TX_TNL_LSO_ETHHDRLEN(x) \ 3030308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLEN) & M_CPL_TX_TNL_LSO_ETHHDRLEN) 3031308304Sjhb 3032308304Sjhb#define S_CPL_TX_TNL_LSO_IPHDRLEN 4 3033308304Sjhb#define M_CPL_TX_TNL_LSO_IPHDRLEN 0xfff 3034308304Sjhb#define V_CPL_TX_TNL_LSO_IPHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRLEN) 3035308304Sjhb#define G_CPL_TX_TNL_LSO_IPHDRLEN(x) \ 3036308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPHDRLEN) & M_CPL_TX_TNL_LSO_IPHDRLEN) 3037308304Sjhb 3038308304Sjhb#define S_CPL_TX_TNL_LSO_TCPHDRLEN 0 3039308304Sjhb#define M_CPL_TX_TNL_LSO_TCPHDRLEN 0xf 3040308304Sjhb#define V_CPL_TX_TNL_LSO_TCPHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_TCPHDRLEN) 3041308304Sjhb#define G_CPL_TX_TNL_LSO_TCPHDRLEN(x) \ 3042308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_TCPHDRLEN) & M_CPL_TX_TNL_LSO_TCPHDRLEN) 3043308304Sjhb 3044308304Sjhb#define S_CPL_TX_TNL_LSO_IPIDSPLIT 15 3045308304Sjhb#define M_CPL_TX_TNL_LSO_IPIDSPLIT 0x1 3046308304Sjhb#define V_CPL_TX_TNL_LSO_IPIDSPLIT(x) ((x) << S_CPL_TX_TNL_LSO_IPIDSPLIT) 3047308304Sjhb#define G_CPL_TX_TNL_LSO_IPIDSPLIT(x) \ 3048308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_IPIDSPLIT) & M_CPL_TX_TNL_LSO_IPIDSPLIT) 3049308304Sjhb#define F_CPL_TX_TNL_LSO_IPIDSPLIT V_CPL_TX_TNL_LSO_IPIDSPLIT(1U) 3050308304Sjhb 3051308304Sjhb#define S_CPL_TX_TNL_LSO_ETHHDRLENX 14 3052308304Sjhb#define M_CPL_TX_TNL_LSO_ETHHDRLENX 0x1 3053308304Sjhb#define V_CPL_TX_TNL_LSO_ETHHDRLENX(x) ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENX) 3054308304Sjhb#define G_CPL_TX_TNL_LSO_ETHHDRLENX(x) \ 3055308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENX) & M_CPL_TX_TNL_LSO_ETHHDRLENX) 3056308304Sjhb#define F_CPL_TX_TNL_LSO_ETHHDRLENX V_CPL_TX_TNL_LSO_ETHHDRLENX(1U) 3057308304Sjhb 3058308304Sjhb#define S_CPL_TX_TNL_LSO_MSS 0 3059308304Sjhb#define M_CPL_TX_TNL_LSO_MSS 0x3fff 3060308304Sjhb#define V_CPL_TX_TNL_LSO_MSS(x) ((x) << S_CPL_TX_TNL_LSO_MSS) 3061308304Sjhb#define G_CPL_TX_TNL_LSO_MSS(x) \ 3062308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_MSS) & M_CPL_TX_TNL_LSO_MSS) 3063308304Sjhb 3064308304Sjhb#define S_CPL_TX_TNL_LSO_ETHLENOFFSET 28 3065308304Sjhb#define M_CPL_TX_TNL_LSO_ETHLENOFFSET 0xf 3066308304Sjhb#define V_CPL_TX_TNL_LSO_ETHLENOFFSET(x) \ 3067308304Sjhb ((x) << S_CPL_TX_TNL_LSO_ETHLENOFFSET) 3068308304Sjhb#define G_CPL_TX_TNL_LSO_ETHLENOFFSET(x) \ 3069308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_ETHLENOFFSET) & M_CPL_TX_TNL_LSO_ETHLENOFFSET) 3070308304Sjhb 3071308304Sjhb#define S_CPL_TX_TNL_LSO_SIZE 0 3072308304Sjhb#define M_CPL_TX_TNL_LSO_SIZE 0xfffffff 3073308304Sjhb#define V_CPL_TX_TNL_LSO_SIZE(x) ((x) << S_CPL_TX_TNL_LSO_SIZE) 3074308304Sjhb#define G_CPL_TX_TNL_LSO_SIZE(x) \ 3075308304Sjhb (((x) >> S_CPL_TX_TNL_LSO_SIZE) & M_CPL_TX_TNL_LSO_SIZE) 3076308304Sjhb 3077308304Sjhbstruct cpl_rx_mps_pkt { 3078308304Sjhb __be32 op_to_r1_hi; 3079308304Sjhb __be32 r1_lo_length; 3080308304Sjhb}; 3081308304Sjhb 3082308304Sjhb#define S_CPL_RX_MPS_PKT_OP 24 3083308304Sjhb#define M_CPL_RX_MPS_PKT_OP 0xff 3084308304Sjhb#define V_CPL_RX_MPS_PKT_OP(x) ((x) << S_CPL_RX_MPS_PKT_OP) 3085308304Sjhb#define G_CPL_RX_MPS_PKT_OP(x) \ 3086308304Sjhb (((x) >> S_CPL_RX_MPS_PKT_OP) & M_CPL_RX_MPS_PKT_OP) 3087308304Sjhb 3088308304Sjhb#define S_CPL_RX_MPS_PKT_TYPE 20 3089308304Sjhb#define M_CPL_RX_MPS_PKT_TYPE 0xf 3090308304Sjhb#define V_CPL_RX_MPS_PKT_TYPE(x) ((x) << S_CPL_RX_MPS_PKT_TYPE) 3091308304Sjhb#define G_CPL_RX_MPS_PKT_TYPE(x) \ 3092308304Sjhb (((x) >> S_CPL_RX_MPS_PKT_TYPE) & M_CPL_RX_MPS_PKT_TYPE) 3093308304Sjhb 3094308304Sjhb/* 3095308304Sjhb * Values for CPL_RX_MPS_PKT_TYPE, a bit-wise orthogonal field. 3096308304Sjhb */ 3097308304Sjhb#define X_CPL_RX_MPS_PKT_TYPE_PAUSE (1 << 0) 3098308304Sjhb#define X_CPL_RX_MPS_PKT_TYPE_PPP (1 << 1) 3099308304Sjhb#define X_CPL_RX_MPS_PKT_TYPE_QFC (1 << 2) 3100308304Sjhb#define X_CPL_RX_MPS_PKT_TYPE_PTP (1 << 3) 3101308304Sjhb 3102318775Snpstruct cpl_tx_tls_sfo { 3103318775Snp __be32 op_to_seg_len; 3104318775Snp __be32 pld_len; 3105318775Snp __be64 rsvd; 3106318775Snp __be32 seqno_numivs; 3107318775Snp __be32 ivgen_hdrlen; 3108318775Snp __be64 scmd1; 3109318775Snp}; 3110318775Snp 3111318775Snp/* cpl_tx_tls_sfo macros */ 3112318775Snp#define S_CPL_TX_TLS_SFO_OPCODE 24 3113318775Snp#define M_CPL_TX_TLS_SFO_OPCODE 0xff 3114318775Snp#define V_CPL_TX_TLS_SFO_OPCODE(x) ((x) << S_CPL_TX_TLS_SFO_OPCODE) 3115318775Snp#define G_CPL_TX_TLS_SFO_OPCODE(x) \ 3116318775Snp (((x) >> S_CPL_TX_TLS_SFO_OPCODE) & M_CPL_TX_TLS_SFO_OPCODE) 3117318775Snp 3118318775Snp#define S_CPL_TX_TLS_SFO_DATA_TYPE 20 3119318775Snp#define M_CPL_TX_TLS_SFO_DATA_TYPE 0xf 3120318775Snp#define V_CPL_TX_TLS_SFO_DATA_TYPE(x) ((x) << S_CPL_TX_TLS_SFO_DATA_TYPE) 3121318775Snp#define G_CPL_TX_TLS_SFO_DATA_TYPE(x) \ 3122318775Snp (((x) >> S_CPL_TX_TLS_SFO_DATA_TYPE) & M_CPL_TX_TLS_SFO_DATA_TYPE) 3123318775Snp 3124318775Snp#define S_CPL_TX_TLS_SFO_CPL_LEN 16 3125318775Snp#define M_CPL_TX_TLS_SFO_CPL_LEN 0xf 3126318775Snp#define V_CPL_TX_TLS_SFO_CPL_LEN(x) ((x) << S_CPL_TX_TLS_SFO_CPL_LEN) 3127318775Snp#define G_CPL_TX_TLS_SFO_CPL_LEN(x) \ 3128318775Snp (((x) >> S_CPL_TX_TLS_SFO_CPL_LEN) & M_CPL_TX_TLS_SFO_CPL_LEN) 3129318775Snp#define S_CPL_TX_TLS_SFO_SEG_LEN 0 3130318775Snp#define M_CPL_TX_TLS_SFO_SEG_LEN 0xffff 3131318775Snp#define V_CPL_TX_TLS_SFO_SEG_LEN(x) ((x) << S_CPL_TX_TLS_SFO_SEG_LEN) 3132318775Snp#define G_CPL_TX_TLS_SFO_SEG_LEN(x) \ 3133318775Snp (((x) >> S_CPL_TX_TLS_SFO_SEG_LEN) & M_CPL_TX_TLS_SFO_SEG_LEN) 3134318775Snp 3135318775Snpstruct cpl_tls_data { 3136318775Snp RSS_HDR 3137318775Snp __be32 op_tid; 3138318775Snp __be32 length_pkd; 3139318775Snp __be32 seq; 3140318775Snp __be32 r1; 3141318775Snp}; 3142318775Snp 3143318775Snp#define S_CPL_TLS_DATA_OPCODE 24 3144318775Snp#define M_CPL_TLS_DATA_OPCODE 0xff 3145318775Snp#define V_CPL_TLS_DATA_OPCODE(x) ((x) << S_CPL_TLS_DATA_OPCODE) 3146318775Snp#define G_CPL_TLS_DATA_OPCODE(x) \ 3147318775Snp (((x) >> S_CPL_TLS_DATA_OPCODE) & M_CPL_TLS_DATA_OPCODE) 3148318775Snp 3149318775Snp#define S_CPL_TLS_DATA_TID 0 3150318775Snp#define M_CPL_TLS_DATA_TID 0xffffff 3151318775Snp#define V_CPL_TLS_DATA_TID(x) ((x) << S_CPL_TLS_DATA_TID) 3152318775Snp#define G_CPL_TLS_DATA_TID(x) \ 3153318775Snp (((x) >> S_CPL_TLS_DATA_TID) & M_CPL_TLS_DATA_TID) 3154318775Snp 3155318775Snp#define S_CPL_TLS_DATA_LENGTH 0 3156318775Snp#define M_CPL_TLS_DATA_LENGTH 0xffff 3157318775Snp#define V_CPL_TLS_DATA_LENGTH(x) ((x) << S_CPL_TLS_DATA_LENGTH) 3158318775Snp#define G_CPL_TLS_DATA_LENGTH(x) \ 3159318775Snp (((x) >> S_CPL_TLS_DATA_LENGTH) & M_CPL_TLS_DATA_LENGTH) 3160318775Snp 3161318775Snpstruct cpl_rx_tls_cmp { 3162318775Snp RSS_HDR 3163318775Snp __be32 op_tid; 3164318775Snp __be32 pdulength_length; 3165318775Snp __be32 seq; 3166318775Snp __be32 ddp_report; 3167318775Snp __be32 r; 3168318775Snp __be32 ddp_valid; 3169318775Snp}; 3170318775Snp 3171318775Snp#define S_CPL_RX_TLS_CMP_OPCODE 24 3172318775Snp#define M_CPL_RX_TLS_CMP_OPCODE 0xff 3173318775Snp#define V_CPL_RX_TLS_CMP_OPCODE(x) ((x) << S_CPL_RX_TLS_CMP_OPCODE) 3174318775Snp#define G_CPL_RX_TLS_CMP_OPCODE(x) \ 3175318775Snp (((x) >> S_CPL_RX_TLS_CMP_OPCODE) & M_CPL_RX_TLS_CMP_OPCODE) 3176318775Snp 3177318775Snp#define S_CPL_RX_TLS_CMP_TID 0 3178318775Snp#define M_CPL_RX_TLS_CMP_TID 0xffffff 3179318775Snp#define V_CPL_RX_TLS_CMP_TID(x) ((x) << S_CPL_RX_TLS_CMP_TID) 3180318775Snp#define G_CPL_RX_TLS_CMP_TID(x) \ 3181318775Snp (((x) >> S_CPL_RX_TLS_CMP_TID) & M_CPL_RX_TLS_CMP_TID) 3182318775Snp 3183318775Snp#define S_CPL_RX_TLS_CMP_PDULENGTH 16 3184318775Snp#define M_CPL_RX_TLS_CMP_PDULENGTH 0xffff 3185318775Snp#define V_CPL_RX_TLS_CMP_PDULENGTH(x) ((x) << S_CPL_RX_TLS_CMP_PDULENGTH) 3186318775Snp#define G_CPL_RX_TLS_CMP_PDULENGTH(x) \ 3187318775Snp (((x) >> S_CPL_RX_TLS_CMP_PDULENGTH) & M_CPL_RX_TLS_CMP_PDULENGTH) 3188318775Snp 3189318775Snp#define S_CPL_RX_TLS_CMP_LENGTH 0 3190318775Snp#define M_CPL_RX_TLS_CMP_LENGTH 0xffff 3191318775Snp#define V_CPL_RX_TLS_CMP_LENGTH(x) ((x) << S_CPL_RX_TLS_CMP_LENGTH) 3192318775Snp#define G_CPL_RX_TLS_CMP_LENGTH(x) \ 3193318775Snp (((x) >> S_CPL_RX_TLS_CMP_LENGTH) & M_CPL_RX_TLS_CMP_LENGTH) 3194318775Snp 3195318775Snp#define S_SCMD_SEQ_NO_CTRL 29 3196318775Snp#define M_SCMD_SEQ_NO_CTRL 0x3 3197318775Snp#define V_SCMD_SEQ_NO_CTRL(x) ((x) << S_SCMD_SEQ_NO_CTRL) 3198318775Snp#define G_SCMD_SEQ_NO_CTRL(x) \ 3199318775Snp (((x) >> S_SCMD_SEQ_NO_CTRL) & M_SCMD_SEQ_NO_CTRL) 3200318775Snp 3201318775Snp/* StsFieldPrsnt- Status field at the end of the TLS PDU */ 3202318775Snp#define S_SCMD_STATUS_PRESENT 28 3203318775Snp#define M_SCMD_STATUS_PRESENT 0x1 3204318775Snp#define V_SCMD_STATUS_PRESENT(x) ((x) << S_SCMD_STATUS_PRESENT) 3205318775Snp#define G_SCMD_STATUS_PRESENT(x) \ 3206318775Snp (((x) >> S_SCMD_STATUS_PRESENT) & M_SCMD_STATUS_PRESENT) 3207318775Snp#define F_SCMD_STATUS_PRESENT V_SCMD_STATUS_PRESENT(1U) 3208318775Snp 3209318775Snp/* ProtoVersion - Protocol Version 0: 1.2, 1:1.1, 2:DTLS, 3:Generic, 3210318775Snp * 3-15: Reserved. */ 3211318775Snp#define S_SCMD_PROTO_VERSION 24 3212318775Snp#define M_SCMD_PROTO_VERSION 0xf 3213318775Snp#define V_SCMD_PROTO_VERSION(x) ((x) << S_SCMD_PROTO_VERSION) 3214318775Snp#define G_SCMD_PROTO_VERSION(x) \ 3215318775Snp (((x) >> S_SCMD_PROTO_VERSION) & M_SCMD_PROTO_VERSION) 3216318775Snp 3217318775Snp/* EncDecCtrl - Encryption/Decryption Control. 0: Encrypt, 1: Decrypt */ 3218318775Snp#define S_SCMD_ENC_DEC_CTRL 23 3219318775Snp#define M_SCMD_ENC_DEC_CTRL 0x1 3220318775Snp#define V_SCMD_ENC_DEC_CTRL(x) ((x) << S_SCMD_ENC_DEC_CTRL) 3221318775Snp#define G_SCMD_ENC_DEC_CTRL(x) \ 3222318775Snp (((x) >> S_SCMD_ENC_DEC_CTRL) & M_SCMD_ENC_DEC_CTRL) 3223318775Snp#define F_SCMD_ENC_DEC_CTRL V_SCMD_ENC_DEC_CTRL(1U) 3224318775Snp 3225318775Snp/* CipherAuthSeqCtrl - Cipher Authentication Sequence Control. */ 3226318775Snp#define S_SCMD_CIPH_AUTH_SEQ_CTRL 22 3227318775Snp#define M_SCMD_CIPH_AUTH_SEQ_CTRL 0x1 3228318775Snp#define V_SCMD_CIPH_AUTH_SEQ_CTRL(x) \ 3229318775Snp ((x) << S_SCMD_CIPH_AUTH_SEQ_CTRL) 3230318775Snp#define G_SCMD_CIPH_AUTH_SEQ_CTRL(x) \ 3231318775Snp (((x) >> S_SCMD_CIPH_AUTH_SEQ_CTRL) & M_SCMD_CIPH_AUTH_SEQ_CTRL) 3232318775Snp#define F_SCMD_CIPH_AUTH_SEQ_CTRL V_SCMD_CIPH_AUTH_SEQ_CTRL(1U) 3233318775Snp 3234318775Snp/* CiphMode - Cipher Mode. 0: NOP, 1:AES-CBC, 2:AES-GCM, 3:AES-CTR, 3235318775Snp * 4:Generic-AES, 5-15: Reserved. */ 3236318775Snp#define S_SCMD_CIPH_MODE 18 3237318775Snp#define M_SCMD_CIPH_MODE 0xf 3238318775Snp#define V_SCMD_CIPH_MODE(x) ((x) << S_SCMD_CIPH_MODE) 3239318775Snp#define G_SCMD_CIPH_MODE(x) \ 3240318775Snp (((x) >> S_SCMD_CIPH_MODE) & M_SCMD_CIPH_MODE) 3241318775Snp 3242318775Snp/* AuthMode - Auth Mode. 0: NOP, 1:SHA1, 2:SHA2-224, 3:SHA2-256 3243318775Snp * 4-15: Reserved */ 3244318775Snp#define S_SCMD_AUTH_MODE 14 3245318775Snp#define M_SCMD_AUTH_MODE 0xf 3246318775Snp#define V_SCMD_AUTH_MODE(x) ((x) << S_SCMD_AUTH_MODE) 3247318775Snp#define G_SCMD_AUTH_MODE(x) \ 3248318775Snp (((x) >> S_SCMD_AUTH_MODE) & M_SCMD_AUTH_MODE) 3249318775Snp 3250318775Snp/* HmacCtrl - HMAC Control. 0:NOP, 1:No truncation, 2:Support HMAC Truncation 3251318775Snp * per RFC 4366, 3:IPSec 96 bits, 4-7:Reserved 3252318775Snp */ 3253318775Snp#define S_SCMD_HMAC_CTRL 11 3254318775Snp#define M_SCMD_HMAC_CTRL 0x7 3255318775Snp#define V_SCMD_HMAC_CTRL(x) ((x) << S_SCMD_HMAC_CTRL) 3256318775Snp#define G_SCMD_HMAC_CTRL(x) \ 3257318775Snp (((x) >> S_SCMD_HMAC_CTRL) & M_SCMD_HMAC_CTRL) 3258318775Snp 3259318775Snp/* IvSize - IV size in units of 2 bytes */ 3260318775Snp#define S_SCMD_IV_SIZE 7 3261318775Snp#define M_SCMD_IV_SIZE 0xf 3262318775Snp#define V_SCMD_IV_SIZE(x) ((x) << S_SCMD_IV_SIZE) 3263318775Snp#define G_SCMD_IV_SIZE(x) \ 3264318775Snp (((x) >> S_SCMD_IV_SIZE) & M_SCMD_IV_SIZE) 3265318775Snp 3266318775Snp/* NumIVs - Number of IVs */ 3267318775Snp#define S_SCMD_NUM_IVS 0 3268318775Snp#define M_SCMD_NUM_IVS 0x7f 3269318775Snp#define V_SCMD_NUM_IVS(x) ((x) << S_SCMD_NUM_IVS) 3270318775Snp#define G_SCMD_NUM_IVS(x) \ 3271318775Snp (((x) >> S_SCMD_NUM_IVS) & M_SCMD_NUM_IVS) 3272318775Snp 3273318775Snp/* EnbDbgId - If this is enabled upper 20 (63:44) bits if SeqNumber 3274318775Snp * (below) are used as Cid (connection id for debug status), these 3275318775Snp * bits are padded to zero for forming the 64 bit 3276318775Snp * sequence number for TLS 3277318775Snp */ 3278318775Snp#define S_SCMD_ENB_DBGID 31 3279318775Snp#define M_SCMD_ENB_DBGID 0x1 3280318775Snp#define V_SCMD_ENB_DBGID(x) ((x) << S_SCMD_ENB_DBGID) 3281318775Snp#define G_SCMD_ENB_DBGID(x) \ 3282318775Snp (((x) >> S_SCMD_ENB_DBGID) & M_SCMD_ENB_DBGID) 3283318775Snp 3284318775Snp/* IV generation in SW. */ 3285318775Snp#define S_SCMD_IV_GEN_CTRL 30 3286318775Snp#define M_SCMD_IV_GEN_CTRL 0x1 3287318775Snp#define V_SCMD_IV_GEN_CTRL(x) ((x) << S_SCMD_IV_GEN_CTRL) 3288318775Snp#define G_SCMD_IV_GEN_CTRL(x) \ 3289318775Snp (((x) >> S_SCMD_IV_GEN_CTRL) & M_SCMD_IV_GEN_CTRL) 3290318775Snp#define F_SCMD_IV_GEN_CTRL V_SCMD_IV_GEN_CTRL(1U) 3291318775Snp 3292318775Snp/* More frags */ 3293318775Snp#define S_SCMD_MORE_FRAGS 20 3294318775Snp#define M_SCMD_MORE_FRAGS 0x1 3295318775Snp#define V_SCMD_MORE_FRAGS(x) ((x) << S_SCMD_MORE_FRAGS) 3296318775Snp#define G_SCMD_MORE_FRAGS(x) (((x) >> S_SCMD_MORE_FRAGS) & M_SCMD_MORE_FRAGS) 3297318775Snp 3298318775Snp/*last frag */ 3299318775Snp#define S_SCMD_LAST_FRAG 19 3300318775Snp#define M_SCMD_LAST_FRAG 0x1 3301318775Snp#define V_SCMD_LAST_FRAG(x) ((x) << S_SCMD_LAST_FRAG) 3302318775Snp#define G_SCMD_LAST_FRAG(x) (((x) >> S_SCMD_LAST_FRAG) & M_SCMD_LAST_FRAG) 3303318775Snp 3304318775Snp/* TlsCompPdu */ 3305318775Snp#define S_SCMD_TLS_COMPPDU 18 3306318775Snp#define M_SCMD_TLS_COMPPDU 0x1 3307318775Snp#define V_SCMD_TLS_COMPPDU(x) ((x) << S_SCMD_TLS_COMPPDU) 3308318775Snp#define G_SCMD_TLS_COMPPDU(x) (((x) >> S_SCMD_TLS_COMPPDU) & M_SCMD_TLS_COMPPDU) 3309318775Snp 3310318775Snp/* KeyCntxtInline - Key context inline after the scmd OR PayloadOnly*/ 3311318775Snp#define S_SCMD_KEY_CTX_INLINE 17 3312318775Snp#define M_SCMD_KEY_CTX_INLINE 0x1 3313318775Snp#define V_SCMD_KEY_CTX_INLINE(x) ((x) << S_SCMD_KEY_CTX_INLINE) 3314318775Snp#define G_SCMD_KEY_CTX_INLINE(x) \ 3315318775Snp (((x) >> S_SCMD_KEY_CTX_INLINE) & M_SCMD_KEY_CTX_INLINE) 3316318775Snp#define F_SCMD_KEY_CTX_INLINE V_SCMD_KEY_CTX_INLINE(1U) 3317318775Snp 3318318775Snp/* TLSFragEnable - 0: Host created TLS PDUs, 1: TLS Framgmentation in ASIC */ 3319318775Snp#define S_SCMD_TLS_FRAG_ENABLE 16 3320318775Snp#define M_SCMD_TLS_FRAG_ENABLE 0x1 3321318775Snp#define V_SCMD_TLS_FRAG_ENABLE(x) ((x) << S_SCMD_TLS_FRAG_ENABLE) 3322318775Snp#define G_SCMD_TLS_FRAG_ENABLE(x) \ 3323318775Snp (((x) >> S_SCMD_TLS_FRAG_ENABLE) & M_SCMD_TLS_FRAG_ENABLE) 3324318775Snp#define F_SCMD_TLS_FRAG_ENABLE V_SCMD_TLS_FRAG_ENABLE(1U) 3325318775Snp 3326318775Snp/* MacOnly - Only send the MAC and discard PDU. This is valid for hash only 3327318775Snp * modes, in this case TLS_TX will drop the PDU and only 3328318775Snp * send back the MAC bytes. */ 3329318775Snp#define S_SCMD_MAC_ONLY 15 3330318775Snp#define M_SCMD_MAC_ONLY 0x1 3331318775Snp#define V_SCMD_MAC_ONLY(x) ((x) << S_SCMD_MAC_ONLY) 3332318775Snp#define G_SCMD_MAC_ONLY(x) \ 3333318775Snp (((x) >> S_SCMD_MAC_ONLY) & M_SCMD_MAC_ONLY) 3334318775Snp#define F_SCMD_MAC_ONLY V_SCMD_MAC_ONLY(1U) 3335318775Snp 3336318775Snp/* AadIVDrop - Drop the AAD and IV fields. Useful in protocols 3337318775Snp * which have complex AAD and IV formations Eg:AES-CCM 3338318775Snp */ 3339318775Snp#define S_SCMD_AADIVDROP 14 3340318775Snp#define M_SCMD_AADIVDROP 0x1 3341318775Snp#define V_SCMD_AADIVDROP(x) ((x) << S_SCMD_AADIVDROP) 3342318775Snp#define G_SCMD_AADIVDROP(x) \ 3343318775Snp (((x) >> S_SCMD_AADIVDROP) & M_SCMD_AADIVDROP) 3344318775Snp#define F_SCMD_AADIVDROP V_SCMD_AADIVDROP(1U) 3345318775Snp 3346318775Snp/* HdrLength - Length of all headers excluding TLS header 3347318775Snp * present before start of crypto PDU/payload. */ 3348318775Snp#define S_SCMD_HDR_LEN 0 3349318775Snp#define M_SCMD_HDR_LEN 0x3fff 3350318775Snp#define V_SCMD_HDR_LEN(x) ((x) << S_SCMD_HDR_LEN) 3351318775Snp#define G_SCMD_HDR_LEN(x) \ 3352318775Snp (((x) >> S_SCMD_HDR_LEN) & M_SCMD_HDR_LEN) 3353318775Snp 3354318775Snpstruct cpl_tx_sec_pdu { 3355318775Snp __be32 op_ivinsrtofst; 3356318775Snp __be32 pldlen; 3357318775Snp __be32 aadstart_cipherstop_hi; 3358318775Snp __be32 cipherstop_lo_authinsert; 3359318775Snp __be32 seqno_numivs; 3360318775Snp __be32 ivgen_hdrlen; 3361318775Snp __be64 scmd1; 3362318775Snp}; 3363318775Snp 3364318775Snp#define S_CPL_TX_SEC_PDU_OPCODE 24 3365318775Snp#define M_CPL_TX_SEC_PDU_OPCODE 0xff 3366318775Snp#define V_CPL_TX_SEC_PDU_OPCODE(x) ((x) << S_CPL_TX_SEC_PDU_OPCODE) 3367318775Snp#define G_CPL_TX_SEC_PDU_OPCODE(x) \ 3368318775Snp (((x) >> S_CPL_TX_SEC_PDU_OPCODE) & M_CPL_TX_SEC_PDU_OPCODE) 3369318775Snp 3370318775Snp/* RX Channel Id */ 3371318775Snp#define S_CPL_TX_SEC_PDU_RXCHID 22 3372318775Snp#define M_CPL_TX_SEC_PDU_RXCHID 0x1 3373318775Snp#define V_CPL_TX_SEC_PDU_RXCHID(x) ((x) << S_CPL_TX_SEC_PDU_RXCHID) 3374318775Snp#define G_CPL_TX_SEC_PDU_RXCHID(x) \ 3375318775Snp(((x) >> S_CPL_TX_SEC_PDU_RXCHID) & M_CPL_TX_SEC_PDU_RXCHID) 3376318775Snp#define F_CPL_TX_SEC_PDU_RXCHID V_CPL_TX_SEC_PDU_RXCHID(1U) 3377318775Snp 3378318775Snp/* Ack Follows */ 3379318775Snp#define S_CPL_TX_SEC_PDU_ACKFOLLOWS 21 3380318775Snp#define M_CPL_TX_SEC_PDU_ACKFOLLOWS 0x1 3381318775Snp#define V_CPL_TX_SEC_PDU_ACKFOLLOWS(x) ((x) << S_CPL_TX_SEC_PDU_ACKFOLLOWS) 3382318775Snp#define G_CPL_TX_SEC_PDU_ACKFOLLOWS(x) \ 3383318775Snp(((x) >> S_CPL_TX_SEC_PDU_ACKFOLLOWS) & M_CPL_TX_SEC_PDU_ACKFOLLOWS) 3384318775Snp#define F_CPL_TX_SEC_PDU_ACKFOLLOWS V_CPL_TX_SEC_PDU_ACKFOLLOWS(1U) 3385318775Snp 3386318775Snp/* Loopback bit in cpl_tx_sec_pdu */ 3387318775Snp#define S_CPL_TX_SEC_PDU_ULPTXLPBK 20 3388318775Snp#define M_CPL_TX_SEC_PDU_ULPTXLPBK 0x1 3389318775Snp#define V_CPL_TX_SEC_PDU_ULPTXLPBK(x) ((x) << S_CPL_TX_SEC_PDU_ULPTXLPBK) 3390318775Snp#define G_CPL_TX_SEC_PDU_ULPTXLPBK(x) \ 3391318775Snp(((x) >> S_CPL_TX_SEC_PDU_ULPTXLPBK) & M_CPL_TX_SEC_PDU_ULPTXLPBK) 3392318775Snp#define F_CPL_TX_SEC_PDU_ULPTXLPBK V_CPL_TX_SEC_PDU_ULPTXLPBK(1U) 3393318775Snp 3394318775Snp/* Length of cpl header encapsulated */ 3395318775Snp#define S_CPL_TX_SEC_PDU_CPLLEN 16 3396318775Snp#define M_CPL_TX_SEC_PDU_CPLLEN 0xf 3397318775Snp#define V_CPL_TX_SEC_PDU_CPLLEN(x) ((x) << S_CPL_TX_SEC_PDU_CPLLEN) 3398318775Snp#define G_CPL_TX_SEC_PDU_CPLLEN(x) \ 3399318775Snp (((x) >> S_CPL_TX_SEC_PDU_CPLLEN) & M_CPL_TX_SEC_PDU_CPLLEN) 3400318775Snp 3401318775Snp/* PlaceHolder */ 3402318775Snp#define S_CPL_TX_SEC_PDU_PLACEHOLDER 10 3403318775Snp#define M_CPL_TX_SEC_PDU_PLACEHOLDER 0x1 3404318775Snp#define V_CPL_TX_SEC_PDU_PLACEHOLDER(x) ((x) << S_CPL_TX_SEC_PDU_PLACEHOLDER) 3405318775Snp#define G_CPL_TX_SEC_PDU_PLACEHOLDER(x) \ 3406318775Snp (((x) >> S_CPL_TX_SEC_PDU_PLACEHOLDER) & \ 3407318775Snp M_CPL_TX_SEC_PDU_PLACEHOLDER) 3408318775Snp 3409318775Snp/* IvInsrtOffset: Insertion location for IV */ 3410318775Snp#define S_CPL_TX_SEC_PDU_IVINSRTOFST 0 3411318775Snp#define M_CPL_TX_SEC_PDU_IVINSRTOFST 0x3ff 3412318775Snp#define V_CPL_TX_SEC_PDU_IVINSRTOFST(x) ((x) << S_CPL_TX_SEC_PDU_IVINSRTOFST) 3413318775Snp#define G_CPL_TX_SEC_PDU_IVINSRTOFST(x) \ 3414318775Snp (((x) >> S_CPL_TX_SEC_PDU_IVINSRTOFST) & \ 3415318775Snp M_CPL_TX_SEC_PDU_IVINSRTOFST) 3416318775Snp 3417318775Snp/* AadStartOffset: Offset in bytes for AAD start from 3418318775Snp * the first byte following 3419318775Snp * the pkt headers (0-255 3420318775Snp * bytes) */ 3421318775Snp#define S_CPL_TX_SEC_PDU_AADSTART 24 3422318775Snp#define M_CPL_TX_SEC_PDU_AADSTART 0xff 3423318775Snp#define V_CPL_TX_SEC_PDU_AADSTART(x) ((x) << S_CPL_TX_SEC_PDU_AADSTART) 3424318775Snp#define G_CPL_TX_SEC_PDU_AADSTART(x) \ 3425318775Snp (((x) >> S_CPL_TX_SEC_PDU_AADSTART) & \ 3426318775Snp M_CPL_TX_SEC_PDU_AADSTART) 3427318775Snp 3428318775Snp/* AadStopOffset: offset in bytes for AAD stop/end from the first byte following 3429318775Snp * the pkt headers (0-511 bytes) */ 3430318775Snp#define S_CPL_TX_SEC_PDU_AADSTOP 15 3431318775Snp#define M_CPL_TX_SEC_PDU_AADSTOP 0x1ff 3432318775Snp#define V_CPL_TX_SEC_PDU_AADSTOP(x) ((x) << S_CPL_TX_SEC_PDU_AADSTOP) 3433318775Snp#define G_CPL_TX_SEC_PDU_AADSTOP(x) \ 3434318775Snp (((x) >> S_CPL_TX_SEC_PDU_AADSTOP) & M_CPL_TX_SEC_PDU_AADSTOP) 3435318775Snp 3436318775Snp/* CipherStartOffset: offset in bytes for encryption/decryption start from the 3437318775Snp * first byte following the pkt headers (0-1023 3438318775Snp * bytes) */ 3439318775Snp#define S_CPL_TX_SEC_PDU_CIPHERSTART 5 3440318775Snp#define M_CPL_TX_SEC_PDU_CIPHERSTART 0x3ff 3441318775Snp#define V_CPL_TX_SEC_PDU_CIPHERSTART(x) ((x) << S_CPL_TX_SEC_PDU_CIPHERSTART) 3442318775Snp#define G_CPL_TX_SEC_PDU_CIPHERSTART(x) \ 3443318775Snp (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTART) & \ 3444318775Snp M_CPL_TX_SEC_PDU_CIPHERSTART) 3445318775Snp 3446318775Snp/* CipherStopOffset: offset in bytes for encryption/decryption end 3447318775Snp * from end of the payload of this command (0-511 bytes) */ 3448318775Snp#define S_CPL_TX_SEC_PDU_CIPHERSTOP_HI 0 3449318775Snp#define M_CPL_TX_SEC_PDU_CIPHERSTOP_HI 0x1f 3450318775Snp#define V_CPL_TX_SEC_PDU_CIPHERSTOP_HI(x) \ 3451318775Snp ((x) << S_CPL_TX_SEC_PDU_CIPHERSTOP_HI) 3452318775Snp#define G_CPL_TX_SEC_PDU_CIPHERSTOP_HI(x) \ 3453318775Snp (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTOP_HI) & \ 3454318775Snp M_CPL_TX_SEC_PDU_CIPHERSTOP_HI) 3455318775Snp 3456318775Snp#define S_CPL_TX_SEC_PDU_CIPHERSTOP_LO 28 3457318775Snp#define M_CPL_TX_SEC_PDU_CIPHERSTOP_LO 0xf 3458318775Snp#define V_CPL_TX_SEC_PDU_CIPHERSTOP_LO(x) \ 3459318775Snp ((x) << S_CPL_TX_SEC_PDU_CIPHERSTOP_LO) 3460318775Snp#define G_CPL_TX_SEC_PDU_CIPHERSTOP_LO(x) \ 3461318775Snp (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTOP_LO) & \ 3462318775Snp M_CPL_TX_SEC_PDU_CIPHERSTOP_LO) 3463318775Snp 3464318775Snp/* AuthStartOffset: offset in bytes for authentication start from 3465318775Snp * the first byte following the pkt headers (0-1023) 3466318775Snp * */ 3467318775Snp#define S_CPL_TX_SEC_PDU_AUTHSTART 18 3468318775Snp#define M_CPL_TX_SEC_PDU_AUTHSTART 0x3ff 3469318775Snp#define V_CPL_TX_SEC_PDU_AUTHSTART(x) ((x) << S_CPL_TX_SEC_PDU_AUTHSTART) 3470318775Snp#define G_CPL_TX_SEC_PDU_AUTHSTART(x) \ 3471318775Snp (((x) >> S_CPL_TX_SEC_PDU_AUTHSTART) & \ 3472318775Snp M_CPL_TX_SEC_PDU_AUTHSTART) 3473318775Snp 3474318775Snp/* AuthStopOffset: offset in bytes for authentication 3475318775Snp * end from end of the payload of this command (0-511 Bytes) */ 3476318775Snp#define S_CPL_TX_SEC_PDU_AUTHSTOP 9 3477318775Snp#define M_CPL_TX_SEC_PDU_AUTHSTOP 0x1ff 3478318775Snp#define V_CPL_TX_SEC_PDU_AUTHSTOP(x) ((x) << S_CPL_TX_SEC_PDU_AUTHSTOP) 3479318775Snp#define G_CPL_TX_SEC_PDU_AUTHSTOP(x) \ 3480318775Snp (((x) >> S_CPL_TX_SEC_PDU_AUTHSTOP) & \ 3481318775Snp M_CPL_TX_SEC_PDU_AUTHSTOP) 3482318775Snp 3483318775Snp/* AuthInsrtOffset: offset in bytes for authentication insertion 3484318775Snp * from end of the payload of this command (0-511 bytes) */ 3485318775Snp#define S_CPL_TX_SEC_PDU_AUTHINSERT 0 3486318775Snp#define M_CPL_TX_SEC_PDU_AUTHINSERT 0x1ff 3487318775Snp#define V_CPL_TX_SEC_PDU_AUTHINSERT(x) ((x) << S_CPL_TX_SEC_PDU_AUTHINSERT) 3488318775Snp#define G_CPL_TX_SEC_PDU_AUTHINSERT(x) \ 3489318775Snp (((x) >> S_CPL_TX_SEC_PDU_AUTHINSERT) & \ 3490318775Snp M_CPL_TX_SEC_PDU_AUTHINSERT) 3491318775Snp 3492318775Snpstruct cpl_rx_phys_dsgl { 3493318775Snp __be32 op_to_tid; 3494318775Snp __be32 pcirlxorder_to_noofsgentr; 3495318775Snp struct rss_header rss_hdr_int; 3496318775Snp}; 3497318775Snp 3498318775Snp#define S_CPL_RX_PHYS_DSGL_OPCODE 24 3499318775Snp#define M_CPL_RX_PHYS_DSGL_OPCODE 0xff 3500318775Snp#define V_CPL_RX_PHYS_DSGL_OPCODE(x) ((x) << S_CPL_RX_PHYS_DSGL_OPCODE) 3501318775Snp#define G_CPL_RX_PHYS_DSGL_OPCODE(x) \ 3502318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_OPCODE) & M_CPL_RX_PHYS_DSGL_OPCODE) 3503318775Snp 3504318775Snp#define S_CPL_RX_PHYS_DSGL_ISRDMA 23 3505318775Snp#define M_CPL_RX_PHYS_DSGL_ISRDMA 0x1 3506318775Snp#define V_CPL_RX_PHYS_DSGL_ISRDMA(x) ((x) << S_CPL_RX_PHYS_DSGL_ISRDMA) 3507318775Snp#define G_CPL_RX_PHYS_DSGL_ISRDMA(x) \ 3508318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_ISRDMA) & M_CPL_RX_PHYS_DSGL_ISRDMA) 3509318775Snp#define F_CPL_RX_PHYS_DSGL_ISRDMA V_CPL_RX_PHYS_DSGL_ISRDMA(1U) 3510318775Snp 3511318775Snp#define S_CPL_RX_PHYS_DSGL_RSVD1 20 3512318775Snp#define M_CPL_RX_PHYS_DSGL_RSVD1 0x7 3513318775Snp#define V_CPL_RX_PHYS_DSGL_RSVD1(x) ((x) << S_CPL_RX_PHYS_DSGL_RSVD1) 3514318775Snp#define G_CPL_RX_PHYS_DSGL_RSVD1(x) \ 3515318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_RSVD1) & M_CPL_RX_PHYS_DSGL_RSVD1) 3516318775Snp 3517318775Snp#define S_CPL_RX_PHYS_DSGL_PCIRLXORDER 31 3518318775Snp#define M_CPL_RX_PHYS_DSGL_PCIRLXORDER 0x1 3519318775Snp#define V_CPL_RX_PHYS_DSGL_PCIRLXORDER(x) \ 3520318775Snp ((x) << S_CPL_RX_PHYS_DSGL_PCIRLXORDER) 3521318775Snp#define G_CPL_RX_PHYS_DSGL_PCIRLXORDER(x) \ 3522318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_PCIRLXORDER) & \ 3523318775Snp M_CPL_RX_PHYS_DSGL_PCIRLXORDER) 3524318775Snp#define F_CPL_RX_PHYS_DSGL_PCIRLXORDER V_CPL_RX_PHYS_DSGL_PCIRLXORDER(1U) 3525318775Snp 3526318775Snp#define S_CPL_RX_PHYS_DSGL_PCINOSNOOP 30 3527318775Snp#define M_CPL_RX_PHYS_DSGL_PCINOSNOOP 0x1 3528318775Snp#define V_CPL_RX_PHYS_DSGL_PCINOSNOOP(x) \ 3529318775Snp ((x) << S_CPL_RX_PHYS_DSGL_PCINOSNOOP) 3530318775Snp#define G_CPL_RX_PHYS_DSGL_PCINOSNOOP(x) \ 3531318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_PCINOSNOOP) & \ 3532318775Snp M_CPL_RX_PHYS_DSGL_PCINOSNOOP) 3533318775Snp#define F_CPL_RX_PHYS_DSGL_PCINOSNOOP V_CPL_RX_PHYS_DSGL_PCINOSNOOP(1U) 3534318775Snp 3535318775Snp#define S_CPL_RX_PHYS_DSGL_PCITPHNTENB 29 3536318775Snp#define M_CPL_RX_PHYS_DSGL_PCITPHNTENB 0x1 3537318775Snp#define V_CPL_RX_PHYS_DSGL_PCITPHNTENB(x) \ 3538318775Snp ((x) << S_CPL_RX_PHYS_DSGL_PCITPHNTENB) 3539318775Snp#define G_CPL_RX_PHYS_DSGL_PCITPHNTENB(x) \ 3540318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_PCITPHNTENB) & \ 3541318775Snp M_CPL_RX_PHYS_DSGL_PCITPHNTENB) 3542318775Snp#define F_CPL_RX_PHYS_DSGL_PCITPHNTENB V_CPL_RX_PHYS_DSGL_PCITPHNTENB(1U) 3543318775Snp 3544318775Snp#define S_CPL_RX_PHYS_DSGL_PCITPHNT 27 3545318775Snp#define M_CPL_RX_PHYS_DSGL_PCITPHNT 0x3 3546318775Snp#define V_CPL_RX_PHYS_DSGL_PCITPHNT(x) ((x) << S_CPL_RX_PHYS_DSGL_PCITPHNT) 3547318775Snp#define G_CPL_RX_PHYS_DSGL_PCITPHNT(x) \ 3548318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_PCITPHNT) & \ 3549318775Snp M_CPL_RX_PHYS_DSGL_PCITPHNT) 3550318775Snp 3551318775Snp#define S_CPL_RX_PHYS_DSGL_DCAID 16 3552318775Snp#define M_CPL_RX_PHYS_DSGL_DCAID 0x7ff 3553318775Snp#define V_CPL_RX_PHYS_DSGL_DCAID(x) ((x) << S_CPL_RX_PHYS_DSGL_DCAID) 3554318775Snp#define G_CPL_RX_PHYS_DSGL_DCAID(x) \ 3555318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_DCAID) & \ 3556318775Snp M_CPL_RX_PHYS_DSGL_DCAID) 3557318775Snp 3558318775Snp#define S_CPL_RX_PHYS_DSGL_NOOFSGENTR 0 3559318775Snp#define M_CPL_RX_PHYS_DSGL_NOOFSGENTR 0xffff 3560318775Snp#define V_CPL_RX_PHYS_DSGL_NOOFSGENTR(x) \ 3561318775Snp ((x) << S_CPL_RX_PHYS_DSGL_NOOFSGENTR) 3562318775Snp#define G_CPL_RX_PHYS_DSGL_NOOFSGENTR(x) \ 3563318775Snp (((x) >> S_CPL_RX_PHYS_DSGL_NOOFSGENTR) & \ 3564318775Snp M_CPL_RX_PHYS_DSGL_NOOFSGENTR) 3565318775Snp 3566318775Snp/* CPL_TX_TLS_ACK */ 3567318775Snpstruct cpl_tx_tls_ack { 3568318775Snp __be32 op_to_Rsvd2; 3569318775Snp __be32 PldLen; 3570318775Snp __be64 Rsvd3; 3571318775Snp}; 3572318775Snp 3573318775Snp#define S_CPL_TX_TLS_ACK_OPCODE 24 3574318775Snp#define M_CPL_TX_TLS_ACK_OPCODE 0xff 3575318775Snp#define V_CPL_TX_TLS_ACK_OPCODE(x) ((x) << S_CPL_TX_TLS_ACK_OPCODE) 3576318775Snp#define G_CPL_TX_TLS_ACK_OPCODE(x) \ 3577318775Snp (((x) >> S_CPL_TX_TLS_ACK_OPCODE) & M_CPL_TX_TLS_ACK_OPCODE) 3578318775Snp 3579318775Snp#define S_CPL_TX_TLS_ACK_RSVD1 23 3580318775Snp#define M_CPL_TX_TLS_ACK_RSVD1 0x1 3581318775Snp#define V_CPL_TX_TLS_ACK_RSVD1(x) ((x) << S_CPL_TX_TLS_ACK_RSVD1) 3582318775Snp#define G_CPL_TX_TLS_ACK_RSVD1(x) \ 3583318775Snp (((x) >> S_CPL_TX_TLS_ACK_RSVD1) & M_CPL_TX_TLS_ACK_RSVD1) 3584318775Snp#define F_CPL_TX_TLS_ACK_RSVD1 V_CPL_TX_TLS_ACK_RSVD1(1U) 3585318775Snp 3586318775Snp#define S_CPL_TX_TLS_ACK_RXCHID 22 3587318775Snp#define M_CPL_TX_TLS_ACK_RXCHID 0x1 3588318775Snp#define V_CPL_TX_TLS_ACK_RXCHID(x) ((x) << S_CPL_TX_TLS_ACK_RXCHID) 3589318775Snp#define G_CPL_TX_TLS_ACK_RXCHID(x) \ 3590318775Snp (((x) >> S_CPL_TX_TLS_ACK_RXCHID) & M_CPL_TX_TLS_ACK_RXCHID) 3591318775Snp#define F_CPL_TX_TLS_ACK_RXCHID V_CPL_TX_TLS_ACK_RXCHID(1U) 3592318775Snp 3593318775Snp#define S_CPL_TX_TLS_ACK_FWMSG 21 3594318775Snp#define M_CPL_TX_TLS_ACK_FWMSG 0x1 3595318775Snp#define V_CPL_TX_TLS_ACK_FWMSG(x) ((x) << S_CPL_TX_TLS_ACK_FWMSG) 3596318775Snp#define G_CPL_TX_TLS_ACK_FWMSG(x) \ 3597318775Snp (((x) >> S_CPL_TX_TLS_ACK_FWMSG) & M_CPL_TX_TLS_ACK_FWMSG) 3598318775Snp#define F_CPL_TX_TLS_ACK_FWMSG V_CPL_TX_TLS_ACK_FWMSG(1U) 3599318775Snp 3600318775Snp#define S_CPL_TX_TLS_ACK_ULPTXLPBK 20 3601318775Snp#define M_CPL_TX_TLS_ACK_ULPTXLPBK 0x1 3602318775Snp#define V_CPL_TX_TLS_ACK_ULPTXLPBK(x) ((x) << S_CPL_TX_TLS_ACK_ULPTXLPBK) 3603318775Snp#define G_CPL_TX_TLS_ACK_ULPTXLPBK(x) \ 3604318775Snp (((x) >> S_CPL_TX_TLS_ACK_ULPTXLPBK) & M_CPL_TX_TLS_ACK_ULPTXLPBK) 3605318775Snp#define F_CPL_TX_TLS_ACK_ULPTXLPBK V_CPL_TX_TLS_ACK_ULPTXLPBK(1U) 3606318775Snp 3607318775Snp#define S_CPL_TX_TLS_ACK_CPLLEN 16 3608318775Snp#define M_CPL_TX_TLS_ACK_CPLLEN 0xf 3609318775Snp#define V_CPL_TX_TLS_ACK_CPLLEN(x) ((x) << S_CPL_TX_TLS_ACK_CPLLEN) 3610318775Snp#define G_CPL_TX_TLS_ACK_CPLLEN(x) \ 3611318775Snp (((x) >> S_CPL_TX_TLS_ACK_CPLLEN) & M_CPL_TX_TLS_ACK_CPLLEN) 3612318775Snp 3613318775Snp#define S_CPL_TX_TLS_ACK_COMPLONERR 15 3614318775Snp#define M_CPL_TX_TLS_ACK_COMPLONERR 0x1 3615318775Snp#define V_CPL_TX_TLS_ACK_COMPLONERR(x) ((x) << S_CPL_TX_TLS_ACK_COMPLONERR) 3616318775Snp#define G_CPL_TX_TLS_ACK_COMPLONERR(x) \ 3617318775Snp (((x) >> S_CPL_TX_TLS_ACK_COMPLONERR) & M_CPL_TX_TLS_ACK_COMPLONERR) 3618318775Snp#define F_CPL_TX_TLS_ACK_COMPLONERR V_CPL_TX_TLS_ACK_COMPLONERR(1U) 3619318775Snp 3620318775Snp#define S_CPL_TX_TLS_ACK_LCB 14 3621318775Snp#define M_CPL_TX_TLS_ACK_LCB 0x1 3622318775Snp#define V_CPL_TX_TLS_ACK_LCB(x) ((x) << S_CPL_TX_TLS_ACK_LCB) 3623318775Snp#define G_CPL_TX_TLS_ACK_LCB(x) \ 3624318775Snp (((x) >> S_CPL_TX_TLS_ACK_LCB) & M_CPL_TX_TLS_ACK_LCB) 3625318775Snp#define F_CPL_TX_TLS_ACK_LCB V_CPL_TX_TLS_ACK_LCB(1U) 3626318775Snp 3627318775Snp#define S_CPL_TX_TLS_ACK_PHASH 13 3628318775Snp#define M_CPL_TX_TLS_ACK_PHASH 0x1 3629318775Snp#define V_CPL_TX_TLS_ACK_PHASH(x) ((x) << S_CPL_TX_TLS_ACK_PHASH) 3630318775Snp#define G_CPL_TX_TLS_ACK_PHASH(x) \ 3631318775Snp (((x) >> S_CPL_TX_TLS_ACK_PHASH) & M_CPL_TX_TLS_ACK_PHASH) 3632318775Snp#define F_CPL_TX_TLS_ACK_PHASH V_CPL_TX_TLS_ACK_PHASH(1U) 3633318775Snp 3634318775Snp#define S_CPL_TX_TLS_ACK_RSVD2 0 3635318775Snp#define M_CPL_TX_TLS_ACK_RSVD2 0x1fff 3636318775Snp#define V_CPL_TX_TLS_ACK_RSVD2(x) ((x) << S_CPL_TX_TLS_ACK_RSVD2) 3637318775Snp#define G_CPL_TX_TLS_ACK_RSVD2(x) \ 3638318775Snp (((x) >> S_CPL_TX_TLS_ACK_RSVD2) & M_CPL_TX_TLS_ACK_RSVD2) 3639318775Snp 3640218792Snp#endif /* T4_MSG_H */ 3641