common.h revision 218792
11022Sache/*-
278858Sjoerg * Copyright (c) 2011 Chelsio Communications, Inc.
31022Sache * All rights reserved.
41022Sache *
51022Sache * Redistribution and use in source and binary forms, with or without
61022Sache * modification, are permitted provided that the following conditions
71022Sache * are met:
81022Sache * 1. Redistributions of source code must retain the above copyright
91022Sache *    notice, this list of conditions and the following disclaimer.
101022Sache * 2. Redistributions in binary form must reproduce the above copyright
111022Sache *    notice, this list of conditions and the following disclaimer in the
121022Sache *    documentation and/or other materials provided with the distribution.
131022Sache *
141533Sjoerg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
151533Sjoerg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
161533Sjoerg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
171533Sjoerg * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
181533Sjoerg * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
191533Sjoerg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
201533Sjoerg * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
211533Sjoerg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
221533Sjoerg * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
231533Sjoerg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
241533Sjoerg * SUCH DAMAGE.
2555541Skato *
2655541Skato * $FreeBSD: head/sys/dev/cxgbe/common/common.h 218792 2011-02-18 08:00:26Z np $
271022Sache *
281022Sache */
2987992Sjoerg
3087992Sjoerg#ifndef __CHELSIO_COMMON_H
3187992Sjoerg#define __CHELSIO_COMMON_H
321022Sache
3329531Scharnier#include "t4_hw.h"
3429531Scharnier
3579111Sjoerg
3629531Scharnierenum {
3769793Sobrien	MAX_NPORTS     = 4,     /* max # of ports */
381022Sache	SERNUM_LEN     = 24,    /* Serial # length */
391022Sache	EC_LEN         = 16,    /* E/C length */
4093590Smike	ID_LEN         = 16,    /* ID length */
4129531Scharnier};
4287992Sjoerg
431022Sacheenum { MEM_EDC0, MEM_EDC1, MEM_MC };
441022Sache
4579111Sjoergenum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST };
4679111Sjoerg
471022Sacheenum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR };
481022Sache
4987992Sjoergenum {
5087992Sjoerg	PAUSE_RX      = 1 << 0,
511022Sache	PAUSE_TX      = 1 << 1,
521022Sache	PAUSE_AUTONEG = 1 << 2
5387992Sjoerg};
541022Sache
5587992Sjoerg#define FW_VERSION_MAJOR 1
5687992Sjoerg#define FW_VERSION_MINOR 2
5787992Sjoerg#define FW_VERSION_MICRO 65
5887992Sjoerg
5987992Sjoergstruct port_stats {
601137Sache	u64 tx_octets;            /* total # of octets in good frames */
611137Sache	u64 tx_frames;            /* all good frames */
621137Sache	u64 tx_bcast_frames;      /* all broadcast frames */
631022Sache	u64 tx_mcast_frames;      /* all multicast frames */
641022Sache	u64 tx_ucast_frames;      /* all unicast frames */
651022Sache	u64 tx_error_frames;      /* all error frames */
661022Sache
671022Sache	u64 tx_frames_64;         /* # of Tx frames in a particular range */
681022Sache	u64 tx_frames_65_127;
691022Sache	u64 tx_frames_128_255;
701022Sache	u64 tx_frames_256_511;
711022Sache	u64 tx_frames_512_1023;
721022Sache	u64 tx_frames_1024_1518;
731022Sache	u64 tx_frames_1519_max;
741022Sache
751137Sache	u64 tx_drop;              /* # of dropped Tx frames */
761022Sache	u64 tx_pause;             /* # of transmitted pause frames */
771022Sache	u64 tx_ppp0;              /* # of transmitted PPP prio 0 frames */
7829531Scharnier	u64 tx_ppp1;              /* # of transmitted PPP prio 1 frames */
7987992Sjoerg	u64 tx_ppp2;              /* # of transmitted PPP prio 2 frames */
801022Sache	u64 tx_ppp3;              /* # of transmitted PPP prio 3 frames */
811022Sache	u64 tx_ppp4;              /* # of transmitted PPP prio 4 frames */
821022Sache	u64 tx_ppp5;              /* # of transmitted PPP prio 5 frames */
831022Sache	u64 tx_ppp6;              /* # of transmitted PPP prio 6 frames */
841022Sache	u64 tx_ppp7;              /* # of transmitted PPP prio 7 frames */
8587992Sjoerg
8687992Sjoerg	u64 rx_octets;            /* total # of octets in good frames */
871533Sjoerg	u64 rx_frames;            /* all good frames */
881022Sache	u64 rx_bcast_frames;      /* all broadcast frames */
891533Sjoerg	u64 rx_mcast_frames;      /* all multicast frames */
9029531Scharnier	u64 rx_ucast_frames;      /* all unicast frames */
911533Sjoerg	u64 rx_too_long;          /* # of frames exceeding MTU */
921533Sjoerg	u64 rx_jabber;            /* # of jabber frames */
931533Sjoerg	u64 rx_fcs_err;           /* # of received frames with bad FCS */
941533Sjoerg	u64 rx_len_err;           /* # of received frames with length error */
951533Sjoerg	u64 rx_symbol_err;        /* symbol errors */
968857Srgrimes	u64 rx_runt;              /* # of short frames */
9787992Sjoerg
9887992Sjoerg	u64 rx_frames_64;         /* # of Rx frames in a particular range */
9987992Sjoerg	u64 rx_frames_65_127;
10087992Sjoerg	u64 rx_frames_128_255;
10187992Sjoerg	u64 rx_frames_256_511;
1021533Sjoerg	u64 rx_frames_512_1023;
1031533Sjoerg	u64 rx_frames_1024_1518;
1041533Sjoerg	u64 rx_frames_1519_max;
1051533Sjoerg
1061533Sjoerg	u64 rx_pause;             /* # of received pause frames */
10787992Sjoerg	u64 rx_ppp0;              /* # of received PPP prio 0 frames */
1081533Sjoerg	u64 rx_ppp1;              /* # of received PPP prio 1 frames */
1091533Sjoerg	u64 rx_ppp2;              /* # of received PPP prio 2 frames */
1101022Sache	u64 rx_ppp3;              /* # of received PPP prio 3 frames */
1111022Sache	u64 rx_ppp4;              /* # of received PPP prio 4 frames */
1121022Sache	u64 rx_ppp5;              /* # of received PPP prio 5 frames */
1131533Sjoerg	u64 rx_ppp6;              /* # of received PPP prio 6 frames */
1141022Sache	u64 rx_ppp7;              /* # of received PPP prio 7 frames */
11587992Sjoerg
11687992Sjoerg	u64 rx_ovflow0;           /* drops due to buffer-group 0 overflows */
1171022Sache	u64 rx_ovflow1;           /* drops due to buffer-group 1 overflows */
1181022Sache	u64 rx_ovflow2;           /* drops due to buffer-group 2 overflows */
1191022Sache	u64 rx_ovflow3;           /* drops due to buffer-group 3 overflows */
1201533Sjoerg	u64 rx_trunc0;            /* buffer-group 0 truncated packets */
1211022Sache	u64 rx_trunc1;            /* buffer-group 1 truncated packets */
12287992Sjoerg	u64 rx_trunc2;            /* buffer-group 2 truncated packets */
1231022Sache	u64 rx_trunc3;            /* buffer-group 3 truncated packets */
12487992Sjoerg};
1251022Sache
1261022Sachestruct lb_port_stats {
12787992Sjoerg	u64 octets;
1281022Sache	u64 frames;
1291022Sache	u64 bcast_frames;
1301022Sache	u64 mcast_frames;
1311022Sache	u64 ucast_frames;
1321022Sache	u64 error_frames;
1331022Sache
1341022Sache	u64 frames_64;
1351022Sache	u64 frames_65_127;
1361022Sache	u64 frames_128_255;
1371022Sache	u64 frames_256_511;
1381022Sache	u64 frames_512_1023;
1391022Sache	u64 frames_1024_1518;
1401022Sache	u64 frames_1519_max;
1411022Sache
14287992Sjoerg	u64 drop;
14387992Sjoerg
14487992Sjoerg	u64 ovflow0;
14579111Sjoerg	u64 ovflow1;
14679111Sjoerg	u64 ovflow2;
14787992Sjoerg	u64 ovflow3;
14887992Sjoerg	u64 trunc0;
14987992Sjoerg	u64 trunc1;
15087992Sjoerg	u64 trunc2;
15187992Sjoerg	u64 trunc3;
1521022Sache};
15387992Sjoerg
15487992Sjoergstruct tp_tcp_stats {
15587992Sjoerg	u32 tcpOutRsts;
15687992Sjoerg	u64 tcpInSegs;
15787992Sjoerg	u64 tcpOutSegs;
15887992Sjoerg	u64 tcpRetransSegs;
1591022Sache};
16087992Sjoerg
16187992Sjoergstruct tp_usm_stats {
16287992Sjoerg	u32 frames;
16387992Sjoerg	u32 drops;
16487992Sjoerg	u64 octets;
16587992Sjoerg};
16687992Sjoerg
1671022Sachestruct tp_fcoe_stats {
1681022Sache	u32 framesDDP;
16987992Sjoerg	u32 framesDrop;
17087992Sjoerg	u64 octetsDDP;
17187992Sjoerg};
17287992Sjoerg
17387992Sjoergstruct tp_err_stats {
17487992Sjoerg	u32 macInErrs[4];
17587992Sjoerg	u32 hdrInErrs[4];
1761022Sache	u32 tcpInErrs[4];
1771022Sache	u32 tnlCongDrops[4];
17887992Sjoerg	u32 ofldChanDrops[4];
17987992Sjoerg	u32 tnlTxDrops[4];
1801022Sache	u32 ofldVlanDrops[4];
1811022Sache	u32 tcp6InErrs[4];
18287992Sjoerg	u32 ofldNoNeigh;
18387992Sjoerg	u32 ofldCongDefer;
1841022Sache};
1851022Sache
18687992Sjoergstruct tp_proxy_stats {
18787992Sjoerg	u32 proxy[4];
1881022Sache};
1891022Sache
19087992Sjoergstruct tp_cpl_stats {
19187992Sjoerg	u32 req[4];
19287992Sjoerg	u32 rsp[4];
1931022Sache	u32 tx_err[4];
1941022Sache};
19587992Sjoerg
19661154Sphkstruct tp_rdma_stats {
19761154Sphk	u32 rqe_dfr_mod;
19861154Sphk	u32 rqe_dfr_pkt;
19987992Sjoerg};
2001022Sache
2011022Sachestruct tp_params {
2021022Sache	unsigned int ntxchan;        /* # of Tx channels */
2031022Sache	unsigned int tre;            /* log2 of core clocks per TP tick */
2041022Sache	unsigned int dack_re;        /* DACK timer resolution */
2051022Sache	unsigned int la_mask;        /* what events are recorded by TP LA */
20687992Sjoerg	unsigned short tx_modq[NCHAN];  /* channel to modulation queue map */
20787992Sjoerg};
208124200Sanholt
20987992Sjoergstruct vpd_params {
21087992Sjoerg	unsigned int cclk;
21187992Sjoerg	u8 ec[EC_LEN + 1];
21287992Sjoerg	u8 sn[SERNUM_LEN + 1];
21387992Sjoerg	u8 id[ID_LEN + 1];
21487992Sjoerg};
21587992Sjoerg
21687992Sjoergstruct pci_params {
21787992Sjoerg	unsigned int  vpd_cap_addr;
21887992Sjoerg	unsigned char speed;
2191022Sache	unsigned char width;
2201022Sache};
22187992Sjoerg
22287992Sjoerg/*
2231022Sache * Firmware device log.
22487992Sjoerg */
22587992Sjoergstruct devlog_params {
22687992Sjoerg	u32 memtype;			/* which memory (EDC0, EDC1, MC) */
22787992Sjoerg	u32 start;			/* start of log in firmware memory */
22887992Sjoerg	u32 size;			/* size of log */
22987992Sjoerg};
23087992Sjoerg
23187992Sjoergstruct adapter_params {
23287992Sjoerg	struct tp_params  tp;
23387992Sjoerg	struct vpd_params vpd;
23487992Sjoerg	struct pci_params pci;
23587992Sjoerg	struct devlog_params devlog;
23687992Sjoerg
23787992Sjoerg	unsigned int sf_size;             /* serial flash size in bytes */
23887992Sjoerg	unsigned int sf_nsec;             /* # of flash sectors */
23987992Sjoerg
24087992Sjoerg	unsigned int fw_vers;
24187992Sjoerg	unsigned int tp_vers;
24287992Sjoerg	u8 api_vers[7];
24387992Sjoerg
24487992Sjoerg	unsigned short mtus[NMTUS];
24587992Sjoerg	unsigned short a_wnd[NCCTRL_WIN];
24687992Sjoerg	unsigned short b_wnd[NCCTRL_WIN];
24787992Sjoerg
24887992Sjoerg	unsigned int mc_size;             /* MC memory size */
24929531Scharnier	unsigned int nfilters;            /* size of filter region */
25087992Sjoerg
25187992Sjoerg	unsigned int cim_la_size;
25287992Sjoerg
25387992Sjoerg	unsigned int nports;             /* # of ethernet ports */
25487992Sjoerg	unsigned int portvec;
25587992Sjoerg	unsigned int rev;                /* chip revision */
25678858Sjoerg	unsigned int offload;
25787992Sjoerg
25887992Sjoerg	unsigned int ofldq_wr_cred;
25987992Sjoerg};
26087992Sjoerg
26187992Sjoergenum {					    /* chip revisions */
26287992Sjoerg	T4_REV_A  = 0,
26387992Sjoerg};
26487992Sjoerg
26587992Sjoergstruct trace_params {
2661022Sache	u32 data[TRACE_LEN / 4];
26787992Sjoerg	u32 mask[TRACE_LEN / 4];
26887992Sjoerg	unsigned short snap_len;
26987992Sjoerg	unsigned short min_len;
27087992Sjoerg	unsigned char skip_ofst;
271134081Sphk	unsigned char skip_len;
272134081Sphk	unsigned char invert;
27387992Sjoerg	unsigned char port;
27487992Sjoerg};
27587992Sjoerg
27687992Sjoergstruct link_config {
27787992Sjoerg	unsigned short supported;        /* link capabilities */
2781022Sache	unsigned short advertising;      /* advertised capabilities */
27987992Sjoerg	unsigned short requested_speed;  /* speed user has requested */
2801022Sache	unsigned short speed;            /* actual link speed */
28155541Skato	unsigned char  requested_fc;     /* flow control user has requested */
28255541Skato	unsigned char  fc;               /* actual link flow control */
28355541Skato	unsigned char  autoneg;          /* autonegotiating? */
2841022Sache	unsigned char  link_ok;          /* link up? */
2851022Sache};
2861022Sache
2871022Sache#include "adapter.h"
28879161Sjoerg
2891022Sache#ifndef PCI_VENDOR_ID_CHELSIO
29061154Sphk# define PCI_VENDOR_ID_CHELSIO 0x1425
2911022Sache#endif
2921022Sache
29379161Sjoerg#define for_each_port(adapter, iter) \
29487992Sjoerg	for (iter = 0; iter < (adapter)->params.nports; ++iter)
2951022Sache
29687992Sjoergstatic inline int is_offload(const struct adapter *adap)
2971022Sache{
2981022Sache	return adap->params.offload;
2991022Sache}
3001022Sache
3011022Sachestatic inline unsigned int core_ticks_per_usec(const struct adapter *adap)
3021022Sache{
3031022Sache	return adap->params.vpd.cclk / 1000;
3041022Sache}
30555541Skato
30655541Skatostatic inline unsigned int us_to_core_ticks(const struct adapter *adap,
30755541Skato					    unsigned int us)
3081022Sache{
3091022Sache	return (us * adap->params.vpd.cclk) / 1000;
3101022Sache}
3111022Sache
3121022Sachestatic inline unsigned int dack_ticks_to_usec(const struct adapter *adap,
3131022Sache					      unsigned int ticks)
3141022Sache{
3151183Srgrimes	return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
3161183Srgrimes}
31787992Sjoerg
31887992Sjoergvoid t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);
3191022Sacheint t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask, int polarity,
3201022Sache			int attempts, int delay, u32 *valp);
3211022Sache
3221022Sachestatic inline int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask,
3231022Sache				  int polarity, int attempts, int delay)
3241022Sache{
32579111Sjoerg	return t4_wait_op_done_val(adapter, reg, mask, polarity, attempts,
32679111Sjoerg				   delay, NULL);
32779111Sjoerg}
32879111Sjoerg
32979111Sjoergint t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
33087992Sjoerg		    void *rpl, bool sleep_ok);
33179111Sjoerg
33279111Sjoergstatic inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
33379111Sjoerg			     int size, void *rpl)
33479111Sjoerg{
3351022Sache	return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
3361022Sache}
3371022Sache
3381022Sachestatic inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
3391022Sache				int size, void *rpl)
3401022Sache{
3411022Sache	return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
3421022Sache}
3431022Sache
3441022Sachevoid t4_read_indirect(struct adapter *adap, unsigned int addr_reg,
3451022Sache		      unsigned int data_reg, u32 *vals, unsigned int nregs,
3461022Sache		      unsigned int start_idx);
3471022Sachevoid t4_write_indirect(struct adapter *adap, unsigned int addr_reg,
3481022Sache		       unsigned int data_reg, const u32 *vals,
3491022Sache		       unsigned int nregs, unsigned int start_idx);
3501022Sache
35179111Sjoergstruct fw_filter_wr;
35279111Sjoerg
35379111Sjoergvoid t4_intr_enable(struct adapter *adapter);
35479111Sjoergvoid t4_intr_disable(struct adapter *adapter);
35579111Sjoergvoid t4_intr_clear(struct adapter *adapter);
35679111Sjoergint t4_slow_intr_handler(struct adapter *adapter);
35779111Sjoerg
35879111Sjoergint t4_hash_mac_addr(const u8 *addr);
35979111Sjoergint t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
36079111Sjoerg		  struct link_config *lc);
36179111Sjoergint t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
36279111Sjoergint t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data);
36379111Sjoergint t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data);
36479111Sjoergint t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz);
36579111Sjoergint t4_seeprom_wp(struct adapter *adapter, int enable);
3661022Sacheint t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords,
367		  u32 *data, int byte_oriented);
368int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
369int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
370int t4_get_fw_version(struct adapter *adapter, u32 *vers);
371int t4_get_tp_version(struct adapter *adapter, u32 *vers);
372int t4_check_fw_version(struct adapter *adapter);
373int t4_init_hw(struct adapter *adapter, u32 fw_params);
374int t4_prep_adapter(struct adapter *adapter);
375int t4_port_init(struct port_info *p, int mbox, int pf, int vf);
376int t4_reinit_adapter(struct adapter *adap);
377void t4_fatal_err(struct adapter *adapter);
378int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp,
379			int filter_index, int enable);
380void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
381			 int filter_index, int *enabled);
382int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
383			int start, int n, const u16 *rspq, unsigned int nrspq);
384int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
385		       unsigned int flags);
386int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid,
387		     unsigned int flags, unsigned int defq);
388int t4_read_rss(struct adapter *adapter, u16 *entries);
389void t4_read_rss_key(struct adapter *adapter, u32 *key);
390void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx);
391void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, u32 *valp);
392void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, u32 val);
393void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index,
394			   u32 *vfl, u32 *vfh);
395void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index,
396			    u32 vfl, u32 vfh);
397u32 t4_read_rss_pf_map(struct adapter *adapter);
398void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap);
399u32 t4_read_rss_pf_mask(struct adapter *adapter);
400void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask);
401int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask);
402void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
403void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
404void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres);
405int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
406int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
407int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n,
408		unsigned int *valp);
409int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n,
410		 const unsigned int *valp);
411int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n,
412		    unsigned int *valp);
413int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr);
414void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,
415		unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr);
416void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp);
417int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity);
418int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity);
419int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size,
420		__be32 *data);
421
422void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
423void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p);
424void t4_clr_port_stats(struct adapter *adap, int idx);
425
426void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
427void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]);
428void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]);
429void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps,
430		     unsigned int *ipg);
431void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr,
432			    unsigned int mask, unsigned int val);
433void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr);
434void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st);
435void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st);
436void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st);
437void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st);
438void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st);
439void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
440			 struct tp_tcp_stats *v6);
441void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx,
442		       struct tp_fcoe_stats *st);
443void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
444		  const unsigned short *alpha, const unsigned short *beta);
445
446void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf);
447
448int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps);
449int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg);
450int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals,
451		    unsigned int start, unsigned int n);
452void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate);
453int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map);
454void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid);
455
456void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr);
457int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
458		      u64 mask0, u64 mask1, unsigned int crc, bool enable);
459
460int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
461		enum dev_master master, enum dev_state *state);
462int t4_fw_bye(struct adapter *adap, unsigned int mbox);
463int t4_early_init(struct adapter *adap, unsigned int mbox);
464int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
465int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
466		    unsigned int vf, unsigned int nparams, const u32 *params,
467		    u32 *val);
468int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
469		  unsigned int vf, unsigned int nparams, const u32 *params,
470		  const u32 *val);
471int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
472		unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
473		unsigned int rxqi, unsigned int rxq, unsigned int tc,
474		unsigned int vi, unsigned int cmask, unsigned int pmask,
475		unsigned int exactf, unsigned int rcaps, unsigned int wxcaps);
476int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
477		unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
478		unsigned int *rss_size);
479int t4_free_vi(struct adapter *adap, unsigned int mbox,
480	       unsigned int pf, unsigned int vf,
481	       unsigned int viid);
482int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
483		  int mtu, int promisc, int all_multi, int bcast, int vlanex,
484		  bool sleep_ok);
485int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid,
486		      bool free, unsigned int naddr, const u8 **addr, u16 *idx,
487		      u64 *hash, bool sleep_ok);
488int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
489		  int idx, const u8 *addr, bool persist, bool add_smt);
490int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
491		     bool ucast, u64 vec, bool sleep_ok);
492int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
493		 bool rx_en, bool tx_en);
494int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
495		     unsigned int nblinks);
496int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
497	       unsigned int mmd, unsigned int reg, unsigned int *valp);
498int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
499	       unsigned int mmd, unsigned int reg, unsigned int val);
500int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start,
501		     unsigned int pf, unsigned int vf, unsigned int iqid,
502		     unsigned int fl0id, unsigned int fl1id);
503int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
504	       unsigned int vf, unsigned int iqtype, unsigned int iqid,
505	       unsigned int fl0id, unsigned int fl1id);
506int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
507		   unsigned int vf, unsigned int eqid);
508int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
509		    unsigned int vf, unsigned int eqid);
510int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
511		    unsigned int vf, unsigned int eqid);
512int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid,
513		   enum ctxt_type ctype, u32 *data);
514int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype,
515		      u32 *data);
516int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
517#endif /* __CHELSIO_COMMON_H */
518