1154899Srik/*
2154899Srik * DDK (Driver Development Kit) for Cronyx Tau32-PCI adapter.
3154899Srik *
4156143Srik * Copyright (C) 2003-2006 Cronyx Engineering, http://www.cronyx.ru
5154899Srik * All rights reserved.
6154899Srik *
7154899Srik * Author: Leo Yuriev <ly@cronyx.ru>, http://leo.yuriev.ru
8154899Srik *
9156143Srik * $Cronyx: tau32-ddk.h,v 1.2 2006/02/01 09:14:40 ly Exp $
10156143Srik * $Rik: tau32-ddk.h,v 1.7 2006/02/28 22:33:29 rik Exp $
11154899Srik * $FreeBSD$
12154899Srik */
13154899Srik
14154899Srik#if defined(__GNUC__) || defined(__TURBOC__)
15154899Srik#	ifndef __int8
16154899Srik#		define __int8 char
17154899Srik#	endif
18154899Srik#	ifndef __int16
19154899Srik#		define __int16 short
20154899Srik#	endif
21154899Srik#	ifndef __int32
22154899Srik#		define __int32 long
23154899Srik#	endif
24154899Srik#	ifndef __int64
25154899Srik#		define __int64 long long
26154899Srik#	endif
27154899Srik#endif
28154899Srik
29154899Srik#if !defined(BOOLEAN) && !defined(_NTDDK_)
30154899Srik#	define BOOLEAN int
31154899Srik#endif
32154899Srik
33154899Srik#if defined(__GNUC__) && !defined(__stdcall)
34154899Srik#	define __stdcall __attribute__((stdcall))
35154899Srik#endif
36154899Srik
37154899Srik#if defined(__GNUC__) && !defined(__cdecl)
38154899Srik#	define __cdecl __attribute__((cdecl))
39154899Srik#endif
40154899Srik
41154899Srik#ifndef TAU32_CALLBACK_TYPE
42154899Srik#	if defined(__WINDOWS__) || defined(_MSC_VER) || defined(WIN32) || defined(WIN64)
43154899Srik#		define TAU32_CALLBACK_TYPE __stdcall
44154899Srik#	else
45154899Srik#		define TAU32_CALLBACK_TYPE __cdecl
46154899Srik#	endif
47154899Srik#endif
48154899Srik
49154899Srik#ifndef TAU32_CALL_TYPE
50154899Srik#	if defined(__WINDOWS__) || defined(_MSC_VER) || defined(WIN32) || defined(WIN64)
51154899Srik#		define TAU32_CALL_TYPE __stdcall
52154899Srik#	else
53154899Srik#		define TAU32_CALL_TYPE __cdecl
54154899Srik#	endif
55154899Srik#endif
56154899Srik
57154899Srik#ifndef PCI_PHYSICAL_ADDRESS
58154899Srik#	ifdef PCI64
59154899Srik#		error PCI64 currently is not supported
60154899Srik#	else
61154899Srik#		define PCI_PHYSICAL_ADDRESS  unsigned __int32
62154899Srik#	endif
63154899Srik#endif
64154899Srik
65154899Srik#define TAU32_PCI_VENDOR_ID	0x110A
66154899Srik#define TAU32_PCI_DEVICE_ID	0x2101
67154899Srik#define TAU32_PCI_IO_BAR1_SIZE	0x0100
68154899Srik#define TAU32_PCI_RESET_ADDRESS	0x004C
69154899Srik#define TAU32_PCI_RESET_ON	0xF00F0000ul /*0xFFFFFFFFul */
70154899Srik#define TAU32_PCI_RESET_OFF	0
71154899Srik#define TAU32_PCI_RESET_LENGTH	4
72154899Srik
73154899Srik/* TAU32_MODELS */
74154899Srik#define TAU32_ERROR	(-1)
75154899Srik#define TAU32_UNKNOWN	0
76154899Srik#define TAU32_BASE	1
77154899Srik#define TAU32_LITE	2
78154899Srik#define TAU32_ADPCM	3
79154899Srik
80154899Srik/* TAU32_INIT_ERRORS */
81154899Srik#define TAU32_IE_OK		0x0000u
82154899Srik#define TAU32_IE_FIRMWARE	0x0001u
83154899Srik#define TAU32_IE_MODEL		0x0002u
84154899Srik#define TAU32_IE_E1_A		0x0004u
85154899Srik#define TAU32_IE_E1_B		0x0008u
86154899Srik#define TAU32_IE_INTERNAL_BUS	0x0010u
87154899Srik#define TAU32_IE_HDLC		0x0020u
88154899Srik#define TAU32_IE_ADPCM		0x0040u
89154899Srik#define TAU32_IE_CLOCK		0x0080u
90154899Srik#define TAU32_IE_DXC		0x0100u
91154899Srik#define TAU32_IE_XIRQ		0x0200u
92154899Srik
93154899Srik/* TAU32_INTERFACES */
94154899Srik#define TAU32_E1_ALL			(-1)
95154899Srik#define TAU32_E1_A			  0
96154899Srik#define TAU32_E1_B			  1
97154899Srik
98154899Srik/* TAU32_LIMITS */
99154899Srik#define TAU32_CHANNELS		  32
100154899Srik#define TAU32_TIMESLOTS		 32
101154899Srik#define TAU32_MAX_INTERFACES	2
102154899Srik#define TAU32_MTU			   8184
103154899Srik#define TAU32_FLAT_MTU		  4096
104154899Srik#define TAU32_IO_QUEUE		  4
105154899Srik#define TAU32_IO_QUEUE_BYTES	128
106154899Srik#define TAU32_MAX_REQUESTS	  512
107154899Srik#define TAU32_MAX_BUFFERS	   256
108154899Srik#define TAU32_FIFO_SIZE		 256
109154899Srik
110154899Srik/* TAU32_REQUEST_COMMANDS */
111154899Srik#define TAU32_Tx_Start			  0x0001u
112154899Srik#define TAU32_Tx_Stop			   0x0002u
113154899Srik/*#define TAU32_Tx_Flush			  0x0004u // yet not implemented */
114154899Srik#define TAU32_Tx_Data			   0x0008u
115154899Srik#define TAU32_Rx_Start			  0x0010u
116154899Srik#define TAU32_Rx_Stop			   0x0020u
117154899Srik#define TAU32_Rx_Data			   0x0080u
118154899Srik#define TAU32_Configure_Channel	 0x0100u
119154899Srik#define TAU32_Timeslots_Complete	0x0200u
120154899Srik#define TAU32_Timeslots_Map		 0x0400u
121154899Srik#define TAU32_Timeslots_Channel	 0x0800u
122154899Srik#define TAU32_ConfigureDigitalLoop  0x1000u
123154899Srik#define TAU32_Configure_Commit	  0x2000u
124154899Srik#define TAU32_Tx_FrameEnd		   0x4000u
125154899Srik#define TAU32_Tx_NoCrc			  0x8000u
126154899Srik#define TAU32_Configure_E1		  0x0040u
127154899Srik
128154899Srik/* TAU32_ERRORS */
129154899Srik#define TAU32_NOERROR			   0x000000ul
130154899Srik#define TAU32_SUCCESSFUL			0x000000ul
131154899Srik#define TAU32_ERROR_ALLOCATION	  0x000001ul	/* not enough tx/rx descriptors */
132154899Srik#define TAU32_ERROR_BUS			 0x000002ul	/* PEB could not access to host memory by PCI bus for load/store information */
133154899Srik#define TAU32_ERROR_FAIL			0x000004ul	/* PEB action request failed */
134154899Srik#define TAU32_ERROR_TIMEOUT		 0x000008ul	/* PEB action request timeout */
135154899Srik#define TAU32_ERROR_CANCELLED	   0x000010ul
136154899Srik#define TAU32_ERROR_TX_UNDERFLOW	0x000020ul	/* transmission underflow */
137154899Srik#define TAU32_ERROR_TX_PROTOCOL	 0x000040ul	/* reserved */
138154899Srik#define TAU32_ERROR_RX_OVERFLOW	 0x000080ul
139154899Srik#define TAU32_ERROR_RX_ABORT		0x000100ul
140154899Srik#define TAU32_ERROR_RX_CRC		  0x000200ul
141154899Srik#define TAU32_ERROR_RX_SHORT		0x000400ul
142154899Srik#define TAU32_ERROR_RX_SYNC		 0x000800ul
143154899Srik#define TAU32_ERROR_RX_FRAME		0x001000ul
144154899Srik#define TAU32_ERROR_RX_LONG		 0x002000ul
145154899Srik#define TAU32_ERROR_RX_SPLIT		0x004000ul	/* frame has splitted between two requests due rx-gap allocation */
146154899Srik#define TAU32_ERROR_RX_UNFIT		0x008000ul	/* frame can't be fit into request buffer */
147154899Srik#define TAU32_ERROR_TSP			 0x010000ul
148154899Srik#define TAU32_ERROR_RSP			 0x020000ul
149154899Srik#define TAU32_ERROR_INT_OVER_TX	 0x040000ul
150154899Srik#define TAU32_ERROR_INT_OVER_RX	 0x080000ul
151154899Srik#define TAU32_ERROR_INT_STORM	   0x100000ul
152154899Srik#define TAU32_ERROR_INT_E1LOST	  0x200000ul
153154899Srik#define TAU32_WARN_TX_JUMP	0x400000ul
154154899Srik#define TAU32_WARN_RX_JUMP	0x800000ul
155154899Srik
156154899Srik/* TAU32_CHANNEL_MODES */
157154899Srik#define TAU32_HDLC			  0
158154899Srik#define TAU32_V110_x30		  1
159154899Srik#define TAU32_TMA			   2
160154899Srik#define TAU32_TMB			   3
161154899Srik#define TAU32_TMR			   4
162154899Srik
163154899Srik/* TAU32_SYNC_MODES */
164154899Srik#define TAU32_SYNC_INTERNAL	 0
165154899Srik#define TAU32_SYNC_RCV_A		1
166154899Srik#define TAU32_SYNC_RCV_B		2
167154899Srik#define TAU32_SYNC_LYGEN		3
168154899Srik#define TAU32_LYGEN_RESET       0
169154899Srik
170154899Srik/* TAU32_CHANNEL_CONFIG_BITS */
171154899Srik#define TAU32_channel_mode_mask	 0x0000000Ful
172154899Srik#define TAU32_data_inversion		0x00000010ul
173154899Srik#define TAU32_fr_rx_splitcheck	  0x00000020ul
174154899Srik#define TAU32_fr_rx_fitcheck		0x00000040ul
175154899Srik#define TAU32_fr_tx_auto			0x00000080ul
176154899Srik#define TAU32_hdlc_crc32			0x00000100ul
177154899Srik#define TAU32_hdlc_adjustment	   0x00000200ul
178154899Srik#define TAU32_hdlc_interframe_fill  0x00000400ul
179154899Srik#define TAU32_hdlc_nocrc			0x00000800ul
180154899Srik#define TAU32_tma_flag_filtering	0x00001000ul
181154899Srik#define TAU32_tma_nopack			0x00002000ul
182154899Srik#define TAU32_tma_flags_mask		0x00FF0000ul
183154899Srik#define TAU32_tma_flags_shift	   16u
184154899Srik#define TAU32_v110_x30_tr_mask	  0x03000000ul
185154899Srik#define TAU32_v110_x30_tr_shift	 24u
186154899Srik
187154899Sriktypedef struct tag_TAU32_TimeslotAssignment
188154899Srik{
189154899Srik	unsigned __int8 TxChannel, RxChannel;
190154899Srik	unsigned __int8 TxFillmask, RxFillmask;
191154899Srik} TAU32_TimeslotAssignment;
192154899Srik
193154899Srik#define TAU32_CROSS_WIDTH   96
194154899Srik#define TAU32_CROSS_OFF	 127
195154899Sriktypedef unsigned __int8 TAU32_CrossMatrix[TAU32_CROSS_WIDTH];
196154899Srik
197154899Srik/* TAU32_INTERFACE_CONFIG_BITS */
198154899Srik#define TAU32_LineOff			(0ul << 0)
199154899Srik#define TAU32_LineLoopInt		(1ul << 0)
200154899Srik#define TAU32_LineLoopExt		(2ul << 0)
201154899Srik#define TAU32_LineNormal		(3ul << 0)
202154899Srik#define TAU32_LineAIS			(4ul << 0)
203154899Srik#define TAU32_line_mode_mask		0x0000000Ful
204154899Srik#define TAU32_unframed_64		(0ul << 4)
205154899Srik#define TAU32_unframed_128		(1ul << 4)
206154899Srik#define TAU32_unframed_256		(2ul << 4)
207154899Srik#define TAU32_unframed_512		(3ul << 4)
208154899Srik#define TAU32_unframed_1024		(4ul << 4)
209154899Srik#define TAU32_unframed_2048		(5ul << 4)
210154899Srik#define TAU32_unframed			TAU32_unframed_2048
211154899Srik#define TAU32_framed_no_cas		(6ul << 4)
212154899Srik#define TAU32_framed_cas_set		(7ul << 4)
213156143Srik#define TAU32_framed_cas_pass		(8ul << 4)
214156143Srik#define TAU32_framed_cas_cross		(9ul << 4)
215154899Srik#define TAU32_framing_mode_mask		0x000000F0ul
216154899Srik#define TAU32_monitor			0x00000100ul
217154899Srik#define TAU32_higain			0x00000200ul
218154899Srik#define TAU32_sa_bypass			0x00000400ul
219154899Srik#define TAU32_si_bypass			0x00000800ul
220154899Srik#define TAU32_cas_fe			0x00001000ul
221154899Srik#define TAU32_ais_on_loss		0x00002000ul
222154899Srik#define TAU32_cas_all_ones		0x00004000ul
223154899Srik#define TAU32_cas_io			0x00008000ul
224154899Srik#define TAU32_fas_io			0x00010000ul
225154899Srik#define TAU32_fas8_io			0x00020000ul
226154899Srik#define TAU32_auto_ais			0x00040000ul
227154899Srik#define TAU32_not_auto_ra		0x00080000ul
228154899Srik#define TAU32_not_auto_dmra		0x00100000ul
229154899Srik#define TAU32_ra			0x00200000ul
230154899Srik#define TAU32_dmra			0x00400000ul
231154899Srik#define TAU32_scrambler			0x00800000ul
232154899Srik#define TAU32_tx_ami			0x01000000ul
233154899Srik#define TAU32_rx_ami			0x02000000ul
234154899Srik#define TAU32_ja_tx			0x04000000ul
235156143Srik#define TAU32_crc4_mf_tx		0x08000000ul
236156143Srik#define TAU32_crc4_mf_rx		0x10000000ul
237156143Srik#define TAU32_crc4_mf			(TAU32_crc4_mf_rx | TAU32_crc4_mf_tx)
238154899Srik
239154899Srik/* TAU32_SA_CROSS_VALUES */
240154899Srik#define TAU32_SaDisable	 0u
241154899Srik#define TAU32_SaSystem	  1u
242154899Srik#define TAU32_SaIntA		2u
243154899Srik#define TAU32_SaIntB		3u
244154899Srik#define TAU32_SaAllZeros	4u
245154899Srik
246154899Sriktypedef struct tag_TAU32_SaCross
247154899Srik{
248154899Srik	unsigned __int8 InterfaceA, InterfaceB;
249154899Srik	unsigned __int8 SystemEnableTs0;
250154899Srik} TAU32_SaCross;
251154899Srik
252154899Srik/* TAU32_INTERFACE_STATUS_BITS */
253154899Srik#define TAU32_RCL	   0x0001u /* receive carrier lost */
254154899Srik#define TAU32_RLOS	  0x0002u /* receive sync lost */
255154899Srik#define TAU32_RUA1	  0x0004u /* received unframed all ones */
256154899Srik#define TAU32_RRA	   0x0008u /* receive remote alarm */
257154899Srik#define TAU32_RSA1	  0x0010u /* receive signaling all ones */
258154899Srik#define TAU32_RSA0	  0x0020u /* receive signaling all zeros */
259154899Srik#define TAU32_RDMA	  0x0040u /* receive distant multiframe alarm */
260154899Srik#define TAU32_LOTC	  0x0080u /* transmit clock lost */
261154899Srik#define TAU32_RSLIP	 0x0100u /* receiver slip event */
262154899Srik#define TAU32_TSLIP	 0x0200u /* transmitter slip event */
263154899Srik#define TAU32_RFAS	  0x0400u /* receiver lost and searching for FAS */
264154899Srik#define TAU32_RCRC4	 0x0800u /* receiver lost and searching for CRC4 MF */
265154899Srik#define TAU32_RCAS	  0x1000u /* received lost and searching for CAS MF */
266154899Srik#define TAU32_JITTER	0x2000u /* jitter attenuator limit */
267154899Srik#define TAU32_RCRC4LONG 0x4000u /* G.706 400ms limit of searching for CRC4 */
268154899Srik#define TAU32_E1OFF	 0x8000u /* E1 line power-off */
269154899Srik#define TAU32_LOS	   TAU32_RLOS
270154899Srik#define TAU32_AIS	   TAU32_RUA1
271154899Srik#define TAU32_LOF	   TAU32_RFAS
272154899Srik#define TAU32_AIS16	 TAU32_RSA1
273154899Srik#define TAU32_LOFM	  TAU32_RCAS
274154899Srik#define TAU32_FLOFM	 TAU32_RDMA
275154899Srik
276154899Srik/* TAU32_STATUS */
277156143Srik#define TAU32_FRLOFM		0x0001u /* CAS framer searching for CAS MF */
278156143Srik#define TAU32_CMWAITING		0x0002u /* Connection memory swap waiting */
279156143Srik#define TAU32_CMPENDING		0x0004u /* Connection memory swap pending */
280156143Srik#define TAU32_LED		0x0008u /* Led status (on/off) */
281154899Srik
282154899Sriktypedef struct tag_TAU32_Controller TAU32_Controller;
283154899Sriktypedef struct tag_TAU32_UserRequest TAU32_UserRequest;
284154899Sriktypedef struct tag_TAU32_UserContext TAU32_UserContext;
285154899Sriktypedef union tag_TAU32_tsc TAU32_tsc;
286154899Sriktypedef struct tag_TAU32_FlatIoContext TAU32_FlatIoContext;
287154899Sriktypedef void(TAU32_CALLBACK_TYPE *TAU32_RequestCallback)(TAU32_UserContext *pContext, TAU32_UserRequest *pUserRequest);
288154899Sriktypedef void(TAU32_CALLBACK_TYPE *TAU32_NotifyCallback)(TAU32_UserContext *pContext, int Item, unsigned NotifyBits);
289154899Sriktypedef void(TAU32_CALLBACK_TYPE *TAU32_FifoTrigger)(TAU32_UserContext *pContext, int Interface, unsigned FifoId, unsigned Level);
290154899Sriktypedef void(TAU32_CALLBACK_TYPE *TAU32_FlatIoCallback)(TAU32_UserContext *pContext, TAU32_FlatIoContext *pFlatIoContext);
291154899Srik
292154899Srikunion tag_TAU32_tsc
293154899Srik{
294154899Srik		unsigned __int32 osc, sync;
295154899Srik};
296154899Srik
297154899Srikstruct tag_TAU32_FlatIoContext
298154899Srik{
299154899Srik	void *pInternal;
300154899Srik	PCI_PHYSICAL_ADDRESS PhysicalBufferAddress;
301154899Srik	unsigned Channel, ItemsCount, EachItemBufferSize;
302154899Srik	unsigned Received, ActualOffset, Errors;
303154899Srik#if defined(_NTDDK_)
304154899Srik	KDPC CallbackDpc;
305154899Srik	void SetupCallback(PKDEFERRED_ROUTINE DeferredCallbackRoutine, void* pContext)
306154899Srik	{
307154899Srik		CallbackDpc.DeferredRoutine = DeferredCallbackRoutine;
308154899Srik		CallbackDpc.DeferredContext = pContext;
309154899Srik	}
310154899Srik	void SetupCallback(TAU32_FlatIoCallback pCallback)
311154899Srik	{
312154899Srik		CallbackDpc.DeferredRoutine = (PKDEFERRED_ROUTINE) pCallback;
313154899Srik		CallbackDpc.DeferredContext = 0;
314154899Srik	}
315154899Srik#else
316154899Srik	TAU32_FlatIoCallback pCallback;
317154899Srik#endif
318154899Srik};
319154899Srik
320154899Srik/* TAU32_FIFO_ID */
321154899Srik#define TAU32_FifoId_CasRx 0u
322154899Srik#define TAU32_FifoId_CasTx 1u
323154899Srik#define TAU32_FifoId_FasRx 2u
324154899Srik#define TAU32_FifoId_FasTx 3u
325154899Srik#define TAU32_FifoId_Max   4u
326154899Srik
327154899Sriktypedef struct tag_TAU32_E1_State
328154899Srik{
329154899Srik	unsigned __int32 TickCounter;
330154899Srik	unsigned __int32 RxViolations;
331154899Srik	unsigned __int32 Crc4Errors;
332154899Srik	unsigned __int32 FarEndBlockErrors;
333154899Srik	unsigned __int32 FasErrors;
334154899Srik	unsigned __int32 TransmitSlips;
335154899Srik	unsigned __int32 ReceiveSlips;
336154899Srik	unsigned __int32 Status;
337154899Srik	unsigned __int32 FifoSlip[TAU32_FifoId_Max];
338154899Srik} TAU32_E1_State;
339154899Srik
340154899Srikstruct tag_TAU32_UserContext
341154899Srik{
342154899Srik	/* fields provided by user for for TAU32_Initiaize() */
343154899Srik	TAU32_Controller *pControllerObject;
344154899Srik	PCI_PHYSICAL_ADDRESS ControllerObjectPhysicalAddress;
345154899Srik	void *PciBar1VirtualAddress;
346154899Srik	TAU32_NotifyCallback pErrorNotifyCallback;
347154899Srik	TAU32_NotifyCallback pStatusNotifyCallback;
348154899Srik#if defined(_NTDDK_)
349154899Srik	PKINTERRUPT InterruptObject;
350154899Srik#endif
351154899Srik	/* TODO: remove from release */
352154899Srik	#define TAU32_CUSTOM_FIRMWARE
353154899Srik	#ifdef TAU32_CUSTOM_FIRMWARE
354154899Srik		void *pCustomFirmware;
355154899Srik		unsigned CustomFirmwareSize;
356154899Srik	#endif
357154899Srik	/* fields filled by TAU32_Initiaize() */
358154899Srik	int Model;
359154899Srik	int Interfaces;
360154899Srik	unsigned InitErrors;
361154899Srik	unsigned __int32 DeadBits;
362154899Srik
363154899Srik	/* fields managed by DDK */
364154899Srik	unsigned AdapterStatus;
365154899Srik	unsigned CasIoLofCount;
366154899Srik	unsigned E1IntLostCount;
367154899Srik	unsigned CableTypeJumpers;
368154899Srik	TAU32_E1_State InterfacesInfo[TAU32_MAX_INTERFACES];
369154899Srik
370154899Srik	/* fields which are't used by DDK, but nice for user */
371154899Srik#ifdef TAU32_UserContext_Add
372154899Srik	TAU32_UserContext_Add
373154899Srik#endif
374154899Srik};
375154899Srik
376154899Srikstruct tag_TAU32_UserRequest
377154899Srik{
378154899Srik	/* required fields */
379154899Srik	void *pInternal;									/* internal */
380154899Srik	unsigned Command;								   /* in */
381154899Srik#if defined(_NTDDK_)
382154899Srik	KDPC CallbackDpc;
383154899Srik	void SetupCallback(PKDEFERRED_ROUTINE DeferredCallbackRoutine, void* pContext)
384154899Srik	{
385154899Srik		CallbackDpc.DeferredRoutine = DeferredCallbackRoutine;
386154899Srik		CallbackDpc.DeferredContext = pContext;
387154899Srik	}
388154899Srik	void SetupCallback(TAU32_RequestCallback pCallback)
389154899Srik	{
390154899Srik		CallbackDpc.DeferredRoutine = (PKDEFERRED_ROUTINE) pCallback;
391154899Srik		CallbackDpc.DeferredContext = 0;
392154899Srik	}
393154899Srik#else
394154899Srik	TAU32_RequestCallback pCallback;					/* in */
395154899Srik#endif
396154899Srik	unsigned __int32 ErrorCode;						 /* out */
397154899Srik
398154899Srik	union
399154899Srik	{
400154899Srik		unsigned ChannelNumber;						 /* just common field */
401154899Srik
402154899Srik		struct
403154899Srik		{
404154899Srik			unsigned Channel;						   /* in */
405154899Srik			unsigned __int32 Config;					/* in */
406154899Srik			unsigned __int32 AssignedTsMask;			/* build channel from timeslots which is selected by mask */
407154899Srik		} ChannelConfig;
408154899Srik
409154899Srik		struct
410154899Srik		{
411154899Srik			int Interface;
412154899Srik			unsigned __int32 Config;					/* in */
413154899Srik			unsigned __int32 UnframedTsMask;
414154899Srik		} InterfaceConfig;
415154899Srik
416154899Srik		struct
417154899Srik		{
418154899Srik			unsigned Channel;						   /* in */
419154899Srik			PCI_PHYSICAL_ADDRESS PhysicalDataAddress;   /* in */
420154899Srik			unsigned DataLength;						/* in */
421154899Srik			unsigned Transmitted;					   /* out */
422154899Srik		} Tx;
423154899Srik
424154899Srik		struct
425154899Srik		{
426154899Srik			unsigned Channel;						   /* in */
427154899Srik			PCI_PHYSICAL_ADDRESS PhysicalDataAddress;   /* in */
428154899Srik			unsigned BufferLength;					  /* in */
429154899Srik			unsigned Received;						  /* out */
430154899Srik			BOOLEAN FrameEnd;						   /* out */
431154899Srik		} Rx;
432154899Srik
433154899Srik		BOOLEAN DigitalLoop;							/* in, loop by PEB */
434154899Srik
435154899Srik		union
436154899Srik		{
437154899Srik			TAU32_TimeslotAssignment Complete[TAU32_TIMESLOTS];
438154899Srik			unsigned __int32 Map[TAU32_CHANNELS];
439154899Srik		} TimeslotsAssignment;
440154899Srik	} Io;
441154899Srik
442154899Srik	/* fields which are't used by DDK, but nice for user */
443154899Srik#ifdef TAU32_UserRequest_Add
444154899Srik	TAU32_UserRequest_Add
445154899Srik#endif
446154899Srik};
447154899Srik
448154899Srik#define TAU32_IS_REQUEST_RUNNING(pUserRequest) ((pUserRequest)->pInternal != NULL)
449154899Srik#define TAU32_IS_REQUEST_NOT_RUNNING(pUserRequest) ((pUserRequest)->pInternal == NULL)
450154899Srik
451154899Srik#ifndef TAU32_DDK_DLL
452154899Srik#	if defined(_NTDDK_)
453154899Srik#		ifdef TAU32_DDK_IMP
454154899Srik#			define TAU32_DDK_DLL __declspec(dllexport)
455154899Srik#		else
456154899Srik#			define TAU32_DDK_DLL __declspec(dllimport)
457154899Srik#		endif
458154899Srik#	else
459154899Srik#		define TAU32_DDK_DLL
460154899Srik#	endif
461154899Srik#endif
462154899Srik
463154899Srik#ifdef __cplusplus
464154899Srikextern "C"
465154899Srik{
466154899Srik#endif
467154899Srik    void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_BeforeReset(TAU32_UserContext *pUserContext);
468154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_Initialize(TAU32_UserContext *pUserContext, BOOLEAN CronyxDiag);
469154899Srik	void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_DestructiveHalt(TAU32_Controller *pControllerObject, BOOLEAN CancelRequests);
470154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_IsInterruptPending(TAU32_Controller *pControllerObject);
471154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_HandleInterrupt(TAU32_Controller *pControllerObject);
472154899Srik	extern unsigned const TAU32_ControllerObjectSize;
473154899Srik
474154899Srik	/* LY: ��� ������� ����, ����� �������������� ���������� �� callback-�� */
475154899Srik	void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_EnableInterrupts(TAU32_Controller *pControllerObject);
476154899Srik	void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_DisableInterrupts(TAU32_Controller *pControllerObject);
477154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SubmitRequest(TAU32_Controller *pControllerObject, TAU32_UserRequest *pRequest);
478154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_CancelRequest(TAU32_Controller *pControllerObject, TAU32_UserRequest *pRequest, BOOLEAN BreakIfRunning);
479154899Srik	void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_LedBlink(TAU32_Controller *pControllerObject);
480154899Srik	void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_LedSet(TAU32_Controller *pControllerObject, BOOLEAN On);
481154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetCasIo(TAU32_Controller *pControllerObject, BOOLEAN Enabled);
482154899Srik    unsigned __int64 TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_ProbeGeneratorFrequency(unsigned __int64 Frequency);
483154899Srik    unsigned __int64 TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetGeneratorFrequency(TAU32_Controller *pControllerObject, unsigned __int64 Frequency);
484154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetSyncMode(TAU32_Controller *pControllerObject, unsigned Mode);
485154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetCrossMatrix(TAU32_Controller *pControllerObject, unsigned __int8 *pCrossMatrix, unsigned __int32 ReverseMask);
486154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetIdleCodes(TAU32_Controller *pControllerObject, unsigned __int8 *pIdleCodes);
487154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_UpdateIdleCodes(TAU32_Controller *pControllerObject, int Interface, unsigned __int32 TimeslotMask, unsigned __int8 IdleCode);
488154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetSaCross(TAU32_Controller *pControllerObject, TAU32_SaCross SaCross);
489154899Srik	int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoPutCasAppend(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
490154899Srik	int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoPutCasAhead(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
491154899Srik	int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoGetCas(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
492154899Srik	int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoPutFasAppend(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
493154899Srik	int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoPutFasAhead(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
494154899Srik	int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoGetFas(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
495154899Srik	BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetFifoTrigger(TAU32_Controller *pControllerObject, int Interface, unsigned FifoId, unsigned Level, TAU32_FifoTrigger Trigger);
496154899Srik	void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_ReadTsc(TAU32_Controller *pControllerObject, TAU32_tsc *pResult);
497154899Srik
498154899Srik	/* for Cronyx Engineering use only !!! */
499154899Srik    #define TAU32_CRONYX_P      0
500154899Srik    #define TAU32_CRONYX_PS     1
501154899Srik    #define TAU32_CRONYX_PA     2
502154899Srik    #define TAU32_CRONYX_PB     3
503154899Srik    #define TAU32_CRONYX_I      4
504154899Srik    #define TAU32_CRONYX_O      5
505154899Srik    #define TAU32_CRONYX_U      6
506154899Srik    #define TAU32_CRONYX_R      7
507154899Srik    #define TAU32_CRONYX_W      8
508154899Srik    #define TAU32_CRONYX_RW     9
509154899Srik    #define TAU32_CRONYX_WR     10
510154899Srik    #define TAU32_CRONYX_S      11
511154899Srik    #define TAU32_CRONYX_G      12
512154899Srik	unsigned __int32 TAU32_CALL_TYPE TAU32_Diag(TAU32_Controller *pControllerObject, unsigned Operation, unsigned __int32 Data);
513154899Srik
514154899Srik#ifdef __cplusplus
515154899Srik}
516154899Srik#endif
517