bktr_reg.h revision 48781
1/* 2 * Copyright (c) 1999 Roger Hardiman 3 * Copyright (c) 1998 Amancio Hasty 4 * Copyright (c) 1995 Mark Tinguely and Jim Lowe 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Mark Tinguely and Jim Lowe 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 * $Id: brktree_reg.h,v 1.29 1999/06/12 14:54:56 roger Exp $ 34 */ 35#ifndef PCI_LATENCY_TIMER 36#define PCI_LATENCY_TIMER 0x0c /* pci timer register */ 37#endif 38 39/* 40 * Definitions for the Brooktree 848/878 video capture to pci interface. 41 */ 42#define BROOKTREE_848_PCI_ID 0x0350109E 43#define BROOKTREE_849_PCI_ID 0x0351109E 44#define BROOKTREE_878_PCI_ID 0x036E109E 45#define BROOKTREE_879_PCI_ID 0x036F109E 46 47#define BROOKTREE_848 1 48#define BROOKTREE_848A 2 49#define BROOKTREE_849A 3 50#define BROOKTREE_878 4 51#define BROOKTREE_879 5 52 53typedef volatile u_int bregister_t; 54/* 55 * if other persuasion endian, then compiler will probably require that 56 * these next 57 * macros be reversed 58 */ 59#define BTBYTE(what) bregister_t what:8; int :24 60#define BTWORD(what) bregister_t what:16; int: 16 61#define BTLONG(what) bregister_t what:32 62 63struct bt848_registers { 64 BTBYTE (dstatus); /* 0, 1,2,3 */ 65#define BT848_DSTATUS_PRES (1<<7) 66#define BT848_DSTATUS_HLOC (1<<6) 67#define BT848_DSTATUS_FIELD (1<<5) 68#define BT848_DSTATUS_NUML (1<<4) 69#define BT848_DSTATUS_CSEL (1<<3) 70#define BT848_DSTATUS_PLOCK (1<<2) 71#define BT848_DSTATUS_LOF (1<<1) 72#define BT848_DSTATUS_COF (1<<0) 73 BTBYTE (iform); /* 4, 5,6,7 */ 74#define BT848_IFORM_MUXSEL (0x3<<5) 75# define BT848_IFORM_M_MUX1 (0x03<<5) 76# define BT848_IFORM_M_MUX0 (0x02<<5) 77# define BT848_IFORM_M_MUX2 (0x01<<5) 78# define BT848_IFORM_M_MUX3 (0x0) 79# define BT848_IFORM_M_RSVD (0x00<<5) 80#define BT848_IFORM_XTSEL (0x3<<3) 81# define BT848_IFORM_X_AUTO (0x03<<3) 82# define BT848_IFORM_X_XT1 (0x02<<3) 83# define BT848_IFORM_X_XT0 (0x01<<3) 84# define BT848_IFORM_X_RSVD (0x00<<3) 85 BTBYTE (tdec); /* 8, 9,a,b */ 86 BTBYTE (e_crop); /* c, d,e,f */ 87 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */ 88 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */ 89 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */ 90 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */ 91 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */ 92 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */ 93 BTBYTE (bright); /* 28, 29,2a,2b */ 94 BTBYTE (e_control); /* 2c, 2d,2e,2f */ 95#define BT848_E_CONTROL_LNOTCH (1<<7) 96#define BT848_E_CONTROL_COMP (1<<6) 97#define BT848_E_CONTROL_LDEC (1<<5) 98#define BT848_E_CONTROL_CBSENSE (1<<4) 99#define BT848_E_CONTROL_RSVD (1<<3) 100#define BT848_E_CONTROL_CON_MSB (1<<2) 101#define BT848_E_CONTROL_SAT_U_MSB (1<<1) 102#define BT848_E_CONTROL_SAT_V_MSB (1<<0) 103 BTBYTE (contrast_lo); /* 30, 31,32,33 */ 104 BTBYTE (sat_u_lo); /* 34, 35,36,37 */ 105 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */ 106 BTBYTE (hue); /* 3c, 3d,3e,3f */ 107 BTBYTE (e_scloop); /* 40, 41,42,43 */ 108#define BT848_E_SCLOOP_RSVD1 (1<<7) 109#define BT848_E_SCLOOP_CAGC (1<<6) 110#define BT848_E_SCLOOP_CKILL (1<<5) 111#define BT848_E_SCLOOP_HFILT (0x3<<3) 112# define BT848_E_SCLOOP_HFILT_ICON (0x3<<3) 113# define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3) 114# define BT848_E_SCLOOP_HFILT_CIF (0x1<<3) 115# define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3) 116#define BT848_E_SCLOOP_RSVD0 (0x7<<0) 117 int :32; /* 44, 45,46,47 */ 118 BTBYTE (oform); /* 48, 49,4a,4b */ 119 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */ 120 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */ 121 BTBYTE (test); /* 54, 55,56,57 */ 122 int :32; /* 58, 59,5a,5b */ 123 int :32; /* 5c, 5d,5e,5f */ 124 BTLONG (adelay); /* 60, 61,62,63 */ 125 BTBYTE (bdelay); /* 64, 65,66,67 */ 126 BTBYTE (adc); /* 68, 69,6a,6b */ 127#define BT848_ADC_RESERVED (0x80) /* required pattern */ 128#define BT848_ADC_SYNC_T (1<<5) 129#define BT848_ADC_AGC_EN (1<<4) 130#define BT848_ADC_CLK_SLEEP (1<<3) 131#define BT848_ADC_Y_SLEEP (1<<2) 132#define BT848_ADC_C_SLEEP (1<<1) 133#define BT848_ADC_CRUSH (1<<0) 134 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */ 135 int :32; /* 70, 71,72,73 */ 136 int :32; /* 74, 75,76,77 */ 137 int :32; /* 78, 79,7a,7b */ 138 BTLONG (sreset); /* 7c, 7d,7e,7f */ 139 u_char filler1[0x84-0x80]; 140 BTBYTE (tgctrl); /* 84, 85,86,87 */ 141#define BT848_TGCTRL_TGCKI (3<<3) 142#define BT848_TGCTRL_TGCKI_XTAL (0<<3) 143#define BT848_TGCTRL_TGCKI_PLL (1<<3) 144#define BT848_TGCTRL_TGCKI_GPCLK (2<<3) 145#define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3) 146 u_char filler[0x8c-0x88]; 147 BTBYTE (o_crop); /* 8c, 8d,8e,8f */ 148 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */ 149 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */ 150 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */ 151 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */ 152 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */ 153 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */ 154 int :32; /* a8, a9,aa,ab */ 155 BTBYTE (o_control); /* ac, ad,ae,af */ 156#define BT848_O_CONTROL_LNOTCH (1<<7) 157#define BT848_O_CONTROL_COMP (1<<6) 158#define BT848_O_CONTROL_LDEC (1<<5) 159#define BT848_O_CONTROL_CBSENSE (1<<4) 160#define BT848_O_CONTROL_RSVD (1<<3) 161#define BT848_O_CONTROL_CON_MSB (1<<2) 162#define BT848_O_CONTROL_SAT_U_MSB (1<<1) 163#define BT848_O_CONTROL_SAT_V_MSB (1<<0) 164 u_char fillter1[16]; 165 BTBYTE (o_scloop); /* c0, c1,c2,c3 */ 166#define BT848_O_SCLOOP_RSVD1 (1<<7) 167#define BT848_O_SCLOOP_CAGC (1<<6) 168#define BT848_O_SCLOOP_CKILL (1<<5) 169#define BT848_O_SCLOOP_HFILT (0x3<<3) 170#define BT848_O_SCLOOP_HFILT_ICON (0x3<<3) 171#define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3) 172#define BT848_O_SCLOOP_HFILT_CIF (0x1<<3) 173#define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3) 174#define BT848_O_SCLOOP_RSVD0 (0x7<<0) 175 int :32; /* c4, c5,c6,c7 */ 176 int :32; /* c8, c9,ca,cb */ 177 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */ 178 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */ 179 BTBYTE (color_fmt); /* d4, d5,d6,d7 */ 180 bregister_t color_ctl_swap :4; /* d8 */ 181#define BT848_COLOR_CTL_WSWAP_ODD (1<<3) 182#define BT848_COLOR_CTL_WSWAP_EVEN (1<<2) 183#define BT848_COLOR_CTL_BSWAP_ODD (1<<1) 184#define BT848_COLOR_CTL_BSWAP_EVEN (1<<0) 185 bregister_t color_ctl_gamma :1; 186 bregister_t color_ctl_rgb_ded :1; 187 bregister_t color_ctl_color_bars :1; 188 bregister_t color_ctl_ext_frmrate :1; 189 int :24; /* d9,da,db */ 190 BTBYTE (cap_ctl); /* dc, dd,de,df */ 191#define BT848_CAP_CTL_DITH_FRAME (1<<4) 192#define BT848_CAP_CTL_VBI_ODD (1<<3) 193#define BT848_CAP_CTL_VBI_EVEN (1<<2) 194#define BT848_CAP_CTL_ODD (1<<1) 195#define BT848_CAP_CTL_EVEN (1<<0) 196 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */ 197 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */ 198 int :32; /* e8, e9,ea,eb */ 199 BTBYTE (o_vtc); /* ec, ed,ee,ef */ 200 BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */ 201 BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */ 202 BTBYTE (pll_f_xci); /* f8, f9,fa,fb */ 203#define BT848_PLL_F_C (1<<6) 204#define BT848_PLL_F_X (1<<7) 205 u_char filler2[0x100-0xfc]; 206 BTLONG (int_stat); /* 100, 101,102,103 */ 207 BTLONG (int_mask); /* 104, 105,106,107 */ 208#define BT848_INT_RISCS (0xf<<28) 209#define BT848_INT_RISC_EN (1<<27) 210#define BT848_INT_RACK (1<<25) 211#define BT848_INT_FIELD (1<<24) 212#define BT848_INT_MYSTERYBIT (1<<23) 213#define BT848_INT_SCERR (1<<19) 214#define BT848_INT_OCERR (1<<18) 215#define BT848_INT_PABORT (1<<17) 216#define BT848_INT_RIPERR (1<<16) 217#define BT848_INT_PPERR (1<<15) 218#define BT848_INT_FDSR (1<<14) 219#define BT848_INT_FTRGT (1<<13) 220#define BT848_INT_FBUS (1<<12) 221#define BT848_INT_RISCI (1<<11) 222#define BT848_INT_GPINT (1<<9) 223#define BT848_INT_I2CDONE (1<<8) 224#define BT848_INT_RSV1 (1<<7) 225#define BT848_INT_RSV0 (1<<6) 226#define BT848_INT_VPRES (1<<5) 227#define BT848_INT_HLOCK (1<<4) 228#define BT848_INT_OFLOW (1<<3) 229#define BT848_INT_HSYNC (1<<2) 230#define BT848_INT_VSYNC (1<<1) 231#define BT848_INT_FMTCHG (1<<0) 232 int :32; /* 108, 109,10a,10b */ 233 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */ 234#define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */ 235#define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */ 236#define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */ 237#define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */ 238#define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */ 239#define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */ 240#define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */ 241#define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */ 242#define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */ 243#define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */ 244#define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */ 245#define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */ 246#define BT848_DMA_CTL_RISC_EN (1<<1) 247#define BT848_DMA_CTL_FIFO_EN (1<<0) 248 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */ 249#define BT848_DATA_CTL_I2CDIV (0xf<<4) 250#define BT848_DATA_CTL_I2CSYNC (1<<3) 251#define BT848_DATA_CTL_I2CW3B (1<<2) 252#define BT848_DATA_CTL_I2CSCL (1<<1) 253#define BT848_DATA_CTL_I2CSDA (1<<0) 254 BTLONG (risc_strt_add); /* 114, 115,116,117 */ 255 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */ 256 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */ 257 BTLONG (risc_count); /* 120, 121,122,123 */ 258 u_char filler3[0x200-0x124]; 259 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */ 260}; 261 262typedef volatile struct bt848_registers* bt848_ptr_t; 263 264 265#if 0 266/* force people to be aware of the new struct */ 267 268#define BKTR_DSTATUS 0x000 269#define BKTR_IFORM 0x004 270#define BKTR_TDEC 0x008 271#define BKTR_EVEN_CROP 0x00C 272#define BKTR_ODD_CROP 0x08C 273#define BKTR_E_VDELAY_LO 0x010 274#define BKTR_O_VDELAY_LO 0x090 275#define BKTR_E_VACTIVE_LO 0x014 276#define BKTR_O_VACTIVE_LO 0x094 277#define BKTR_E_DELAY_LO 0x018 278#define BKTR_O_DELAY_LO 0x098 279#define BKTR_E_HACTIVE_LO 0x01C 280#define BKTR_O_HACTIVE_LO 0x09C 281#define BKTR_E_HSCALE_HI 0x020 282#define BKTR_O_HSCALE_HI 0x0A0 283#define BKTR_E_HSCALE_LO 0x024 284#define BKTR_O_HSCALE_LO 0x0A4 285#define BKTR_BRIGHT 0x028 286#define BKTR_E_CONTROL 0x02C 287#define BKTR_O_CONTROL 0x0AC 288#define BKTR_CONTRAST_LO 0x030 289#define BKTR_SAT_U_LO 0x034 290#define BKTR_SAT_V_LO 0x038 291#define BKTR_HUE 0x03C 292#define BKTR_E_SCLOOP 0x040 293#define BKTR_O_SCLOOP 0x0C0 294#define BKTR_OFORM 0x048 295#define BKTR_E_VSCALE_HI 0x04C 296#define BKTR_O_VSCALE_HI 0x0CC 297#define BKTR_E_VSCALE_LO 0x050 298#define BKTR_O_VSCALE_LO 0x0D0 299#define BKTR_TEST 0x054 300#define BKTR_ADELAY 0x060 301#define BKTR_BDELAY 0x064 302#define BKTR_ADC 0x068 303#define BKTR_E_VTC 0x06C 304#define BKTR_O_VTC 0x0EC 305#define BKTR_SRESET 0x07C 306#define BKTR_COLOR_FMT 0x0D4 307#define BKTR_COLOR_CTL 0x0D8 308#define BKTR_CAP_CTL 0x0DC 309#define BKTR_VBI_PACK_SIZE 0x0E0 310#define BKTR_VBI_PACK_DEL 0x0E4 311#define BKTR_INT_STAT 0x100 312#define BKTR_INT_MASK 0x104 313#define BKTR_RISC_COUNT 0x120 314#define BKTR_RISC_STRT_ADD 0x114 315#define BKTR_GPIO_DMA_CTL 0x10C 316#define BKTR_GPIO_OUT_EN 0x118 317#define BKTR_GPIO_REG_INP 0x11C 318#define BKTR_GPIO_DATA 0x200 319#define BKTR_I2C_CONTROL 0x110 320 321#endif /* 0 */ 322 323/* 324 * device support for onboard tv tuners 325 */ 326 327/* description of the LOGICAL tuner */ 328struct TVTUNER { 329 int frequency; 330 u_char chnlset; 331 u_char channel; 332 u_char band; 333 u_char afc; 334 u_char radio_mode; /* current mode of the radio mode */ 335}; 336 337/* description of the PHYSICAL tuner */ 338struct TUNER { 339 char* name; 340 u_char type; 341 u_char pllControl[4]; 342 u_char bandLimits[ 2 ]; 343 u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV 344 ** bands. Last for radio 345 ** band (0x00=NoRadio). 346 */ 347 348}; 349 350/* description of the card */ 351#define EEPROMBLOCKSIZE 32 352struct CARDTYPE { 353 unsigned int card_id; /* card id (from #define's) */ 354 char* name; 355 const struct TUNER* tuner; /* Tuner details */ 356 u_char tuner_pllAddr; /* Tuner i2c address */ 357 u_char dbx; /* Has DBX chip? */ 358 u_char msp3400c; /* Has msp3400c chip? */ 359 u_char eepromAddr; 360 u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */ 361 u_int audiomuxs[ 5 ]; /* tuner, ext (line-in) */ 362 /* int/unused (radio) */ 363 /* mute, present */ 364 u_int gpio_mux_bits; /* GPIO mask for audio mux */ 365}; 366 367struct format_params { 368 /* Total lines, lines before image, image lines */ 369 int vtotal, vdelay, vactive; 370 /* Total unscaled horizontal pixels, pixels before image, image pixels */ 371 int htotal, hdelay, hactive; 372 /* Scaled horizontal image pixels, Total Scaled horizontal pixels */ 373 int scaled_hactive, scaled_htotal; 374 /* frame rate . for ntsc is 30 frames per second */ 375 int frame_rate; 376 /* A-delay and B-delay */ 377 u_char adelay, bdelay; 378 /* Iform XTSEL value */ 379 int iform_xtsel; 380 /* VBI number of lines per field, and number of samples per line */ 381 int vbi_num_lines, vbi_num_samples; 382}; 383 384#if ((defined(__FreeBSD__)) && (NSMBUS > 0)) 385struct bktr_i2c_softc { 386 device_t iicbus; 387 device_t smbus; 388}; 389#endif 390 391typedef struct bktr_clip bktr_clip_t; 392 393 394/* 395 * BrookTree 848 info structure, one per bt848 card installed. 396 */ 397struct bktr_softc { 398 399#if defined (__bsdi__) 400 struct device bktr_dev; /* base device */ 401 struct isadev bktr_id; /* ISA device */ 402 struct intrhand bktr_ih; /* interrupt vectoring */ 403 #define pcici_t pci_devaddr_t 404#endif 405 406#if defined(__NetBSD__) 407 struct device bktr_dev; /* base device */ 408 bus_space_tag_t memt; 409 bus_space_handle_t memh; 410 bus_size_t obmemsz; /* size of en card (bytes) */ 411 void *ih; 412 bus_dmamap_t dm_prog; 413 bus_dmamap_t dm_oprog; 414 bus_dmamap_t dm_mem; 415 vm_offset_t phys_base; /* Bt848 register physical address */ 416#endif 417 418#if defined(__OpenBSD__) 419 struct device bktr_dev; /* base device */ 420 bus_dma_tag_t dmat; /* DMA tag */ 421 bus_space_tag_t memt; 422 bus_space_handle_t memh; 423 bus_size_t obmemsz; /* size of en card (bytes) */ 424 void *ih; 425 bus_dmamap_t dm_prog; 426 bus_dmamap_t dm_oprog; 427 bus_dmamap_t dm_mem; 428 size_t dm_mapsize; 429 pci_chipset_tag_t pc; /* Opaque PCI chipset tag */ 430 pcitag_t tag; /* PCI tag, for doing PCI commands */ 431 vm_offset_t phys_base; /* Bt848 register physical address */ 432#endif 433 434#if defined (__FreeBSD__) 435 #if (__FreeBSD_version < 400000) 436 vm_offset_t phys_base; /* 2.x Bt848 register physical address */ 437 pcici_t tag; /* 2.x PCI tag, for doing PCI commands */ 438 #endif 439 #if (__FreeBSD_version >= 400000) 440 struct resource *res_mem; /* 4.x resource descriptor for registers */ 441 struct resource *res_irq; /* 4.x resource descriptor for interrupt */ 442 void *res_ih; /* 4.x newbus interrupt handler cookie */ 443 #endif 444 #if (NSMBUS > 0) 445 struct bktr_i2c_softc i2c_sc; /* bt848_i2c device */ 446 #endif 447#endif 448 449 /* the following definitions are common over all platforms */ 450 bt848_ptr_t base; /* Bt848 register physical address */ 451 vm_offset_t bigbuf; /* buffer that holds the captured image */ 452 int alloc_pages; /* number of pages in bigbuf */ 453 vm_offset_t vbidata; /* RISC program puts VBI data from the current frame here */ 454 vm_offset_t vbibuffer; /* Circular buffer holding VBI data for the user */ 455 int vbiinsert; /* Position for next write into circular buffer */ 456 int vbistart; /* Position of last read from circular buffer */ 457 int vbisize; /* Number of bytes in the circular buffer */ 458 struct proc *proc; /* process to receive raised signal */ 459 int signal; /* signal to send to process */ 460 int clr_on_start; /* clear cap buf on capture start? */ 461#define METEOR_SIG_MODE_MASK 0xffff0000 462#define METEOR_SIG_FIELD_MODE 0x00010000 463#define METEOR_SIG_FRAME_MODE 0x00000000 464 vm_offset_t dma_prog; 465 vm_offset_t odd_dma_prog; 466 char dma_prog_loaded; 467 struct meteor_mem *mem; /* used to control sync. multi-frame output */ 468 u_long synch_wait; /* wait for free buffer before continuing */ 469 short current; /* frame number in buffer (1-frames) */ 470 short rows; /* number of rows in a frame */ 471 short cols; /* number of columns in a frame */ 472 int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */ 473 int capture_area_y_offset; /* captured. The capture area allows for */ 474 int capture_area_x_size; /* example 320x200 pixels from the centre */ 475 int capture_area_y_size; /* of the video image to be captured. */ 476 char capture_area_enabled; /* When TRUE use user's capture area. */ 477 int pixfmt; /* active pixel format (idx into fmt tbl) */ 478 int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */ 479 u_long format; /* frame format rgb, yuv, etc.. */ 480 short frames; /* number of frames allocated */ 481 int frame_size; /* number of bytes in a frame */ 482 u_long fifo_errors; /* number of fifo capture errors since open */ 483 u_long dma_errors; /* number of DMA capture errors since open */ 484 u_long frames_captured;/* number of frames captured since open */ 485 u_long even_fields_captured; /* number of even fields captured */ 486 u_long odd_fields_captured; /* number of odd fields captured */ 487 u_long range_enable; /* enable range checking ?? */ 488 u_short capcontrol; /* reg 0xdc capture control */ 489 u_short bktr_cap_ctl; 490 volatile u_int flags; 491#define METEOR_INITALIZED 0x00000001 492#define METEOR_OPEN 0x00000002 493#define METEOR_MMAP 0x00000004 494#define METEOR_INTR 0x00000008 495#define METEOR_READ 0x00000010 /* XXX never gets referenced */ 496#define METEOR_SINGLE 0x00000020 /* get single frame */ 497#define METEOR_CONTIN 0x00000040 /* continuously get frames */ 498#define METEOR_SYNCAP 0x00000080 /* synchronously get frames */ 499#define METEOR_CAP_MASK 0x000000f0 500#define METEOR_NTSC 0x00000100 501#define METEOR_PAL 0x00000200 502#define METEOR_SECAM 0x00000400 503#define BROOKTREE_NTSC 0x00000100 /* used in video open() and */ 504#define BROOKTREE_PAL 0x00000200 /* in the kernel config */ 505#define BROOKTREE_SECAM 0x00000400 /* file */ 506#define METEOR_AUTOMODE 0x00000800 507#define METEOR_FORM_MASK 0x00000f00 508#define METEOR_DEV0 0x00001000 509#define METEOR_DEV1 0x00002000 510#define METEOR_DEV2 0x00004000 511#define METEOR_DEV3 0x00008000 512#define METEOR_DEV_SVIDEO 0x00006000 513#define METEOR_DEV_RGB 0x0000a000 514#define METEOR_DEV_MASK 0x0000f000 515#define METEOR_RGB16 0x00010000 516#define METEOR_RGB24 0x00020000 517#define METEOR_YUV_PACKED 0x00040000 518#define METEOR_YUV_PLANAR 0x00080000 519#define METEOR_WANT_EVEN 0x00100000 /* want even frame */ 520#define METEOR_WANT_ODD 0x00200000 /* want odd frame */ 521#define METEOR_WANT_MASK 0x00300000 522#define METEOR_ONLY_EVEN_FIELDS 0x01000000 523#define METEOR_ONLY_ODD_FIELDS 0x02000000 524#define METEOR_ONLY_FIELDS_MASK 0x03000000 525#define METEOR_YUV_422 0x04000000 526#define METEOR_OUTPUT_FMT_MASK 0x040f0000 527#define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */ 528#define METEOR_RGB 0x20000000 /* meteor rgb unit */ 529#define METEOR_FIELD_MODE 0x80000000 530 u_char tflags; /* Tuner flags (/dev/tuner) */ 531#define TUNER_INITALIZED 0x00000001 532#define TUNER_OPEN 0x00000002 533 u_char vbiflags; /* VBI flags (/dev/vbi) */ 534#define VBI_INITALIZED 0x00000001 535#define VBI_OPEN 0x00000002 536#define VBI_CAPTURE 0x00000004 537 u_short fps; /* frames per second */ 538 struct meteor_video video; 539 struct TVTUNER tuner; 540 struct CARDTYPE card; 541 u_char audio_mux_select; /* current mode of the audio */ 542 u_char audio_mute_state; /* mute state of the audio */ 543 u_char format_params; 544 u_long current_sol; 545 u_long current_col; 546 int clip_start; 547 int line_length; 548 int last_y; 549 int y; 550 int y2; 551 int yclip; 552 int yclip2; 553 int max_clip_node; 554 bktr_clip_t clip_list[100]; 555 int reverse_mute; 556 int bt848_tuner; 557 int bt848_card; 558 u_long id; 559#define BT848_USE_XTALS 0 560#define BT848_USE_PLL 1 561 int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */ int remote_control; /* remote control detected */ 562 int remote_control_addr; /* remote control i2c address */ 563 char msp_version_string[9]; /* MSP version string 34xxx-xx */ 564 565 566}; 567 568typedef struct bktr_softc bktr_reg_t; 569typedef struct bktr_softc* bktr_ptr_t; 570 571#define Bt848_MAX_SIGN 16 572 573struct bt848_card_sig { 574 int card; 575 int tuner; 576 u_char signature[Bt848_MAX_SIGN]; 577}; 578