if_bfe.c revision 175787
1139749Simp/*- 2119917Swpaul * Copyright (c) 2003 Stuart Walsh<stu@ipng.org.uk> 3119917Swpaul * and Duncan Barclay<dmlb@dmlb.org> 4139749Simp * 5119917Swpaul * Redistribution and use in source and binary forms, with or without 6119917Swpaul * modification, are permitted provided that the following conditions 7119917Swpaul * are met: 8119917Swpaul * 1. Redistributions of source code must retain the above copyright 9119917Swpaul * notice, this list of conditions and the following disclaimer. 10119917Swpaul * 2. Redistributions in binary form must reproduce the above copyright 11119917Swpaul * notice, this list of conditions and the following disclaimer in the 12119917Swpaul * documentation and/or other materials provided with the distribution. 13119917Swpaul * 14119917Swpaul * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS 'AS IS' AND 15119917Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16119917Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17119917Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18119917Swpaul * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19119917Swpaul * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20119917Swpaul * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21119917Swpaul * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22119917Swpaul * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23119917Swpaul * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24119917Swpaul * SUCH DAMAGE. 25119917Swpaul */ 26119917Swpaul 27119917Swpaul 28119917Swpaul#include <sys/cdefs.h> 29119917Swpaul__FBSDID("$FreeBSD: head/sys/dev/bfe/if_bfe.c 175787 2008-01-29 02:15:11Z yongari $"); 30119917Swpaul 31119917Swpaul#include <sys/param.h> 32119917Swpaul#include <sys/systm.h> 33119917Swpaul#include <sys/sockio.h> 34119917Swpaul#include <sys/mbuf.h> 35119917Swpaul#include <sys/malloc.h> 36119917Swpaul#include <sys/kernel.h> 37129879Sphk#include <sys/module.h> 38119917Swpaul#include <sys/socket.h> 39119917Swpaul#include <sys/queue.h> 40119917Swpaul 41119917Swpaul#include <net/if.h> 42119917Swpaul#include <net/if_arp.h> 43119917Swpaul#include <net/ethernet.h> 44119917Swpaul#include <net/if_dl.h> 45119917Swpaul#include <net/if_media.h> 46119917Swpaul 47119917Swpaul#include <net/bpf.h> 48119917Swpaul 49119917Swpaul#include <net/if_types.h> 50119917Swpaul#include <net/if_vlan_var.h> 51119917Swpaul 52119917Swpaul#include <netinet/in_systm.h> 53119917Swpaul#include <netinet/in.h> 54119917Swpaul#include <netinet/ip.h> 55119917Swpaul 56119917Swpaul#include <machine/bus.h> 57119917Swpaul#include <machine/resource.h> 58119917Swpaul#include <sys/bus.h> 59119917Swpaul#include <sys/rman.h> 60119917Swpaul 61119917Swpaul#include <dev/mii/mii.h> 62119917Swpaul#include <dev/mii/miivar.h> 63119917Swpaul#include "miidevs.h" 64119917Swpaul 65119917Swpaul#include <dev/pci/pcireg.h> 66119917Swpaul#include <dev/pci/pcivar.h> 67119917Swpaul 68119917Swpaul#include <dev/bfe/if_bfereg.h> 69119917Swpaul 70119917SwpaulMODULE_DEPEND(bfe, pci, 1, 1, 1); 71119917SwpaulMODULE_DEPEND(bfe, ether, 1, 1, 1); 72119917SwpaulMODULE_DEPEND(bfe, miibus, 1, 1, 1); 73119917Swpaul 74151545Simp/* "device miibus" required. See GENERIC if you get errors here. */ 75119917Swpaul#include "miibus_if.h" 76119917Swpaul 77119917Swpaul#define BFE_DEVDESC_MAX 64 /* Maximum device description length */ 78119917Swpaul 79119917Swpaulstatic struct bfe_type bfe_devs[] = { 80119917Swpaul { BCOM_VENDORID, BCOM_DEVICEID_BCM4401, 81119917Swpaul "Broadcom BCM4401 Fast Ethernet" }, 82134590Sdes { BCOM_VENDORID, BCOM_DEVICEID_BCM4401B0, 83134590Sdes "Broadcom BCM4401-B0 Fast Ethernet" }, 84119917Swpaul { 0, 0, NULL } 85119917Swpaul}; 86119917Swpaul 87119917Swpaulstatic int bfe_probe (device_t); 88119917Swpaulstatic int bfe_attach (device_t); 89119917Swpaulstatic int bfe_detach (device_t); 90164456Sjhbstatic int bfe_suspend (device_t); 91164456Sjhbstatic int bfe_resume (device_t); 92119917Swpaulstatic void bfe_release_resources (struct bfe_softc *); 93119917Swpaulstatic void bfe_intr (void *); 94119917Swpaulstatic void bfe_start (struct ifnet *); 95136804Smtmstatic void bfe_start_locked (struct ifnet *); 96119917Swpaulstatic int bfe_ioctl (struct ifnet *, u_long, caddr_t); 97119917Swpaulstatic void bfe_init (void *); 98136804Smtmstatic void bfe_init_locked (void *); 99119917Swpaulstatic void bfe_stop (struct bfe_softc *); 100175787Syongaristatic void bfe_watchdog (struct bfe_softc *); 101173839Syongaristatic int bfe_shutdown (device_t); 102119917Swpaulstatic void bfe_tick (void *); 103119917Swpaulstatic void bfe_txeof (struct bfe_softc *); 104119917Swpaulstatic void bfe_rxeof (struct bfe_softc *); 105119917Swpaulstatic void bfe_set_rx_mode (struct bfe_softc *); 106119917Swpaulstatic int bfe_list_rx_init (struct bfe_softc *); 107119917Swpaulstatic int bfe_list_newbuf (struct bfe_softc *, int, struct mbuf*); 108119917Swpaulstatic void bfe_rx_ring_free (struct bfe_softc *); 109119917Swpaul 110119917Swpaulstatic void bfe_pci_setup (struct bfe_softc *, u_int32_t); 111119917Swpaulstatic int bfe_ifmedia_upd (struct ifnet *); 112119917Swpaulstatic void bfe_ifmedia_sts (struct ifnet *, struct ifmediareq *); 113119917Swpaulstatic int bfe_miibus_readreg (device_t, int, int); 114119917Swpaulstatic int bfe_miibus_writereg (device_t, int, int, int); 115119917Swpaulstatic void bfe_miibus_statchg (device_t); 116133282Sdesstatic int bfe_wait_bit (struct bfe_softc *, u_int32_t, u_int32_t, 117119917Swpaul u_long, const int); 118119917Swpaulstatic void bfe_get_config (struct bfe_softc *sc); 119119917Swpaulstatic void bfe_read_eeprom (struct bfe_softc *, u_int8_t *); 120119917Swpaulstatic void bfe_stats_update (struct bfe_softc *); 121119917Swpaulstatic void bfe_clear_stats (struct bfe_softc *); 122119917Swpaulstatic int bfe_readphy (struct bfe_softc *, u_int32_t, u_int32_t*); 123119917Swpaulstatic int bfe_writephy (struct bfe_softc *, u_int32_t, u_int32_t); 124119917Swpaulstatic int bfe_resetphy (struct bfe_softc *); 125119917Swpaulstatic int bfe_setupphy (struct bfe_softc *); 126119917Swpaulstatic void bfe_chip_reset (struct bfe_softc *); 127119917Swpaulstatic void bfe_chip_halt (struct bfe_softc *); 128119917Swpaulstatic void bfe_core_reset (struct bfe_softc *); 129119917Swpaulstatic void bfe_core_disable (struct bfe_softc *); 130119917Swpaulstatic int bfe_dma_alloc (device_t); 131119917Swpaulstatic void bfe_dma_map_desc (void *, bus_dma_segment_t *, int, int); 132119917Swpaulstatic void bfe_dma_map (void *, bus_dma_segment_t *, int, int); 133119917Swpaulstatic void bfe_cam_write (struct bfe_softc *, u_char *, int); 134119917Swpaul 135119917Swpaulstatic device_method_t bfe_methods[] = { 136119917Swpaul /* Device interface */ 137119917Swpaul DEVMETHOD(device_probe, bfe_probe), 138119917Swpaul DEVMETHOD(device_attach, bfe_attach), 139119917Swpaul DEVMETHOD(device_detach, bfe_detach), 140119917Swpaul DEVMETHOD(device_shutdown, bfe_shutdown), 141164456Sjhb DEVMETHOD(device_suspend, bfe_suspend), 142164456Sjhb DEVMETHOD(device_resume, bfe_resume), 143119917Swpaul 144119917Swpaul /* bus interface */ 145119917Swpaul DEVMETHOD(bus_print_child, bus_generic_print_child), 146119917Swpaul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 147119917Swpaul 148119917Swpaul /* MII interface */ 149119917Swpaul DEVMETHOD(miibus_readreg, bfe_miibus_readreg), 150119917Swpaul DEVMETHOD(miibus_writereg, bfe_miibus_writereg), 151119917Swpaul DEVMETHOD(miibus_statchg, bfe_miibus_statchg), 152119917Swpaul 153119917Swpaul { 0, 0 } 154119917Swpaul}; 155119917Swpaul 156119917Swpaulstatic driver_t bfe_driver = { 157119917Swpaul "bfe", 158119917Swpaul bfe_methods, 159119917Swpaul sizeof(struct bfe_softc) 160119917Swpaul}; 161119917Swpaul 162119917Swpaulstatic devclass_t bfe_devclass; 163119917Swpaul 164119917SwpaulDRIVER_MODULE(bfe, pci, bfe_driver, bfe_devclass, 0, 0); 165119917SwpaulDRIVER_MODULE(miibus, bfe, miibus_driver, miibus_devclass, 0, 0); 166119917Swpaul 167119917Swpaul/* 168133282Sdes * Probe for a Broadcom 4401 chip. 169119917Swpaul */ 170119917Swpaulstatic int 171119917Swpaulbfe_probe(device_t dev) 172119917Swpaul{ 173119917Swpaul struct bfe_type *t; 174119917Swpaul struct bfe_softc *sc; 175119917Swpaul 176119917Swpaul t = bfe_devs; 177119917Swpaul 178119917Swpaul sc = device_get_softc(dev); 179119917Swpaul bzero(sc, sizeof(struct bfe_softc)); 180119917Swpaul sc->bfe_unit = device_get_unit(dev); 181119917Swpaul sc->bfe_dev = dev; 182119917Swpaul 183119917Swpaul while(t->bfe_name != NULL) { 184119917Swpaul if ((pci_get_vendor(dev) == t->bfe_vid) && 185119917Swpaul (pci_get_device(dev) == t->bfe_did)) { 186119917Swpaul device_set_desc_copy(dev, t->bfe_name); 187143163Simp return (BUS_PROBE_DEFAULT); 188119917Swpaul } 189119917Swpaul t++; 190119917Swpaul } 191119917Swpaul 192133282Sdes return (ENXIO); 193119917Swpaul} 194119917Swpaul 195119917Swpaulstatic int 196119917Swpaulbfe_dma_alloc(device_t dev) 197119917Swpaul{ 198119917Swpaul struct bfe_softc *sc; 199119917Swpaul int error, i; 200119917Swpaul 201119917Swpaul sc = device_get_softc(dev); 202119917Swpaul 203158075Sscottl /* 204158075Sscottl * parent tag. Apparently the chip cannot handle any DMA address 205158075Sscottl * greater than 1GB. 206158075Sscottl */ 207119917Swpaul error = bus_dma_tag_create(NULL, /* parent */ 208159013Ssilby 4096, 0, /* alignment, boundary */ 209158103Ssilby 0x3FFFFFFF, /* lowaddr */ 210158075Sscottl BUS_SPACE_MAXADDR, /* highaddr */ 211119917Swpaul NULL, NULL, /* filter, filterarg */ 212119917Swpaul MAXBSIZE, /* maxsize */ 213119917Swpaul BUS_SPACE_UNRESTRICTED, /* num of segments */ 214119917Swpaul BUS_SPACE_MAXSIZE_32BIT, /* max segment size */ 215159021Ssilby 0, /* flags */ 216119917Swpaul NULL, NULL, /* lockfunc, lockarg */ 217119917Swpaul &sc->bfe_parent_tag); 218119917Swpaul 219119917Swpaul /* tag for TX ring */ 220126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 221159013Ssilby 4096, 0, 222126470Sjulian BUS_SPACE_MAXADDR, 223133282Sdes BUS_SPACE_MAXADDR, 224126470Sjulian NULL, NULL, 225126470Sjulian BFE_TX_LIST_SIZE, 226126470Sjulian 1, 227126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 228159021Ssilby 0, 229126470Sjulian NULL, NULL, 230126470Sjulian &sc->bfe_tx_tag); 231119917Swpaul 232119917Swpaul if (error) { 233119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 234133282Sdes return (ENOMEM); 235119917Swpaul } 236119917Swpaul 237119917Swpaul /* tag for RX ring */ 238126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 239159013Ssilby 4096, 0, 240126470Sjulian BUS_SPACE_MAXADDR, 241126470Sjulian BUS_SPACE_MAXADDR, 242126470Sjulian NULL, NULL, 243126470Sjulian BFE_RX_LIST_SIZE, 244126470Sjulian 1, 245126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 246159021Ssilby 0, 247126470Sjulian NULL, NULL, 248126470Sjulian &sc->bfe_rx_tag); 249119917Swpaul 250119917Swpaul if (error) { 251119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 252133282Sdes return (ENOMEM); 253119917Swpaul } 254119917Swpaul 255119917Swpaul /* tag for mbufs */ 256126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 257126470Sjulian ETHER_ALIGN, 0, 258126470Sjulian BUS_SPACE_MAXADDR, 259126470Sjulian BUS_SPACE_MAXADDR, 260126470Sjulian NULL, NULL, 261126470Sjulian MCLBYTES, 262126470Sjulian 1, 263126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 264158075Sscottl BUS_DMA_ALLOCNOW, 265126470Sjulian NULL, NULL, 266126470Sjulian &sc->bfe_tag); 267119917Swpaul 268119917Swpaul if (error) { 269119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 270133282Sdes return (ENOMEM); 271119917Swpaul } 272119917Swpaul 273119917Swpaul /* pre allocate dmamaps for RX list */ 274119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 275126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 276126470Sjulian &sc->bfe_rx_ring[i].bfe_map); 277119917Swpaul if (error) { 278119917Swpaul device_printf(dev, "cannot create DMA map for RX\n"); 279133282Sdes return (ENOMEM); 280119917Swpaul } 281119917Swpaul } 282119917Swpaul 283119917Swpaul /* pre allocate dmamaps for TX list */ 284119917Swpaul for (i = 0; i < BFE_TX_LIST_CNT; i++) { 285126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 286126470Sjulian &sc->bfe_tx_ring[i].bfe_map); 287119917Swpaul if (error) { 288119917Swpaul device_printf(dev, "cannot create DMA map for TX\n"); 289133282Sdes return (ENOMEM); 290119917Swpaul } 291119917Swpaul } 292119917Swpaul 293119917Swpaul /* Alloc dma for rx ring */ 294119917Swpaul error = bus_dmamem_alloc(sc->bfe_rx_tag, (void *)&sc->bfe_rx_list, 295119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_rx_map); 296119917Swpaul 297119917Swpaul if(error) 298133282Sdes return (ENOMEM); 299119917Swpaul 300119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 301119917Swpaul error = bus_dmamap_load(sc->bfe_rx_tag, sc->bfe_rx_map, 302119917Swpaul sc->bfe_rx_list, sizeof(struct bfe_desc), 303158285Ssilby bfe_dma_map, &sc->bfe_rx_dma, BUS_DMA_NOWAIT); 304119917Swpaul 305119917Swpaul if(error) 306133282Sdes return (ENOMEM); 307119917Swpaul 308158102Ssilby bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREWRITE); 309119917Swpaul 310133282Sdes error = bus_dmamem_alloc(sc->bfe_tx_tag, (void *)&sc->bfe_tx_list, 311119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_tx_map); 312133282Sdes if (error) 313133282Sdes return (ENOMEM); 314119917Swpaul 315119917Swpaul 316133282Sdes error = bus_dmamap_load(sc->bfe_tx_tag, sc->bfe_tx_map, 317133282Sdes sc->bfe_tx_list, sizeof(struct bfe_desc), 318158285Ssilby bfe_dma_map, &sc->bfe_tx_dma, BUS_DMA_NOWAIT); 319119917Swpaul if(error) 320133282Sdes return (ENOMEM); 321119917Swpaul 322119917Swpaul bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 323158102Ssilby bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREWRITE); 324119917Swpaul 325133282Sdes return (0); 326119917Swpaul} 327119917Swpaul 328119917Swpaulstatic int 329119917Swpaulbfe_attach(device_t dev) 330119917Swpaul{ 331147256Sbrooks struct ifnet *ifp = NULL; 332119917Swpaul struct bfe_softc *sc; 333119917Swpaul int unit, error = 0, rid; 334119917Swpaul 335119917Swpaul sc = device_get_softc(dev); 336119917Swpaul mtx_init(&sc->bfe_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 337136804Smtm MTX_DEF); 338175787Syongari callout_init_mtx(&sc->bfe_stat_co, &sc->bfe_mtx, 0); 339119917Swpaul 340119917Swpaul unit = device_get_unit(dev); 341119917Swpaul sc->bfe_dev = dev; 342119917Swpaul sc->bfe_unit = unit; 343119917Swpaul 344119917Swpaul /* 345119917Swpaul * Map control/status registers. 346119917Swpaul */ 347119917Swpaul pci_enable_busmaster(dev); 348119917Swpaul 349119917Swpaul rid = BFE_PCI_MEMLO; 350127135Snjl sc->bfe_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 351119917Swpaul RF_ACTIVE); 352119917Swpaul if (sc->bfe_res == NULL) { 353119917Swpaul printf ("bfe%d: couldn't map memory\n", unit); 354119917Swpaul error = ENXIO; 355119917Swpaul goto fail; 356119917Swpaul } 357119917Swpaul 358119917Swpaul sc->bfe_btag = rman_get_bustag(sc->bfe_res); 359119917Swpaul sc->bfe_bhandle = rman_get_bushandle(sc->bfe_res); 360119917Swpaul sc->bfe_vhandle = (vm_offset_t)rman_get_virtual(sc->bfe_res); 361119917Swpaul 362119917Swpaul /* Allocate interrupt */ 363119917Swpaul rid = 0; 364119917Swpaul 365127135Snjl sc->bfe_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 366119917Swpaul RF_SHAREABLE | RF_ACTIVE); 367119917Swpaul if (sc->bfe_irq == NULL) { 368119917Swpaul printf("bfe%d: couldn't map interrupt\n", unit); 369119917Swpaul error = ENXIO; 370119917Swpaul goto fail; 371119917Swpaul } 372119917Swpaul 373119917Swpaul if (bfe_dma_alloc(dev)) { 374126470Sjulian printf("bfe%d: failed to allocate DMA resources\n", 375126470Sjulian sc->bfe_unit); 376119917Swpaul error = ENXIO; 377119917Swpaul goto fail; 378119917Swpaul } 379119917Swpaul 380119917Swpaul /* Set up ifnet structure */ 381147256Sbrooks ifp = sc->bfe_ifp = if_alloc(IFT_ETHER); 382147256Sbrooks if (ifp == NULL) { 383147256Sbrooks printf("bfe%d: failed to if_alloc()\n", sc->bfe_unit); 384147256Sbrooks error = ENOSPC; 385147256Sbrooks goto fail; 386147256Sbrooks } 387119917Swpaul ifp->if_softc = sc; 388121816Sbrooks if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 389119917Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 390119917Swpaul ifp->if_ioctl = bfe_ioctl; 391119917Swpaul ifp->if_start = bfe_start; 392119917Swpaul ifp->if_init = bfe_init; 393119917Swpaul ifp->if_mtu = ETHERMTU; 394131455Smlaier IFQ_SET_MAXLEN(&ifp->if_snd, BFE_TX_QLEN); 395131455Smlaier ifp->if_snd.ifq_drv_maxlen = BFE_TX_QLEN; 396131455Smlaier IFQ_SET_READY(&ifp->if_snd); 397119917Swpaul 398119917Swpaul bfe_get_config(sc); 399119917Swpaul 400119917Swpaul /* Reset the chip and turn on the PHY */ 401136804Smtm BFE_LOCK(sc); 402119917Swpaul bfe_chip_reset(sc); 403136804Smtm BFE_UNLOCK(sc); 404119917Swpaul 405119917Swpaul if (mii_phy_probe(dev, &sc->bfe_miibus, 406119917Swpaul bfe_ifmedia_upd, bfe_ifmedia_sts)) { 407119917Swpaul printf("bfe%d: MII without any PHY!\n", sc->bfe_unit); 408119917Swpaul error = ENXIO; 409119917Swpaul goto fail; 410119917Swpaul } 411119917Swpaul 412147256Sbrooks ether_ifattach(ifp, sc->bfe_enaddr); 413119917Swpaul 414119917Swpaul /* 415129708Sdes * Tell the upper layer(s) we support long frames. 416129708Sdes */ 417129708Sdes ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 418129708Sdes ifp->if_capabilities |= IFCAP_VLAN_MTU; 419129709Sdes ifp->if_capenable |= IFCAP_VLAN_MTU; 420129708Sdes 421129708Sdes /* 422119917Swpaul * Hook interrupt last to avoid having to lock softc 423119917Swpaul */ 424136804Smtm error = bus_setup_intr(dev, sc->bfe_irq, INTR_TYPE_NET | INTR_MPSAFE, 425166901Spiso NULL, bfe_intr, sc, &sc->bfe_intrhand); 426119917Swpaul 427119917Swpaul if (error) { 428119917Swpaul printf("bfe%d: couldn't set up irq\n", unit); 429119917Swpaul goto fail; 430119917Swpaul } 431119917Swpaulfail: 432150215Sru if (error) 433119917Swpaul bfe_release_resources(sc); 434133282Sdes return (error); 435119917Swpaul} 436119917Swpaul 437119917Swpaulstatic int 438119917Swpaulbfe_detach(device_t dev) 439119917Swpaul{ 440119917Swpaul struct bfe_softc *sc; 441119917Swpaul struct ifnet *ifp; 442119917Swpaul 443119917Swpaul sc = device_get_softc(dev); 444119917Swpaul 445119917Swpaul KASSERT(mtx_initialized(&sc->bfe_mtx), ("bfe mutex not initialized")); 446119917Swpaul 447147256Sbrooks ifp = sc->bfe_ifp; 448119917Swpaul 449119917Swpaul if (device_is_attached(dev)) { 450175787Syongari BFE_LOCK(sc); 451119917Swpaul bfe_stop(sc); 452175787Syongari BFE_UNLOCK(sc); 453175787Syongari callout_drain(&sc->bfe_stat_co); 454175787Syongari if (ifp != NULL) 455175787Syongari ether_ifdetach(ifp); 456119917Swpaul } 457119917Swpaul 458119917Swpaul bfe_chip_reset(sc); 459119917Swpaul 460119917Swpaul bus_generic_detach(dev); 461119917Swpaul if(sc->bfe_miibus != NULL) 462119917Swpaul device_delete_child(dev, sc->bfe_miibus); 463119917Swpaul 464119917Swpaul bfe_release_resources(sc); 465119917Swpaul mtx_destroy(&sc->bfe_mtx); 466119917Swpaul 467133282Sdes return (0); 468119917Swpaul} 469119917Swpaul 470119917Swpaul/* 471119917Swpaul * Stop all chip I/O so that the kernel's probe routines don't 472119917Swpaul * get confused by errant DMAs when rebooting. 473119917Swpaul */ 474173839Syongaristatic int 475119917Swpaulbfe_shutdown(device_t dev) 476119917Swpaul{ 477119917Swpaul struct bfe_softc *sc; 478119917Swpaul 479119917Swpaul sc = device_get_softc(dev); 480119917Swpaul BFE_LOCK(sc); 481133282Sdes bfe_stop(sc); 482119917Swpaul 483119917Swpaul BFE_UNLOCK(sc); 484173839Syongari 485173839Syongari return (0); 486119917Swpaul} 487119917Swpaul 488119917Swpaulstatic int 489164456Sjhbbfe_suspend(device_t dev) 490164456Sjhb{ 491164456Sjhb struct bfe_softc *sc; 492164456Sjhb 493164456Sjhb sc = device_get_softc(dev); 494164456Sjhb BFE_LOCK(sc); 495164456Sjhb bfe_stop(sc); 496164456Sjhb BFE_UNLOCK(sc); 497164456Sjhb 498164456Sjhb return (0); 499164456Sjhb} 500164456Sjhb 501164456Sjhbstatic int 502164456Sjhbbfe_resume(device_t dev) 503164456Sjhb{ 504164456Sjhb struct bfe_softc *sc; 505164456Sjhb struct ifnet *ifp; 506164456Sjhb 507164456Sjhb sc = device_get_softc(dev); 508164456Sjhb ifp = sc->bfe_ifp; 509164456Sjhb BFE_LOCK(sc); 510164456Sjhb bfe_chip_reset(sc); 511164456Sjhb if (ifp->if_flags & IFF_UP) { 512164456Sjhb bfe_init_locked(sc); 513164456Sjhb if (ifp->if_drv_flags & IFF_DRV_RUNNING && 514164456Sjhb !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 515164456Sjhb bfe_start_locked(ifp); 516164456Sjhb } 517164456Sjhb BFE_UNLOCK(sc); 518164456Sjhb 519164456Sjhb return (0); 520164456Sjhb} 521164456Sjhb 522164456Sjhbstatic int 523119917Swpaulbfe_miibus_readreg(device_t dev, int phy, int reg) 524119917Swpaul{ 525119917Swpaul struct bfe_softc *sc; 526119917Swpaul u_int32_t ret; 527119917Swpaul 528119917Swpaul sc = device_get_softc(dev); 529119917Swpaul if(phy != sc->bfe_phyaddr) 530133282Sdes return (0); 531119917Swpaul bfe_readphy(sc, reg, &ret); 532119917Swpaul 533133282Sdes return (ret); 534119917Swpaul} 535119917Swpaul 536119917Swpaulstatic int 537119917Swpaulbfe_miibus_writereg(device_t dev, int phy, int reg, int val) 538119917Swpaul{ 539119917Swpaul struct bfe_softc *sc; 540119917Swpaul 541119917Swpaul sc = device_get_softc(dev); 542119917Swpaul if(phy != sc->bfe_phyaddr) 543133282Sdes return (0); 544133282Sdes bfe_writephy(sc, reg, val); 545119917Swpaul 546133282Sdes return (0); 547119917Swpaul} 548119917Swpaul 549119917Swpaulstatic void 550119917Swpaulbfe_miibus_statchg(device_t dev) 551119917Swpaul{ 552175787Syongari struct bfe_softc *sc; 553175787Syongari struct mii_data *mii; 554175787Syongari u_int32_t val, flow; 555175787Syongari 556175787Syongari sc = device_get_softc(dev); 557175787Syongari mii = device_get_softc(sc->bfe_miibus); 558175787Syongari 559175787Syongari if ((mii->mii_media_status & IFM_ACTIVE) != 0) { 560175787Syongari if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) 561175787Syongari sc->bfe_link = 1; 562175787Syongari } else 563175787Syongari sc->bfe_link = 0; 564175787Syongari 565175787Syongari /* XXX Should stop Rx/Tx engine prior to touching MAC. */ 566175787Syongari val = CSR_READ_4(sc, BFE_TX_CTRL); 567175787Syongari val &= ~BFE_TX_DUPLEX; 568175787Syongari if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 569175787Syongari val |= BFE_TX_DUPLEX; 570175787Syongari flow = 0; 571175787Syongari#ifdef notyet 572175787Syongari flow = CSR_READ_4(sc, BFE_RXCONF); 573175787Syongari flow &= ~BFE_RXCONF_FLOW; 574175787Syongari if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & 575175787Syongari IFM_ETH_RXPAUSE) != 0) 576175787Syongari flow |= BFE_RXCONF_FLOW; 577175787Syongari CSR_WRITE_4(sc, BFE_RXCONF, flow); 578175787Syongari /* 579175787Syongari * It seems that the hardware has Tx pause issues 580175787Syongari * so enable only Rx pause. 581175787Syongari */ 582175787Syongari flow = CSR_READ_4(sc, BFE_MAC_FLOW); 583175787Syongari flow &= ~BFE_FLOW_PAUSE_ENAB; 584175787Syongari CSR_WRITE_4(sc, BFE_MAC_FLOW, flow); 585175787Syongari#endif 586175787Syongari } 587175787Syongari CSR_WRITE_4(sc, BFE_TX_CTRL, val); 588119917Swpaul} 589119917Swpaul 590119917Swpaulstatic void 591119917Swpaulbfe_tx_ring_free(struct bfe_softc *sc) 592119917Swpaul{ 593126470Sjulian int i; 594133282Sdes 595126470Sjulian for(i = 0; i < BFE_TX_LIST_CNT; i++) { 596126470Sjulian if(sc->bfe_tx_ring[i].bfe_mbuf != NULL) { 597126470Sjulian m_freem(sc->bfe_tx_ring[i].bfe_mbuf); 598126470Sjulian sc->bfe_tx_ring[i].bfe_mbuf = NULL; 599126470Sjulian bus_dmamap_unload(sc->bfe_tag, 600126470Sjulian sc->bfe_tx_ring[i].bfe_map); 601126470Sjulian } 602126470Sjulian } 603126470Sjulian bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 604158102Ssilby bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREWRITE); 605119917Swpaul} 606119917Swpaul 607119917Swpaulstatic void 608119917Swpaulbfe_rx_ring_free(struct bfe_softc *sc) 609119917Swpaul{ 610119917Swpaul int i; 611119917Swpaul 612119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 613119917Swpaul if (sc->bfe_rx_ring[i].bfe_mbuf != NULL) { 614119917Swpaul m_freem(sc->bfe_rx_ring[i].bfe_mbuf); 615119917Swpaul sc->bfe_rx_ring[i].bfe_mbuf = NULL; 616119917Swpaul bus_dmamap_unload(sc->bfe_tag, 617119917Swpaul sc->bfe_rx_ring[i].bfe_map); 618119917Swpaul } 619119917Swpaul } 620119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 621158102Ssilby bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREWRITE); 622119917Swpaul} 623119917Swpaul 624133282Sdesstatic int 625119917Swpaulbfe_list_rx_init(struct bfe_softc *sc) 626119917Swpaul{ 627119917Swpaul int i; 628119917Swpaul 629119917Swpaul for(i = 0; i < BFE_RX_LIST_CNT; i++) { 630133282Sdes if(bfe_list_newbuf(sc, i, NULL) == ENOBUFS) 631133282Sdes return (ENOBUFS); 632119917Swpaul } 633119917Swpaul 634158102Ssilby bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREWRITE); 635119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_PTR, (i * sizeof(struct bfe_desc))); 636119917Swpaul 637119917Swpaul sc->bfe_rx_cons = 0; 638119917Swpaul 639133282Sdes return (0); 640119917Swpaul} 641119917Swpaul 642119917Swpaulstatic int 643119917Swpaulbfe_list_newbuf(struct bfe_softc *sc, int c, struct mbuf *m) 644119917Swpaul{ 645119917Swpaul struct bfe_rxheader *rx_header; 646119917Swpaul struct bfe_desc *d; 647119917Swpaul struct bfe_data *r; 648119917Swpaul u_int32_t ctrl; 649158285Ssilby int error; 650119917Swpaul 651119917Swpaul if ((c < 0) || (c >= BFE_RX_LIST_CNT)) 652133282Sdes return (EINVAL); 653119917Swpaul 654119917Swpaul if(m == NULL) { 655119917Swpaul m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 656119917Swpaul if(m == NULL) 657133282Sdes return (ENOBUFS); 658119917Swpaul m->m_len = m->m_pkthdr.len = MCLBYTES; 659119917Swpaul } 660119917Swpaul else 661119917Swpaul m->m_data = m->m_ext.ext_buf; 662119917Swpaul 663119917Swpaul rx_header = mtod(m, struct bfe_rxheader *); 664119917Swpaul rx_header->len = 0; 665119917Swpaul rx_header->flags = 0; 666119917Swpaul 667119917Swpaul /* Map the mbuf into DMA */ 668119917Swpaul sc->bfe_rx_cnt = c; 669119917Swpaul d = &sc->bfe_rx_list[c]; 670119917Swpaul r = &sc->bfe_rx_ring[c]; 671158285Ssilby error = bus_dmamap_load(sc->bfe_tag, r->bfe_map, mtod(m, void *), 672158285Ssilby MCLBYTES, bfe_dma_map_desc, d, BUS_DMA_NOWAIT); 673158285Ssilby if (error) 674158285Ssilby printf("Serious error: bfe failed to map RX buffer\n"); 675158102Ssilby bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_PREWRITE); 676119917Swpaul 677119917Swpaul ctrl = ETHER_MAX_LEN + 32; 678119917Swpaul 679119917Swpaul if(c == BFE_RX_LIST_CNT - 1) 680119917Swpaul ctrl |= BFE_DESC_EOT; 681119917Swpaul 682119917Swpaul d->bfe_ctrl = ctrl; 683119917Swpaul r->bfe_mbuf = m; 684158102Ssilby bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREWRITE); 685133282Sdes return (0); 686119917Swpaul} 687119917Swpaul 688119917Swpaulstatic void 689119917Swpaulbfe_get_config(struct bfe_softc *sc) 690119917Swpaul{ 691119917Swpaul u_int8_t eeprom[128]; 692119917Swpaul 693119917Swpaul bfe_read_eeprom(sc, eeprom); 694119917Swpaul 695147256Sbrooks sc->bfe_enaddr[0] = eeprom[79]; 696147256Sbrooks sc->bfe_enaddr[1] = eeprom[78]; 697147256Sbrooks sc->bfe_enaddr[2] = eeprom[81]; 698147256Sbrooks sc->bfe_enaddr[3] = eeprom[80]; 699147256Sbrooks sc->bfe_enaddr[4] = eeprom[83]; 700147256Sbrooks sc->bfe_enaddr[5] = eeprom[82]; 701119917Swpaul 702119917Swpaul sc->bfe_phyaddr = eeprom[90] & 0x1f; 703119917Swpaul sc->bfe_mdc_port = (eeprom[90] >> 14) & 0x1; 704119917Swpaul 705133282Sdes sc->bfe_core_unit = 0; 706119917Swpaul sc->bfe_dma_offset = BFE_PCI_DMA; 707119917Swpaul} 708119917Swpaul 709119917Swpaulstatic void 710119917Swpaulbfe_pci_setup(struct bfe_softc *sc, u_int32_t cores) 711119917Swpaul{ 712119917Swpaul u_int32_t bar_orig, pci_rev, val; 713119917Swpaul 714119917Swpaul bar_orig = pci_read_config(sc->bfe_dev, BFE_BAR0_WIN, 4); 715119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, BFE_REG_PCI, 4); 716119917Swpaul pci_rev = CSR_READ_4(sc, BFE_SBIDHIGH) & BFE_RC_MASK; 717119917Swpaul 718119917Swpaul val = CSR_READ_4(sc, BFE_SBINTVEC); 719119917Swpaul val |= cores; 720119917Swpaul CSR_WRITE_4(sc, BFE_SBINTVEC, val); 721119917Swpaul 722119917Swpaul val = CSR_READ_4(sc, BFE_SSB_PCI_TRANS_2); 723119917Swpaul val |= BFE_SSB_PCI_PREF | BFE_SSB_PCI_BURST; 724119917Swpaul CSR_WRITE_4(sc, BFE_SSB_PCI_TRANS_2, val); 725119917Swpaul 726119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, bar_orig, 4); 727119917Swpaul} 728119917Swpaul 729133282Sdesstatic void 730119917Swpaulbfe_clear_stats(struct bfe_softc *sc) 731119917Swpaul{ 732119917Swpaul u_long reg; 733119917Swpaul 734136804Smtm BFE_LOCK_ASSERT(sc); 735119917Swpaul 736119917Swpaul CSR_WRITE_4(sc, BFE_MIB_CTRL, BFE_MIB_CLR_ON_READ); 737119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) 738119917Swpaul CSR_READ_4(sc, reg); 739119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) 740119917Swpaul CSR_READ_4(sc, reg); 741119917Swpaul} 742119917Swpaul 743133282Sdesstatic int 744119917Swpaulbfe_resetphy(struct bfe_softc *sc) 745119917Swpaul{ 746119917Swpaul u_int32_t val; 747119917Swpaul 748119917Swpaul bfe_writephy(sc, 0, BMCR_RESET); 749119917Swpaul DELAY(100); 750119917Swpaul bfe_readphy(sc, 0, &val); 751119917Swpaul if (val & BMCR_RESET) { 752119917Swpaul printf("bfe%d: PHY Reset would not complete.\n", sc->bfe_unit); 753133282Sdes return (ENXIO); 754119917Swpaul } 755133282Sdes return (0); 756119917Swpaul} 757119917Swpaul 758119917Swpaulstatic void 759119917Swpaulbfe_chip_halt(struct bfe_softc *sc) 760119917Swpaul{ 761136804Smtm BFE_LOCK_ASSERT(sc); 762119917Swpaul /* disable interrupts - not that it actually does..*/ 763119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, 0); 764119917Swpaul CSR_READ_4(sc, BFE_IMASK); 765119917Swpaul 766119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 767119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 200, 1); 768119917Swpaul 769119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 770119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 771119917Swpaul DELAY(10); 772119917Swpaul} 773119917Swpaul 774119917Swpaulstatic void 775119917Swpaulbfe_chip_reset(struct bfe_softc *sc) 776119917Swpaul{ 777133282Sdes u_int32_t val; 778119917Swpaul 779136804Smtm BFE_LOCK_ASSERT(sc); 780119917Swpaul 781119917Swpaul /* Set the interrupt vector for the enet core */ 782119917Swpaul bfe_pci_setup(sc, BFE_INTVEC_ENET0); 783119917Swpaul 784119917Swpaul /* is core up? */ 785126470Sjulian val = CSR_READ_4(sc, BFE_SBTMSLOW) & 786126470Sjulian (BFE_RESET | BFE_REJECT | BFE_CLOCK); 787119917Swpaul if (val == BFE_CLOCK) { 788119917Swpaul /* It is, so shut it down */ 789119917Swpaul CSR_WRITE_4(sc, BFE_RCV_LAZY, 0); 790119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 791119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 100, 1); 792119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 793119917Swpaul sc->bfe_tx_cnt = sc->bfe_tx_prod = sc->bfe_tx_cons = 0; 794133282Sdes if (CSR_READ_4(sc, BFE_DMARX_STAT) & BFE_STAT_EMASK) 795126470Sjulian bfe_wait_bit(sc, BFE_DMARX_STAT, BFE_STAT_SIDLE, 796126470Sjulian 100, 0); 797119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 798119917Swpaul sc->bfe_rx_prod = sc->bfe_rx_cons = 0; 799119917Swpaul } 800119917Swpaul 801119917Swpaul bfe_core_reset(sc); 802119917Swpaul bfe_clear_stats(sc); 803119917Swpaul 804119917Swpaul /* 805119917Swpaul * We want the phy registers to be accessible even when 806119917Swpaul * the driver is "downed" so initialize MDC preamble, frequency, 807119917Swpaul * and whether internal or external phy here. 808119917Swpaul */ 809119917Swpaul 810119917Swpaul /* 4402 has 62.5Mhz SB clock and internal phy */ 811119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_CTRL, 0x8d); 812119917Swpaul 813119917Swpaul /* Internal or external PHY? */ 814119917Swpaul val = CSR_READ_4(sc, BFE_DEVCTRL); 815133282Sdes if(!(val & BFE_IPP)) 816119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_EPSEL); 817119917Swpaul else if(CSR_READ_4(sc, BFE_DEVCTRL) & BFE_EPR) { 818119917Swpaul BFE_AND(sc, BFE_DEVCTRL, ~BFE_EPR); 819119917Swpaul DELAY(100); 820119917Swpaul } 821119917Swpaul 822133282Sdes /* Enable CRC32 generation and set proper LED modes */ 823133282Sdes BFE_OR(sc, BFE_MAC_CTRL, BFE_CTRL_CRC32_ENAB | BFE_CTRL_LED); 824129602Sdmlb 825133282Sdes /* Reset or clear powerdown control bit */ 826133282Sdes BFE_AND(sc, BFE_MAC_CTRL, ~BFE_CTRL_PDOWN); 827129602Sdmlb 828133282Sdes CSR_WRITE_4(sc, BFE_RCV_LAZY, ((1 << BFE_LAZY_FC_SHIFT) & 829119917Swpaul BFE_LAZY_FC_MASK)); 830119917Swpaul 831133282Sdes /* 832126470Sjulian * We don't want lazy interrupts, so just send them at 833133282Sdes * the end of a frame, please 834119917Swpaul */ 835119917Swpaul BFE_OR(sc, BFE_RCV_LAZY, 0); 836119917Swpaul 837119917Swpaul /* Set max lengths, accounting for VLAN tags */ 838119917Swpaul CSR_WRITE_4(sc, BFE_RXMAXLEN, ETHER_MAX_LEN+32); 839119917Swpaul CSR_WRITE_4(sc, BFE_TXMAXLEN, ETHER_MAX_LEN+32); 840119917Swpaul 841119917Swpaul /* Set watermark XXX - magic */ 842119917Swpaul CSR_WRITE_4(sc, BFE_TX_WMARK, 56); 843119917Swpaul 844133282Sdes /* 845126470Sjulian * Initialise DMA channels 846133282Sdes * - not forgetting dma addresses need to be added to BFE_PCI_DMA 847119917Swpaul */ 848119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, BFE_TX_CTRL_ENABLE); 849119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_ADDR, sc->bfe_tx_dma + BFE_PCI_DMA); 850119917Swpaul 851133282Sdes CSR_WRITE_4(sc, BFE_DMARX_CTRL, (BFE_RX_OFFSET << BFE_RX_CTRL_ROSHIFT) | 852119917Swpaul BFE_RX_CTRL_ENABLE); 853119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_ADDR, sc->bfe_rx_dma + BFE_PCI_DMA); 854119917Swpaul 855119917Swpaul bfe_resetphy(sc); 856119917Swpaul bfe_setupphy(sc); 857119917Swpaul} 858119917Swpaul 859119917Swpaulstatic void 860119917Swpaulbfe_core_disable(struct bfe_softc *sc) 861119917Swpaul{ 862119917Swpaul if((CSR_READ_4(sc, BFE_SBTMSLOW)) & BFE_RESET) 863119917Swpaul return; 864119917Swpaul 865133282Sdes /* 866126470Sjulian * Set reject, wait for it set, then wait for the core to stop 867126470Sjulian * being busy, then set reset and reject and enable the clocks. 868119917Swpaul */ 869119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_CLOCK)); 870119917Swpaul bfe_wait_bit(sc, BFE_SBTMSLOW, BFE_REJECT, 1000, 0); 871119917Swpaul bfe_wait_bit(sc, BFE_SBTMSHIGH, BFE_BUSY, 1000, 1); 872119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_FGC | BFE_CLOCK | BFE_REJECT | 873119917Swpaul BFE_RESET)); 874119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 875119917Swpaul DELAY(10); 876119917Swpaul /* Leave reset and reject set */ 877119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_RESET)); 878119917Swpaul DELAY(10); 879119917Swpaul} 880119917Swpaul 881119917Swpaulstatic void 882119917Swpaulbfe_core_reset(struct bfe_softc *sc) 883119917Swpaul{ 884119917Swpaul u_int32_t val; 885119917Swpaul 886119917Swpaul /* Disable the core */ 887119917Swpaul bfe_core_disable(sc); 888119917Swpaul 889119917Swpaul /* and bring it back up */ 890119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_RESET | BFE_CLOCK | BFE_FGC)); 891119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 892119917Swpaul DELAY(10); 893119917Swpaul 894119917Swpaul /* Chip bug, clear SERR, IB and TO if they are set. */ 895119917Swpaul if (CSR_READ_4(sc, BFE_SBTMSHIGH) & BFE_SERR) 896119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSHIGH, 0); 897119917Swpaul val = CSR_READ_4(sc, BFE_SBIMSTATE); 898119917Swpaul if (val & (BFE_IBE | BFE_TO)) 899119917Swpaul CSR_WRITE_4(sc, BFE_SBIMSTATE, val & ~(BFE_IBE | BFE_TO)); 900119917Swpaul 901119917Swpaul /* Clear reset and allow it to move through the core */ 902119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_CLOCK | BFE_FGC)); 903119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 904119917Swpaul DELAY(10); 905119917Swpaul 906119917Swpaul /* Leave the clock set */ 907119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, BFE_CLOCK); 908119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 909119917Swpaul DELAY(10); 910119917Swpaul} 911119917Swpaul 912133282Sdesstatic void 913119917Swpaulbfe_cam_write(struct bfe_softc *sc, u_char *data, int index) 914119917Swpaul{ 915119917Swpaul u_int32_t val; 916119917Swpaul 917119917Swpaul val = ((u_int32_t) data[2]) << 24; 918119917Swpaul val |= ((u_int32_t) data[3]) << 16; 919119917Swpaul val |= ((u_int32_t) data[4]) << 8; 920119917Swpaul val |= ((u_int32_t) data[5]); 921119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_LO, val); 922119917Swpaul val = (BFE_CAM_HI_VALID | 923119917Swpaul (((u_int32_t) data[0]) << 8) | 924119917Swpaul (((u_int32_t) data[1]))); 925119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_HI, val); 926119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, (BFE_CAM_WRITE | 927129602Sdmlb ((u_int32_t) index << BFE_CAM_INDEX_SHIFT))); 928119917Swpaul bfe_wait_bit(sc, BFE_CAM_CTRL, BFE_CAM_BUSY, 10000, 1); 929119917Swpaul} 930119917Swpaul 931133282Sdesstatic void 932119917Swpaulbfe_set_rx_mode(struct bfe_softc *sc) 933119917Swpaul{ 934147256Sbrooks struct ifnet *ifp = sc->bfe_ifp; 935119917Swpaul struct ifmultiaddr *ifma; 936119917Swpaul u_int32_t val; 937119917Swpaul int i = 0; 938119917Swpaul 939119917Swpaul val = CSR_READ_4(sc, BFE_RXCONF); 940119917Swpaul 941119917Swpaul if (ifp->if_flags & IFF_PROMISC) 942119917Swpaul val |= BFE_RXCONF_PROMISC; 943119917Swpaul else 944119917Swpaul val &= ~BFE_RXCONF_PROMISC; 945119917Swpaul 946119917Swpaul if (ifp->if_flags & IFF_BROADCAST) 947119917Swpaul val &= ~BFE_RXCONF_DBCAST; 948119917Swpaul else 949119917Swpaul val |= BFE_RXCONF_DBCAST; 950119917Swpaul 951119917Swpaul 952119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, 0); 953152315Sru bfe_cam_write(sc, IF_LLADDR(sc->bfe_ifp), i++); 954119917Swpaul 955119917Swpaul if (ifp->if_flags & IFF_ALLMULTI) 956119917Swpaul val |= BFE_RXCONF_ALLMULTI; 957119917Swpaul else { 958119917Swpaul val &= ~BFE_RXCONF_ALLMULTI; 959148654Srwatson IF_ADDR_LOCK(ifp); 960119917Swpaul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 961119917Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 962119917Swpaul continue; 963126470Sjulian bfe_cam_write(sc, 964126470Sjulian LLADDR((struct sockaddr_dl *)ifma->ifma_addr), i++); 965119917Swpaul } 966148654Srwatson IF_ADDR_UNLOCK(ifp); 967119917Swpaul } 968119917Swpaul 969119917Swpaul CSR_WRITE_4(sc, BFE_RXCONF, val); 970119917Swpaul BFE_OR(sc, BFE_CAM_CTRL, BFE_CAM_ENABLE); 971119917Swpaul} 972119917Swpaul 973119917Swpaulstatic void 974119917Swpaulbfe_dma_map(void *arg, bus_dma_segment_t *segs, int nseg, int error) 975119917Swpaul{ 976119917Swpaul u_int32_t *ptr; 977119917Swpaul 978119917Swpaul ptr = arg; 979119917Swpaul *ptr = segs->ds_addr; 980119917Swpaul} 981119917Swpaul 982119917Swpaulstatic void 983119917Swpaulbfe_dma_map_desc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 984119917Swpaul{ 985119917Swpaul struct bfe_desc *d; 986119917Swpaul 987119917Swpaul d = arg; 988119917Swpaul /* The chip needs all addresses to be added to BFE_PCI_DMA */ 989119917Swpaul d->bfe_addr = segs->ds_addr + BFE_PCI_DMA; 990119917Swpaul} 991119917Swpaul 992119917Swpaulstatic void 993119917Swpaulbfe_release_resources(struct bfe_softc *sc) 994119917Swpaul{ 995119917Swpaul device_t dev; 996119917Swpaul int i; 997119917Swpaul 998119917Swpaul dev = sc->bfe_dev; 999119917Swpaul 1000119917Swpaul if (sc->bfe_vpd_prodname != NULL) 1001119917Swpaul free(sc->bfe_vpd_prodname, M_DEVBUF); 1002119917Swpaul 1003119917Swpaul if (sc->bfe_vpd_readonly != NULL) 1004119917Swpaul free(sc->bfe_vpd_readonly, M_DEVBUF); 1005119917Swpaul 1006119917Swpaul if (sc->bfe_intrhand != NULL) 1007119917Swpaul bus_teardown_intr(dev, sc->bfe_irq, sc->bfe_intrhand); 1008119917Swpaul 1009119917Swpaul if (sc->bfe_irq != NULL) 1010119917Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->bfe_irq); 1011119917Swpaul 1012119917Swpaul if (sc->bfe_res != NULL) 1013119917Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 0x10, sc->bfe_res); 1014119917Swpaul 1015150215Sru if (sc->bfe_ifp != NULL) 1016150215Sru if_free(sc->bfe_ifp); 1017150215Sru 1018119917Swpaul if(sc->bfe_tx_tag != NULL) { 1019119917Swpaul bus_dmamap_unload(sc->bfe_tx_tag, sc->bfe_tx_map); 1020126470Sjulian bus_dmamem_free(sc->bfe_tx_tag, sc->bfe_tx_list, 1021126470Sjulian sc->bfe_tx_map); 1022119917Swpaul bus_dma_tag_destroy(sc->bfe_tx_tag); 1023119917Swpaul sc->bfe_tx_tag = NULL; 1024119917Swpaul } 1025119917Swpaul 1026119917Swpaul if(sc->bfe_rx_tag != NULL) { 1027119917Swpaul bus_dmamap_unload(sc->bfe_rx_tag, sc->bfe_rx_map); 1028126470Sjulian bus_dmamem_free(sc->bfe_rx_tag, sc->bfe_rx_list, 1029126470Sjulian sc->bfe_rx_map); 1030119917Swpaul bus_dma_tag_destroy(sc->bfe_rx_tag); 1031119917Swpaul sc->bfe_rx_tag = NULL; 1032119917Swpaul } 1033119917Swpaul 1034119917Swpaul if(sc->bfe_tag != NULL) { 1035119917Swpaul for(i = 0; i < BFE_TX_LIST_CNT; i++) { 1036126470Sjulian bus_dmamap_destroy(sc->bfe_tag, 1037126470Sjulian sc->bfe_tx_ring[i].bfe_map); 1038119917Swpaul } 1039143750Savatar for(i = 0; i < BFE_RX_LIST_CNT; i++) { 1040143750Savatar bus_dmamap_destroy(sc->bfe_tag, 1041143750Savatar sc->bfe_rx_ring[i].bfe_map); 1042143750Savatar } 1043119917Swpaul bus_dma_tag_destroy(sc->bfe_tag); 1044126470Sjulian sc->bfe_tag = NULL; 1045119917Swpaul } 1046119917Swpaul 1047119917Swpaul if(sc->bfe_parent_tag != NULL) 1048119917Swpaul bus_dma_tag_destroy(sc->bfe_parent_tag); 1049119917Swpaul 1050119917Swpaul return; 1051119917Swpaul} 1052119917Swpaul 1053119917Swpaulstatic void 1054119917Swpaulbfe_read_eeprom(struct bfe_softc *sc, u_int8_t *data) 1055119917Swpaul{ 1056119917Swpaul long i; 1057119917Swpaul u_int16_t *ptr = (u_int16_t *)data; 1058119917Swpaul 1059119917Swpaul for(i = 0; i < 128; i += 2) 1060119917Swpaul ptr[i/2] = CSR_READ_4(sc, 4096 + i); 1061119917Swpaul} 1062119917Swpaul 1063119917Swpaulstatic int 1064133282Sdesbfe_wait_bit(struct bfe_softc *sc, u_int32_t reg, u_int32_t bit, 1065119917Swpaul u_long timeout, const int clear) 1066119917Swpaul{ 1067119917Swpaul u_long i; 1068119917Swpaul 1069119917Swpaul for (i = 0; i < timeout; i++) { 1070119917Swpaul u_int32_t val = CSR_READ_4(sc, reg); 1071119917Swpaul 1072119917Swpaul if (clear && !(val & bit)) 1073119917Swpaul break; 1074119917Swpaul if (!clear && (val & bit)) 1075119917Swpaul break; 1076119917Swpaul DELAY(10); 1077119917Swpaul } 1078119917Swpaul if (i == timeout) { 1079119917Swpaul printf("bfe%d: BUG! Timeout waiting for bit %08x of register " 1080133282Sdes "%x to %s.\n", sc->bfe_unit, bit, reg, 1081119917Swpaul (clear ? "clear" : "set")); 1082133282Sdes return (-1); 1083119917Swpaul } 1084133282Sdes return (0); 1085119917Swpaul} 1086119917Swpaul 1087119917Swpaulstatic int 1088119917Swpaulbfe_readphy(struct bfe_softc *sc, u_int32_t reg, u_int32_t *val) 1089119917Swpaul{ 1090133282Sdes int err; 1091119917Swpaul 1092119917Swpaul /* Clear MII ISR */ 1093119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1094119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1095119917Swpaul (BFE_MDIO_OP_READ << BFE_MDIO_OP_SHIFT) | 1096119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1097119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1098119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT))); 1099119917Swpaul err = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1100119917Swpaul *val = CSR_READ_4(sc, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA; 1101119917Swpaul 1102133282Sdes return (err); 1103119917Swpaul} 1104119917Swpaul 1105119917Swpaulstatic int 1106119917Swpaulbfe_writephy(struct bfe_softc *sc, u_int32_t reg, u_int32_t val) 1107119917Swpaul{ 1108119917Swpaul int status; 1109119917Swpaul 1110119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1111119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1112119917Swpaul (BFE_MDIO_OP_WRITE << BFE_MDIO_OP_SHIFT) | 1113119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1114119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1115119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT) | 1116119917Swpaul (val & BFE_MDIO_DATA_DATA))); 1117119917Swpaul status = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1118119917Swpaul 1119133282Sdes return (status); 1120119917Swpaul} 1121119917Swpaul 1122133282Sdes/* 1123119917Swpaul * XXX - I think this is handled by the PHY driver, but it can't hurt to do it 1124119917Swpaul * twice 1125119917Swpaul */ 1126119917Swpaulstatic int 1127119917Swpaulbfe_setupphy(struct bfe_softc *sc) 1128119917Swpaul{ 1129119917Swpaul u_int32_t val; 1130119917Swpaul 1131119917Swpaul /* Enable activity LED */ 1132119917Swpaul bfe_readphy(sc, 26, &val); 1133133282Sdes bfe_writephy(sc, 26, val & 0x7fff); 1134119917Swpaul bfe_readphy(sc, 26, &val); 1135119917Swpaul 1136119917Swpaul /* Enable traffic meter LED mode */ 1137119917Swpaul bfe_readphy(sc, 27, &val); 1138119917Swpaul bfe_writephy(sc, 27, val | (1 << 6)); 1139119917Swpaul 1140133282Sdes return (0); 1141119917Swpaul} 1142119917Swpaul 1143133282Sdesstatic void 1144119917Swpaulbfe_stats_update(struct bfe_softc *sc) 1145119917Swpaul{ 1146119917Swpaul u_long reg; 1147119917Swpaul u_int32_t *val; 1148119917Swpaul 1149119917Swpaul val = &sc->bfe_hwstats.tx_good_octets; 1150119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) { 1151119917Swpaul *val++ += CSR_READ_4(sc, reg); 1152119917Swpaul } 1153119917Swpaul val = &sc->bfe_hwstats.rx_good_octets; 1154119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) { 1155119917Swpaul *val++ += CSR_READ_4(sc, reg); 1156119917Swpaul } 1157119917Swpaul} 1158119917Swpaul 1159119917Swpaulstatic void 1160119917Swpaulbfe_txeof(struct bfe_softc *sc) 1161119917Swpaul{ 1162119917Swpaul struct ifnet *ifp; 1163119917Swpaul int i, chipidx; 1164119917Swpaul 1165136804Smtm BFE_LOCK_ASSERT(sc); 1166119917Swpaul 1167147256Sbrooks ifp = sc->bfe_ifp; 1168119917Swpaul 1169119917Swpaul chipidx = CSR_READ_4(sc, BFE_DMATX_STAT) & BFE_STAT_CDMASK; 1170119917Swpaul chipidx /= sizeof(struct bfe_desc); 1171119917Swpaul 1172126470Sjulian i = sc->bfe_tx_cons; 1173119917Swpaul /* Go through the mbufs and free those that have been transmitted */ 1174126470Sjulian while(i != chipidx) { 1175119917Swpaul struct bfe_data *r = &sc->bfe_tx_ring[i]; 1176119917Swpaul if(r->bfe_mbuf != NULL) { 1177119917Swpaul ifp->if_opackets++; 1178119917Swpaul m_freem(r->bfe_mbuf); 1179119917Swpaul r->bfe_mbuf = NULL; 1180119917Swpaul } 1181158285Ssilby bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1182126470Sjulian sc->bfe_tx_cnt--; 1183126470Sjulian BFE_INC(i, BFE_TX_LIST_CNT); 1184119917Swpaul } 1185119917Swpaul 1186119917Swpaul if(i != sc->bfe_tx_cons) { 1187119917Swpaul /* we freed up some mbufs */ 1188119917Swpaul sc->bfe_tx_cons = i; 1189148887Srwatson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1190119917Swpaul } 1191175787Syongari 1192175787Syongari if (sc->bfe_tx_cnt == 0) 1193175787Syongari sc->bfe_watchdog_timer = 0; 1194119917Swpaul} 1195119917Swpaul 1196119917Swpaul/* Pass a received packet up the stack */ 1197119917Swpaulstatic void 1198119917Swpaulbfe_rxeof(struct bfe_softc *sc) 1199119917Swpaul{ 1200119917Swpaul struct mbuf *m; 1201119917Swpaul struct ifnet *ifp; 1202119917Swpaul struct bfe_rxheader *rxheader; 1203119917Swpaul struct bfe_data *r; 1204119917Swpaul int cons; 1205119917Swpaul u_int32_t status, current, len, flags; 1206119917Swpaul 1207136804Smtm BFE_LOCK_ASSERT(sc); 1208119917Swpaul cons = sc->bfe_rx_cons; 1209119917Swpaul status = CSR_READ_4(sc, BFE_DMARX_STAT); 1210119917Swpaul current = (status & BFE_STAT_CDMASK) / sizeof(struct bfe_desc); 1211119917Swpaul 1212147256Sbrooks ifp = sc->bfe_ifp; 1213119917Swpaul 1214119917Swpaul while(current != cons) { 1215119917Swpaul r = &sc->bfe_rx_ring[cons]; 1216119917Swpaul m = r->bfe_mbuf; 1217119917Swpaul rxheader = mtod(m, struct bfe_rxheader*); 1218158102Ssilby bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_POSTREAD); 1219119917Swpaul len = rxheader->len; 1220119917Swpaul r->bfe_mbuf = NULL; 1221119917Swpaul 1222119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1223119917Swpaul flags = rxheader->flags; 1224119917Swpaul 1225119917Swpaul len -= ETHER_CRC_LEN; 1226119917Swpaul 1227119917Swpaul /* flag an error and try again */ 1228119917Swpaul if ((len > ETHER_MAX_LEN+32) || (flags & BFE_RX_FLAG_ERRORS)) { 1229119917Swpaul ifp->if_ierrors++; 1230119917Swpaul if (flags & BFE_RX_FLAG_SERR) 1231119917Swpaul ifp->if_collisions++; 1232119917Swpaul bfe_list_newbuf(sc, cons, m); 1233126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1234119917Swpaul continue; 1235119917Swpaul } 1236119917Swpaul 1237119917Swpaul /* Go past the rx header */ 1238119917Swpaul if (bfe_list_newbuf(sc, cons, NULL) == 0) { 1239119917Swpaul m_adj(m, BFE_RX_OFFSET); 1240119917Swpaul m->m_len = m->m_pkthdr.len = len; 1241119917Swpaul } else { 1242119917Swpaul bfe_list_newbuf(sc, cons, m); 1243119917Swpaul ifp->if_ierrors++; 1244126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1245119917Swpaul continue; 1246119917Swpaul } 1247119917Swpaul 1248119917Swpaul ifp->if_ipackets++; 1249119917Swpaul m->m_pkthdr.rcvif = ifp; 1250122689Ssam BFE_UNLOCK(sc); 1251119917Swpaul (*ifp->if_input)(ifp, m); 1252122689Ssam BFE_LOCK(sc); 1253119917Swpaul 1254126470Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1255119917Swpaul } 1256119917Swpaul sc->bfe_rx_cons = cons; 1257119917Swpaul} 1258119917Swpaul 1259119917Swpaulstatic void 1260119917Swpaulbfe_intr(void *xsc) 1261119917Swpaul{ 1262119917Swpaul struct bfe_softc *sc = xsc; 1263119917Swpaul struct ifnet *ifp; 1264119917Swpaul u_int32_t istat, imask, flag; 1265119917Swpaul 1266147256Sbrooks ifp = sc->bfe_ifp; 1267119917Swpaul 1268119917Swpaul BFE_LOCK(sc); 1269119917Swpaul 1270119917Swpaul istat = CSR_READ_4(sc, BFE_ISTAT); 1271119917Swpaul imask = CSR_READ_4(sc, BFE_IMASK); 1272119917Swpaul 1273133282Sdes /* 1274119917Swpaul * Defer unsolicited interrupts - This is necessary because setting the 1275119917Swpaul * chips interrupt mask register to 0 doesn't actually stop the 1276119917Swpaul * interrupts 1277119917Swpaul */ 1278119917Swpaul istat &= imask; 1279119917Swpaul CSR_WRITE_4(sc, BFE_ISTAT, istat); 1280119917Swpaul CSR_READ_4(sc, BFE_ISTAT); 1281119917Swpaul 1282119917Swpaul /* not expecting this interrupt, disregard it */ 1283119917Swpaul if(istat == 0) { 1284119917Swpaul BFE_UNLOCK(sc); 1285119917Swpaul return; 1286119917Swpaul } 1287119917Swpaul 1288119917Swpaul if(istat & BFE_ISTAT_ERRORS) { 1289159013Ssilby 1290159013Ssilby if (istat & BFE_ISTAT_DSCE) { 1291159013Ssilby printf("if_bfe Descriptor Error\n"); 1292159013Ssilby bfe_stop(sc); 1293159013Ssilby BFE_UNLOCK(sc); 1294159013Ssilby return; 1295159013Ssilby } 1296159013Ssilby 1297159013Ssilby if (istat & BFE_ISTAT_DPE) { 1298159013Ssilby printf("if_bfe Descriptor Protocol Error\n"); 1299159013Ssilby bfe_stop(sc); 1300159013Ssilby BFE_UNLOCK(sc); 1301159013Ssilby return; 1302159013Ssilby } 1303159013Ssilby 1304119917Swpaul flag = CSR_READ_4(sc, BFE_DMATX_STAT); 1305119917Swpaul if(flag & BFE_STAT_EMASK) 1306119917Swpaul ifp->if_oerrors++; 1307119917Swpaul 1308119917Swpaul flag = CSR_READ_4(sc, BFE_DMARX_STAT); 1309119917Swpaul if(flag & BFE_RX_FLAG_ERRORS) 1310119917Swpaul ifp->if_ierrors++; 1311119917Swpaul 1312148887Srwatson ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1313136804Smtm bfe_init_locked(sc); 1314119917Swpaul } 1315119917Swpaul 1316119917Swpaul /* A packet was received */ 1317119917Swpaul if(istat & BFE_ISTAT_RX) 1318119917Swpaul bfe_rxeof(sc); 1319119917Swpaul 1320119917Swpaul /* A packet was sent */ 1321119917Swpaul if(istat & BFE_ISTAT_TX) 1322119917Swpaul bfe_txeof(sc); 1323119917Swpaul 1324133282Sdes /* We have packets pending, fire them out */ 1325148887Srwatson if (ifp->if_drv_flags & IFF_DRV_RUNNING && 1326148887Srwatson !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1327136804Smtm bfe_start_locked(ifp); 1328119917Swpaul 1329119917Swpaul BFE_UNLOCK(sc); 1330119917Swpaul} 1331119917Swpaul 1332119917Swpaulstatic int 1333158285Ssilbybfe_encap(struct bfe_softc *sc, struct mbuf **m_head, u_int32_t *txidx) 1334119917Swpaul{ 1335119917Swpaul struct bfe_desc *d = NULL; 1336119917Swpaul struct bfe_data *r = NULL; 1337133282Sdes struct mbuf *m; 1338126470Sjulian u_int32_t frag, cur, cnt = 0; 1339119917Swpaul int chainlen = 0; 1340158285Ssilby int error; 1341119917Swpaul 1342119917Swpaul if(BFE_TX_LIST_CNT - sc->bfe_tx_cnt < 2) 1343133282Sdes return (ENOBUFS); 1344119917Swpaul 1345119917Swpaul /* 1346119917Swpaul * Count the number of frags in this chain to see if 1347119917Swpaul * we need to m_defrag. Since the descriptor list is shared 1348119917Swpaul * by all packets, we'll m_defrag long chains so that they 1349119917Swpaul * do not use up the entire list, even if they would fit. 1350119917Swpaul */ 1351158285Ssilby for(m = *m_head; m != NULL; m = m->m_next) 1352119917Swpaul chainlen++; 1353119917Swpaul 1354119917Swpaul 1355133282Sdes if ((chainlen > BFE_TX_LIST_CNT / 4) || 1356119917Swpaul ((BFE_TX_LIST_CNT - (chainlen + sc->bfe_tx_cnt)) < 2)) { 1357158285Ssilby m = m_defrag(*m_head, M_DONTWAIT); 1358133282Sdes if (m == NULL) 1359133282Sdes return (ENOBUFS); 1360158285Ssilby *m_head = m; 1361119917Swpaul } 1362119917Swpaul 1363119917Swpaul /* 1364119917Swpaul * Start packing the mbufs in this chain into 1365119917Swpaul * the fragment pointers. Stop when we run out 1366119917Swpaul * of fragments or hit the end of the mbuf chain. 1367119917Swpaul */ 1368119917Swpaul cur = frag = *txidx; 1369119917Swpaul cnt = 0; 1370119917Swpaul 1371158285Ssilby for(m = *m_head; m != NULL; m = m->m_next) { 1372119917Swpaul if(m->m_len != 0) { 1373119917Swpaul if((BFE_TX_LIST_CNT - (sc->bfe_tx_cnt + cnt)) < 2) 1374133282Sdes return (ENOBUFS); 1375119917Swpaul 1376119917Swpaul d = &sc->bfe_tx_list[cur]; 1377119917Swpaul r = &sc->bfe_tx_ring[cur]; 1378119917Swpaul d->bfe_ctrl = BFE_DESC_LEN & m->m_len; 1379119917Swpaul /* always intterupt on completion */ 1380119917Swpaul d->bfe_ctrl |= BFE_DESC_IOC; 1381119917Swpaul if(cnt == 0) 1382119917Swpaul /* Set start of frame */ 1383119917Swpaul d->bfe_ctrl |= BFE_DESC_SOF; 1384119917Swpaul if(cur == BFE_TX_LIST_CNT - 1) 1385126470Sjulian /* 1386126470Sjulian * Tell the chip to wrap to the start of 1387126470Sjulian * the descriptor list 1388126470Sjulian */ 1389119917Swpaul d->bfe_ctrl |= BFE_DESC_EOT; 1390119917Swpaul 1391158285Ssilby error = bus_dmamap_load(sc->bfe_tag, 1392133282Sdes r->bfe_map, mtod(m, void*), m->m_len, 1393158285Ssilby bfe_dma_map_desc, d, BUS_DMA_NOWAIT); 1394158285Ssilby if (error) 1395158285Ssilby return (ENOBUFS); 1396126470Sjulian bus_dmamap_sync(sc->bfe_tag, r->bfe_map, 1397158102Ssilby BUS_DMASYNC_PREWRITE); 1398119917Swpaul 1399119917Swpaul frag = cur; 1400126470Sjulian BFE_INC(cur, BFE_TX_LIST_CNT); 1401119917Swpaul cnt++; 1402119917Swpaul } 1403119917Swpaul } 1404119917Swpaul 1405119917Swpaul if (m != NULL) 1406133282Sdes return (ENOBUFS); 1407119917Swpaul 1408119917Swpaul sc->bfe_tx_list[frag].bfe_ctrl |= BFE_DESC_EOF; 1409158285Ssilby sc->bfe_tx_ring[frag].bfe_mbuf = *m_head; 1410158102Ssilby bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREWRITE); 1411119917Swpaul 1412119917Swpaul *txidx = cur; 1413119917Swpaul sc->bfe_tx_cnt += cnt; 1414119917Swpaul return (0); 1415119917Swpaul} 1416119917Swpaul 1417119917Swpaul/* 1418136804Smtm * Set up to transmit a packet. 1419119917Swpaul */ 1420119917Swpaulstatic void 1421119917Swpaulbfe_start(struct ifnet *ifp) 1422119917Swpaul{ 1423136804Smtm BFE_LOCK((struct bfe_softc *)ifp->if_softc); 1424136804Smtm bfe_start_locked(ifp); 1425136804Smtm BFE_UNLOCK((struct bfe_softc *)ifp->if_softc); 1426136804Smtm} 1427136804Smtm 1428136804Smtm/* 1429136804Smtm * Set up to transmit a packet. The softc is already locked. 1430136804Smtm */ 1431136804Smtmstatic void 1432136804Smtmbfe_start_locked(struct ifnet *ifp) 1433136804Smtm{ 1434119917Swpaul struct bfe_softc *sc; 1435119917Swpaul struct mbuf *m_head = NULL; 1436136269Smlaier int idx, queued = 0; 1437119917Swpaul 1438119917Swpaul sc = ifp->if_softc; 1439119917Swpaul idx = sc->bfe_tx_prod; 1440119917Swpaul 1441136804Smtm BFE_LOCK_ASSERT(sc); 1442119917Swpaul 1443133282Sdes /* 1444126470Sjulian * Not much point trying to send if the link is down 1445126470Sjulian * or we have nothing to send. 1446119917Swpaul */ 1447136804Smtm if (!sc->bfe_link && ifp->if_snd.ifq_len < 10) 1448119917Swpaul return; 1449119917Swpaul 1450175787Syongari if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1451175787Syongari IFF_DRV_RUNNING) 1452119917Swpaul return; 1453119917Swpaul 1454119917Swpaul while(sc->bfe_tx_ring[idx].bfe_mbuf == NULL) { 1455131455Smlaier IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 1456119917Swpaul if(m_head == NULL) 1457119917Swpaul break; 1458119917Swpaul 1459133282Sdes /* 1460126470Sjulian * Pack the data into the tx ring. If we dont have 1461126470Sjulian * enough room, let the chip drain the ring. 1462119917Swpaul */ 1463158285Ssilby if(bfe_encap(sc, &m_head, &idx)) { 1464131455Smlaier IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 1465148887Srwatson ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1466119917Swpaul break; 1467119917Swpaul } 1468119917Swpaul 1469136269Smlaier queued++; 1470136269Smlaier 1471119917Swpaul /* 1472119917Swpaul * If there's a BPF listener, bounce a copy of this frame 1473119917Swpaul * to him. 1474119917Swpaul */ 1475119917Swpaul BPF_MTAP(ifp, m_head); 1476119917Swpaul } 1477119917Swpaul 1478136269Smlaier if (queued) { 1479136269Smlaier sc->bfe_tx_prod = idx; 1480136269Smlaier /* Transmit - twice due to apparent hardware bug */ 1481136269Smlaier CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1482136269Smlaier CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1483119917Swpaul 1484136269Smlaier /* 1485136269Smlaier * Set a timeout in case the chip goes out to lunch. 1486136269Smlaier */ 1487175787Syongari sc->bfe_watchdog_timer = 5; 1488136269Smlaier } 1489119917Swpaul} 1490119917Swpaul 1491119917Swpaulstatic void 1492119917Swpaulbfe_init(void *xsc) 1493119917Swpaul{ 1494136804Smtm BFE_LOCK((struct bfe_softc *)xsc); 1495136804Smtm bfe_init_locked(xsc); 1496136804Smtm BFE_UNLOCK((struct bfe_softc *)xsc); 1497136804Smtm} 1498136804Smtm 1499136804Smtmstatic void 1500136804Smtmbfe_init_locked(void *xsc) 1501136804Smtm{ 1502119917Swpaul struct bfe_softc *sc = (struct bfe_softc*)xsc; 1503147256Sbrooks struct ifnet *ifp = sc->bfe_ifp; 1504175787Syongari struct mii_data *mii; 1505119917Swpaul 1506136804Smtm BFE_LOCK_ASSERT(sc); 1507119917Swpaul 1508175787Syongari mii = device_get_softc(sc->bfe_miibus); 1509175787Syongari 1510148887Srwatson if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1511119917Swpaul return; 1512119917Swpaul 1513119917Swpaul bfe_stop(sc); 1514119917Swpaul bfe_chip_reset(sc); 1515119917Swpaul 1516119917Swpaul if (bfe_list_rx_init(sc) == ENOBUFS) { 1517126470Sjulian printf("bfe%d: bfe_init: Not enough memory for list buffers\n", 1518126470Sjulian sc->bfe_unit); 1519119917Swpaul bfe_stop(sc); 1520119917Swpaul return; 1521119917Swpaul } 1522119917Swpaul 1523119917Swpaul bfe_set_rx_mode(sc); 1524119917Swpaul 1525119917Swpaul /* Enable the chip and core */ 1526119917Swpaul BFE_OR(sc, BFE_ENET_CTRL, BFE_ENET_ENABLE); 1527119917Swpaul /* Enable interrupts */ 1528119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, BFE_IMASK_DEF); 1529119917Swpaul 1530175787Syongari /* Clear link state and change media. */ 1531175787Syongari sc->bfe_link = 0; 1532175787Syongari mii_mediachg(mii); 1533175787Syongari 1534148887Srwatson ifp->if_drv_flags |= IFF_DRV_RUNNING; 1535148887Srwatson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1536119917Swpaul 1537175787Syongari callout_reset(&sc->bfe_stat_co, hz, bfe_tick, sc); 1538119917Swpaul} 1539119917Swpaul 1540119917Swpaul/* 1541119917Swpaul * Set media options. 1542119917Swpaul */ 1543119917Swpaulstatic int 1544119917Swpaulbfe_ifmedia_upd(struct ifnet *ifp) 1545119917Swpaul{ 1546119917Swpaul struct bfe_softc *sc; 1547119917Swpaul struct mii_data *mii; 1548175787Syongari int error; 1549119917Swpaul 1550119917Swpaul sc = ifp->if_softc; 1551175787Syongari BFE_LOCK(sc); 1552119917Swpaul 1553119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1554119917Swpaul if (mii->mii_instance) { 1555119917Swpaul struct mii_softc *miisc; 1556119917Swpaul for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 1557119917Swpaul miisc = LIST_NEXT(miisc, mii_list)) 1558119917Swpaul mii_phy_reset(miisc); 1559119917Swpaul } 1560175787Syongari error = mii_mediachg(mii); 1561175787Syongari BFE_UNLOCK(sc); 1562119917Swpaul 1563175787Syongari return (error); 1564119917Swpaul} 1565119917Swpaul 1566119917Swpaul/* 1567119917Swpaul * Report current media status. 1568119917Swpaul */ 1569119917Swpaulstatic void 1570119917Swpaulbfe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1571119917Swpaul{ 1572119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1573119917Swpaul struct mii_data *mii; 1574119917Swpaul 1575175787Syongari BFE_LOCK(sc); 1576119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1577119917Swpaul mii_pollstat(mii); 1578119917Swpaul ifmr->ifm_active = mii->mii_media_active; 1579119917Swpaul ifmr->ifm_status = mii->mii_media_status; 1580175787Syongari BFE_UNLOCK(sc); 1581119917Swpaul} 1582119917Swpaul 1583119917Swpaulstatic int 1584119917Swpaulbfe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1585119917Swpaul{ 1586119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1587119917Swpaul struct ifreq *ifr = (struct ifreq *) data; 1588119917Swpaul struct mii_data *mii; 1589119917Swpaul int error = 0; 1590119917Swpaul 1591119917Swpaul switch(command) { 1592119917Swpaul case SIOCSIFFLAGS: 1593136804Smtm BFE_LOCK(sc); 1594119917Swpaul if(ifp->if_flags & IFF_UP) 1595148887Srwatson if(ifp->if_drv_flags & IFF_DRV_RUNNING) 1596119917Swpaul bfe_set_rx_mode(sc); 1597119917Swpaul else 1598136804Smtm bfe_init_locked(sc); 1599148887Srwatson else if(ifp->if_drv_flags & IFF_DRV_RUNNING) 1600119917Swpaul bfe_stop(sc); 1601136804Smtm BFE_UNLOCK(sc); 1602119917Swpaul break; 1603119917Swpaul case SIOCADDMULTI: 1604119917Swpaul case SIOCDELMULTI: 1605136804Smtm BFE_LOCK(sc); 1606148887Srwatson if(ifp->if_drv_flags & IFF_DRV_RUNNING) 1607119917Swpaul bfe_set_rx_mode(sc); 1608136804Smtm BFE_UNLOCK(sc); 1609119917Swpaul break; 1610119917Swpaul case SIOCGIFMEDIA: 1611119917Swpaul case SIOCSIFMEDIA: 1612119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1613126470Sjulian error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, 1614126470Sjulian command); 1615119917Swpaul break; 1616119917Swpaul default: 1617133282Sdes error = ether_ioctl(ifp, command, data); 1618119917Swpaul break; 1619119917Swpaul } 1620119917Swpaul 1621133282Sdes return (error); 1622119917Swpaul} 1623119917Swpaul 1624119917Swpaulstatic void 1625175787Syongaribfe_watchdog(struct bfe_softc *sc) 1626119917Swpaul{ 1627175787Syongari struct ifnet *ifp; 1628119917Swpaul 1629175787Syongari BFE_LOCK_ASSERT(sc); 1630119917Swpaul 1631175787Syongari if (sc->bfe_watchdog_timer == 0 || --sc->bfe_watchdog_timer) 1632175787Syongari return; 1633119917Swpaul 1634175787Syongari ifp = sc->bfe_ifp; 1635175787Syongari 1636119917Swpaul printf("bfe%d: watchdog timeout -- resetting\n", sc->bfe_unit); 1637119917Swpaul 1638175787Syongari ifp->if_oerrors++; 1639148887Srwatson ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1640136804Smtm bfe_init_locked(sc); 1641119917Swpaul 1642175787Syongari if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1643175787Syongari bfe_start_locked(ifp); 1644119917Swpaul} 1645119917Swpaul 1646119917Swpaulstatic void 1647119917Swpaulbfe_tick(void *xsc) 1648119917Swpaul{ 1649119917Swpaul struct bfe_softc *sc = xsc; 1650119917Swpaul struct mii_data *mii; 1651119917Swpaul 1652175787Syongari BFE_LOCK_ASSERT(sc); 1653119917Swpaul 1654119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1655175787Syongari mii_tick(mii); 1656119917Swpaul bfe_stats_update(sc); 1657175787Syongari bfe_watchdog(sc); 1658175787Syongari callout_reset(&sc->bfe_stat_co, hz, bfe_tick, sc); 1659119917Swpaul} 1660119917Swpaul 1661119917Swpaul/* 1662119917Swpaul * Stop the adapter and free any mbufs allocated to the 1663119917Swpaul * RX and TX lists. 1664119917Swpaul */ 1665119917Swpaulstatic void 1666119917Swpaulbfe_stop(struct bfe_softc *sc) 1667119917Swpaul{ 1668119917Swpaul struct ifnet *ifp; 1669119917Swpaul 1670136804Smtm BFE_LOCK_ASSERT(sc); 1671119917Swpaul 1672147256Sbrooks ifp = sc->bfe_ifp; 1673175787Syongari ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1674175787Syongari sc->bfe_link = 0; 1675175787Syongari callout_stop(&sc->bfe_stat_co); 1676175787Syongari sc->bfe_watchdog_timer = 0; 1677119917Swpaul 1678119917Swpaul bfe_chip_halt(sc); 1679126470Sjulian bfe_tx_ring_free(sc); 1680119917Swpaul bfe_rx_ring_free(sc); 1681119917Swpaul} 1682