if_bfe.c revision 151545
1139749Simp/*- 2119917Swpaul * Copyright (c) 2003 Stuart Walsh<stu@ipng.org.uk> 3119917Swpaul * and Duncan Barclay<dmlb@dmlb.org> 4139749Simp * 5119917Swpaul * Redistribution and use in source and binary forms, with or without 6119917Swpaul * modification, are permitted provided that the following conditions 7119917Swpaul * are met: 8119917Swpaul * 1. Redistributions of source code must retain the above copyright 9119917Swpaul * notice, this list of conditions and the following disclaimer. 10119917Swpaul * 2. Redistributions in binary form must reproduce the above copyright 11119917Swpaul * notice, this list of conditions and the following disclaimer in the 12119917Swpaul * documentation and/or other materials provided with the distribution. 13119917Swpaul * 14119917Swpaul * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS 'AS IS' AND 15119917Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16119917Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17119917Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18119917Swpaul * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19119917Swpaul * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20119917Swpaul * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21119917Swpaul * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22119917Swpaul * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23119917Swpaul * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24119917Swpaul * SUCH DAMAGE. 25119917Swpaul */ 26119917Swpaul 27119917Swpaul 28119917Swpaul#include <sys/cdefs.h> 29119917Swpaul__FBSDID("$FreeBSD: head/sys/dev/bfe/if_bfe.c 151545 2005-10-22 05:06:55Z imp $"); 30119917Swpaul 31119917Swpaul#include <sys/param.h> 32119917Swpaul#include <sys/systm.h> 33119917Swpaul#include <sys/sockio.h> 34119917Swpaul#include <sys/mbuf.h> 35119917Swpaul#include <sys/malloc.h> 36119917Swpaul#include <sys/kernel.h> 37129879Sphk#include <sys/module.h> 38119917Swpaul#include <sys/socket.h> 39119917Swpaul#include <sys/queue.h> 40119917Swpaul 41119917Swpaul#include <net/if.h> 42119917Swpaul#include <net/if_arp.h> 43119917Swpaul#include <net/ethernet.h> 44119917Swpaul#include <net/if_dl.h> 45119917Swpaul#include <net/if_media.h> 46119917Swpaul 47119917Swpaul#include <net/bpf.h> 48119917Swpaul 49119917Swpaul#include <net/if_types.h> 50119917Swpaul#include <net/if_vlan_var.h> 51119917Swpaul 52119917Swpaul#include <netinet/in_systm.h> 53119917Swpaul#include <netinet/in.h> 54119917Swpaul#include <netinet/ip.h> 55119917Swpaul 56119917Swpaul#include <machine/clock.h> /* for DELAY */ 57119917Swpaul#include <machine/bus.h> 58119917Swpaul#include <machine/resource.h> 59119917Swpaul#include <sys/bus.h> 60119917Swpaul#include <sys/rman.h> 61119917Swpaul 62119917Swpaul#include <dev/mii/mii.h> 63119917Swpaul#include <dev/mii/miivar.h> 64119917Swpaul#include "miidevs.h" 65119917Swpaul 66119917Swpaul#include <dev/pci/pcireg.h> 67119917Swpaul#include <dev/pci/pcivar.h> 68119917Swpaul 69119917Swpaul#include <dev/bfe/if_bfereg.h> 70119917Swpaul 71119917SwpaulMODULE_DEPEND(bfe, pci, 1, 1, 1); 72119917SwpaulMODULE_DEPEND(bfe, ether, 1, 1, 1); 73119917SwpaulMODULE_DEPEND(bfe, miibus, 1, 1, 1); 74119917Swpaul 75151545Simp/* "device miibus" required. See GENERIC if you get errors here. */ 76119917Swpaul#include "miibus_if.h" 77119917Swpaul 78119917Swpaul#define BFE_DEVDESC_MAX 64 /* Maximum device description length */ 79119917Swpaul 80119917Swpaulstatic struct bfe_type bfe_devs[] = { 81119917Swpaul { BCOM_VENDORID, BCOM_DEVICEID_BCM4401, 82119917Swpaul "Broadcom BCM4401 Fast Ethernet" }, 83134590Sdes { BCOM_VENDORID, BCOM_DEVICEID_BCM4401B0, 84134590Sdes "Broadcom BCM4401-B0 Fast Ethernet" }, 85119917Swpaul { 0, 0, NULL } 86119917Swpaul}; 87119917Swpaul 88119917Swpaulstatic int bfe_probe (device_t); 89119917Swpaulstatic int bfe_attach (device_t); 90119917Swpaulstatic int bfe_detach (device_t); 91119917Swpaulstatic void bfe_release_resources (struct bfe_softc *); 92119917Swpaulstatic void bfe_intr (void *); 93119917Swpaulstatic void bfe_start (struct ifnet *); 94136804Smtmstatic void bfe_start_locked (struct ifnet *); 95119917Swpaulstatic int bfe_ioctl (struct ifnet *, u_long, caddr_t); 96119917Swpaulstatic void bfe_init (void *); 97136804Smtmstatic void bfe_init_locked (void *); 98119917Swpaulstatic void bfe_stop (struct bfe_softc *); 99119917Swpaulstatic void bfe_watchdog (struct ifnet *); 100119917Swpaulstatic void bfe_shutdown (device_t); 101119917Swpaulstatic void bfe_tick (void *); 102119917Swpaulstatic void bfe_txeof (struct bfe_softc *); 103119917Swpaulstatic void bfe_rxeof (struct bfe_softc *); 104119917Swpaulstatic void bfe_set_rx_mode (struct bfe_softc *); 105119917Swpaulstatic int bfe_list_rx_init (struct bfe_softc *); 106119917Swpaulstatic int bfe_list_newbuf (struct bfe_softc *, int, struct mbuf*); 107119917Swpaulstatic void bfe_rx_ring_free (struct bfe_softc *); 108119917Swpaul 109119917Swpaulstatic void bfe_pci_setup (struct bfe_softc *, u_int32_t); 110119917Swpaulstatic int bfe_ifmedia_upd (struct ifnet *); 111119917Swpaulstatic void bfe_ifmedia_sts (struct ifnet *, struct ifmediareq *); 112119917Swpaulstatic int bfe_miibus_readreg (device_t, int, int); 113119917Swpaulstatic int bfe_miibus_writereg (device_t, int, int, int); 114119917Swpaulstatic void bfe_miibus_statchg (device_t); 115133282Sdesstatic int bfe_wait_bit (struct bfe_softc *, u_int32_t, u_int32_t, 116119917Swpaul u_long, const int); 117119917Swpaulstatic void bfe_get_config (struct bfe_softc *sc); 118119917Swpaulstatic void bfe_read_eeprom (struct bfe_softc *, u_int8_t *); 119119917Swpaulstatic void bfe_stats_update (struct bfe_softc *); 120119917Swpaulstatic void bfe_clear_stats (struct bfe_softc *); 121119917Swpaulstatic int bfe_readphy (struct bfe_softc *, u_int32_t, u_int32_t*); 122119917Swpaulstatic int bfe_writephy (struct bfe_softc *, u_int32_t, u_int32_t); 123119917Swpaulstatic int bfe_resetphy (struct bfe_softc *); 124119917Swpaulstatic int bfe_setupphy (struct bfe_softc *); 125119917Swpaulstatic void bfe_chip_reset (struct bfe_softc *); 126119917Swpaulstatic void bfe_chip_halt (struct bfe_softc *); 127119917Swpaulstatic void bfe_core_reset (struct bfe_softc *); 128119917Swpaulstatic void bfe_core_disable (struct bfe_softc *); 129119917Swpaulstatic int bfe_dma_alloc (device_t); 130119917Swpaulstatic void bfe_dma_map_desc (void *, bus_dma_segment_t *, int, int); 131119917Swpaulstatic void bfe_dma_map (void *, bus_dma_segment_t *, int, int); 132119917Swpaulstatic void bfe_cam_write (struct bfe_softc *, u_char *, int); 133119917Swpaul 134119917Swpaulstatic device_method_t bfe_methods[] = { 135119917Swpaul /* Device interface */ 136119917Swpaul DEVMETHOD(device_probe, bfe_probe), 137119917Swpaul DEVMETHOD(device_attach, bfe_attach), 138119917Swpaul DEVMETHOD(device_detach, bfe_detach), 139119917Swpaul DEVMETHOD(device_shutdown, bfe_shutdown), 140119917Swpaul 141119917Swpaul /* bus interface */ 142119917Swpaul DEVMETHOD(bus_print_child, bus_generic_print_child), 143119917Swpaul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 144119917Swpaul 145119917Swpaul /* MII interface */ 146119917Swpaul DEVMETHOD(miibus_readreg, bfe_miibus_readreg), 147119917Swpaul DEVMETHOD(miibus_writereg, bfe_miibus_writereg), 148119917Swpaul DEVMETHOD(miibus_statchg, bfe_miibus_statchg), 149119917Swpaul 150119917Swpaul { 0, 0 } 151119917Swpaul}; 152119917Swpaul 153119917Swpaulstatic driver_t bfe_driver = { 154119917Swpaul "bfe", 155119917Swpaul bfe_methods, 156119917Swpaul sizeof(struct bfe_softc) 157119917Swpaul}; 158119917Swpaul 159119917Swpaulstatic devclass_t bfe_devclass; 160119917Swpaul 161119917SwpaulDRIVER_MODULE(bfe, pci, bfe_driver, bfe_devclass, 0, 0); 162119917SwpaulDRIVER_MODULE(miibus, bfe, miibus_driver, miibus_devclass, 0, 0); 163119917Swpaul 164119917Swpaul/* 165133282Sdes * Probe for a Broadcom 4401 chip. 166119917Swpaul */ 167119917Swpaulstatic int 168119917Swpaulbfe_probe(device_t dev) 169119917Swpaul{ 170119917Swpaul struct bfe_type *t; 171119917Swpaul struct bfe_softc *sc; 172119917Swpaul 173119917Swpaul t = bfe_devs; 174119917Swpaul 175119917Swpaul sc = device_get_softc(dev); 176119917Swpaul bzero(sc, sizeof(struct bfe_softc)); 177119917Swpaul sc->bfe_unit = device_get_unit(dev); 178119917Swpaul sc->bfe_dev = dev; 179119917Swpaul 180119917Swpaul while(t->bfe_name != NULL) { 181119917Swpaul if ((pci_get_vendor(dev) == t->bfe_vid) && 182119917Swpaul (pci_get_device(dev) == t->bfe_did)) { 183119917Swpaul device_set_desc_copy(dev, t->bfe_name); 184143163Simp return (BUS_PROBE_DEFAULT); 185119917Swpaul } 186119917Swpaul t++; 187119917Swpaul } 188119917Swpaul 189133282Sdes return (ENXIO); 190119917Swpaul} 191119917Swpaul 192119917Swpaulstatic int 193119917Swpaulbfe_dma_alloc(device_t dev) 194119917Swpaul{ 195119917Swpaul struct bfe_softc *sc; 196119917Swpaul int error, i; 197119917Swpaul 198119917Swpaul sc = device_get_softc(dev); 199119917Swpaul 200119917Swpaul /* parent tag */ 201119917Swpaul error = bus_dma_tag_create(NULL, /* parent */ 202119917Swpaul PAGE_SIZE, 0, /* alignment, boundary */ 203133282Sdes BUS_SPACE_MAXADDR, /* lowaddr */ 204119917Swpaul BUS_SPACE_MAXADDR_32BIT, /* highaddr */ 205119917Swpaul NULL, NULL, /* filter, filterarg */ 206119917Swpaul MAXBSIZE, /* maxsize */ 207119917Swpaul BUS_SPACE_UNRESTRICTED, /* num of segments */ 208119917Swpaul BUS_SPACE_MAXSIZE_32BIT, /* max segment size */ 209119917Swpaul BUS_DMA_ALLOCNOW, /* flags */ 210119917Swpaul NULL, NULL, /* lockfunc, lockarg */ 211119917Swpaul &sc->bfe_parent_tag); 212119917Swpaul 213119917Swpaul /* tag for TX ring */ 214126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 215126470Sjulian BFE_TX_LIST_SIZE, BFE_TX_LIST_SIZE, 216126470Sjulian BUS_SPACE_MAXADDR, 217133282Sdes BUS_SPACE_MAXADDR, 218126470Sjulian NULL, NULL, 219126470Sjulian BFE_TX_LIST_SIZE, 220126470Sjulian 1, 221126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 222126470Sjulian 0, 223126470Sjulian NULL, NULL, 224126470Sjulian &sc->bfe_tx_tag); 225119917Swpaul 226119917Swpaul if (error) { 227119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 228133282Sdes return (ENOMEM); 229119917Swpaul } 230119917Swpaul 231119917Swpaul /* tag for RX ring */ 232126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 233126470Sjulian BFE_RX_LIST_SIZE, BFE_RX_LIST_SIZE, 234126470Sjulian BUS_SPACE_MAXADDR, 235126470Sjulian BUS_SPACE_MAXADDR, 236126470Sjulian NULL, NULL, 237126470Sjulian BFE_RX_LIST_SIZE, 238126470Sjulian 1, 239126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 240126470Sjulian 0, 241126470Sjulian NULL, NULL, 242126470Sjulian &sc->bfe_rx_tag); 243119917Swpaul 244119917Swpaul if (error) { 245119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 246133282Sdes return (ENOMEM); 247119917Swpaul } 248119917Swpaul 249119917Swpaul /* tag for mbufs */ 250126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 251126470Sjulian ETHER_ALIGN, 0, 252126470Sjulian BUS_SPACE_MAXADDR, 253126470Sjulian BUS_SPACE_MAXADDR, 254126470Sjulian NULL, NULL, 255126470Sjulian MCLBYTES, 256126470Sjulian 1, 257126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 258126470Sjulian 0, 259126470Sjulian NULL, NULL, 260126470Sjulian &sc->bfe_tag); 261119917Swpaul 262119917Swpaul if (error) { 263119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 264133282Sdes return (ENOMEM); 265119917Swpaul } 266119917Swpaul 267119917Swpaul /* pre allocate dmamaps for RX list */ 268119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 269126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 270126470Sjulian &sc->bfe_rx_ring[i].bfe_map); 271119917Swpaul if (error) { 272119917Swpaul device_printf(dev, "cannot create DMA map for RX\n"); 273133282Sdes return (ENOMEM); 274119917Swpaul } 275119917Swpaul } 276119917Swpaul 277119917Swpaul /* pre allocate dmamaps for TX list */ 278119917Swpaul for (i = 0; i < BFE_TX_LIST_CNT; i++) { 279126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 280126470Sjulian &sc->bfe_tx_ring[i].bfe_map); 281119917Swpaul if (error) { 282119917Swpaul device_printf(dev, "cannot create DMA map for TX\n"); 283133282Sdes return (ENOMEM); 284119917Swpaul } 285119917Swpaul } 286119917Swpaul 287119917Swpaul /* Alloc dma for rx ring */ 288119917Swpaul error = bus_dmamem_alloc(sc->bfe_rx_tag, (void *)&sc->bfe_rx_list, 289119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_rx_map); 290119917Swpaul 291119917Swpaul if(error) 292133282Sdes return (ENOMEM); 293119917Swpaul 294119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 295119917Swpaul error = bus_dmamap_load(sc->bfe_rx_tag, sc->bfe_rx_map, 296119917Swpaul sc->bfe_rx_list, sizeof(struct bfe_desc), 297119917Swpaul bfe_dma_map, &sc->bfe_rx_dma, 0); 298119917Swpaul 299119917Swpaul if(error) 300133282Sdes return (ENOMEM); 301119917Swpaul 302119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 303119917Swpaul 304133282Sdes error = bus_dmamem_alloc(sc->bfe_tx_tag, (void *)&sc->bfe_tx_list, 305119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_tx_map); 306133282Sdes if (error) 307133282Sdes return (ENOMEM); 308119917Swpaul 309119917Swpaul 310133282Sdes error = bus_dmamap_load(sc->bfe_tx_tag, sc->bfe_tx_map, 311133282Sdes sc->bfe_tx_list, sizeof(struct bfe_desc), 312119917Swpaul bfe_dma_map, &sc->bfe_tx_dma, 0); 313119917Swpaul if(error) 314133282Sdes return (ENOMEM); 315119917Swpaul 316119917Swpaul bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 317119917Swpaul bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 318119917Swpaul 319133282Sdes return (0); 320119917Swpaul} 321119917Swpaul 322119917Swpaulstatic int 323119917Swpaulbfe_attach(device_t dev) 324119917Swpaul{ 325147256Sbrooks struct ifnet *ifp = NULL; 326119917Swpaul struct bfe_softc *sc; 327119917Swpaul int unit, error = 0, rid; 328119917Swpaul 329119917Swpaul sc = device_get_softc(dev); 330119917Swpaul mtx_init(&sc->bfe_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 331136804Smtm MTX_DEF); 332119917Swpaul 333119917Swpaul unit = device_get_unit(dev); 334119917Swpaul sc->bfe_dev = dev; 335119917Swpaul sc->bfe_unit = unit; 336119917Swpaul 337119917Swpaul /* 338119917Swpaul * Map control/status registers. 339119917Swpaul */ 340119917Swpaul pci_enable_busmaster(dev); 341119917Swpaul 342119917Swpaul rid = BFE_PCI_MEMLO; 343127135Snjl sc->bfe_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 344119917Swpaul RF_ACTIVE); 345119917Swpaul if (sc->bfe_res == NULL) { 346119917Swpaul printf ("bfe%d: couldn't map memory\n", unit); 347119917Swpaul error = ENXIO; 348119917Swpaul goto fail; 349119917Swpaul } 350119917Swpaul 351119917Swpaul sc->bfe_btag = rman_get_bustag(sc->bfe_res); 352119917Swpaul sc->bfe_bhandle = rman_get_bushandle(sc->bfe_res); 353119917Swpaul sc->bfe_vhandle = (vm_offset_t)rman_get_virtual(sc->bfe_res); 354119917Swpaul 355119917Swpaul /* Allocate interrupt */ 356119917Swpaul rid = 0; 357119917Swpaul 358127135Snjl sc->bfe_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 359119917Swpaul RF_SHAREABLE | RF_ACTIVE); 360119917Swpaul if (sc->bfe_irq == NULL) { 361119917Swpaul printf("bfe%d: couldn't map interrupt\n", unit); 362119917Swpaul error = ENXIO; 363119917Swpaul goto fail; 364119917Swpaul } 365119917Swpaul 366119917Swpaul if (bfe_dma_alloc(dev)) { 367126470Sjulian printf("bfe%d: failed to allocate DMA resources\n", 368126470Sjulian sc->bfe_unit); 369119917Swpaul bfe_release_resources(sc); 370119917Swpaul error = ENXIO; 371119917Swpaul goto fail; 372119917Swpaul } 373119917Swpaul 374119917Swpaul /* Set up ifnet structure */ 375147256Sbrooks ifp = sc->bfe_ifp = if_alloc(IFT_ETHER); 376147256Sbrooks if (ifp == NULL) { 377147256Sbrooks printf("bfe%d: failed to if_alloc()\n", sc->bfe_unit); 378147256Sbrooks error = ENOSPC; 379147256Sbrooks goto fail; 380147256Sbrooks } 381119917Swpaul ifp->if_softc = sc; 382121816Sbrooks if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 383119917Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 384119917Swpaul ifp->if_ioctl = bfe_ioctl; 385119917Swpaul ifp->if_start = bfe_start; 386119917Swpaul ifp->if_watchdog = bfe_watchdog; 387119917Swpaul ifp->if_init = bfe_init; 388119917Swpaul ifp->if_mtu = ETHERMTU; 389129708Sdes ifp->if_baudrate = 100000000; 390131455Smlaier IFQ_SET_MAXLEN(&ifp->if_snd, BFE_TX_QLEN); 391131455Smlaier ifp->if_snd.ifq_drv_maxlen = BFE_TX_QLEN; 392131455Smlaier IFQ_SET_READY(&ifp->if_snd); 393119917Swpaul 394119917Swpaul bfe_get_config(sc); 395119917Swpaul 396119917Swpaul /* Reset the chip and turn on the PHY */ 397136804Smtm BFE_LOCK(sc); 398119917Swpaul bfe_chip_reset(sc); 399136804Smtm BFE_UNLOCK(sc); 400119917Swpaul 401119917Swpaul if (mii_phy_probe(dev, &sc->bfe_miibus, 402119917Swpaul bfe_ifmedia_upd, bfe_ifmedia_sts)) { 403119917Swpaul printf("bfe%d: MII without any PHY!\n", sc->bfe_unit); 404119917Swpaul error = ENXIO; 405119917Swpaul goto fail; 406119917Swpaul } 407119917Swpaul 408147256Sbrooks ether_ifattach(ifp, sc->bfe_enaddr); 409119917Swpaul callout_handle_init(&sc->bfe_stat_ch); 410119917Swpaul 411119917Swpaul /* 412129708Sdes * Tell the upper layer(s) we support long frames. 413129708Sdes */ 414129708Sdes ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 415129708Sdes ifp->if_capabilities |= IFCAP_VLAN_MTU; 416129709Sdes ifp->if_capenable |= IFCAP_VLAN_MTU; 417129708Sdes 418129708Sdes /* 419119917Swpaul * Hook interrupt last to avoid having to lock softc 420119917Swpaul */ 421136804Smtm error = bus_setup_intr(dev, sc->bfe_irq, INTR_TYPE_NET | INTR_MPSAFE, 422119917Swpaul bfe_intr, sc, &sc->bfe_intrhand); 423119917Swpaul 424119917Swpaul if (error) { 425119917Swpaul bfe_release_resources(sc); 426119917Swpaul printf("bfe%d: couldn't set up irq\n", unit); 427119917Swpaul goto fail; 428119917Swpaul } 429119917Swpaulfail: 430150215Sru if (error) 431119917Swpaul bfe_release_resources(sc); 432133282Sdes return (error); 433119917Swpaul} 434119917Swpaul 435119917Swpaulstatic int 436119917Swpaulbfe_detach(device_t dev) 437119917Swpaul{ 438119917Swpaul struct bfe_softc *sc; 439119917Swpaul struct ifnet *ifp; 440119917Swpaul 441119917Swpaul sc = device_get_softc(dev); 442119917Swpaul 443119917Swpaul KASSERT(mtx_initialized(&sc->bfe_mtx), ("bfe mutex not initialized")); 444136804Smtm BFE_LOCK(sc); 445119917Swpaul 446147256Sbrooks ifp = sc->bfe_ifp; 447119917Swpaul 448119917Swpaul if (device_is_attached(dev)) { 449119917Swpaul bfe_stop(sc); 450119917Swpaul ether_ifdetach(ifp); 451119917Swpaul } 452119917Swpaul 453119917Swpaul bfe_chip_reset(sc); 454119917Swpaul 455119917Swpaul bus_generic_detach(dev); 456119917Swpaul if(sc->bfe_miibus != NULL) 457119917Swpaul device_delete_child(dev, sc->bfe_miibus); 458119917Swpaul 459119917Swpaul bfe_release_resources(sc); 460119917Swpaul BFE_UNLOCK(sc); 461119917Swpaul mtx_destroy(&sc->bfe_mtx); 462119917Swpaul 463133282Sdes return (0); 464119917Swpaul} 465119917Swpaul 466119917Swpaul/* 467119917Swpaul * Stop all chip I/O so that the kernel's probe routines don't 468119917Swpaul * get confused by errant DMAs when rebooting. 469119917Swpaul */ 470119917Swpaulstatic void 471119917Swpaulbfe_shutdown(device_t dev) 472119917Swpaul{ 473119917Swpaul struct bfe_softc *sc; 474119917Swpaul 475119917Swpaul sc = device_get_softc(dev); 476119917Swpaul BFE_LOCK(sc); 477133282Sdes bfe_stop(sc); 478119917Swpaul 479119917Swpaul BFE_UNLOCK(sc); 480119917Swpaul return; 481119917Swpaul} 482119917Swpaul 483119917Swpaulstatic int 484119917Swpaulbfe_miibus_readreg(device_t dev, int phy, int reg) 485119917Swpaul{ 486119917Swpaul struct bfe_softc *sc; 487119917Swpaul u_int32_t ret; 488119917Swpaul 489119917Swpaul sc = device_get_softc(dev); 490119917Swpaul if(phy != sc->bfe_phyaddr) 491133282Sdes return (0); 492119917Swpaul bfe_readphy(sc, reg, &ret); 493119917Swpaul 494133282Sdes return (ret); 495119917Swpaul} 496119917Swpaul 497119917Swpaulstatic int 498119917Swpaulbfe_miibus_writereg(device_t dev, int phy, int reg, int val) 499119917Swpaul{ 500119917Swpaul struct bfe_softc *sc; 501119917Swpaul 502119917Swpaul sc = device_get_softc(dev); 503119917Swpaul if(phy != sc->bfe_phyaddr) 504133282Sdes return (0); 505133282Sdes bfe_writephy(sc, reg, val); 506119917Swpaul 507133282Sdes return (0); 508119917Swpaul} 509119917Swpaul 510119917Swpaulstatic void 511119917Swpaulbfe_miibus_statchg(device_t dev) 512119917Swpaul{ 513119917Swpaul return; 514119917Swpaul} 515119917Swpaul 516119917Swpaulstatic void 517119917Swpaulbfe_tx_ring_free(struct bfe_softc *sc) 518119917Swpaul{ 519126470Sjulian int i; 520133282Sdes 521126470Sjulian for(i = 0; i < BFE_TX_LIST_CNT; i++) { 522126470Sjulian if(sc->bfe_tx_ring[i].bfe_mbuf != NULL) { 523126470Sjulian m_freem(sc->bfe_tx_ring[i].bfe_mbuf); 524126470Sjulian sc->bfe_tx_ring[i].bfe_mbuf = NULL; 525126470Sjulian bus_dmamap_unload(sc->bfe_tag, 526126470Sjulian sc->bfe_tx_ring[i].bfe_map); 527126470Sjulian } 528126470Sjulian } 529126470Sjulian bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 530126470Sjulian bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 531119917Swpaul} 532119917Swpaul 533119917Swpaulstatic void 534119917Swpaulbfe_rx_ring_free(struct bfe_softc *sc) 535119917Swpaul{ 536119917Swpaul int i; 537119917Swpaul 538119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 539119917Swpaul if (sc->bfe_rx_ring[i].bfe_mbuf != NULL) { 540119917Swpaul m_freem(sc->bfe_rx_ring[i].bfe_mbuf); 541119917Swpaul sc->bfe_rx_ring[i].bfe_mbuf = NULL; 542119917Swpaul bus_dmamap_unload(sc->bfe_tag, 543119917Swpaul sc->bfe_rx_ring[i].bfe_map); 544119917Swpaul } 545119917Swpaul } 546119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 547119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 548119917Swpaul} 549119917Swpaul 550133282Sdesstatic int 551119917Swpaulbfe_list_rx_init(struct bfe_softc *sc) 552119917Swpaul{ 553119917Swpaul int i; 554119917Swpaul 555119917Swpaul for(i = 0; i < BFE_RX_LIST_CNT; i++) { 556133282Sdes if(bfe_list_newbuf(sc, i, NULL) == ENOBUFS) 557133282Sdes return (ENOBUFS); 558119917Swpaul } 559119917Swpaul 560119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 561119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_PTR, (i * sizeof(struct bfe_desc))); 562119917Swpaul 563119917Swpaul sc->bfe_rx_cons = 0; 564119917Swpaul 565133282Sdes return (0); 566119917Swpaul} 567119917Swpaul 568119917Swpaulstatic int 569119917Swpaulbfe_list_newbuf(struct bfe_softc *sc, int c, struct mbuf *m) 570119917Swpaul{ 571119917Swpaul struct bfe_rxheader *rx_header; 572119917Swpaul struct bfe_desc *d; 573119917Swpaul struct bfe_data *r; 574119917Swpaul u_int32_t ctrl; 575119917Swpaul 576119917Swpaul if ((c < 0) || (c >= BFE_RX_LIST_CNT)) 577133282Sdes return (EINVAL); 578119917Swpaul 579119917Swpaul if(m == NULL) { 580119917Swpaul m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 581119917Swpaul if(m == NULL) 582133282Sdes return (ENOBUFS); 583119917Swpaul m->m_len = m->m_pkthdr.len = MCLBYTES; 584119917Swpaul } 585119917Swpaul else 586119917Swpaul m->m_data = m->m_ext.ext_buf; 587119917Swpaul 588119917Swpaul rx_header = mtod(m, struct bfe_rxheader *); 589119917Swpaul rx_header->len = 0; 590119917Swpaul rx_header->flags = 0; 591119917Swpaul 592119917Swpaul /* Map the mbuf into DMA */ 593119917Swpaul sc->bfe_rx_cnt = c; 594119917Swpaul d = &sc->bfe_rx_list[c]; 595119917Swpaul r = &sc->bfe_rx_ring[c]; 596133282Sdes bus_dmamap_load(sc->bfe_tag, r->bfe_map, mtod(m, void *), 597119917Swpaul MCLBYTES, bfe_dma_map_desc, d, 0); 598139944Ssam bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_PREREAD); 599119917Swpaul 600119917Swpaul ctrl = ETHER_MAX_LEN + 32; 601119917Swpaul 602119917Swpaul if(c == BFE_RX_LIST_CNT - 1) 603119917Swpaul ctrl |= BFE_DESC_EOT; 604119917Swpaul 605119917Swpaul d->bfe_ctrl = ctrl; 606119917Swpaul r->bfe_mbuf = m; 607119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 608133282Sdes return (0); 609119917Swpaul} 610119917Swpaul 611119917Swpaulstatic void 612119917Swpaulbfe_get_config(struct bfe_softc *sc) 613119917Swpaul{ 614119917Swpaul u_int8_t eeprom[128]; 615119917Swpaul 616119917Swpaul bfe_read_eeprom(sc, eeprom); 617119917Swpaul 618147256Sbrooks sc->bfe_enaddr[0] = eeprom[79]; 619147256Sbrooks sc->bfe_enaddr[1] = eeprom[78]; 620147256Sbrooks sc->bfe_enaddr[2] = eeprom[81]; 621147256Sbrooks sc->bfe_enaddr[3] = eeprom[80]; 622147256Sbrooks sc->bfe_enaddr[4] = eeprom[83]; 623147256Sbrooks sc->bfe_enaddr[5] = eeprom[82]; 624119917Swpaul 625119917Swpaul sc->bfe_phyaddr = eeprom[90] & 0x1f; 626119917Swpaul sc->bfe_mdc_port = (eeprom[90] >> 14) & 0x1; 627119917Swpaul 628133282Sdes sc->bfe_core_unit = 0; 629119917Swpaul sc->bfe_dma_offset = BFE_PCI_DMA; 630119917Swpaul} 631119917Swpaul 632119917Swpaulstatic void 633119917Swpaulbfe_pci_setup(struct bfe_softc *sc, u_int32_t cores) 634119917Swpaul{ 635119917Swpaul u_int32_t bar_orig, pci_rev, val; 636119917Swpaul 637119917Swpaul bar_orig = pci_read_config(sc->bfe_dev, BFE_BAR0_WIN, 4); 638119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, BFE_REG_PCI, 4); 639119917Swpaul pci_rev = CSR_READ_4(sc, BFE_SBIDHIGH) & BFE_RC_MASK; 640119917Swpaul 641119917Swpaul val = CSR_READ_4(sc, BFE_SBINTVEC); 642119917Swpaul val |= cores; 643119917Swpaul CSR_WRITE_4(sc, BFE_SBINTVEC, val); 644119917Swpaul 645119917Swpaul val = CSR_READ_4(sc, BFE_SSB_PCI_TRANS_2); 646119917Swpaul val |= BFE_SSB_PCI_PREF | BFE_SSB_PCI_BURST; 647119917Swpaul CSR_WRITE_4(sc, BFE_SSB_PCI_TRANS_2, val); 648119917Swpaul 649119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, bar_orig, 4); 650119917Swpaul} 651119917Swpaul 652133282Sdesstatic void 653119917Swpaulbfe_clear_stats(struct bfe_softc *sc) 654119917Swpaul{ 655119917Swpaul u_long reg; 656119917Swpaul 657136804Smtm BFE_LOCK_ASSERT(sc); 658119917Swpaul 659119917Swpaul CSR_WRITE_4(sc, BFE_MIB_CTRL, BFE_MIB_CLR_ON_READ); 660119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) 661119917Swpaul CSR_READ_4(sc, reg); 662119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) 663119917Swpaul CSR_READ_4(sc, reg); 664119917Swpaul} 665119917Swpaul 666133282Sdesstatic int 667119917Swpaulbfe_resetphy(struct bfe_softc *sc) 668119917Swpaul{ 669119917Swpaul u_int32_t val; 670119917Swpaul 671119917Swpaul bfe_writephy(sc, 0, BMCR_RESET); 672119917Swpaul DELAY(100); 673119917Swpaul bfe_readphy(sc, 0, &val); 674119917Swpaul if (val & BMCR_RESET) { 675119917Swpaul printf("bfe%d: PHY Reset would not complete.\n", sc->bfe_unit); 676133282Sdes return (ENXIO); 677119917Swpaul } 678133282Sdes return (0); 679119917Swpaul} 680119917Swpaul 681119917Swpaulstatic void 682119917Swpaulbfe_chip_halt(struct bfe_softc *sc) 683119917Swpaul{ 684136804Smtm BFE_LOCK_ASSERT(sc); 685119917Swpaul /* disable interrupts - not that it actually does..*/ 686119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, 0); 687119917Swpaul CSR_READ_4(sc, BFE_IMASK); 688119917Swpaul 689119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 690119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 200, 1); 691119917Swpaul 692119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 693119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 694119917Swpaul DELAY(10); 695119917Swpaul} 696119917Swpaul 697119917Swpaulstatic void 698119917Swpaulbfe_chip_reset(struct bfe_softc *sc) 699119917Swpaul{ 700133282Sdes u_int32_t val; 701119917Swpaul 702136804Smtm BFE_LOCK_ASSERT(sc); 703119917Swpaul 704119917Swpaul /* Set the interrupt vector for the enet core */ 705119917Swpaul bfe_pci_setup(sc, BFE_INTVEC_ENET0); 706119917Swpaul 707119917Swpaul /* is core up? */ 708126470Sjulian val = CSR_READ_4(sc, BFE_SBTMSLOW) & 709126470Sjulian (BFE_RESET | BFE_REJECT | BFE_CLOCK); 710119917Swpaul if (val == BFE_CLOCK) { 711119917Swpaul /* It is, so shut it down */ 712119917Swpaul CSR_WRITE_4(sc, BFE_RCV_LAZY, 0); 713119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 714119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 100, 1); 715119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 716119917Swpaul sc->bfe_tx_cnt = sc->bfe_tx_prod = sc->bfe_tx_cons = 0; 717133282Sdes if (CSR_READ_4(sc, BFE_DMARX_STAT) & BFE_STAT_EMASK) 718126470Sjulian bfe_wait_bit(sc, BFE_DMARX_STAT, BFE_STAT_SIDLE, 719126470Sjulian 100, 0); 720119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 721119917Swpaul sc->bfe_rx_prod = sc->bfe_rx_cons = 0; 722119917Swpaul } 723119917Swpaul 724119917Swpaul bfe_core_reset(sc); 725119917Swpaul bfe_clear_stats(sc); 726119917Swpaul 727119917Swpaul /* 728119917Swpaul * We want the phy registers to be accessible even when 729119917Swpaul * the driver is "downed" so initialize MDC preamble, frequency, 730119917Swpaul * and whether internal or external phy here. 731119917Swpaul */ 732119917Swpaul 733119917Swpaul /* 4402 has 62.5Mhz SB clock and internal phy */ 734119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_CTRL, 0x8d); 735119917Swpaul 736119917Swpaul /* Internal or external PHY? */ 737119917Swpaul val = CSR_READ_4(sc, BFE_DEVCTRL); 738133282Sdes if(!(val & BFE_IPP)) 739119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_EPSEL); 740119917Swpaul else if(CSR_READ_4(sc, BFE_DEVCTRL) & BFE_EPR) { 741119917Swpaul BFE_AND(sc, BFE_DEVCTRL, ~BFE_EPR); 742119917Swpaul DELAY(100); 743119917Swpaul } 744119917Swpaul 745133282Sdes /* Enable CRC32 generation and set proper LED modes */ 746133282Sdes BFE_OR(sc, BFE_MAC_CTRL, BFE_CTRL_CRC32_ENAB | BFE_CTRL_LED); 747129602Sdmlb 748133282Sdes /* Reset or clear powerdown control bit */ 749133282Sdes BFE_AND(sc, BFE_MAC_CTRL, ~BFE_CTRL_PDOWN); 750129602Sdmlb 751133282Sdes CSR_WRITE_4(sc, BFE_RCV_LAZY, ((1 << BFE_LAZY_FC_SHIFT) & 752119917Swpaul BFE_LAZY_FC_MASK)); 753119917Swpaul 754133282Sdes /* 755126470Sjulian * We don't want lazy interrupts, so just send them at 756133282Sdes * the end of a frame, please 757119917Swpaul */ 758119917Swpaul BFE_OR(sc, BFE_RCV_LAZY, 0); 759119917Swpaul 760119917Swpaul /* Set max lengths, accounting for VLAN tags */ 761119917Swpaul CSR_WRITE_4(sc, BFE_RXMAXLEN, ETHER_MAX_LEN+32); 762119917Swpaul CSR_WRITE_4(sc, BFE_TXMAXLEN, ETHER_MAX_LEN+32); 763119917Swpaul 764119917Swpaul /* Set watermark XXX - magic */ 765119917Swpaul CSR_WRITE_4(sc, BFE_TX_WMARK, 56); 766119917Swpaul 767133282Sdes /* 768126470Sjulian * Initialise DMA channels 769133282Sdes * - not forgetting dma addresses need to be added to BFE_PCI_DMA 770119917Swpaul */ 771119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, BFE_TX_CTRL_ENABLE); 772119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_ADDR, sc->bfe_tx_dma + BFE_PCI_DMA); 773119917Swpaul 774133282Sdes CSR_WRITE_4(sc, BFE_DMARX_CTRL, (BFE_RX_OFFSET << BFE_RX_CTRL_ROSHIFT) | 775119917Swpaul BFE_RX_CTRL_ENABLE); 776119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_ADDR, sc->bfe_rx_dma + BFE_PCI_DMA); 777119917Swpaul 778119917Swpaul bfe_resetphy(sc); 779119917Swpaul bfe_setupphy(sc); 780119917Swpaul} 781119917Swpaul 782119917Swpaulstatic void 783119917Swpaulbfe_core_disable(struct bfe_softc *sc) 784119917Swpaul{ 785119917Swpaul if((CSR_READ_4(sc, BFE_SBTMSLOW)) & BFE_RESET) 786119917Swpaul return; 787119917Swpaul 788133282Sdes /* 789126470Sjulian * Set reject, wait for it set, then wait for the core to stop 790126470Sjulian * being busy, then set reset and reject and enable the clocks. 791119917Swpaul */ 792119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_CLOCK)); 793119917Swpaul bfe_wait_bit(sc, BFE_SBTMSLOW, BFE_REJECT, 1000, 0); 794119917Swpaul bfe_wait_bit(sc, BFE_SBTMSHIGH, BFE_BUSY, 1000, 1); 795119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_FGC | BFE_CLOCK | BFE_REJECT | 796119917Swpaul BFE_RESET)); 797119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 798119917Swpaul DELAY(10); 799119917Swpaul /* Leave reset and reject set */ 800119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_RESET)); 801119917Swpaul DELAY(10); 802119917Swpaul} 803119917Swpaul 804119917Swpaulstatic void 805119917Swpaulbfe_core_reset(struct bfe_softc *sc) 806119917Swpaul{ 807119917Swpaul u_int32_t val; 808119917Swpaul 809119917Swpaul /* Disable the core */ 810119917Swpaul bfe_core_disable(sc); 811119917Swpaul 812119917Swpaul /* and bring it back up */ 813119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_RESET | BFE_CLOCK | BFE_FGC)); 814119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 815119917Swpaul DELAY(10); 816119917Swpaul 817119917Swpaul /* Chip bug, clear SERR, IB and TO if they are set. */ 818119917Swpaul if (CSR_READ_4(sc, BFE_SBTMSHIGH) & BFE_SERR) 819119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSHIGH, 0); 820119917Swpaul val = CSR_READ_4(sc, BFE_SBIMSTATE); 821119917Swpaul if (val & (BFE_IBE | BFE_TO)) 822119917Swpaul CSR_WRITE_4(sc, BFE_SBIMSTATE, val & ~(BFE_IBE | BFE_TO)); 823119917Swpaul 824119917Swpaul /* Clear reset and allow it to move through the core */ 825119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_CLOCK | BFE_FGC)); 826119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 827119917Swpaul DELAY(10); 828119917Swpaul 829119917Swpaul /* Leave the clock set */ 830119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, BFE_CLOCK); 831119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 832119917Swpaul DELAY(10); 833119917Swpaul} 834119917Swpaul 835133282Sdesstatic void 836119917Swpaulbfe_cam_write(struct bfe_softc *sc, u_char *data, int index) 837119917Swpaul{ 838119917Swpaul u_int32_t val; 839119917Swpaul 840119917Swpaul val = ((u_int32_t) data[2]) << 24; 841119917Swpaul val |= ((u_int32_t) data[3]) << 16; 842119917Swpaul val |= ((u_int32_t) data[4]) << 8; 843119917Swpaul val |= ((u_int32_t) data[5]); 844119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_LO, val); 845119917Swpaul val = (BFE_CAM_HI_VALID | 846119917Swpaul (((u_int32_t) data[0]) << 8) | 847119917Swpaul (((u_int32_t) data[1]))); 848119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_HI, val); 849119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, (BFE_CAM_WRITE | 850129602Sdmlb ((u_int32_t) index << BFE_CAM_INDEX_SHIFT))); 851119917Swpaul bfe_wait_bit(sc, BFE_CAM_CTRL, BFE_CAM_BUSY, 10000, 1); 852119917Swpaul} 853119917Swpaul 854133282Sdesstatic void 855119917Swpaulbfe_set_rx_mode(struct bfe_softc *sc) 856119917Swpaul{ 857147256Sbrooks struct ifnet *ifp = sc->bfe_ifp; 858119917Swpaul struct ifmultiaddr *ifma; 859119917Swpaul u_int32_t val; 860119917Swpaul int i = 0; 861119917Swpaul 862119917Swpaul val = CSR_READ_4(sc, BFE_RXCONF); 863119917Swpaul 864119917Swpaul if (ifp->if_flags & IFF_PROMISC) 865119917Swpaul val |= BFE_RXCONF_PROMISC; 866119917Swpaul else 867119917Swpaul val &= ~BFE_RXCONF_PROMISC; 868119917Swpaul 869119917Swpaul if (ifp->if_flags & IFF_BROADCAST) 870119917Swpaul val &= ~BFE_RXCONF_DBCAST; 871119917Swpaul else 872119917Swpaul val |= BFE_RXCONF_DBCAST; 873119917Swpaul 874119917Swpaul 875119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, 0); 876147256Sbrooks bfe_cam_write(sc, IFP2ENADDR(sc->bfe_ifp), i++); 877119917Swpaul 878119917Swpaul if (ifp->if_flags & IFF_ALLMULTI) 879119917Swpaul val |= BFE_RXCONF_ALLMULTI; 880119917Swpaul else { 881119917Swpaul val &= ~BFE_RXCONF_ALLMULTI; 882148654Srwatson IF_ADDR_LOCK(ifp); 883119917Swpaul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 884119917Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 885119917Swpaul continue; 886126470Sjulian bfe_cam_write(sc, 887126470Sjulian LLADDR((struct sockaddr_dl *)ifma->ifma_addr), i++); 888119917Swpaul } 889148654Srwatson IF_ADDR_UNLOCK(ifp); 890119917Swpaul } 891119917Swpaul 892119917Swpaul CSR_WRITE_4(sc, BFE_RXCONF, val); 893119917Swpaul BFE_OR(sc, BFE_CAM_CTRL, BFE_CAM_ENABLE); 894119917Swpaul} 895119917Swpaul 896119917Swpaulstatic void 897119917Swpaulbfe_dma_map(void *arg, bus_dma_segment_t *segs, int nseg, int error) 898119917Swpaul{ 899119917Swpaul u_int32_t *ptr; 900119917Swpaul 901119917Swpaul ptr = arg; 902119917Swpaul *ptr = segs->ds_addr; 903119917Swpaul} 904119917Swpaul 905119917Swpaulstatic void 906119917Swpaulbfe_dma_map_desc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 907119917Swpaul{ 908119917Swpaul struct bfe_desc *d; 909119917Swpaul 910119917Swpaul d = arg; 911119917Swpaul /* The chip needs all addresses to be added to BFE_PCI_DMA */ 912119917Swpaul d->bfe_addr = segs->ds_addr + BFE_PCI_DMA; 913119917Swpaul} 914119917Swpaul 915119917Swpaulstatic void 916119917Swpaulbfe_release_resources(struct bfe_softc *sc) 917119917Swpaul{ 918119917Swpaul device_t dev; 919119917Swpaul int i; 920119917Swpaul 921119917Swpaul dev = sc->bfe_dev; 922119917Swpaul 923119917Swpaul if (sc->bfe_vpd_prodname != NULL) 924119917Swpaul free(sc->bfe_vpd_prodname, M_DEVBUF); 925119917Swpaul 926119917Swpaul if (sc->bfe_vpd_readonly != NULL) 927119917Swpaul free(sc->bfe_vpd_readonly, M_DEVBUF); 928119917Swpaul 929119917Swpaul if (sc->bfe_intrhand != NULL) 930119917Swpaul bus_teardown_intr(dev, sc->bfe_irq, sc->bfe_intrhand); 931119917Swpaul 932119917Swpaul if (sc->bfe_irq != NULL) 933119917Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->bfe_irq); 934119917Swpaul 935119917Swpaul if (sc->bfe_res != NULL) 936119917Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 0x10, sc->bfe_res); 937119917Swpaul 938150215Sru if (sc->bfe_ifp != NULL) 939150215Sru if_free(sc->bfe_ifp); 940150215Sru 941119917Swpaul if(sc->bfe_tx_tag != NULL) { 942119917Swpaul bus_dmamap_unload(sc->bfe_tx_tag, sc->bfe_tx_map); 943126470Sjulian bus_dmamem_free(sc->bfe_tx_tag, sc->bfe_tx_list, 944126470Sjulian sc->bfe_tx_map); 945119917Swpaul bus_dma_tag_destroy(sc->bfe_tx_tag); 946119917Swpaul sc->bfe_tx_tag = NULL; 947119917Swpaul } 948119917Swpaul 949119917Swpaul if(sc->bfe_rx_tag != NULL) { 950119917Swpaul bus_dmamap_unload(sc->bfe_rx_tag, sc->bfe_rx_map); 951126470Sjulian bus_dmamem_free(sc->bfe_rx_tag, sc->bfe_rx_list, 952126470Sjulian sc->bfe_rx_map); 953119917Swpaul bus_dma_tag_destroy(sc->bfe_rx_tag); 954119917Swpaul sc->bfe_rx_tag = NULL; 955119917Swpaul } 956119917Swpaul 957119917Swpaul if(sc->bfe_tag != NULL) { 958119917Swpaul for(i = 0; i < BFE_TX_LIST_CNT; i++) { 959126470Sjulian bus_dmamap_destroy(sc->bfe_tag, 960126470Sjulian sc->bfe_tx_ring[i].bfe_map); 961119917Swpaul } 962143750Savatar for(i = 0; i < BFE_RX_LIST_CNT; i++) { 963143750Savatar bus_dmamap_destroy(sc->bfe_tag, 964143750Savatar sc->bfe_rx_ring[i].bfe_map); 965143750Savatar } 966119917Swpaul bus_dma_tag_destroy(sc->bfe_tag); 967126470Sjulian sc->bfe_tag = NULL; 968119917Swpaul } 969119917Swpaul 970119917Swpaul if(sc->bfe_parent_tag != NULL) 971119917Swpaul bus_dma_tag_destroy(sc->bfe_parent_tag); 972119917Swpaul 973119917Swpaul return; 974119917Swpaul} 975119917Swpaul 976119917Swpaulstatic void 977119917Swpaulbfe_read_eeprom(struct bfe_softc *sc, u_int8_t *data) 978119917Swpaul{ 979119917Swpaul long i; 980119917Swpaul u_int16_t *ptr = (u_int16_t *)data; 981119917Swpaul 982119917Swpaul for(i = 0; i < 128; i += 2) 983119917Swpaul ptr[i/2] = CSR_READ_4(sc, 4096 + i); 984119917Swpaul} 985119917Swpaul 986119917Swpaulstatic int 987133282Sdesbfe_wait_bit(struct bfe_softc *sc, u_int32_t reg, u_int32_t bit, 988119917Swpaul u_long timeout, const int clear) 989119917Swpaul{ 990119917Swpaul u_long i; 991119917Swpaul 992119917Swpaul for (i = 0; i < timeout; i++) { 993119917Swpaul u_int32_t val = CSR_READ_4(sc, reg); 994119917Swpaul 995119917Swpaul if (clear && !(val & bit)) 996119917Swpaul break; 997119917Swpaul if (!clear && (val & bit)) 998119917Swpaul break; 999119917Swpaul DELAY(10); 1000119917Swpaul } 1001119917Swpaul if (i == timeout) { 1002119917Swpaul printf("bfe%d: BUG! Timeout waiting for bit %08x of register " 1003133282Sdes "%x to %s.\n", sc->bfe_unit, bit, reg, 1004119917Swpaul (clear ? "clear" : "set")); 1005133282Sdes return (-1); 1006119917Swpaul } 1007133282Sdes return (0); 1008119917Swpaul} 1009119917Swpaul 1010119917Swpaulstatic int 1011119917Swpaulbfe_readphy(struct bfe_softc *sc, u_int32_t reg, u_int32_t *val) 1012119917Swpaul{ 1013133282Sdes int err; 1014119917Swpaul 1015119917Swpaul /* Clear MII ISR */ 1016119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1017119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1018119917Swpaul (BFE_MDIO_OP_READ << BFE_MDIO_OP_SHIFT) | 1019119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1020119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1021119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT))); 1022119917Swpaul err = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1023119917Swpaul *val = CSR_READ_4(sc, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA; 1024119917Swpaul 1025133282Sdes return (err); 1026119917Swpaul} 1027119917Swpaul 1028119917Swpaulstatic int 1029119917Swpaulbfe_writephy(struct bfe_softc *sc, u_int32_t reg, u_int32_t val) 1030119917Swpaul{ 1031119917Swpaul int status; 1032119917Swpaul 1033119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1034119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1035119917Swpaul (BFE_MDIO_OP_WRITE << BFE_MDIO_OP_SHIFT) | 1036119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1037119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1038119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT) | 1039119917Swpaul (val & BFE_MDIO_DATA_DATA))); 1040119917Swpaul status = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1041119917Swpaul 1042133282Sdes return (status); 1043119917Swpaul} 1044119917Swpaul 1045133282Sdes/* 1046119917Swpaul * XXX - I think this is handled by the PHY driver, but it can't hurt to do it 1047119917Swpaul * twice 1048119917Swpaul */ 1049119917Swpaulstatic int 1050119917Swpaulbfe_setupphy(struct bfe_softc *sc) 1051119917Swpaul{ 1052119917Swpaul u_int32_t val; 1053119917Swpaul 1054119917Swpaul /* Enable activity LED */ 1055119917Swpaul bfe_readphy(sc, 26, &val); 1056133282Sdes bfe_writephy(sc, 26, val & 0x7fff); 1057119917Swpaul bfe_readphy(sc, 26, &val); 1058119917Swpaul 1059119917Swpaul /* Enable traffic meter LED mode */ 1060119917Swpaul bfe_readphy(sc, 27, &val); 1061119917Swpaul bfe_writephy(sc, 27, val | (1 << 6)); 1062119917Swpaul 1063133282Sdes return (0); 1064119917Swpaul} 1065119917Swpaul 1066133282Sdesstatic void 1067119917Swpaulbfe_stats_update(struct bfe_softc *sc) 1068119917Swpaul{ 1069119917Swpaul u_long reg; 1070119917Swpaul u_int32_t *val; 1071119917Swpaul 1072119917Swpaul val = &sc->bfe_hwstats.tx_good_octets; 1073119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) { 1074119917Swpaul *val++ += CSR_READ_4(sc, reg); 1075119917Swpaul } 1076119917Swpaul val = &sc->bfe_hwstats.rx_good_octets; 1077119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) { 1078119917Swpaul *val++ += CSR_READ_4(sc, reg); 1079119917Swpaul } 1080119917Swpaul} 1081119917Swpaul 1082119917Swpaulstatic void 1083119917Swpaulbfe_txeof(struct bfe_softc *sc) 1084119917Swpaul{ 1085119917Swpaul struct ifnet *ifp; 1086119917Swpaul int i, chipidx; 1087119917Swpaul 1088136804Smtm BFE_LOCK_ASSERT(sc); 1089119917Swpaul 1090147256Sbrooks ifp = sc->bfe_ifp; 1091119917Swpaul 1092119917Swpaul chipidx = CSR_READ_4(sc, BFE_DMATX_STAT) & BFE_STAT_CDMASK; 1093119917Swpaul chipidx /= sizeof(struct bfe_desc); 1094119917Swpaul 1095126470Sjulian i = sc->bfe_tx_cons; 1096119917Swpaul /* Go through the mbufs and free those that have been transmitted */ 1097126470Sjulian while(i != chipidx) { 1098119917Swpaul struct bfe_data *r = &sc->bfe_tx_ring[i]; 1099119917Swpaul if(r->bfe_mbuf != NULL) { 1100119917Swpaul ifp->if_opackets++; 1101119917Swpaul m_freem(r->bfe_mbuf); 1102119917Swpaul r->bfe_mbuf = NULL; 1103119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1104119917Swpaul } 1105126470Sjulian sc->bfe_tx_cnt--; 1106126470Sjulian BFE_INC(i, BFE_TX_LIST_CNT); 1107119917Swpaul } 1108119917Swpaul 1109119917Swpaul if(i != sc->bfe_tx_cons) { 1110119917Swpaul /* we freed up some mbufs */ 1111119917Swpaul sc->bfe_tx_cons = i; 1112148887Srwatson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1113119917Swpaul } 1114119917Swpaul if(sc->bfe_tx_cnt == 0) 1115119917Swpaul ifp->if_timer = 0; 1116119917Swpaul else 1117119917Swpaul ifp->if_timer = 5; 1118119917Swpaul} 1119119917Swpaul 1120119917Swpaul/* Pass a received packet up the stack */ 1121119917Swpaulstatic void 1122119917Swpaulbfe_rxeof(struct bfe_softc *sc) 1123119917Swpaul{ 1124119917Swpaul struct mbuf *m; 1125119917Swpaul struct ifnet *ifp; 1126119917Swpaul struct bfe_rxheader *rxheader; 1127119917Swpaul struct bfe_data *r; 1128119917Swpaul int cons; 1129119917Swpaul u_int32_t status, current, len, flags; 1130119917Swpaul 1131136804Smtm BFE_LOCK_ASSERT(sc); 1132119917Swpaul cons = sc->bfe_rx_cons; 1133119917Swpaul status = CSR_READ_4(sc, BFE_DMARX_STAT); 1134119917Swpaul current = (status & BFE_STAT_CDMASK) / sizeof(struct bfe_desc); 1135119917Swpaul 1136147256Sbrooks ifp = sc->bfe_ifp; 1137119917Swpaul 1138119917Swpaul while(current != cons) { 1139119917Swpaul r = &sc->bfe_rx_ring[cons]; 1140119917Swpaul m = r->bfe_mbuf; 1141119917Swpaul rxheader = mtod(m, struct bfe_rxheader*); 1142119917Swpaul bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_POSTWRITE); 1143119917Swpaul len = rxheader->len; 1144119917Swpaul r->bfe_mbuf = NULL; 1145119917Swpaul 1146119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1147119917Swpaul flags = rxheader->flags; 1148119917Swpaul 1149119917Swpaul len -= ETHER_CRC_LEN; 1150119917Swpaul 1151119917Swpaul /* flag an error and try again */ 1152119917Swpaul if ((len > ETHER_MAX_LEN+32) || (flags & BFE_RX_FLAG_ERRORS)) { 1153119917Swpaul ifp->if_ierrors++; 1154119917Swpaul if (flags & BFE_RX_FLAG_SERR) 1155119917Swpaul ifp->if_collisions++; 1156119917Swpaul bfe_list_newbuf(sc, cons, m); 1157126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1158119917Swpaul continue; 1159119917Swpaul } 1160119917Swpaul 1161119917Swpaul /* Go past the rx header */ 1162119917Swpaul if (bfe_list_newbuf(sc, cons, NULL) == 0) { 1163119917Swpaul m_adj(m, BFE_RX_OFFSET); 1164119917Swpaul m->m_len = m->m_pkthdr.len = len; 1165119917Swpaul } else { 1166119917Swpaul bfe_list_newbuf(sc, cons, m); 1167119917Swpaul ifp->if_ierrors++; 1168126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1169119917Swpaul continue; 1170119917Swpaul } 1171119917Swpaul 1172119917Swpaul ifp->if_ipackets++; 1173119917Swpaul m->m_pkthdr.rcvif = ifp; 1174122689Ssam BFE_UNLOCK(sc); 1175119917Swpaul (*ifp->if_input)(ifp, m); 1176122689Ssam BFE_LOCK(sc); 1177119917Swpaul 1178126470Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1179119917Swpaul } 1180119917Swpaul sc->bfe_rx_cons = cons; 1181119917Swpaul} 1182119917Swpaul 1183119917Swpaulstatic void 1184119917Swpaulbfe_intr(void *xsc) 1185119917Swpaul{ 1186119917Swpaul struct bfe_softc *sc = xsc; 1187119917Swpaul struct ifnet *ifp; 1188119917Swpaul u_int32_t istat, imask, flag; 1189119917Swpaul 1190147256Sbrooks ifp = sc->bfe_ifp; 1191119917Swpaul 1192119917Swpaul BFE_LOCK(sc); 1193119917Swpaul 1194119917Swpaul istat = CSR_READ_4(sc, BFE_ISTAT); 1195119917Swpaul imask = CSR_READ_4(sc, BFE_IMASK); 1196119917Swpaul 1197133282Sdes /* 1198119917Swpaul * Defer unsolicited interrupts - This is necessary because setting the 1199119917Swpaul * chips interrupt mask register to 0 doesn't actually stop the 1200119917Swpaul * interrupts 1201119917Swpaul */ 1202119917Swpaul istat &= imask; 1203119917Swpaul CSR_WRITE_4(sc, BFE_ISTAT, istat); 1204119917Swpaul CSR_READ_4(sc, BFE_ISTAT); 1205119917Swpaul 1206119917Swpaul /* not expecting this interrupt, disregard it */ 1207119917Swpaul if(istat == 0) { 1208119917Swpaul BFE_UNLOCK(sc); 1209119917Swpaul return; 1210119917Swpaul } 1211119917Swpaul 1212119917Swpaul if(istat & BFE_ISTAT_ERRORS) { 1213119917Swpaul flag = CSR_READ_4(sc, BFE_DMATX_STAT); 1214119917Swpaul if(flag & BFE_STAT_EMASK) 1215119917Swpaul ifp->if_oerrors++; 1216119917Swpaul 1217119917Swpaul flag = CSR_READ_4(sc, BFE_DMARX_STAT); 1218119917Swpaul if(flag & BFE_RX_FLAG_ERRORS) 1219119917Swpaul ifp->if_ierrors++; 1220119917Swpaul 1221148887Srwatson ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1222136804Smtm bfe_init_locked(sc); 1223119917Swpaul } 1224119917Swpaul 1225119917Swpaul /* A packet was received */ 1226119917Swpaul if(istat & BFE_ISTAT_RX) 1227119917Swpaul bfe_rxeof(sc); 1228119917Swpaul 1229119917Swpaul /* A packet was sent */ 1230119917Swpaul if(istat & BFE_ISTAT_TX) 1231119917Swpaul bfe_txeof(sc); 1232119917Swpaul 1233133282Sdes /* We have packets pending, fire them out */ 1234148887Srwatson if (ifp->if_drv_flags & IFF_DRV_RUNNING && 1235148887Srwatson !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1236136804Smtm bfe_start_locked(ifp); 1237119917Swpaul 1238119917Swpaul BFE_UNLOCK(sc); 1239119917Swpaul} 1240119917Swpaul 1241119917Swpaulstatic int 1242119917Swpaulbfe_encap(struct bfe_softc *sc, struct mbuf *m_head, u_int32_t *txidx) 1243119917Swpaul{ 1244119917Swpaul struct bfe_desc *d = NULL; 1245119917Swpaul struct bfe_data *r = NULL; 1246133282Sdes struct mbuf *m; 1247126470Sjulian u_int32_t frag, cur, cnt = 0; 1248119917Swpaul int chainlen = 0; 1249119917Swpaul 1250119917Swpaul if(BFE_TX_LIST_CNT - sc->bfe_tx_cnt < 2) 1251133282Sdes return (ENOBUFS); 1252119917Swpaul 1253119917Swpaul /* 1254119917Swpaul * Count the number of frags in this chain to see if 1255119917Swpaul * we need to m_defrag. Since the descriptor list is shared 1256119917Swpaul * by all packets, we'll m_defrag long chains so that they 1257119917Swpaul * do not use up the entire list, even if they would fit. 1258119917Swpaul */ 1259133282Sdes for(m = m_head; m != NULL; m = m->m_next) 1260119917Swpaul chainlen++; 1261119917Swpaul 1262119917Swpaul 1263133282Sdes if ((chainlen > BFE_TX_LIST_CNT / 4) || 1264119917Swpaul ((BFE_TX_LIST_CNT - (chainlen + sc->bfe_tx_cnt)) < 2)) { 1265119917Swpaul m = m_defrag(m_head, M_DONTWAIT); 1266133282Sdes if (m == NULL) 1267133282Sdes return (ENOBUFS); 1268119917Swpaul m_head = m; 1269119917Swpaul } 1270119917Swpaul 1271119917Swpaul /* 1272119917Swpaul * Start packing the mbufs in this chain into 1273119917Swpaul * the fragment pointers. Stop when we run out 1274119917Swpaul * of fragments or hit the end of the mbuf chain. 1275119917Swpaul */ 1276119917Swpaul m = m_head; 1277119917Swpaul cur = frag = *txidx; 1278119917Swpaul cnt = 0; 1279119917Swpaul 1280119917Swpaul for(m = m_head; m != NULL; m = m->m_next) { 1281119917Swpaul if(m->m_len != 0) { 1282119917Swpaul if((BFE_TX_LIST_CNT - (sc->bfe_tx_cnt + cnt)) < 2) 1283133282Sdes return (ENOBUFS); 1284119917Swpaul 1285119917Swpaul d = &sc->bfe_tx_list[cur]; 1286119917Swpaul r = &sc->bfe_tx_ring[cur]; 1287119917Swpaul d->bfe_ctrl = BFE_DESC_LEN & m->m_len; 1288119917Swpaul /* always intterupt on completion */ 1289119917Swpaul d->bfe_ctrl |= BFE_DESC_IOC; 1290119917Swpaul if(cnt == 0) 1291119917Swpaul /* Set start of frame */ 1292119917Swpaul d->bfe_ctrl |= BFE_DESC_SOF; 1293119917Swpaul if(cur == BFE_TX_LIST_CNT - 1) 1294126470Sjulian /* 1295126470Sjulian * Tell the chip to wrap to the start of 1296126470Sjulian * the descriptor list 1297126470Sjulian */ 1298119917Swpaul d->bfe_ctrl |= BFE_DESC_EOT; 1299119917Swpaul 1300126470Sjulian bus_dmamap_load(sc->bfe_tag, 1301133282Sdes r->bfe_map, mtod(m, void*), m->m_len, 1302126470Sjulian bfe_dma_map_desc, d, 0); 1303126470Sjulian bus_dmamap_sync(sc->bfe_tag, r->bfe_map, 1304126470Sjulian BUS_DMASYNC_PREREAD); 1305119917Swpaul 1306119917Swpaul frag = cur; 1307126470Sjulian BFE_INC(cur, BFE_TX_LIST_CNT); 1308119917Swpaul cnt++; 1309119917Swpaul } 1310119917Swpaul } 1311119917Swpaul 1312119917Swpaul if (m != NULL) 1313133282Sdes return (ENOBUFS); 1314119917Swpaul 1315119917Swpaul sc->bfe_tx_list[frag].bfe_ctrl |= BFE_DESC_EOF; 1316119917Swpaul sc->bfe_tx_ring[frag].bfe_mbuf = m_head; 1317119917Swpaul bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 1318119917Swpaul 1319119917Swpaul *txidx = cur; 1320119917Swpaul sc->bfe_tx_cnt += cnt; 1321119917Swpaul return (0); 1322119917Swpaul} 1323119917Swpaul 1324119917Swpaul/* 1325136804Smtm * Set up to transmit a packet. 1326119917Swpaul */ 1327119917Swpaulstatic void 1328119917Swpaulbfe_start(struct ifnet *ifp) 1329119917Swpaul{ 1330136804Smtm BFE_LOCK((struct bfe_softc *)ifp->if_softc); 1331136804Smtm bfe_start_locked(ifp); 1332136804Smtm BFE_UNLOCK((struct bfe_softc *)ifp->if_softc); 1333136804Smtm} 1334136804Smtm 1335136804Smtm/* 1336136804Smtm * Set up to transmit a packet. The softc is already locked. 1337136804Smtm */ 1338136804Smtmstatic void 1339136804Smtmbfe_start_locked(struct ifnet *ifp) 1340136804Smtm{ 1341119917Swpaul struct bfe_softc *sc; 1342119917Swpaul struct mbuf *m_head = NULL; 1343136269Smlaier int idx, queued = 0; 1344119917Swpaul 1345119917Swpaul sc = ifp->if_softc; 1346119917Swpaul idx = sc->bfe_tx_prod; 1347119917Swpaul 1348136804Smtm BFE_LOCK_ASSERT(sc); 1349119917Swpaul 1350133282Sdes /* 1351126470Sjulian * Not much point trying to send if the link is down 1352126470Sjulian * or we have nothing to send. 1353119917Swpaul */ 1354136804Smtm if (!sc->bfe_link && ifp->if_snd.ifq_len < 10) 1355119917Swpaul return; 1356119917Swpaul 1357148887Srwatson if (ifp->if_drv_flags & IFF_DRV_OACTIVE) 1358119917Swpaul return; 1359119917Swpaul 1360119917Swpaul while(sc->bfe_tx_ring[idx].bfe_mbuf == NULL) { 1361131455Smlaier IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 1362119917Swpaul if(m_head == NULL) 1363119917Swpaul break; 1364119917Swpaul 1365133282Sdes /* 1366126470Sjulian * Pack the data into the tx ring. If we dont have 1367126470Sjulian * enough room, let the chip drain the ring. 1368119917Swpaul */ 1369119917Swpaul if(bfe_encap(sc, m_head, &idx)) { 1370131455Smlaier IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 1371148887Srwatson ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1372119917Swpaul break; 1373119917Swpaul } 1374119917Swpaul 1375136269Smlaier queued++; 1376136269Smlaier 1377119917Swpaul /* 1378119917Swpaul * If there's a BPF listener, bounce a copy of this frame 1379119917Swpaul * to him. 1380119917Swpaul */ 1381119917Swpaul BPF_MTAP(ifp, m_head); 1382119917Swpaul } 1383119917Swpaul 1384136269Smlaier if (queued) { 1385136269Smlaier sc->bfe_tx_prod = idx; 1386136269Smlaier /* Transmit - twice due to apparent hardware bug */ 1387136269Smlaier CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1388136269Smlaier CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1389119917Swpaul 1390136269Smlaier /* 1391136269Smlaier * Set a timeout in case the chip goes out to lunch. 1392136269Smlaier */ 1393136269Smlaier ifp->if_timer = 5; 1394136269Smlaier } 1395119917Swpaul} 1396119917Swpaul 1397119917Swpaulstatic void 1398119917Swpaulbfe_init(void *xsc) 1399119917Swpaul{ 1400136804Smtm BFE_LOCK((struct bfe_softc *)xsc); 1401136804Smtm bfe_init_locked(xsc); 1402136804Smtm BFE_UNLOCK((struct bfe_softc *)xsc); 1403136804Smtm} 1404136804Smtm 1405136804Smtmstatic void 1406136804Smtmbfe_init_locked(void *xsc) 1407136804Smtm{ 1408119917Swpaul struct bfe_softc *sc = (struct bfe_softc*)xsc; 1409147256Sbrooks struct ifnet *ifp = sc->bfe_ifp; 1410119917Swpaul 1411136804Smtm BFE_LOCK_ASSERT(sc); 1412119917Swpaul 1413148887Srwatson if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1414119917Swpaul return; 1415119917Swpaul 1416119917Swpaul bfe_stop(sc); 1417119917Swpaul bfe_chip_reset(sc); 1418119917Swpaul 1419119917Swpaul if (bfe_list_rx_init(sc) == ENOBUFS) { 1420126470Sjulian printf("bfe%d: bfe_init: Not enough memory for list buffers\n", 1421126470Sjulian sc->bfe_unit); 1422119917Swpaul bfe_stop(sc); 1423119917Swpaul return; 1424119917Swpaul } 1425119917Swpaul 1426119917Swpaul bfe_set_rx_mode(sc); 1427119917Swpaul 1428119917Swpaul /* Enable the chip and core */ 1429119917Swpaul BFE_OR(sc, BFE_ENET_CTRL, BFE_ENET_ENABLE); 1430119917Swpaul /* Enable interrupts */ 1431119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, BFE_IMASK_DEF); 1432119917Swpaul 1433119917Swpaul bfe_ifmedia_upd(ifp); 1434148887Srwatson ifp->if_drv_flags |= IFF_DRV_RUNNING; 1435148887Srwatson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1436119917Swpaul 1437119917Swpaul sc->bfe_stat_ch = timeout(bfe_tick, sc, hz); 1438119917Swpaul} 1439119917Swpaul 1440119917Swpaul/* 1441119917Swpaul * Set media options. 1442119917Swpaul */ 1443119917Swpaulstatic int 1444119917Swpaulbfe_ifmedia_upd(struct ifnet *ifp) 1445119917Swpaul{ 1446119917Swpaul struct bfe_softc *sc; 1447119917Swpaul struct mii_data *mii; 1448119917Swpaul 1449119917Swpaul sc = ifp->if_softc; 1450119917Swpaul 1451119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1452119917Swpaul sc->bfe_link = 0; 1453119917Swpaul if (mii->mii_instance) { 1454119917Swpaul struct mii_softc *miisc; 1455119917Swpaul for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 1456119917Swpaul miisc = LIST_NEXT(miisc, mii_list)) 1457119917Swpaul mii_phy_reset(miisc); 1458119917Swpaul } 1459119917Swpaul mii_mediachg(mii); 1460119917Swpaul 1461133282Sdes return (0); 1462119917Swpaul} 1463119917Swpaul 1464119917Swpaul/* 1465119917Swpaul * Report current media status. 1466119917Swpaul */ 1467119917Swpaulstatic void 1468119917Swpaulbfe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1469119917Swpaul{ 1470119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1471119917Swpaul struct mii_data *mii; 1472119917Swpaul 1473119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1474119917Swpaul mii_pollstat(mii); 1475119917Swpaul ifmr->ifm_active = mii->mii_media_active; 1476119917Swpaul ifmr->ifm_status = mii->mii_media_status; 1477119917Swpaul} 1478119917Swpaul 1479119917Swpaulstatic int 1480119917Swpaulbfe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1481119917Swpaul{ 1482119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1483119917Swpaul struct ifreq *ifr = (struct ifreq *) data; 1484119917Swpaul struct mii_data *mii; 1485119917Swpaul int error = 0; 1486119917Swpaul 1487119917Swpaul switch(command) { 1488119917Swpaul case SIOCSIFFLAGS: 1489136804Smtm BFE_LOCK(sc); 1490119917Swpaul if(ifp->if_flags & IFF_UP) 1491148887Srwatson if(ifp->if_drv_flags & IFF_DRV_RUNNING) 1492119917Swpaul bfe_set_rx_mode(sc); 1493119917Swpaul else 1494136804Smtm bfe_init_locked(sc); 1495148887Srwatson else if(ifp->if_drv_flags & IFF_DRV_RUNNING) 1496119917Swpaul bfe_stop(sc); 1497136804Smtm BFE_UNLOCK(sc); 1498119917Swpaul break; 1499119917Swpaul case SIOCADDMULTI: 1500119917Swpaul case SIOCDELMULTI: 1501136804Smtm BFE_LOCK(sc); 1502148887Srwatson if(ifp->if_drv_flags & IFF_DRV_RUNNING) 1503119917Swpaul bfe_set_rx_mode(sc); 1504136804Smtm BFE_UNLOCK(sc); 1505119917Swpaul break; 1506119917Swpaul case SIOCGIFMEDIA: 1507119917Swpaul case SIOCSIFMEDIA: 1508119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1509126470Sjulian error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, 1510126470Sjulian command); 1511119917Swpaul break; 1512119917Swpaul default: 1513133282Sdes error = ether_ioctl(ifp, command, data); 1514119917Swpaul break; 1515119917Swpaul } 1516119917Swpaul 1517133282Sdes return (error); 1518119917Swpaul} 1519119917Swpaul 1520119917Swpaulstatic void 1521119917Swpaulbfe_watchdog(struct ifnet *ifp) 1522119917Swpaul{ 1523119917Swpaul struct bfe_softc *sc; 1524119917Swpaul 1525119917Swpaul sc = ifp->if_softc; 1526119917Swpaul 1527119917Swpaul BFE_LOCK(sc); 1528119917Swpaul 1529119917Swpaul printf("bfe%d: watchdog timeout -- resetting\n", sc->bfe_unit); 1530119917Swpaul 1531148887Srwatson ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1532136804Smtm bfe_init_locked(sc); 1533119917Swpaul 1534119917Swpaul ifp->if_oerrors++; 1535119917Swpaul 1536119917Swpaul BFE_UNLOCK(sc); 1537119917Swpaul} 1538119917Swpaul 1539119917Swpaulstatic void 1540119917Swpaulbfe_tick(void *xsc) 1541119917Swpaul{ 1542119917Swpaul struct bfe_softc *sc = xsc; 1543119917Swpaul struct mii_data *mii; 1544119917Swpaul 1545119917Swpaul if (sc == NULL) 1546119917Swpaul return; 1547119917Swpaul 1548119917Swpaul BFE_LOCK(sc); 1549119917Swpaul 1550119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1551119917Swpaul 1552119917Swpaul bfe_stats_update(sc); 1553119917Swpaul sc->bfe_stat_ch = timeout(bfe_tick, sc, hz); 1554119917Swpaul 1555119917Swpaul if(sc->bfe_link) { 1556119917Swpaul BFE_UNLOCK(sc); 1557119917Swpaul return; 1558119917Swpaul } 1559119917Swpaul 1560119917Swpaul mii_tick(mii); 1561119917Swpaul if (!sc->bfe_link && mii->mii_media_status & IFM_ACTIVE && 1562133282Sdes IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) 1563119917Swpaul sc->bfe_link++; 1564119917Swpaul 1565119917Swpaul BFE_UNLOCK(sc); 1566119917Swpaul} 1567119917Swpaul 1568119917Swpaul/* 1569119917Swpaul * Stop the adapter and free any mbufs allocated to the 1570119917Swpaul * RX and TX lists. 1571119917Swpaul */ 1572119917Swpaulstatic void 1573119917Swpaulbfe_stop(struct bfe_softc *sc) 1574119917Swpaul{ 1575119917Swpaul struct ifnet *ifp; 1576119917Swpaul 1577136804Smtm BFE_LOCK_ASSERT(sc); 1578119917Swpaul 1579119917Swpaul untimeout(bfe_tick, sc, sc->bfe_stat_ch); 1580119917Swpaul 1581147256Sbrooks ifp = sc->bfe_ifp; 1582119917Swpaul 1583119917Swpaul bfe_chip_halt(sc); 1584126470Sjulian bfe_tx_ring_free(sc); 1585119917Swpaul bfe_rx_ring_free(sc); 1586119917Swpaul 1587148887Srwatson ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1588119917Swpaul} 1589