if_bfe.c revision 136269
1119917Swpaul/* 2119917Swpaul * Copyright (c) 2003 Stuart Walsh<stu@ipng.org.uk> 3119917Swpaul * and Duncan Barclay<dmlb@dmlb.org> 4119917Swpaul */ 5119917Swpaul 6119917Swpaul/* 7119917Swpaul * Redistribution and use in source and binary forms, with or without 8119917Swpaul * modification, are permitted provided that the following conditions 9119917Swpaul * are met: 10119917Swpaul * 1. Redistributions of source code must retain the above copyright 11119917Swpaul * notice, this list of conditions and the following disclaimer. 12119917Swpaul * 2. Redistributions in binary form must reproduce the above copyright 13119917Swpaul * notice, this list of conditions and the following disclaimer in the 14119917Swpaul * documentation and/or other materials provided with the distribution. 15119917Swpaul * 16119917Swpaul * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS 'AS IS' AND 17119917Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18119917Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19119917Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20119917Swpaul * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21119917Swpaul * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22119917Swpaul * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23119917Swpaul * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24119917Swpaul * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25119917Swpaul * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26119917Swpaul * SUCH DAMAGE. 27119917Swpaul */ 28119917Swpaul 29119917Swpaul 30119917Swpaul#include <sys/cdefs.h> 31119917Swpaul__FBSDID("$FreeBSD: head/sys/dev/bfe/if_bfe.c 136269 2004-10-08 16:14:42Z mlaier $"); 32119917Swpaul 33119917Swpaul#include <sys/param.h> 34119917Swpaul#include <sys/systm.h> 35119917Swpaul#include <sys/sockio.h> 36119917Swpaul#include <sys/mbuf.h> 37119917Swpaul#include <sys/malloc.h> 38119917Swpaul#include <sys/kernel.h> 39129879Sphk#include <sys/module.h> 40119917Swpaul#include <sys/socket.h> 41119917Swpaul#include <sys/queue.h> 42119917Swpaul 43119917Swpaul#include <net/if.h> 44119917Swpaul#include <net/if_arp.h> 45119917Swpaul#include <net/ethernet.h> 46119917Swpaul#include <net/if_dl.h> 47119917Swpaul#include <net/if_media.h> 48119917Swpaul 49119917Swpaul#include <net/bpf.h> 50119917Swpaul 51119917Swpaul#include <net/if_types.h> 52119917Swpaul#include <net/if_vlan_var.h> 53119917Swpaul 54119917Swpaul#include <netinet/in_systm.h> 55119917Swpaul#include <netinet/in.h> 56119917Swpaul#include <netinet/ip.h> 57119917Swpaul 58119917Swpaul#include <machine/clock.h> /* for DELAY */ 59119917Swpaul#include <machine/bus_memio.h> 60119917Swpaul#include <machine/bus.h> 61119917Swpaul#include <machine/resource.h> 62119917Swpaul#include <sys/bus.h> 63119917Swpaul#include <sys/rman.h> 64119917Swpaul 65119917Swpaul#include <dev/mii/mii.h> 66119917Swpaul#include <dev/mii/miivar.h> 67119917Swpaul#include "miidevs.h" 68119917Swpaul 69119917Swpaul#include <dev/pci/pcireg.h> 70119917Swpaul#include <dev/pci/pcivar.h> 71119917Swpaul 72119917Swpaul#include <dev/bfe/if_bfereg.h> 73119917Swpaul 74119917SwpaulMODULE_DEPEND(bfe, pci, 1, 1, 1); 75119917SwpaulMODULE_DEPEND(bfe, ether, 1, 1, 1); 76119917SwpaulMODULE_DEPEND(bfe, miibus, 1, 1, 1); 77119917Swpaul 78119917Swpaul/* "controller miibus0" required. See GENERIC if you get errors here. */ 79119917Swpaul#include "miibus_if.h" 80119917Swpaul 81119917Swpaul#define BFE_DEVDESC_MAX 64 /* Maximum device description length */ 82119917Swpaul 83119917Swpaulstatic struct bfe_type bfe_devs[] = { 84119917Swpaul { BCOM_VENDORID, BCOM_DEVICEID_BCM4401, 85119917Swpaul "Broadcom BCM4401 Fast Ethernet" }, 86134590Sdes { BCOM_VENDORID, BCOM_DEVICEID_BCM4401B0, 87134590Sdes "Broadcom BCM4401-B0 Fast Ethernet" }, 88119917Swpaul { 0, 0, NULL } 89119917Swpaul}; 90119917Swpaul 91119917Swpaulstatic int bfe_probe (device_t); 92119917Swpaulstatic int bfe_attach (device_t); 93119917Swpaulstatic int bfe_detach (device_t); 94119917Swpaulstatic void bfe_release_resources (struct bfe_softc *); 95119917Swpaulstatic void bfe_intr (void *); 96119917Swpaulstatic void bfe_start (struct ifnet *); 97119917Swpaulstatic int bfe_ioctl (struct ifnet *, u_long, caddr_t); 98119917Swpaulstatic void bfe_init (void *); 99119917Swpaulstatic void bfe_stop (struct bfe_softc *); 100119917Swpaulstatic void bfe_watchdog (struct ifnet *); 101119917Swpaulstatic void bfe_shutdown (device_t); 102119917Swpaulstatic void bfe_tick (void *); 103119917Swpaulstatic void bfe_txeof (struct bfe_softc *); 104119917Swpaulstatic void bfe_rxeof (struct bfe_softc *); 105119917Swpaulstatic void bfe_set_rx_mode (struct bfe_softc *); 106119917Swpaulstatic int bfe_list_rx_init (struct bfe_softc *); 107119917Swpaulstatic int bfe_list_newbuf (struct bfe_softc *, int, struct mbuf*); 108119917Swpaulstatic void bfe_rx_ring_free (struct bfe_softc *); 109119917Swpaul 110119917Swpaulstatic void bfe_pci_setup (struct bfe_softc *, u_int32_t); 111119917Swpaulstatic int bfe_ifmedia_upd (struct ifnet *); 112119917Swpaulstatic void bfe_ifmedia_sts (struct ifnet *, struct ifmediareq *); 113119917Swpaulstatic int bfe_miibus_readreg (device_t, int, int); 114119917Swpaulstatic int bfe_miibus_writereg (device_t, int, int, int); 115119917Swpaulstatic void bfe_miibus_statchg (device_t); 116133282Sdesstatic int bfe_wait_bit (struct bfe_softc *, u_int32_t, u_int32_t, 117119917Swpaul u_long, const int); 118119917Swpaulstatic void bfe_get_config (struct bfe_softc *sc); 119119917Swpaulstatic void bfe_read_eeprom (struct bfe_softc *, u_int8_t *); 120119917Swpaulstatic void bfe_stats_update (struct bfe_softc *); 121119917Swpaulstatic void bfe_clear_stats (struct bfe_softc *); 122119917Swpaulstatic int bfe_readphy (struct bfe_softc *, u_int32_t, u_int32_t*); 123119917Swpaulstatic int bfe_writephy (struct bfe_softc *, u_int32_t, u_int32_t); 124119917Swpaulstatic int bfe_resetphy (struct bfe_softc *); 125119917Swpaulstatic int bfe_setupphy (struct bfe_softc *); 126119917Swpaulstatic void bfe_chip_reset (struct bfe_softc *); 127119917Swpaulstatic void bfe_chip_halt (struct bfe_softc *); 128119917Swpaulstatic void bfe_core_reset (struct bfe_softc *); 129119917Swpaulstatic void bfe_core_disable (struct bfe_softc *); 130119917Swpaulstatic int bfe_dma_alloc (device_t); 131119917Swpaulstatic void bfe_dma_map_desc (void *, bus_dma_segment_t *, int, int); 132119917Swpaulstatic void bfe_dma_map (void *, bus_dma_segment_t *, int, int); 133119917Swpaulstatic void bfe_cam_write (struct bfe_softc *, u_char *, int); 134119917Swpaul 135119917Swpaulstatic device_method_t bfe_methods[] = { 136119917Swpaul /* Device interface */ 137119917Swpaul DEVMETHOD(device_probe, bfe_probe), 138119917Swpaul DEVMETHOD(device_attach, bfe_attach), 139119917Swpaul DEVMETHOD(device_detach, bfe_detach), 140119917Swpaul DEVMETHOD(device_shutdown, bfe_shutdown), 141119917Swpaul 142119917Swpaul /* bus interface */ 143119917Swpaul DEVMETHOD(bus_print_child, bus_generic_print_child), 144119917Swpaul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 145119917Swpaul 146119917Swpaul /* MII interface */ 147119917Swpaul DEVMETHOD(miibus_readreg, bfe_miibus_readreg), 148119917Swpaul DEVMETHOD(miibus_writereg, bfe_miibus_writereg), 149119917Swpaul DEVMETHOD(miibus_statchg, bfe_miibus_statchg), 150119917Swpaul 151119917Swpaul { 0, 0 } 152119917Swpaul}; 153119917Swpaul 154119917Swpaulstatic driver_t bfe_driver = { 155119917Swpaul "bfe", 156119917Swpaul bfe_methods, 157119917Swpaul sizeof(struct bfe_softc) 158119917Swpaul}; 159119917Swpaul 160119917Swpaulstatic devclass_t bfe_devclass; 161119917Swpaul 162119917SwpaulDRIVER_MODULE(bfe, pci, bfe_driver, bfe_devclass, 0, 0); 163119917SwpaulDRIVER_MODULE(miibus, bfe, miibus_driver, miibus_devclass, 0, 0); 164119917Swpaul 165119917Swpaul/* 166133282Sdes * Probe for a Broadcom 4401 chip. 167119917Swpaul */ 168119917Swpaulstatic int 169119917Swpaulbfe_probe(device_t dev) 170119917Swpaul{ 171119917Swpaul struct bfe_type *t; 172119917Swpaul struct bfe_softc *sc; 173119917Swpaul 174119917Swpaul t = bfe_devs; 175119917Swpaul 176119917Swpaul sc = device_get_softc(dev); 177119917Swpaul bzero(sc, sizeof(struct bfe_softc)); 178119917Swpaul sc->bfe_unit = device_get_unit(dev); 179119917Swpaul sc->bfe_dev = dev; 180119917Swpaul 181119917Swpaul while(t->bfe_name != NULL) { 182119917Swpaul if ((pci_get_vendor(dev) == t->bfe_vid) && 183119917Swpaul (pci_get_device(dev) == t->bfe_did)) { 184119917Swpaul device_set_desc_copy(dev, t->bfe_name); 185133282Sdes return (0); 186119917Swpaul } 187119917Swpaul t++; 188119917Swpaul } 189119917Swpaul 190133282Sdes return (ENXIO); 191119917Swpaul} 192119917Swpaul 193119917Swpaulstatic int 194119917Swpaulbfe_dma_alloc(device_t dev) 195119917Swpaul{ 196119917Swpaul struct bfe_softc *sc; 197119917Swpaul int error, i; 198119917Swpaul 199119917Swpaul sc = device_get_softc(dev); 200119917Swpaul 201119917Swpaul /* parent tag */ 202119917Swpaul error = bus_dma_tag_create(NULL, /* parent */ 203119917Swpaul PAGE_SIZE, 0, /* alignment, boundary */ 204133282Sdes BUS_SPACE_MAXADDR, /* lowaddr */ 205119917Swpaul BUS_SPACE_MAXADDR_32BIT, /* highaddr */ 206119917Swpaul NULL, NULL, /* filter, filterarg */ 207119917Swpaul MAXBSIZE, /* maxsize */ 208119917Swpaul BUS_SPACE_UNRESTRICTED, /* num of segments */ 209119917Swpaul BUS_SPACE_MAXSIZE_32BIT, /* max segment size */ 210119917Swpaul BUS_DMA_ALLOCNOW, /* flags */ 211119917Swpaul NULL, NULL, /* lockfunc, lockarg */ 212119917Swpaul &sc->bfe_parent_tag); 213119917Swpaul 214119917Swpaul /* tag for TX ring */ 215126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 216126470Sjulian BFE_TX_LIST_SIZE, BFE_TX_LIST_SIZE, 217126470Sjulian BUS_SPACE_MAXADDR, 218133282Sdes BUS_SPACE_MAXADDR, 219126470Sjulian NULL, NULL, 220126470Sjulian BFE_TX_LIST_SIZE, 221126470Sjulian 1, 222126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 223126470Sjulian 0, 224126470Sjulian NULL, NULL, 225126470Sjulian &sc->bfe_tx_tag); 226119917Swpaul 227119917Swpaul if (error) { 228119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 229133282Sdes return (ENOMEM); 230119917Swpaul } 231119917Swpaul 232119917Swpaul /* tag for RX ring */ 233126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 234126470Sjulian BFE_RX_LIST_SIZE, BFE_RX_LIST_SIZE, 235126470Sjulian BUS_SPACE_MAXADDR, 236126470Sjulian BUS_SPACE_MAXADDR, 237126470Sjulian NULL, NULL, 238126470Sjulian BFE_RX_LIST_SIZE, 239126470Sjulian 1, 240126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 241126470Sjulian 0, 242126470Sjulian NULL, NULL, 243126470Sjulian &sc->bfe_rx_tag); 244119917Swpaul 245119917Swpaul if (error) { 246119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 247133282Sdes return (ENOMEM); 248119917Swpaul } 249119917Swpaul 250119917Swpaul /* tag for mbufs */ 251126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 252126470Sjulian ETHER_ALIGN, 0, 253126470Sjulian BUS_SPACE_MAXADDR, 254126470Sjulian BUS_SPACE_MAXADDR, 255126470Sjulian NULL, NULL, 256126470Sjulian MCLBYTES, 257126470Sjulian 1, 258126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 259126470Sjulian 0, 260126470Sjulian NULL, NULL, 261126470Sjulian &sc->bfe_tag); 262119917Swpaul 263119917Swpaul if (error) { 264119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 265133282Sdes return (ENOMEM); 266119917Swpaul } 267119917Swpaul 268119917Swpaul /* pre allocate dmamaps for RX list */ 269119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 270126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 271126470Sjulian &sc->bfe_rx_ring[i].bfe_map); 272119917Swpaul if (error) { 273119917Swpaul device_printf(dev, "cannot create DMA map for RX\n"); 274133282Sdes return (ENOMEM); 275119917Swpaul } 276119917Swpaul } 277119917Swpaul 278119917Swpaul /* pre allocate dmamaps for TX list */ 279119917Swpaul for (i = 0; i < BFE_TX_LIST_CNT; i++) { 280126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 281126470Sjulian &sc->bfe_tx_ring[i].bfe_map); 282119917Swpaul if (error) { 283119917Swpaul device_printf(dev, "cannot create DMA map for TX\n"); 284133282Sdes return (ENOMEM); 285119917Swpaul } 286119917Swpaul } 287119917Swpaul 288119917Swpaul /* Alloc dma for rx ring */ 289119917Swpaul error = bus_dmamem_alloc(sc->bfe_rx_tag, (void *)&sc->bfe_rx_list, 290119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_rx_map); 291119917Swpaul 292119917Swpaul if(error) 293133282Sdes return (ENOMEM); 294119917Swpaul 295119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 296119917Swpaul error = bus_dmamap_load(sc->bfe_rx_tag, sc->bfe_rx_map, 297119917Swpaul sc->bfe_rx_list, sizeof(struct bfe_desc), 298119917Swpaul bfe_dma_map, &sc->bfe_rx_dma, 0); 299119917Swpaul 300119917Swpaul if(error) 301133282Sdes return (ENOMEM); 302119917Swpaul 303119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 304119917Swpaul 305133282Sdes error = bus_dmamem_alloc(sc->bfe_tx_tag, (void *)&sc->bfe_tx_list, 306119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_tx_map); 307133282Sdes if (error) 308133282Sdes return (ENOMEM); 309119917Swpaul 310119917Swpaul 311133282Sdes error = bus_dmamap_load(sc->bfe_tx_tag, sc->bfe_tx_map, 312133282Sdes sc->bfe_tx_list, sizeof(struct bfe_desc), 313119917Swpaul bfe_dma_map, &sc->bfe_tx_dma, 0); 314119917Swpaul if(error) 315133282Sdes return (ENOMEM); 316119917Swpaul 317119917Swpaul bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 318119917Swpaul bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 319119917Swpaul 320133282Sdes return (0); 321119917Swpaul} 322119917Swpaul 323119917Swpaulstatic int 324119917Swpaulbfe_attach(device_t dev) 325119917Swpaul{ 326119917Swpaul struct ifnet *ifp; 327119917Swpaul struct bfe_softc *sc; 328119917Swpaul int unit, error = 0, rid; 329119917Swpaul 330119917Swpaul sc = device_get_softc(dev); 331119917Swpaul mtx_init(&sc->bfe_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 332119917Swpaul MTX_DEF | MTX_RECURSE); 333119917Swpaul 334119917Swpaul unit = device_get_unit(dev); 335119917Swpaul sc->bfe_dev = dev; 336119917Swpaul sc->bfe_unit = unit; 337119917Swpaul 338119917Swpaul /* 339119917Swpaul * Handle power management nonsense. 340119917Swpaul */ 341119917Swpaul if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 342119917Swpaul u_int32_t membase, irq; 343119917Swpaul 344119917Swpaul /* Save important PCI config data. */ 345119917Swpaul membase = pci_read_config(dev, BFE_PCI_MEMLO, 4); 346119917Swpaul irq = pci_read_config(dev, BFE_PCI_INTLINE, 4); 347119917Swpaul 348119917Swpaul /* Reset the power state. */ 349126470Sjulian printf("bfe%d: chip is is in D%d power mode -- setting to D0\n", 350119917Swpaul sc->bfe_unit, pci_get_powerstate(dev)); 351119917Swpaul 352119917Swpaul pci_set_powerstate(dev, PCI_POWERSTATE_D0); 353119917Swpaul 354119917Swpaul /* Restore PCI config data. */ 355119917Swpaul pci_write_config(dev, BFE_PCI_MEMLO, membase, 4); 356119917Swpaul pci_write_config(dev, BFE_PCI_INTLINE, irq, 4); 357119917Swpaul } 358119917Swpaul 359119917Swpaul /* 360119917Swpaul * Map control/status registers. 361119917Swpaul */ 362119917Swpaul pci_enable_busmaster(dev); 363119917Swpaul 364119917Swpaul rid = BFE_PCI_MEMLO; 365127135Snjl sc->bfe_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 366119917Swpaul RF_ACTIVE); 367119917Swpaul if (sc->bfe_res == NULL) { 368119917Swpaul printf ("bfe%d: couldn't map memory\n", unit); 369119917Swpaul error = ENXIO; 370119917Swpaul goto fail; 371119917Swpaul } 372119917Swpaul 373119917Swpaul sc->bfe_btag = rman_get_bustag(sc->bfe_res); 374119917Swpaul sc->bfe_bhandle = rman_get_bushandle(sc->bfe_res); 375119917Swpaul sc->bfe_vhandle = (vm_offset_t)rman_get_virtual(sc->bfe_res); 376119917Swpaul 377119917Swpaul /* Allocate interrupt */ 378119917Swpaul rid = 0; 379119917Swpaul 380127135Snjl sc->bfe_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 381119917Swpaul RF_SHAREABLE | RF_ACTIVE); 382119917Swpaul if (sc->bfe_irq == NULL) { 383119917Swpaul printf("bfe%d: couldn't map interrupt\n", unit); 384119917Swpaul error = ENXIO; 385119917Swpaul goto fail; 386119917Swpaul } 387119917Swpaul 388119917Swpaul if (bfe_dma_alloc(dev)) { 389126470Sjulian printf("bfe%d: failed to allocate DMA resources\n", 390126470Sjulian sc->bfe_unit); 391119917Swpaul bfe_release_resources(sc); 392119917Swpaul error = ENXIO; 393119917Swpaul goto fail; 394119917Swpaul } 395119917Swpaul 396119917Swpaul /* Set up ifnet structure */ 397119917Swpaul ifp = &sc->arpcom.ac_if; 398119917Swpaul ifp->if_softc = sc; 399121816Sbrooks if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 400119917Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 401119917Swpaul ifp->if_ioctl = bfe_ioctl; 402119917Swpaul ifp->if_start = bfe_start; 403119917Swpaul ifp->if_watchdog = bfe_watchdog; 404119917Swpaul ifp->if_init = bfe_init; 405119917Swpaul ifp->if_mtu = ETHERMTU; 406129708Sdes ifp->if_baudrate = 100000000; 407131455Smlaier IFQ_SET_MAXLEN(&ifp->if_snd, BFE_TX_QLEN); 408131455Smlaier ifp->if_snd.ifq_drv_maxlen = BFE_TX_QLEN; 409131455Smlaier IFQ_SET_READY(&ifp->if_snd); 410119917Swpaul 411119917Swpaul bfe_get_config(sc); 412119917Swpaul 413119917Swpaul /* Reset the chip and turn on the PHY */ 414119917Swpaul bfe_chip_reset(sc); 415119917Swpaul 416119917Swpaul if (mii_phy_probe(dev, &sc->bfe_miibus, 417119917Swpaul bfe_ifmedia_upd, bfe_ifmedia_sts)) { 418119917Swpaul printf("bfe%d: MII without any PHY!\n", sc->bfe_unit); 419119917Swpaul error = ENXIO; 420119917Swpaul goto fail; 421119917Swpaul } 422119917Swpaul 423119917Swpaul ether_ifattach(ifp, sc->arpcom.ac_enaddr); 424119917Swpaul callout_handle_init(&sc->bfe_stat_ch); 425119917Swpaul 426119917Swpaul /* 427129708Sdes * Tell the upper layer(s) we support long frames. 428129708Sdes */ 429129708Sdes ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 430129708Sdes ifp->if_capabilities |= IFCAP_VLAN_MTU; 431129709Sdes ifp->if_capenable |= IFCAP_VLAN_MTU; 432129708Sdes 433129708Sdes /* 434119917Swpaul * Hook interrupt last to avoid having to lock softc 435119917Swpaul */ 436119917Swpaul error = bus_setup_intr(dev, sc->bfe_irq, INTR_TYPE_NET, 437119917Swpaul bfe_intr, sc, &sc->bfe_intrhand); 438119917Swpaul 439119917Swpaul if (error) { 440119917Swpaul bfe_release_resources(sc); 441119917Swpaul printf("bfe%d: couldn't set up irq\n", unit); 442119917Swpaul goto fail; 443119917Swpaul } 444119917Swpaulfail: 445119917Swpaul if(error) 446119917Swpaul bfe_release_resources(sc); 447133282Sdes return (error); 448119917Swpaul} 449119917Swpaul 450119917Swpaulstatic int 451119917Swpaulbfe_detach(device_t dev) 452119917Swpaul{ 453119917Swpaul struct bfe_softc *sc; 454119917Swpaul struct ifnet *ifp; 455119917Swpaul 456119917Swpaul sc = device_get_softc(dev); 457119917Swpaul 458119917Swpaul KASSERT(mtx_initialized(&sc->bfe_mtx), ("bfe mutex not initialized")); 459119917Swpaul BFE_LOCK(scp); 460119917Swpaul 461119917Swpaul ifp = &sc->arpcom.ac_if; 462119917Swpaul 463119917Swpaul if (device_is_attached(dev)) { 464119917Swpaul bfe_stop(sc); 465119917Swpaul ether_ifdetach(ifp); 466119917Swpaul } 467119917Swpaul 468119917Swpaul bfe_chip_reset(sc); 469119917Swpaul 470119917Swpaul bus_generic_detach(dev); 471119917Swpaul if(sc->bfe_miibus != NULL) 472119917Swpaul device_delete_child(dev, sc->bfe_miibus); 473119917Swpaul 474119917Swpaul bfe_release_resources(sc); 475119917Swpaul BFE_UNLOCK(sc); 476119917Swpaul mtx_destroy(&sc->bfe_mtx); 477119917Swpaul 478133282Sdes return (0); 479119917Swpaul} 480119917Swpaul 481119917Swpaul/* 482119917Swpaul * Stop all chip I/O so that the kernel's probe routines don't 483119917Swpaul * get confused by errant DMAs when rebooting. 484119917Swpaul */ 485119917Swpaulstatic void 486119917Swpaulbfe_shutdown(device_t dev) 487119917Swpaul{ 488119917Swpaul struct bfe_softc *sc; 489119917Swpaul 490119917Swpaul sc = device_get_softc(dev); 491119917Swpaul BFE_LOCK(sc); 492133282Sdes bfe_stop(sc); 493119917Swpaul 494119917Swpaul BFE_UNLOCK(sc); 495119917Swpaul return; 496119917Swpaul} 497119917Swpaul 498119917Swpaulstatic int 499119917Swpaulbfe_miibus_readreg(device_t dev, int phy, int reg) 500119917Swpaul{ 501119917Swpaul struct bfe_softc *sc; 502119917Swpaul u_int32_t ret; 503119917Swpaul 504119917Swpaul sc = device_get_softc(dev); 505119917Swpaul if(phy != sc->bfe_phyaddr) 506133282Sdes return (0); 507119917Swpaul bfe_readphy(sc, reg, &ret); 508119917Swpaul 509133282Sdes return (ret); 510119917Swpaul} 511119917Swpaul 512119917Swpaulstatic int 513119917Swpaulbfe_miibus_writereg(device_t dev, int phy, int reg, int val) 514119917Swpaul{ 515119917Swpaul struct bfe_softc *sc; 516119917Swpaul 517119917Swpaul sc = device_get_softc(dev); 518119917Swpaul if(phy != sc->bfe_phyaddr) 519133282Sdes return (0); 520133282Sdes bfe_writephy(sc, reg, val); 521119917Swpaul 522133282Sdes return (0); 523119917Swpaul} 524119917Swpaul 525119917Swpaulstatic void 526119917Swpaulbfe_miibus_statchg(device_t dev) 527119917Swpaul{ 528119917Swpaul return; 529119917Swpaul} 530119917Swpaul 531119917Swpaulstatic void 532119917Swpaulbfe_tx_ring_free(struct bfe_softc *sc) 533119917Swpaul{ 534126470Sjulian int i; 535133282Sdes 536126470Sjulian for(i = 0; i < BFE_TX_LIST_CNT; i++) { 537126470Sjulian if(sc->bfe_tx_ring[i].bfe_mbuf != NULL) { 538126470Sjulian m_freem(sc->bfe_tx_ring[i].bfe_mbuf); 539126470Sjulian sc->bfe_tx_ring[i].bfe_mbuf = NULL; 540126470Sjulian bus_dmamap_unload(sc->bfe_tag, 541126470Sjulian sc->bfe_tx_ring[i].bfe_map); 542126470Sjulian bus_dmamap_destroy(sc->bfe_tag, 543126470Sjulian sc->bfe_tx_ring[i].bfe_map); 544126470Sjulian } 545126470Sjulian } 546126470Sjulian bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 547126470Sjulian bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 548119917Swpaul} 549119917Swpaul 550119917Swpaulstatic void 551119917Swpaulbfe_rx_ring_free(struct bfe_softc *sc) 552119917Swpaul{ 553119917Swpaul int i; 554119917Swpaul 555119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 556119917Swpaul if (sc->bfe_rx_ring[i].bfe_mbuf != NULL) { 557119917Swpaul m_freem(sc->bfe_rx_ring[i].bfe_mbuf); 558119917Swpaul sc->bfe_rx_ring[i].bfe_mbuf = NULL; 559119917Swpaul bus_dmamap_unload(sc->bfe_tag, 560119917Swpaul sc->bfe_rx_ring[i].bfe_map); 561119917Swpaul bus_dmamap_destroy(sc->bfe_tag, 562119917Swpaul sc->bfe_rx_ring[i].bfe_map); 563119917Swpaul } 564119917Swpaul } 565119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 566119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 567119917Swpaul} 568119917Swpaul 569119917Swpaul 570133282Sdesstatic int 571119917Swpaulbfe_list_rx_init(struct bfe_softc *sc) 572119917Swpaul{ 573119917Swpaul int i; 574119917Swpaul 575119917Swpaul for(i = 0; i < BFE_RX_LIST_CNT; i++) { 576133282Sdes if(bfe_list_newbuf(sc, i, NULL) == ENOBUFS) 577133282Sdes return (ENOBUFS); 578119917Swpaul } 579119917Swpaul 580119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 581119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_PTR, (i * sizeof(struct bfe_desc))); 582119917Swpaul 583119917Swpaul sc->bfe_rx_cons = 0; 584119917Swpaul 585133282Sdes return (0); 586119917Swpaul} 587119917Swpaul 588119917Swpaulstatic int 589119917Swpaulbfe_list_newbuf(struct bfe_softc *sc, int c, struct mbuf *m) 590119917Swpaul{ 591119917Swpaul struct bfe_rxheader *rx_header; 592119917Swpaul struct bfe_desc *d; 593119917Swpaul struct bfe_data *r; 594119917Swpaul u_int32_t ctrl; 595119917Swpaul 596119917Swpaul if ((c < 0) || (c >= BFE_RX_LIST_CNT)) 597133282Sdes return (EINVAL); 598119917Swpaul 599119917Swpaul if(m == NULL) { 600119917Swpaul m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 601119917Swpaul if(m == NULL) 602133282Sdes return (ENOBUFS); 603119917Swpaul m->m_len = m->m_pkthdr.len = MCLBYTES; 604119917Swpaul } 605119917Swpaul else 606119917Swpaul m->m_data = m->m_ext.ext_buf; 607119917Swpaul 608119917Swpaul rx_header = mtod(m, struct bfe_rxheader *); 609119917Swpaul rx_header->len = 0; 610119917Swpaul rx_header->flags = 0; 611119917Swpaul 612119917Swpaul /* Map the mbuf into DMA */ 613119917Swpaul sc->bfe_rx_cnt = c; 614119917Swpaul d = &sc->bfe_rx_list[c]; 615119917Swpaul r = &sc->bfe_rx_ring[c]; 616133282Sdes bus_dmamap_load(sc->bfe_tag, r->bfe_map, mtod(m, void *), 617119917Swpaul MCLBYTES, bfe_dma_map_desc, d, 0); 618119917Swpaul bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_PREWRITE); 619119917Swpaul 620119917Swpaul ctrl = ETHER_MAX_LEN + 32; 621119917Swpaul 622119917Swpaul if(c == BFE_RX_LIST_CNT - 1) 623119917Swpaul ctrl |= BFE_DESC_EOT; 624119917Swpaul 625119917Swpaul d->bfe_ctrl = ctrl; 626119917Swpaul r->bfe_mbuf = m; 627119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 628133282Sdes return (0); 629119917Swpaul} 630119917Swpaul 631119917Swpaulstatic void 632119917Swpaulbfe_get_config(struct bfe_softc *sc) 633119917Swpaul{ 634119917Swpaul u_int8_t eeprom[128]; 635119917Swpaul 636119917Swpaul bfe_read_eeprom(sc, eeprom); 637119917Swpaul 638119917Swpaul sc->arpcom.ac_enaddr[0] = eeprom[79]; 639119917Swpaul sc->arpcom.ac_enaddr[1] = eeprom[78]; 640119917Swpaul sc->arpcom.ac_enaddr[2] = eeprom[81]; 641119917Swpaul sc->arpcom.ac_enaddr[3] = eeprom[80]; 642119917Swpaul sc->arpcom.ac_enaddr[4] = eeprom[83]; 643119917Swpaul sc->arpcom.ac_enaddr[5] = eeprom[82]; 644119917Swpaul 645119917Swpaul sc->bfe_phyaddr = eeprom[90] & 0x1f; 646119917Swpaul sc->bfe_mdc_port = (eeprom[90] >> 14) & 0x1; 647119917Swpaul 648133282Sdes sc->bfe_core_unit = 0; 649119917Swpaul sc->bfe_dma_offset = BFE_PCI_DMA; 650119917Swpaul} 651119917Swpaul 652119917Swpaulstatic void 653119917Swpaulbfe_pci_setup(struct bfe_softc *sc, u_int32_t cores) 654119917Swpaul{ 655119917Swpaul u_int32_t bar_orig, pci_rev, val; 656119917Swpaul 657119917Swpaul bar_orig = pci_read_config(sc->bfe_dev, BFE_BAR0_WIN, 4); 658119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, BFE_REG_PCI, 4); 659119917Swpaul pci_rev = CSR_READ_4(sc, BFE_SBIDHIGH) & BFE_RC_MASK; 660119917Swpaul 661119917Swpaul val = CSR_READ_4(sc, BFE_SBINTVEC); 662119917Swpaul val |= cores; 663119917Swpaul CSR_WRITE_4(sc, BFE_SBINTVEC, val); 664119917Swpaul 665119917Swpaul val = CSR_READ_4(sc, BFE_SSB_PCI_TRANS_2); 666119917Swpaul val |= BFE_SSB_PCI_PREF | BFE_SSB_PCI_BURST; 667119917Swpaul CSR_WRITE_4(sc, BFE_SSB_PCI_TRANS_2, val); 668119917Swpaul 669119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, bar_orig, 4); 670119917Swpaul} 671119917Swpaul 672133282Sdesstatic void 673119917Swpaulbfe_clear_stats(struct bfe_softc *sc) 674119917Swpaul{ 675119917Swpaul u_long reg; 676119917Swpaul 677119917Swpaul BFE_LOCK(sc); 678119917Swpaul 679119917Swpaul CSR_WRITE_4(sc, BFE_MIB_CTRL, BFE_MIB_CLR_ON_READ); 680119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) 681119917Swpaul CSR_READ_4(sc, reg); 682119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) 683119917Swpaul CSR_READ_4(sc, reg); 684119917Swpaul 685119917Swpaul BFE_UNLOCK(sc); 686119917Swpaul} 687119917Swpaul 688133282Sdesstatic int 689119917Swpaulbfe_resetphy(struct bfe_softc *sc) 690119917Swpaul{ 691119917Swpaul u_int32_t val; 692119917Swpaul 693119917Swpaul BFE_LOCK(sc); 694119917Swpaul bfe_writephy(sc, 0, BMCR_RESET); 695119917Swpaul DELAY(100); 696119917Swpaul bfe_readphy(sc, 0, &val); 697119917Swpaul if (val & BMCR_RESET) { 698119917Swpaul printf("bfe%d: PHY Reset would not complete.\n", sc->bfe_unit); 699119917Swpaul BFE_UNLOCK(sc); 700133282Sdes return (ENXIO); 701119917Swpaul } 702119917Swpaul BFE_UNLOCK(sc); 703133282Sdes return (0); 704119917Swpaul} 705119917Swpaul 706119917Swpaulstatic void 707119917Swpaulbfe_chip_halt(struct bfe_softc *sc) 708119917Swpaul{ 709119917Swpaul BFE_LOCK(sc); 710119917Swpaul /* disable interrupts - not that it actually does..*/ 711119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, 0); 712119917Swpaul CSR_READ_4(sc, BFE_IMASK); 713119917Swpaul 714119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 715119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 200, 1); 716119917Swpaul 717119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 718119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 719119917Swpaul DELAY(10); 720119917Swpaul 721119917Swpaul BFE_UNLOCK(sc); 722119917Swpaul} 723119917Swpaul 724119917Swpaulstatic void 725119917Swpaulbfe_chip_reset(struct bfe_softc *sc) 726119917Swpaul{ 727133282Sdes u_int32_t val; 728119917Swpaul 729119917Swpaul BFE_LOCK(sc); 730119917Swpaul 731119917Swpaul /* Set the interrupt vector for the enet core */ 732119917Swpaul bfe_pci_setup(sc, BFE_INTVEC_ENET0); 733119917Swpaul 734119917Swpaul /* is core up? */ 735126470Sjulian val = CSR_READ_4(sc, BFE_SBTMSLOW) & 736126470Sjulian (BFE_RESET | BFE_REJECT | BFE_CLOCK); 737119917Swpaul if (val == BFE_CLOCK) { 738119917Swpaul /* It is, so shut it down */ 739119917Swpaul CSR_WRITE_4(sc, BFE_RCV_LAZY, 0); 740119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 741119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 100, 1); 742119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 743119917Swpaul sc->bfe_tx_cnt = sc->bfe_tx_prod = sc->bfe_tx_cons = 0; 744133282Sdes if (CSR_READ_4(sc, BFE_DMARX_STAT) & BFE_STAT_EMASK) 745126470Sjulian bfe_wait_bit(sc, BFE_DMARX_STAT, BFE_STAT_SIDLE, 746126470Sjulian 100, 0); 747119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 748119917Swpaul sc->bfe_rx_prod = sc->bfe_rx_cons = 0; 749119917Swpaul } 750119917Swpaul 751119917Swpaul bfe_core_reset(sc); 752119917Swpaul bfe_clear_stats(sc); 753119917Swpaul 754119917Swpaul /* 755119917Swpaul * We want the phy registers to be accessible even when 756119917Swpaul * the driver is "downed" so initialize MDC preamble, frequency, 757119917Swpaul * and whether internal or external phy here. 758119917Swpaul */ 759119917Swpaul 760119917Swpaul /* 4402 has 62.5Mhz SB clock and internal phy */ 761119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_CTRL, 0x8d); 762119917Swpaul 763119917Swpaul /* Internal or external PHY? */ 764119917Swpaul val = CSR_READ_4(sc, BFE_DEVCTRL); 765133282Sdes if(!(val & BFE_IPP)) 766119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_EPSEL); 767119917Swpaul else if(CSR_READ_4(sc, BFE_DEVCTRL) & BFE_EPR) { 768119917Swpaul BFE_AND(sc, BFE_DEVCTRL, ~BFE_EPR); 769119917Swpaul DELAY(100); 770119917Swpaul } 771119917Swpaul 772133282Sdes /* Enable CRC32 generation and set proper LED modes */ 773133282Sdes BFE_OR(sc, BFE_MAC_CTRL, BFE_CTRL_CRC32_ENAB | BFE_CTRL_LED); 774129602Sdmlb 775133282Sdes /* Reset or clear powerdown control bit */ 776133282Sdes BFE_AND(sc, BFE_MAC_CTRL, ~BFE_CTRL_PDOWN); 777129602Sdmlb 778133282Sdes CSR_WRITE_4(sc, BFE_RCV_LAZY, ((1 << BFE_LAZY_FC_SHIFT) & 779119917Swpaul BFE_LAZY_FC_MASK)); 780119917Swpaul 781133282Sdes /* 782126470Sjulian * We don't want lazy interrupts, so just send them at 783133282Sdes * the end of a frame, please 784119917Swpaul */ 785119917Swpaul BFE_OR(sc, BFE_RCV_LAZY, 0); 786119917Swpaul 787119917Swpaul /* Set max lengths, accounting for VLAN tags */ 788119917Swpaul CSR_WRITE_4(sc, BFE_RXMAXLEN, ETHER_MAX_LEN+32); 789119917Swpaul CSR_WRITE_4(sc, BFE_TXMAXLEN, ETHER_MAX_LEN+32); 790119917Swpaul 791119917Swpaul /* Set watermark XXX - magic */ 792119917Swpaul CSR_WRITE_4(sc, BFE_TX_WMARK, 56); 793119917Swpaul 794133282Sdes /* 795126470Sjulian * Initialise DMA channels 796133282Sdes * - not forgetting dma addresses need to be added to BFE_PCI_DMA 797119917Swpaul */ 798119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, BFE_TX_CTRL_ENABLE); 799119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_ADDR, sc->bfe_tx_dma + BFE_PCI_DMA); 800119917Swpaul 801133282Sdes CSR_WRITE_4(sc, BFE_DMARX_CTRL, (BFE_RX_OFFSET << BFE_RX_CTRL_ROSHIFT) | 802119917Swpaul BFE_RX_CTRL_ENABLE); 803119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_ADDR, sc->bfe_rx_dma + BFE_PCI_DMA); 804119917Swpaul 805119917Swpaul bfe_resetphy(sc); 806119917Swpaul bfe_setupphy(sc); 807119917Swpaul 808119917Swpaul BFE_UNLOCK(sc); 809119917Swpaul} 810119917Swpaul 811119917Swpaulstatic void 812119917Swpaulbfe_core_disable(struct bfe_softc *sc) 813119917Swpaul{ 814119917Swpaul if((CSR_READ_4(sc, BFE_SBTMSLOW)) & BFE_RESET) 815119917Swpaul return; 816119917Swpaul 817133282Sdes /* 818126470Sjulian * Set reject, wait for it set, then wait for the core to stop 819126470Sjulian * being busy, then set reset and reject and enable the clocks. 820119917Swpaul */ 821119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_CLOCK)); 822119917Swpaul bfe_wait_bit(sc, BFE_SBTMSLOW, BFE_REJECT, 1000, 0); 823119917Swpaul bfe_wait_bit(sc, BFE_SBTMSHIGH, BFE_BUSY, 1000, 1); 824119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_FGC | BFE_CLOCK | BFE_REJECT | 825119917Swpaul BFE_RESET)); 826119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 827119917Swpaul DELAY(10); 828119917Swpaul /* Leave reset and reject set */ 829119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_RESET)); 830119917Swpaul DELAY(10); 831119917Swpaul} 832119917Swpaul 833119917Swpaulstatic void 834119917Swpaulbfe_core_reset(struct bfe_softc *sc) 835119917Swpaul{ 836119917Swpaul u_int32_t val; 837119917Swpaul 838119917Swpaul /* Disable the core */ 839119917Swpaul bfe_core_disable(sc); 840119917Swpaul 841119917Swpaul /* and bring it back up */ 842119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_RESET | BFE_CLOCK | BFE_FGC)); 843119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 844119917Swpaul DELAY(10); 845119917Swpaul 846119917Swpaul /* Chip bug, clear SERR, IB and TO if they are set. */ 847119917Swpaul if (CSR_READ_4(sc, BFE_SBTMSHIGH) & BFE_SERR) 848119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSHIGH, 0); 849119917Swpaul val = CSR_READ_4(sc, BFE_SBIMSTATE); 850119917Swpaul if (val & (BFE_IBE | BFE_TO)) 851119917Swpaul CSR_WRITE_4(sc, BFE_SBIMSTATE, val & ~(BFE_IBE | BFE_TO)); 852119917Swpaul 853119917Swpaul /* Clear reset and allow it to move through the core */ 854119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_CLOCK | BFE_FGC)); 855119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 856119917Swpaul DELAY(10); 857119917Swpaul 858119917Swpaul /* Leave the clock set */ 859119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, BFE_CLOCK); 860119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 861119917Swpaul DELAY(10); 862119917Swpaul} 863119917Swpaul 864133282Sdesstatic void 865119917Swpaulbfe_cam_write(struct bfe_softc *sc, u_char *data, int index) 866119917Swpaul{ 867119917Swpaul u_int32_t val; 868119917Swpaul 869119917Swpaul val = ((u_int32_t) data[2]) << 24; 870119917Swpaul val |= ((u_int32_t) data[3]) << 16; 871119917Swpaul val |= ((u_int32_t) data[4]) << 8; 872119917Swpaul val |= ((u_int32_t) data[5]); 873119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_LO, val); 874119917Swpaul val = (BFE_CAM_HI_VALID | 875119917Swpaul (((u_int32_t) data[0]) << 8) | 876119917Swpaul (((u_int32_t) data[1]))); 877119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_HI, val); 878119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, (BFE_CAM_WRITE | 879129602Sdmlb ((u_int32_t) index << BFE_CAM_INDEX_SHIFT))); 880119917Swpaul bfe_wait_bit(sc, BFE_CAM_CTRL, BFE_CAM_BUSY, 10000, 1); 881119917Swpaul} 882119917Swpaul 883133282Sdesstatic void 884119917Swpaulbfe_set_rx_mode(struct bfe_softc *sc) 885119917Swpaul{ 886119917Swpaul struct ifnet *ifp = &sc->arpcom.ac_if; 887119917Swpaul struct ifmultiaddr *ifma; 888119917Swpaul u_int32_t val; 889119917Swpaul int i = 0; 890119917Swpaul 891119917Swpaul val = CSR_READ_4(sc, BFE_RXCONF); 892119917Swpaul 893119917Swpaul if (ifp->if_flags & IFF_PROMISC) 894119917Swpaul val |= BFE_RXCONF_PROMISC; 895119917Swpaul else 896119917Swpaul val &= ~BFE_RXCONF_PROMISC; 897119917Swpaul 898119917Swpaul if (ifp->if_flags & IFF_BROADCAST) 899119917Swpaul val &= ~BFE_RXCONF_DBCAST; 900119917Swpaul else 901119917Swpaul val |= BFE_RXCONF_DBCAST; 902119917Swpaul 903119917Swpaul 904119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, 0); 905119917Swpaul bfe_cam_write(sc, sc->arpcom.ac_enaddr, i++); 906119917Swpaul 907119917Swpaul if (ifp->if_flags & IFF_ALLMULTI) 908119917Swpaul val |= BFE_RXCONF_ALLMULTI; 909119917Swpaul else { 910119917Swpaul val &= ~BFE_RXCONF_ALLMULTI; 911119917Swpaul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 912119917Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 913119917Swpaul continue; 914126470Sjulian bfe_cam_write(sc, 915126470Sjulian LLADDR((struct sockaddr_dl *)ifma->ifma_addr), i++); 916119917Swpaul } 917119917Swpaul } 918119917Swpaul 919119917Swpaul CSR_WRITE_4(sc, BFE_RXCONF, val); 920119917Swpaul BFE_OR(sc, BFE_CAM_CTRL, BFE_CAM_ENABLE); 921119917Swpaul} 922119917Swpaul 923119917Swpaulstatic void 924119917Swpaulbfe_dma_map(void *arg, bus_dma_segment_t *segs, int nseg, int error) 925119917Swpaul{ 926119917Swpaul u_int32_t *ptr; 927119917Swpaul 928119917Swpaul ptr = arg; 929119917Swpaul *ptr = segs->ds_addr; 930119917Swpaul} 931119917Swpaul 932119917Swpaulstatic void 933119917Swpaulbfe_dma_map_desc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 934119917Swpaul{ 935119917Swpaul struct bfe_desc *d; 936119917Swpaul 937119917Swpaul d = arg; 938119917Swpaul /* The chip needs all addresses to be added to BFE_PCI_DMA */ 939119917Swpaul d->bfe_addr = segs->ds_addr + BFE_PCI_DMA; 940119917Swpaul} 941119917Swpaul 942119917Swpaulstatic void 943119917Swpaulbfe_release_resources(struct bfe_softc *sc) 944119917Swpaul{ 945119917Swpaul device_t dev; 946119917Swpaul int i; 947119917Swpaul 948119917Swpaul dev = sc->bfe_dev; 949119917Swpaul 950119917Swpaul if (sc->bfe_vpd_prodname != NULL) 951119917Swpaul free(sc->bfe_vpd_prodname, M_DEVBUF); 952119917Swpaul 953119917Swpaul if (sc->bfe_vpd_readonly != NULL) 954119917Swpaul free(sc->bfe_vpd_readonly, M_DEVBUF); 955119917Swpaul 956119917Swpaul if (sc->bfe_intrhand != NULL) 957119917Swpaul bus_teardown_intr(dev, sc->bfe_irq, sc->bfe_intrhand); 958119917Swpaul 959119917Swpaul if (sc->bfe_irq != NULL) 960119917Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->bfe_irq); 961119917Swpaul 962119917Swpaul if (sc->bfe_res != NULL) 963119917Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 0x10, sc->bfe_res); 964119917Swpaul 965119917Swpaul if(sc->bfe_tx_tag != NULL) { 966119917Swpaul bus_dmamap_unload(sc->bfe_tx_tag, sc->bfe_tx_map); 967126470Sjulian bus_dmamem_free(sc->bfe_tx_tag, sc->bfe_tx_list, 968126470Sjulian sc->bfe_tx_map); 969119917Swpaul bus_dma_tag_destroy(sc->bfe_tx_tag); 970119917Swpaul sc->bfe_tx_tag = NULL; 971119917Swpaul } 972119917Swpaul 973119917Swpaul if(sc->bfe_rx_tag != NULL) { 974119917Swpaul bus_dmamap_unload(sc->bfe_rx_tag, sc->bfe_rx_map); 975126470Sjulian bus_dmamem_free(sc->bfe_rx_tag, sc->bfe_rx_list, 976126470Sjulian sc->bfe_rx_map); 977119917Swpaul bus_dma_tag_destroy(sc->bfe_rx_tag); 978119917Swpaul sc->bfe_rx_tag = NULL; 979119917Swpaul } 980119917Swpaul 981119917Swpaul if(sc->bfe_tag != NULL) { 982119917Swpaul for(i = 0; i < BFE_TX_LIST_CNT; i++) { 983126470Sjulian bus_dmamap_destroy(sc->bfe_tag, 984126470Sjulian sc->bfe_tx_ring[i].bfe_map); 985119917Swpaul } 986119917Swpaul bus_dma_tag_destroy(sc->bfe_tag); 987126470Sjulian sc->bfe_tag = NULL; 988119917Swpaul } 989119917Swpaul 990119917Swpaul if(sc->bfe_parent_tag != NULL) 991119917Swpaul bus_dma_tag_destroy(sc->bfe_parent_tag); 992119917Swpaul 993119917Swpaul return; 994119917Swpaul} 995119917Swpaul 996119917Swpaulstatic void 997119917Swpaulbfe_read_eeprom(struct bfe_softc *sc, u_int8_t *data) 998119917Swpaul{ 999119917Swpaul long i; 1000119917Swpaul u_int16_t *ptr = (u_int16_t *)data; 1001119917Swpaul 1002119917Swpaul for(i = 0; i < 128; i += 2) 1003119917Swpaul ptr[i/2] = CSR_READ_4(sc, 4096 + i); 1004119917Swpaul} 1005119917Swpaul 1006119917Swpaulstatic int 1007133282Sdesbfe_wait_bit(struct bfe_softc *sc, u_int32_t reg, u_int32_t bit, 1008119917Swpaul u_long timeout, const int clear) 1009119917Swpaul{ 1010119917Swpaul u_long i; 1011119917Swpaul 1012119917Swpaul for (i = 0; i < timeout; i++) { 1013119917Swpaul u_int32_t val = CSR_READ_4(sc, reg); 1014119917Swpaul 1015119917Swpaul if (clear && !(val & bit)) 1016119917Swpaul break; 1017119917Swpaul if (!clear && (val & bit)) 1018119917Swpaul break; 1019119917Swpaul DELAY(10); 1020119917Swpaul } 1021119917Swpaul if (i == timeout) { 1022119917Swpaul printf("bfe%d: BUG! Timeout waiting for bit %08x of register " 1023133282Sdes "%x to %s.\n", sc->bfe_unit, bit, reg, 1024119917Swpaul (clear ? "clear" : "set")); 1025133282Sdes return (-1); 1026119917Swpaul } 1027133282Sdes return (0); 1028119917Swpaul} 1029119917Swpaul 1030119917Swpaulstatic int 1031119917Swpaulbfe_readphy(struct bfe_softc *sc, u_int32_t reg, u_int32_t *val) 1032119917Swpaul{ 1033133282Sdes int err; 1034119917Swpaul 1035119917Swpaul BFE_LOCK(sc); 1036119917Swpaul /* Clear MII ISR */ 1037119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1038119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1039119917Swpaul (BFE_MDIO_OP_READ << BFE_MDIO_OP_SHIFT) | 1040119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1041119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1042119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT))); 1043119917Swpaul err = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1044119917Swpaul *val = CSR_READ_4(sc, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA; 1045119917Swpaul 1046119917Swpaul BFE_UNLOCK(sc); 1047133282Sdes return (err); 1048119917Swpaul} 1049119917Swpaul 1050119917Swpaulstatic int 1051119917Swpaulbfe_writephy(struct bfe_softc *sc, u_int32_t reg, u_int32_t val) 1052119917Swpaul{ 1053119917Swpaul int status; 1054119917Swpaul 1055119917Swpaul BFE_LOCK(sc); 1056119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1057119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1058119917Swpaul (BFE_MDIO_OP_WRITE << BFE_MDIO_OP_SHIFT) | 1059119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1060119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1061119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT) | 1062119917Swpaul (val & BFE_MDIO_DATA_DATA))); 1063119917Swpaul status = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1064119917Swpaul BFE_UNLOCK(sc); 1065119917Swpaul 1066133282Sdes return (status); 1067119917Swpaul} 1068119917Swpaul 1069133282Sdes/* 1070119917Swpaul * XXX - I think this is handled by the PHY driver, but it can't hurt to do it 1071119917Swpaul * twice 1072119917Swpaul */ 1073119917Swpaulstatic int 1074119917Swpaulbfe_setupphy(struct bfe_softc *sc) 1075119917Swpaul{ 1076119917Swpaul u_int32_t val; 1077119917Swpaul BFE_LOCK(sc); 1078119917Swpaul 1079119917Swpaul /* Enable activity LED */ 1080119917Swpaul bfe_readphy(sc, 26, &val); 1081133282Sdes bfe_writephy(sc, 26, val & 0x7fff); 1082119917Swpaul bfe_readphy(sc, 26, &val); 1083119917Swpaul 1084119917Swpaul /* Enable traffic meter LED mode */ 1085119917Swpaul bfe_readphy(sc, 27, &val); 1086119917Swpaul bfe_writephy(sc, 27, val | (1 << 6)); 1087119917Swpaul 1088119917Swpaul BFE_UNLOCK(sc); 1089133282Sdes return (0); 1090119917Swpaul} 1091119917Swpaul 1092133282Sdesstatic void 1093119917Swpaulbfe_stats_update(struct bfe_softc *sc) 1094119917Swpaul{ 1095119917Swpaul u_long reg; 1096119917Swpaul u_int32_t *val; 1097119917Swpaul 1098119917Swpaul val = &sc->bfe_hwstats.tx_good_octets; 1099119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) { 1100119917Swpaul *val++ += CSR_READ_4(sc, reg); 1101119917Swpaul } 1102119917Swpaul val = &sc->bfe_hwstats.rx_good_octets; 1103119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) { 1104119917Swpaul *val++ += CSR_READ_4(sc, reg); 1105119917Swpaul } 1106119917Swpaul} 1107119917Swpaul 1108119917Swpaulstatic void 1109119917Swpaulbfe_txeof(struct bfe_softc *sc) 1110119917Swpaul{ 1111119917Swpaul struct ifnet *ifp; 1112119917Swpaul int i, chipidx; 1113119917Swpaul 1114119917Swpaul BFE_LOCK(sc); 1115119917Swpaul 1116119917Swpaul ifp = &sc->arpcom.ac_if; 1117119917Swpaul 1118119917Swpaul chipidx = CSR_READ_4(sc, BFE_DMATX_STAT) & BFE_STAT_CDMASK; 1119119917Swpaul chipidx /= sizeof(struct bfe_desc); 1120119917Swpaul 1121126470Sjulian i = sc->bfe_tx_cons; 1122119917Swpaul /* Go through the mbufs and free those that have been transmitted */ 1123126470Sjulian while(i != chipidx) { 1124119917Swpaul struct bfe_data *r = &sc->bfe_tx_ring[i]; 1125119917Swpaul if(r->bfe_mbuf != NULL) { 1126119917Swpaul ifp->if_opackets++; 1127119917Swpaul m_freem(r->bfe_mbuf); 1128119917Swpaul r->bfe_mbuf = NULL; 1129119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1130119917Swpaul } 1131126470Sjulian sc->bfe_tx_cnt--; 1132126470Sjulian BFE_INC(i, BFE_TX_LIST_CNT); 1133119917Swpaul } 1134119917Swpaul 1135119917Swpaul if(i != sc->bfe_tx_cons) { 1136119917Swpaul /* we freed up some mbufs */ 1137119917Swpaul sc->bfe_tx_cons = i; 1138119917Swpaul ifp->if_flags &= ~IFF_OACTIVE; 1139119917Swpaul } 1140119917Swpaul if(sc->bfe_tx_cnt == 0) 1141119917Swpaul ifp->if_timer = 0; 1142119917Swpaul else 1143119917Swpaul ifp->if_timer = 5; 1144119917Swpaul 1145119917Swpaul BFE_UNLOCK(sc); 1146119917Swpaul} 1147119917Swpaul 1148119917Swpaul/* Pass a received packet up the stack */ 1149119917Swpaulstatic void 1150119917Swpaulbfe_rxeof(struct bfe_softc *sc) 1151119917Swpaul{ 1152119917Swpaul struct mbuf *m; 1153119917Swpaul struct ifnet *ifp; 1154119917Swpaul struct bfe_rxheader *rxheader; 1155119917Swpaul struct bfe_data *r; 1156119917Swpaul int cons; 1157119917Swpaul u_int32_t status, current, len, flags; 1158119917Swpaul 1159119917Swpaul BFE_LOCK(sc); 1160119917Swpaul cons = sc->bfe_rx_cons; 1161119917Swpaul status = CSR_READ_4(sc, BFE_DMARX_STAT); 1162119917Swpaul current = (status & BFE_STAT_CDMASK) / sizeof(struct bfe_desc); 1163119917Swpaul 1164119917Swpaul ifp = &sc->arpcom.ac_if; 1165119917Swpaul 1166119917Swpaul while(current != cons) { 1167119917Swpaul r = &sc->bfe_rx_ring[cons]; 1168119917Swpaul m = r->bfe_mbuf; 1169119917Swpaul rxheader = mtod(m, struct bfe_rxheader*); 1170119917Swpaul bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_POSTWRITE); 1171119917Swpaul len = rxheader->len; 1172119917Swpaul r->bfe_mbuf = NULL; 1173119917Swpaul 1174119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1175119917Swpaul flags = rxheader->flags; 1176119917Swpaul 1177119917Swpaul len -= ETHER_CRC_LEN; 1178119917Swpaul 1179119917Swpaul /* flag an error and try again */ 1180119917Swpaul if ((len > ETHER_MAX_LEN+32) || (flags & BFE_RX_FLAG_ERRORS)) { 1181119917Swpaul ifp->if_ierrors++; 1182119917Swpaul if (flags & BFE_RX_FLAG_SERR) 1183119917Swpaul ifp->if_collisions++; 1184119917Swpaul bfe_list_newbuf(sc, cons, m); 1185126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1186119917Swpaul continue; 1187119917Swpaul } 1188119917Swpaul 1189119917Swpaul /* Go past the rx header */ 1190119917Swpaul if (bfe_list_newbuf(sc, cons, NULL) == 0) { 1191119917Swpaul m_adj(m, BFE_RX_OFFSET); 1192119917Swpaul m->m_len = m->m_pkthdr.len = len; 1193119917Swpaul } else { 1194119917Swpaul bfe_list_newbuf(sc, cons, m); 1195119917Swpaul ifp->if_ierrors++; 1196126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1197119917Swpaul continue; 1198119917Swpaul } 1199119917Swpaul 1200119917Swpaul ifp->if_ipackets++; 1201119917Swpaul m->m_pkthdr.rcvif = ifp; 1202122689Ssam BFE_UNLOCK(sc); 1203119917Swpaul (*ifp->if_input)(ifp, m); 1204122689Ssam BFE_LOCK(sc); 1205119917Swpaul 1206126470Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1207119917Swpaul } 1208119917Swpaul sc->bfe_rx_cons = cons; 1209119917Swpaul BFE_UNLOCK(sc); 1210119917Swpaul} 1211119917Swpaul 1212119917Swpaulstatic void 1213119917Swpaulbfe_intr(void *xsc) 1214119917Swpaul{ 1215119917Swpaul struct bfe_softc *sc = xsc; 1216119917Swpaul struct ifnet *ifp; 1217119917Swpaul u_int32_t istat, imask, flag; 1218119917Swpaul 1219119917Swpaul ifp = &sc->arpcom.ac_if; 1220119917Swpaul 1221119917Swpaul BFE_LOCK(sc); 1222119917Swpaul 1223119917Swpaul istat = CSR_READ_4(sc, BFE_ISTAT); 1224119917Swpaul imask = CSR_READ_4(sc, BFE_IMASK); 1225119917Swpaul 1226133282Sdes /* 1227119917Swpaul * Defer unsolicited interrupts - This is necessary because setting the 1228119917Swpaul * chips interrupt mask register to 0 doesn't actually stop the 1229119917Swpaul * interrupts 1230119917Swpaul */ 1231119917Swpaul istat &= imask; 1232119917Swpaul CSR_WRITE_4(sc, BFE_ISTAT, istat); 1233119917Swpaul CSR_READ_4(sc, BFE_ISTAT); 1234119917Swpaul 1235119917Swpaul /* not expecting this interrupt, disregard it */ 1236119917Swpaul if(istat == 0) { 1237119917Swpaul BFE_UNLOCK(sc); 1238119917Swpaul return; 1239119917Swpaul } 1240119917Swpaul 1241119917Swpaul if(istat & BFE_ISTAT_ERRORS) { 1242119917Swpaul flag = CSR_READ_4(sc, BFE_DMATX_STAT); 1243119917Swpaul if(flag & BFE_STAT_EMASK) 1244119917Swpaul ifp->if_oerrors++; 1245119917Swpaul 1246119917Swpaul flag = CSR_READ_4(sc, BFE_DMARX_STAT); 1247119917Swpaul if(flag & BFE_RX_FLAG_ERRORS) 1248119917Swpaul ifp->if_ierrors++; 1249119917Swpaul 1250119917Swpaul ifp->if_flags &= ~IFF_RUNNING; 1251119917Swpaul bfe_init(sc); 1252119917Swpaul } 1253119917Swpaul 1254119917Swpaul /* A packet was received */ 1255119917Swpaul if(istat & BFE_ISTAT_RX) 1256119917Swpaul bfe_rxeof(sc); 1257119917Swpaul 1258119917Swpaul /* A packet was sent */ 1259119917Swpaul if(istat & BFE_ISTAT_TX) 1260119917Swpaul bfe_txeof(sc); 1261119917Swpaul 1262133282Sdes /* We have packets pending, fire them out */ 1263131455Smlaier if (ifp->if_flags & IFF_RUNNING && !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1264119917Swpaul bfe_start(ifp); 1265119917Swpaul 1266119917Swpaul BFE_UNLOCK(sc); 1267119917Swpaul} 1268119917Swpaul 1269119917Swpaulstatic int 1270119917Swpaulbfe_encap(struct bfe_softc *sc, struct mbuf *m_head, u_int32_t *txidx) 1271119917Swpaul{ 1272119917Swpaul struct bfe_desc *d = NULL; 1273119917Swpaul struct bfe_data *r = NULL; 1274133282Sdes struct mbuf *m; 1275126470Sjulian u_int32_t frag, cur, cnt = 0; 1276119917Swpaul int chainlen = 0; 1277119917Swpaul 1278119917Swpaul if(BFE_TX_LIST_CNT - sc->bfe_tx_cnt < 2) 1279133282Sdes return (ENOBUFS); 1280119917Swpaul 1281119917Swpaul /* 1282119917Swpaul * Count the number of frags in this chain to see if 1283119917Swpaul * we need to m_defrag. Since the descriptor list is shared 1284119917Swpaul * by all packets, we'll m_defrag long chains so that they 1285119917Swpaul * do not use up the entire list, even if they would fit. 1286119917Swpaul */ 1287133282Sdes for(m = m_head; m != NULL; m = m->m_next) 1288119917Swpaul chainlen++; 1289119917Swpaul 1290119917Swpaul 1291133282Sdes if ((chainlen > BFE_TX_LIST_CNT / 4) || 1292119917Swpaul ((BFE_TX_LIST_CNT - (chainlen + sc->bfe_tx_cnt)) < 2)) { 1293119917Swpaul m = m_defrag(m_head, M_DONTWAIT); 1294133282Sdes if (m == NULL) 1295133282Sdes return (ENOBUFS); 1296119917Swpaul m_head = m; 1297119917Swpaul } 1298119917Swpaul 1299119917Swpaul /* 1300119917Swpaul * Start packing the mbufs in this chain into 1301119917Swpaul * the fragment pointers. Stop when we run out 1302119917Swpaul * of fragments or hit the end of the mbuf chain. 1303119917Swpaul */ 1304119917Swpaul m = m_head; 1305119917Swpaul cur = frag = *txidx; 1306119917Swpaul cnt = 0; 1307119917Swpaul 1308119917Swpaul for(m = m_head; m != NULL; m = m->m_next) { 1309119917Swpaul if(m->m_len != 0) { 1310119917Swpaul if((BFE_TX_LIST_CNT - (sc->bfe_tx_cnt + cnt)) < 2) 1311133282Sdes return (ENOBUFS); 1312119917Swpaul 1313119917Swpaul d = &sc->bfe_tx_list[cur]; 1314119917Swpaul r = &sc->bfe_tx_ring[cur]; 1315119917Swpaul d->bfe_ctrl = BFE_DESC_LEN & m->m_len; 1316119917Swpaul /* always intterupt on completion */ 1317119917Swpaul d->bfe_ctrl |= BFE_DESC_IOC; 1318119917Swpaul if(cnt == 0) 1319119917Swpaul /* Set start of frame */ 1320119917Swpaul d->bfe_ctrl |= BFE_DESC_SOF; 1321119917Swpaul if(cur == BFE_TX_LIST_CNT - 1) 1322126470Sjulian /* 1323126470Sjulian * Tell the chip to wrap to the start of 1324126470Sjulian * the descriptor list 1325126470Sjulian */ 1326119917Swpaul d->bfe_ctrl |= BFE_DESC_EOT; 1327119917Swpaul 1328126470Sjulian bus_dmamap_load(sc->bfe_tag, 1329133282Sdes r->bfe_map, mtod(m, void*), m->m_len, 1330126470Sjulian bfe_dma_map_desc, d, 0); 1331126470Sjulian bus_dmamap_sync(sc->bfe_tag, r->bfe_map, 1332126470Sjulian BUS_DMASYNC_PREREAD); 1333119917Swpaul 1334119917Swpaul frag = cur; 1335126470Sjulian BFE_INC(cur, BFE_TX_LIST_CNT); 1336119917Swpaul cnt++; 1337119917Swpaul } 1338119917Swpaul } 1339119917Swpaul 1340119917Swpaul if (m != NULL) 1341133282Sdes return (ENOBUFS); 1342119917Swpaul 1343119917Swpaul sc->bfe_tx_list[frag].bfe_ctrl |= BFE_DESC_EOF; 1344119917Swpaul sc->bfe_tx_ring[frag].bfe_mbuf = m_head; 1345119917Swpaul bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 1346119917Swpaul 1347119917Swpaul *txidx = cur; 1348119917Swpaul sc->bfe_tx_cnt += cnt; 1349119917Swpaul return (0); 1350119917Swpaul} 1351119917Swpaul 1352119917Swpaul/* 1353119917Swpaul * Set up to transmit a packet 1354119917Swpaul */ 1355119917Swpaulstatic void 1356119917Swpaulbfe_start(struct ifnet *ifp) 1357119917Swpaul{ 1358119917Swpaul struct bfe_softc *sc; 1359119917Swpaul struct mbuf *m_head = NULL; 1360136269Smlaier int idx, queued = 0; 1361119917Swpaul 1362119917Swpaul sc = ifp->if_softc; 1363119917Swpaul idx = sc->bfe_tx_prod; 1364119917Swpaul 1365119917Swpaul BFE_LOCK(sc); 1366119917Swpaul 1367133282Sdes /* 1368126470Sjulian * Not much point trying to send if the link is down 1369126470Sjulian * or we have nothing to send. 1370119917Swpaul */ 1371119917Swpaul if (!sc->bfe_link && ifp->if_snd.ifq_len < 10) { 1372119917Swpaul BFE_UNLOCK(sc); 1373119917Swpaul return; 1374119917Swpaul } 1375119917Swpaul 1376119917Swpaul if (ifp->if_flags & IFF_OACTIVE) { 1377119917Swpaul BFE_UNLOCK(sc); 1378119917Swpaul return; 1379119917Swpaul } 1380119917Swpaul 1381119917Swpaul while(sc->bfe_tx_ring[idx].bfe_mbuf == NULL) { 1382131455Smlaier IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 1383119917Swpaul if(m_head == NULL) 1384119917Swpaul break; 1385119917Swpaul 1386133282Sdes /* 1387126470Sjulian * Pack the data into the tx ring. If we dont have 1388126470Sjulian * enough room, let the chip drain the ring. 1389119917Swpaul */ 1390119917Swpaul if(bfe_encap(sc, m_head, &idx)) { 1391131455Smlaier IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 1392119917Swpaul ifp->if_flags |= IFF_OACTIVE; 1393119917Swpaul break; 1394119917Swpaul } 1395119917Swpaul 1396136269Smlaier queued++; 1397136269Smlaier 1398119917Swpaul /* 1399119917Swpaul * If there's a BPF listener, bounce a copy of this frame 1400119917Swpaul * to him. 1401119917Swpaul */ 1402119917Swpaul BPF_MTAP(ifp, m_head); 1403119917Swpaul } 1404119917Swpaul 1405136269Smlaier if (queued) { 1406136269Smlaier sc->bfe_tx_prod = idx; 1407136269Smlaier /* Transmit - twice due to apparent hardware bug */ 1408136269Smlaier CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1409136269Smlaier CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1410119917Swpaul 1411136269Smlaier /* 1412136269Smlaier * Set a timeout in case the chip goes out to lunch. 1413136269Smlaier */ 1414136269Smlaier ifp->if_timer = 5; 1415136269Smlaier } 1416136269Smlaier 1417119917Swpaul BFE_UNLOCK(sc); 1418119917Swpaul} 1419119917Swpaul 1420119917Swpaulstatic void 1421119917Swpaulbfe_init(void *xsc) 1422119917Swpaul{ 1423119917Swpaul struct bfe_softc *sc = (struct bfe_softc*)xsc; 1424119917Swpaul struct ifnet *ifp = &sc->arpcom.ac_if; 1425119917Swpaul 1426119917Swpaul BFE_LOCK(sc); 1427119917Swpaul 1428119917Swpaul if (ifp->if_flags & IFF_RUNNING) { 1429119917Swpaul BFE_UNLOCK(sc); 1430119917Swpaul return; 1431119917Swpaul } 1432119917Swpaul 1433119917Swpaul bfe_stop(sc); 1434119917Swpaul bfe_chip_reset(sc); 1435119917Swpaul 1436119917Swpaul if (bfe_list_rx_init(sc) == ENOBUFS) { 1437126470Sjulian printf("bfe%d: bfe_init: Not enough memory for list buffers\n", 1438126470Sjulian sc->bfe_unit); 1439119917Swpaul bfe_stop(sc); 1440119917Swpaul return; 1441119917Swpaul } 1442119917Swpaul 1443119917Swpaul bfe_set_rx_mode(sc); 1444119917Swpaul 1445119917Swpaul /* Enable the chip and core */ 1446119917Swpaul BFE_OR(sc, BFE_ENET_CTRL, BFE_ENET_ENABLE); 1447119917Swpaul /* Enable interrupts */ 1448119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, BFE_IMASK_DEF); 1449119917Swpaul 1450119917Swpaul bfe_ifmedia_upd(ifp); 1451119917Swpaul ifp->if_flags |= IFF_RUNNING; 1452119917Swpaul ifp->if_flags &= ~IFF_OACTIVE; 1453119917Swpaul 1454119917Swpaul sc->bfe_stat_ch = timeout(bfe_tick, sc, hz); 1455119917Swpaul BFE_UNLOCK(sc); 1456119917Swpaul} 1457119917Swpaul 1458119917Swpaul/* 1459119917Swpaul * Set media options. 1460119917Swpaul */ 1461119917Swpaulstatic int 1462119917Swpaulbfe_ifmedia_upd(struct ifnet *ifp) 1463119917Swpaul{ 1464119917Swpaul struct bfe_softc *sc; 1465119917Swpaul struct mii_data *mii; 1466119917Swpaul 1467119917Swpaul sc = ifp->if_softc; 1468119917Swpaul 1469119917Swpaul BFE_LOCK(sc); 1470119917Swpaul 1471119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1472119917Swpaul sc->bfe_link = 0; 1473119917Swpaul if (mii->mii_instance) { 1474119917Swpaul struct mii_softc *miisc; 1475119917Swpaul for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 1476119917Swpaul miisc = LIST_NEXT(miisc, mii_list)) 1477119917Swpaul mii_phy_reset(miisc); 1478119917Swpaul } 1479119917Swpaul mii_mediachg(mii); 1480119917Swpaul 1481119917Swpaul BFE_UNLOCK(sc); 1482133282Sdes return (0); 1483119917Swpaul} 1484119917Swpaul 1485119917Swpaul/* 1486119917Swpaul * Report current media status. 1487119917Swpaul */ 1488119917Swpaulstatic void 1489119917Swpaulbfe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1490119917Swpaul{ 1491119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1492119917Swpaul struct mii_data *mii; 1493119917Swpaul 1494119917Swpaul BFE_LOCK(sc); 1495119917Swpaul 1496119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1497119917Swpaul mii_pollstat(mii); 1498119917Swpaul ifmr->ifm_active = mii->mii_media_active; 1499119917Swpaul ifmr->ifm_status = mii->mii_media_status; 1500119917Swpaul 1501119917Swpaul BFE_UNLOCK(sc); 1502119917Swpaul} 1503119917Swpaul 1504119917Swpaulstatic int 1505119917Swpaulbfe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1506119917Swpaul{ 1507119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1508119917Swpaul struct ifreq *ifr = (struct ifreq *) data; 1509119917Swpaul struct mii_data *mii; 1510119917Swpaul int error = 0; 1511119917Swpaul 1512119917Swpaul BFE_LOCK(sc); 1513119917Swpaul 1514119917Swpaul switch(command) { 1515119917Swpaul case SIOCSIFFLAGS: 1516119917Swpaul if(ifp->if_flags & IFF_UP) 1517119917Swpaul if(ifp->if_flags & IFF_RUNNING) 1518119917Swpaul bfe_set_rx_mode(sc); 1519119917Swpaul else 1520119917Swpaul bfe_init(sc); 1521119917Swpaul else if(ifp->if_flags & IFF_RUNNING) 1522119917Swpaul bfe_stop(sc); 1523119917Swpaul break; 1524119917Swpaul case SIOCADDMULTI: 1525119917Swpaul case SIOCDELMULTI: 1526119917Swpaul if(ifp->if_flags & IFF_RUNNING) 1527119917Swpaul bfe_set_rx_mode(sc); 1528119917Swpaul break; 1529119917Swpaul case SIOCGIFMEDIA: 1530119917Swpaul case SIOCSIFMEDIA: 1531119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1532126470Sjulian error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, 1533126470Sjulian command); 1534119917Swpaul break; 1535119917Swpaul default: 1536133282Sdes error = ether_ioctl(ifp, command, data); 1537119917Swpaul break; 1538119917Swpaul } 1539119917Swpaul 1540119917Swpaul BFE_UNLOCK(sc); 1541133282Sdes return (error); 1542119917Swpaul} 1543119917Swpaul 1544119917Swpaulstatic void 1545119917Swpaulbfe_watchdog(struct ifnet *ifp) 1546119917Swpaul{ 1547119917Swpaul struct bfe_softc *sc; 1548119917Swpaul 1549119917Swpaul sc = ifp->if_softc; 1550119917Swpaul 1551119917Swpaul BFE_LOCK(sc); 1552119917Swpaul 1553119917Swpaul printf("bfe%d: watchdog timeout -- resetting\n", sc->bfe_unit); 1554119917Swpaul 1555119917Swpaul ifp->if_flags &= ~IFF_RUNNING; 1556119917Swpaul bfe_init(sc); 1557119917Swpaul 1558119917Swpaul ifp->if_oerrors++; 1559119917Swpaul 1560119917Swpaul BFE_UNLOCK(sc); 1561119917Swpaul} 1562119917Swpaul 1563119917Swpaulstatic void 1564119917Swpaulbfe_tick(void *xsc) 1565119917Swpaul{ 1566119917Swpaul struct bfe_softc *sc = xsc; 1567119917Swpaul struct mii_data *mii; 1568119917Swpaul 1569119917Swpaul if (sc == NULL) 1570119917Swpaul return; 1571119917Swpaul 1572119917Swpaul BFE_LOCK(sc); 1573119917Swpaul 1574119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1575119917Swpaul 1576119917Swpaul bfe_stats_update(sc); 1577119917Swpaul sc->bfe_stat_ch = timeout(bfe_tick, sc, hz); 1578119917Swpaul 1579119917Swpaul if(sc->bfe_link) { 1580119917Swpaul BFE_UNLOCK(sc); 1581119917Swpaul return; 1582119917Swpaul } 1583119917Swpaul 1584119917Swpaul mii_tick(mii); 1585119917Swpaul if (!sc->bfe_link && mii->mii_media_status & IFM_ACTIVE && 1586133282Sdes IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) 1587119917Swpaul sc->bfe_link++; 1588119917Swpaul 1589119917Swpaul BFE_UNLOCK(sc); 1590119917Swpaul} 1591119917Swpaul 1592119917Swpaul/* 1593119917Swpaul * Stop the adapter and free any mbufs allocated to the 1594119917Swpaul * RX and TX lists. 1595119917Swpaul */ 1596119917Swpaulstatic void 1597119917Swpaulbfe_stop(struct bfe_softc *sc) 1598119917Swpaul{ 1599119917Swpaul struct ifnet *ifp; 1600119917Swpaul 1601119917Swpaul BFE_LOCK(sc); 1602119917Swpaul 1603119917Swpaul untimeout(bfe_tick, sc, sc->bfe_stat_ch); 1604119917Swpaul 1605119917Swpaul ifp = &sc->arpcom.ac_if; 1606119917Swpaul 1607119917Swpaul bfe_chip_halt(sc); 1608126470Sjulian bfe_tx_ring_free(sc); 1609119917Swpaul bfe_rx_ring_free(sc); 1610119917Swpaul 1611119917Swpaul ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1612119917Swpaul 1613119917Swpaul BFE_UNLOCK(sc); 1614119917Swpaul} 1615