if_bfe.c revision 126473
1119917Swpaul/* 2119917Swpaul * Copyright (c) 2003 Stuart Walsh<stu@ipng.org.uk> 3119917Swpaul * and Duncan Barclay<dmlb@dmlb.org> 4119917Swpaul */ 5119917Swpaul 6119917Swpaul/* 7119917Swpaul * Redistribution and use in source and binary forms, with or without 8119917Swpaul * modification, are permitted provided that the following conditions 9119917Swpaul * are met: 10119917Swpaul * 1. Redistributions of source code must retain the above copyright 11119917Swpaul * notice, this list of conditions and the following disclaimer. 12119917Swpaul * 2. Redistributions in binary form must reproduce the above copyright 13119917Swpaul * notice, this list of conditions and the following disclaimer in the 14119917Swpaul * documentation and/or other materials provided with the distribution. 15119917Swpaul * 16119917Swpaul * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS 'AS IS' AND 17119917Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18119917Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19119917Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20119917Swpaul * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21119917Swpaul * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22119917Swpaul * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23119917Swpaul * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24119917Swpaul * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25119917Swpaul * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26119917Swpaul * SUCH DAMAGE. 27119917Swpaul */ 28119917Swpaul 29119917Swpaul 30119917Swpaul#include <sys/cdefs.h> 31119917Swpaul__FBSDID("$FreeBSD: head/sys/dev/bfe/if_bfe.c 126473 2004-03-02 05:43:42Z julian $"); 32119917Swpaul 33119917Swpaul#include <sys/param.h> 34119917Swpaul#include <sys/systm.h> 35119917Swpaul#include <sys/sockio.h> 36119917Swpaul#include <sys/mbuf.h> 37119917Swpaul#include <sys/malloc.h> 38119917Swpaul#include <sys/kernel.h> 39119917Swpaul#include <sys/socket.h> 40119917Swpaul#include <sys/queue.h> 41119917Swpaul 42119917Swpaul#include <net/if.h> 43119917Swpaul#include <net/if_arp.h> 44119917Swpaul#include <net/ethernet.h> 45119917Swpaul#include <net/if_dl.h> 46119917Swpaul#include <net/if_media.h> 47119917Swpaul 48119917Swpaul#include <net/bpf.h> 49119917Swpaul 50119917Swpaul#include <net/if_types.h> 51119917Swpaul#include <net/if_vlan_var.h> 52119917Swpaul 53119917Swpaul#include <netinet/in_systm.h> 54119917Swpaul#include <netinet/in.h> 55119917Swpaul#include <netinet/ip.h> 56119917Swpaul 57119917Swpaul#include <machine/clock.h> /* for DELAY */ 58119917Swpaul#include <machine/bus_memio.h> 59119917Swpaul#include <machine/bus.h> 60119917Swpaul#include <machine/resource.h> 61119917Swpaul#include <sys/bus.h> 62119917Swpaul#include <sys/rman.h> 63119917Swpaul 64119917Swpaul#include <dev/mii/mii.h> 65119917Swpaul#include <dev/mii/miivar.h> 66119917Swpaul#include "miidevs.h" 67119917Swpaul 68119917Swpaul#include <dev/pci/pcireg.h> 69119917Swpaul#include <dev/pci/pcivar.h> 70119917Swpaul 71119917Swpaul#include <dev/bfe/if_bfereg.h> 72119917Swpaul 73119917SwpaulMODULE_DEPEND(bfe, pci, 1, 1, 1); 74119917SwpaulMODULE_DEPEND(bfe, ether, 1, 1, 1); 75119917SwpaulMODULE_DEPEND(bfe, miibus, 1, 1, 1); 76119917Swpaul 77119917Swpaul/* "controller miibus0" required. See GENERIC if you get errors here. */ 78119917Swpaul#include "miibus_if.h" 79119917Swpaul 80119917Swpaul#define BFE_DEVDESC_MAX 64 /* Maximum device description length */ 81119917Swpaul 82119917Swpaulstatic struct bfe_type bfe_devs[] = { 83119917Swpaul { BCOM_VENDORID, BCOM_DEVICEID_BCM4401, 84119917Swpaul "Broadcom BCM4401 Fast Ethernet" }, 85119917Swpaul { 0, 0, NULL } 86119917Swpaul}; 87119917Swpaul 88119917Swpaulstatic int bfe_probe (device_t); 89119917Swpaulstatic int bfe_attach (device_t); 90119917Swpaulstatic int bfe_detach (device_t); 91119917Swpaulstatic void bfe_release_resources (struct bfe_softc *); 92119917Swpaulstatic void bfe_intr (void *); 93119917Swpaulstatic void bfe_start (struct ifnet *); 94119917Swpaulstatic int bfe_ioctl (struct ifnet *, u_long, caddr_t); 95119917Swpaulstatic void bfe_init (void *); 96119917Swpaulstatic void bfe_stop (struct bfe_softc *); 97119917Swpaulstatic void bfe_watchdog (struct ifnet *); 98119917Swpaulstatic void bfe_shutdown (device_t); 99119917Swpaulstatic void bfe_tick (void *); 100119917Swpaulstatic void bfe_txeof (struct bfe_softc *); 101119917Swpaulstatic void bfe_rxeof (struct bfe_softc *); 102119917Swpaulstatic void bfe_set_rx_mode (struct bfe_softc *); 103119917Swpaulstatic int bfe_list_rx_init (struct bfe_softc *); 104119917Swpaulstatic int bfe_list_newbuf (struct bfe_softc *, int, struct mbuf*); 105119917Swpaulstatic void bfe_rx_ring_free (struct bfe_softc *); 106119917Swpaul 107119917Swpaulstatic void bfe_pci_setup (struct bfe_softc *, u_int32_t); 108119917Swpaulstatic int bfe_ifmedia_upd (struct ifnet *); 109119917Swpaulstatic void bfe_ifmedia_sts (struct ifnet *, struct ifmediareq *); 110119917Swpaulstatic int bfe_miibus_readreg (device_t, int, int); 111119917Swpaulstatic int bfe_miibus_writereg (device_t, int, int, int); 112119917Swpaulstatic void bfe_miibus_statchg (device_t); 113119917Swpaulstatic int bfe_wait_bit (struct bfe_softc *, u_int32_t, u_int32_t, 114119917Swpaul u_long, const int); 115119917Swpaulstatic void bfe_get_config (struct bfe_softc *sc); 116119917Swpaulstatic void bfe_read_eeprom (struct bfe_softc *, u_int8_t *); 117119917Swpaulstatic void bfe_stats_update (struct bfe_softc *); 118119917Swpaulstatic void bfe_clear_stats (struct bfe_softc *); 119119917Swpaulstatic int bfe_readphy (struct bfe_softc *, u_int32_t, u_int32_t*); 120119917Swpaulstatic int bfe_writephy (struct bfe_softc *, u_int32_t, u_int32_t); 121119917Swpaulstatic int bfe_resetphy (struct bfe_softc *); 122119917Swpaulstatic int bfe_setupphy (struct bfe_softc *); 123119917Swpaulstatic void bfe_chip_reset (struct bfe_softc *); 124119917Swpaulstatic void bfe_chip_halt (struct bfe_softc *); 125119917Swpaulstatic void bfe_core_reset (struct bfe_softc *); 126119917Swpaulstatic void bfe_core_disable (struct bfe_softc *); 127119917Swpaulstatic int bfe_dma_alloc (device_t); 128119917Swpaulstatic void bfe_dma_map_desc (void *, bus_dma_segment_t *, int, int); 129119917Swpaulstatic void bfe_dma_map (void *, bus_dma_segment_t *, int, int); 130119917Swpaulstatic void bfe_cam_write (struct bfe_softc *, u_char *, int); 131119917Swpaul 132119917Swpaulstatic device_method_t bfe_methods[] = { 133119917Swpaul /* Device interface */ 134119917Swpaul DEVMETHOD(device_probe, bfe_probe), 135119917Swpaul DEVMETHOD(device_attach, bfe_attach), 136119917Swpaul DEVMETHOD(device_detach, bfe_detach), 137119917Swpaul DEVMETHOD(device_shutdown, bfe_shutdown), 138119917Swpaul 139119917Swpaul /* bus interface */ 140119917Swpaul DEVMETHOD(bus_print_child, bus_generic_print_child), 141119917Swpaul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 142119917Swpaul 143119917Swpaul /* MII interface */ 144119917Swpaul DEVMETHOD(miibus_readreg, bfe_miibus_readreg), 145119917Swpaul DEVMETHOD(miibus_writereg, bfe_miibus_writereg), 146119917Swpaul DEVMETHOD(miibus_statchg, bfe_miibus_statchg), 147119917Swpaul 148119917Swpaul { 0, 0 } 149119917Swpaul}; 150119917Swpaul 151119917Swpaulstatic driver_t bfe_driver = { 152119917Swpaul "bfe", 153119917Swpaul bfe_methods, 154119917Swpaul sizeof(struct bfe_softc) 155119917Swpaul}; 156119917Swpaul 157119917Swpaulstatic devclass_t bfe_devclass; 158119917Swpaul 159119917SwpaulDRIVER_MODULE(bfe, pci, bfe_driver, bfe_devclass, 0, 0); 160119917SwpaulDRIVER_MODULE(miibus, bfe, miibus_driver, miibus_devclass, 0, 0); 161119917Swpaul 162119917Swpaul/* 163119917Swpaul * Probe for a Broadcom 4401 chip. 164119917Swpaul */ 165119917Swpaulstatic int 166119917Swpaulbfe_probe(device_t dev) 167119917Swpaul{ 168119917Swpaul struct bfe_type *t; 169119917Swpaul struct bfe_softc *sc; 170119917Swpaul 171119917Swpaul t = bfe_devs; 172119917Swpaul 173119917Swpaul sc = device_get_softc(dev); 174119917Swpaul bzero(sc, sizeof(struct bfe_softc)); 175119917Swpaul sc->bfe_unit = device_get_unit(dev); 176119917Swpaul sc->bfe_dev = dev; 177119917Swpaul 178119917Swpaul while(t->bfe_name != NULL) { 179119917Swpaul if ((pci_get_vendor(dev) == t->bfe_vid) && 180119917Swpaul (pci_get_device(dev) == t->bfe_did)) { 181119917Swpaul device_set_desc_copy(dev, t->bfe_name); 182119917Swpaul return(0); 183119917Swpaul } 184119917Swpaul t++; 185119917Swpaul } 186119917Swpaul 187119917Swpaul return(ENXIO); 188119917Swpaul} 189119917Swpaul 190119917Swpaulstatic int 191119917Swpaulbfe_dma_alloc(device_t dev) 192119917Swpaul{ 193119917Swpaul struct bfe_softc *sc; 194119917Swpaul int error, i; 195119917Swpaul 196119917Swpaul sc = device_get_softc(dev); 197119917Swpaul 198119917Swpaul /* parent tag */ 199119917Swpaul error = bus_dma_tag_create(NULL, /* parent */ 200119917Swpaul PAGE_SIZE, 0, /* alignment, boundary */ 201119917Swpaul BUS_SPACE_MAXADDR, /* lowaddr */ 202119917Swpaul BUS_SPACE_MAXADDR_32BIT, /* highaddr */ 203119917Swpaul NULL, NULL, /* filter, filterarg */ 204119917Swpaul MAXBSIZE, /* maxsize */ 205119917Swpaul BUS_SPACE_UNRESTRICTED, /* num of segments */ 206119917Swpaul BUS_SPACE_MAXSIZE_32BIT, /* max segment size */ 207119917Swpaul BUS_DMA_ALLOCNOW, /* flags */ 208119917Swpaul NULL, NULL, /* lockfunc, lockarg */ 209119917Swpaul &sc->bfe_parent_tag); 210119917Swpaul 211119917Swpaul /* tag for TX ring */ 212126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 213126470Sjulian BFE_TX_LIST_SIZE, BFE_TX_LIST_SIZE, 214126470Sjulian BUS_SPACE_MAXADDR, 215126470Sjulian BUS_SPACE_MAXADDR, 216126470Sjulian NULL, NULL, 217126470Sjulian BFE_TX_LIST_SIZE, 218126470Sjulian 1, 219126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 220126470Sjulian 0, 221126470Sjulian NULL, NULL, 222126470Sjulian &sc->bfe_tx_tag); 223119917Swpaul 224119917Swpaul if (error) { 225119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 226119917Swpaul return(ENOMEM); 227119917Swpaul } 228119917Swpaul 229119917Swpaul /* tag for RX ring */ 230126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 231126470Sjulian BFE_RX_LIST_SIZE, BFE_RX_LIST_SIZE, 232126470Sjulian BUS_SPACE_MAXADDR, 233126470Sjulian BUS_SPACE_MAXADDR, 234126470Sjulian NULL, NULL, 235126470Sjulian BFE_RX_LIST_SIZE, 236126470Sjulian 1, 237126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 238126470Sjulian 0, 239126470Sjulian NULL, NULL, 240126470Sjulian &sc->bfe_rx_tag); 241119917Swpaul 242119917Swpaul if (error) { 243119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 244119917Swpaul return(ENOMEM); 245119917Swpaul } 246119917Swpaul 247119917Swpaul /* tag for mbufs */ 248126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 249126470Sjulian ETHER_ALIGN, 0, 250126470Sjulian BUS_SPACE_MAXADDR, 251126470Sjulian BUS_SPACE_MAXADDR, 252126470Sjulian NULL, NULL, 253126470Sjulian MCLBYTES, 254126470Sjulian 1, 255126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 256126470Sjulian 0, 257126470Sjulian NULL, NULL, 258126470Sjulian &sc->bfe_tag); 259119917Swpaul 260119917Swpaul if (error) { 261119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 262119917Swpaul return(ENOMEM); 263119917Swpaul } 264119917Swpaul 265119917Swpaul /* pre allocate dmamaps for RX list */ 266119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 267126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 268126470Sjulian &sc->bfe_rx_ring[i].bfe_map); 269119917Swpaul if (error) { 270119917Swpaul device_printf(dev, "cannot create DMA map for RX\n"); 271119917Swpaul return(ENOMEM); 272119917Swpaul } 273119917Swpaul } 274119917Swpaul 275119917Swpaul /* pre allocate dmamaps for TX list */ 276119917Swpaul for (i = 0; i < BFE_TX_LIST_CNT; i++) { 277126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 278126470Sjulian &sc->bfe_tx_ring[i].bfe_map); 279119917Swpaul if (error) { 280119917Swpaul device_printf(dev, "cannot create DMA map for TX\n"); 281119917Swpaul return(ENOMEM); 282119917Swpaul } 283119917Swpaul } 284119917Swpaul 285119917Swpaul /* Alloc dma for rx ring */ 286119917Swpaul error = bus_dmamem_alloc(sc->bfe_rx_tag, (void *)&sc->bfe_rx_list, 287119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_rx_map); 288119917Swpaul 289119917Swpaul if(error) 290119917Swpaul return(ENOMEM); 291119917Swpaul 292119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 293119917Swpaul error = bus_dmamap_load(sc->bfe_rx_tag, sc->bfe_rx_map, 294119917Swpaul sc->bfe_rx_list, sizeof(struct bfe_desc), 295119917Swpaul bfe_dma_map, &sc->bfe_rx_dma, 0); 296119917Swpaul 297119917Swpaul if(error) 298119917Swpaul return(ENOMEM); 299119917Swpaul 300119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 301119917Swpaul 302119917Swpaul error = bus_dmamem_alloc(sc->bfe_tx_tag, (void *)&sc->bfe_tx_list, 303119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_tx_map); 304119917Swpaul if (error) 305119917Swpaul return(ENOMEM); 306119917Swpaul 307119917Swpaul 308119917Swpaul error = bus_dmamap_load(sc->bfe_tx_tag, sc->bfe_tx_map, 309119917Swpaul sc->bfe_tx_list, sizeof(struct bfe_desc), 310119917Swpaul bfe_dma_map, &sc->bfe_tx_dma, 0); 311119917Swpaul if(error) 312119917Swpaul return(ENOMEM); 313119917Swpaul 314119917Swpaul bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 315119917Swpaul bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 316119917Swpaul 317119917Swpaul return(0); 318119917Swpaul} 319119917Swpaul 320119917Swpaulstatic int 321119917Swpaulbfe_attach(device_t dev) 322119917Swpaul{ 323119917Swpaul struct ifnet *ifp; 324119917Swpaul struct bfe_softc *sc; 325119917Swpaul int unit, error = 0, rid; 326119917Swpaul 327119917Swpaul sc = device_get_softc(dev); 328119917Swpaul mtx_init(&sc->bfe_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 329119917Swpaul MTX_DEF | MTX_RECURSE); 330119917Swpaul 331119917Swpaul unit = device_get_unit(dev); 332119917Swpaul sc->bfe_dev = dev; 333119917Swpaul sc->bfe_unit = unit; 334119917Swpaul 335119917Swpaul /* 336119917Swpaul * Handle power management nonsense. 337119917Swpaul */ 338119917Swpaul if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 339119917Swpaul u_int32_t membase, irq; 340119917Swpaul 341119917Swpaul /* Save important PCI config data. */ 342119917Swpaul membase = pci_read_config(dev, BFE_PCI_MEMLO, 4); 343119917Swpaul irq = pci_read_config(dev, BFE_PCI_INTLINE, 4); 344119917Swpaul 345119917Swpaul /* Reset the power state. */ 346126470Sjulian printf("bfe%d: chip is is in D%d power mode -- setting to D0\n", 347119917Swpaul sc->bfe_unit, pci_get_powerstate(dev)); 348119917Swpaul 349119917Swpaul pci_set_powerstate(dev, PCI_POWERSTATE_D0); 350119917Swpaul 351119917Swpaul /* Restore PCI config data. */ 352119917Swpaul pci_write_config(dev, BFE_PCI_MEMLO, membase, 4); 353119917Swpaul pci_write_config(dev, BFE_PCI_INTLINE, irq, 4); 354119917Swpaul } 355119917Swpaul 356119917Swpaul /* 357119917Swpaul * Map control/status registers. 358119917Swpaul */ 359119917Swpaul pci_enable_busmaster(dev); 360119917Swpaul 361119917Swpaul rid = BFE_PCI_MEMLO; 362119917Swpaul sc->bfe_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1, 363119917Swpaul RF_ACTIVE); 364119917Swpaul if (sc->bfe_res == NULL) { 365119917Swpaul printf ("bfe%d: couldn't map memory\n", unit); 366119917Swpaul error = ENXIO; 367119917Swpaul goto fail; 368119917Swpaul } 369119917Swpaul 370119917Swpaul sc->bfe_btag = rman_get_bustag(sc->bfe_res); 371119917Swpaul sc->bfe_bhandle = rman_get_bushandle(sc->bfe_res); 372119917Swpaul sc->bfe_vhandle = (vm_offset_t)rman_get_virtual(sc->bfe_res); 373119917Swpaul 374119917Swpaul /* Allocate interrupt */ 375119917Swpaul rid = 0; 376119917Swpaul 377119917Swpaul sc->bfe_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 378119917Swpaul RF_SHAREABLE | RF_ACTIVE); 379119917Swpaul if (sc->bfe_irq == NULL) { 380119917Swpaul printf("bfe%d: couldn't map interrupt\n", unit); 381119917Swpaul error = ENXIO; 382119917Swpaul goto fail; 383119917Swpaul } 384119917Swpaul 385119917Swpaul if (bfe_dma_alloc(dev)) { 386126470Sjulian printf("bfe%d: failed to allocate DMA resources\n", 387126470Sjulian sc->bfe_unit); 388119917Swpaul bfe_release_resources(sc); 389119917Swpaul error = ENXIO; 390119917Swpaul goto fail; 391119917Swpaul } 392119917Swpaul 393119917Swpaul /* Set up ifnet structure */ 394119917Swpaul ifp = &sc->arpcom.ac_if; 395119917Swpaul ifp->if_softc = sc; 396121816Sbrooks if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 397119917Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 398119917Swpaul ifp->if_ioctl = bfe_ioctl; 399119917Swpaul ifp->if_output = ether_output; 400119917Swpaul ifp->if_start = bfe_start; 401119917Swpaul ifp->if_watchdog = bfe_watchdog; 402119917Swpaul ifp->if_init = bfe_init; 403119917Swpaul ifp->if_mtu = ETHERMTU; 404119917Swpaul ifp->if_baudrate = 10000000; 405119917Swpaul ifp->if_snd.ifq_maxlen = BFE_TX_QLEN; 406119917Swpaul 407119917Swpaul bfe_get_config(sc); 408119917Swpaul 409126470Sjulian printf("bfe%d: Ethernet address: %6D\n", unit, 410126470Sjulian sc->arpcom.ac_enaddr, ":"); 411119917Swpaul 412119917Swpaul /* Reset the chip and turn on the PHY */ 413119917Swpaul bfe_chip_reset(sc); 414119917Swpaul 415119917Swpaul if (mii_phy_probe(dev, &sc->bfe_miibus, 416119917Swpaul bfe_ifmedia_upd, bfe_ifmedia_sts)) { 417119917Swpaul printf("bfe%d: MII without any PHY!\n", sc->bfe_unit); 418119917Swpaul error = ENXIO; 419119917Swpaul goto fail; 420119917Swpaul } 421119917Swpaul 422119917Swpaul ether_ifattach(ifp, sc->arpcom.ac_enaddr); 423119917Swpaul callout_handle_init(&sc->bfe_stat_ch); 424119917Swpaul 425119917Swpaul /* 426119917Swpaul * Hook interrupt last to avoid having to lock softc 427119917Swpaul */ 428119917Swpaul error = bus_setup_intr(dev, sc->bfe_irq, INTR_TYPE_NET, 429119917Swpaul bfe_intr, sc, &sc->bfe_intrhand); 430119917Swpaul 431119917Swpaul if (error) { 432119917Swpaul bfe_release_resources(sc); 433119917Swpaul printf("bfe%d: couldn't set up irq\n", unit); 434119917Swpaul goto fail; 435119917Swpaul } 436119917Swpaulfail: 437119917Swpaul if(error) 438119917Swpaul bfe_release_resources(sc); 439119917Swpaul return(error); 440119917Swpaul} 441119917Swpaul 442119917Swpaulstatic int 443119917Swpaulbfe_detach(device_t dev) 444119917Swpaul{ 445119917Swpaul struct bfe_softc *sc; 446119917Swpaul struct ifnet *ifp; 447119917Swpaul 448119917Swpaul sc = device_get_softc(dev); 449119917Swpaul 450119917Swpaul KASSERT(mtx_initialized(&sc->bfe_mtx), ("bfe mutex not initialized")); 451119917Swpaul BFE_LOCK(scp); 452119917Swpaul 453119917Swpaul ifp = &sc->arpcom.ac_if; 454119917Swpaul 455119917Swpaul if (device_is_attached(dev)) { 456119917Swpaul bfe_stop(sc); 457119917Swpaul ether_ifdetach(ifp); 458119917Swpaul } 459119917Swpaul 460119917Swpaul bfe_chip_reset(sc); 461119917Swpaul 462119917Swpaul bus_generic_detach(dev); 463119917Swpaul if(sc->bfe_miibus != NULL) 464119917Swpaul device_delete_child(dev, sc->bfe_miibus); 465119917Swpaul 466119917Swpaul bfe_release_resources(sc); 467119917Swpaul BFE_UNLOCK(sc); 468119917Swpaul mtx_destroy(&sc->bfe_mtx); 469119917Swpaul 470119917Swpaul return(0); 471119917Swpaul} 472119917Swpaul 473119917Swpaul/* 474119917Swpaul * Stop all chip I/O so that the kernel's probe routines don't 475119917Swpaul * get confused by errant DMAs when rebooting. 476119917Swpaul */ 477119917Swpaulstatic void 478119917Swpaulbfe_shutdown(device_t dev) 479119917Swpaul{ 480119917Swpaul struct bfe_softc *sc; 481119917Swpaul 482119917Swpaul sc = device_get_softc(dev); 483119917Swpaul BFE_LOCK(sc); 484119917Swpaul bfe_stop(sc); 485119917Swpaul 486119917Swpaul BFE_UNLOCK(sc); 487119917Swpaul return; 488119917Swpaul} 489119917Swpaul 490119917Swpaulstatic int 491119917Swpaulbfe_miibus_readreg(device_t dev, int phy, int reg) 492119917Swpaul{ 493119917Swpaul struct bfe_softc *sc; 494119917Swpaul u_int32_t ret; 495119917Swpaul 496119917Swpaul sc = device_get_softc(dev); 497119917Swpaul if(phy != sc->bfe_phyaddr) 498119917Swpaul return(0); 499119917Swpaul bfe_readphy(sc, reg, &ret); 500119917Swpaul 501119917Swpaul return(ret); 502119917Swpaul} 503119917Swpaul 504119917Swpaulstatic int 505119917Swpaulbfe_miibus_writereg(device_t dev, int phy, int reg, int val) 506119917Swpaul{ 507119917Swpaul struct bfe_softc *sc; 508119917Swpaul 509119917Swpaul sc = device_get_softc(dev); 510119917Swpaul if(phy != sc->bfe_phyaddr) 511119917Swpaul return(0); 512119917Swpaul bfe_writephy(sc, reg, val); 513119917Swpaul 514119917Swpaul return(0); 515119917Swpaul} 516119917Swpaul 517119917Swpaulstatic void 518119917Swpaulbfe_miibus_statchg(device_t dev) 519119917Swpaul{ 520119917Swpaul return; 521119917Swpaul} 522119917Swpaul 523119917Swpaulstatic void 524119917Swpaulbfe_tx_ring_free(struct bfe_softc *sc) 525119917Swpaul{ 526126470Sjulian int i; 527126470Sjulian 528126470Sjulian for(i = 0; i < BFE_TX_LIST_CNT; i++) { 529126470Sjulian if(sc->bfe_tx_ring[i].bfe_mbuf != NULL) { 530126470Sjulian m_freem(sc->bfe_tx_ring[i].bfe_mbuf); 531126470Sjulian sc->bfe_tx_ring[i].bfe_mbuf = NULL; 532126470Sjulian bus_dmamap_unload(sc->bfe_tag, 533126470Sjulian sc->bfe_tx_ring[i].bfe_map); 534126470Sjulian bus_dmamap_destroy(sc->bfe_tag, 535126470Sjulian sc->bfe_tx_ring[i].bfe_map); 536126470Sjulian } 537126470Sjulian } 538126470Sjulian bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 539126470Sjulian bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 540119917Swpaul} 541119917Swpaul 542119917Swpaulstatic void 543119917Swpaulbfe_rx_ring_free(struct bfe_softc *sc) 544119917Swpaul{ 545119917Swpaul int i; 546119917Swpaul 547119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 548119917Swpaul if (sc->bfe_rx_ring[i].bfe_mbuf != NULL) { 549119917Swpaul m_freem(sc->bfe_rx_ring[i].bfe_mbuf); 550119917Swpaul sc->bfe_rx_ring[i].bfe_mbuf = NULL; 551119917Swpaul bus_dmamap_unload(sc->bfe_tag, 552119917Swpaul sc->bfe_rx_ring[i].bfe_map); 553119917Swpaul bus_dmamap_destroy(sc->bfe_tag, 554119917Swpaul sc->bfe_rx_ring[i].bfe_map); 555119917Swpaul } 556119917Swpaul } 557119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 558119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 559119917Swpaul} 560119917Swpaul 561119917Swpaul 562119917Swpaulstatic int 563119917Swpaulbfe_list_rx_init(struct bfe_softc *sc) 564119917Swpaul{ 565119917Swpaul int i; 566119917Swpaul 567119917Swpaul for(i = 0; i < BFE_RX_LIST_CNT; i++) { 568119917Swpaul if(bfe_list_newbuf(sc, i, NULL) == ENOBUFS) 569119917Swpaul return ENOBUFS; 570119917Swpaul } 571119917Swpaul 572119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 573119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_PTR, (i * sizeof(struct bfe_desc))); 574119917Swpaul 575119917Swpaul sc->bfe_rx_cons = 0; 576119917Swpaul 577119917Swpaul return(0); 578119917Swpaul} 579119917Swpaul 580119917Swpaulstatic int 581119917Swpaulbfe_list_newbuf(struct bfe_softc *sc, int c, struct mbuf *m) 582119917Swpaul{ 583119917Swpaul struct bfe_rxheader *rx_header; 584119917Swpaul struct bfe_desc *d; 585119917Swpaul struct bfe_data *r; 586119917Swpaul u_int32_t ctrl; 587119917Swpaul 588119917Swpaul if ((c < 0) || (c >= BFE_RX_LIST_CNT)) 589119917Swpaul return(EINVAL); 590119917Swpaul 591119917Swpaul if(m == NULL) { 592119917Swpaul m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 593119917Swpaul if(m == NULL) 594119917Swpaul return(ENOBUFS); 595119917Swpaul m->m_len = m->m_pkthdr.len = MCLBYTES; 596119917Swpaul } 597119917Swpaul else 598119917Swpaul m->m_data = m->m_ext.ext_buf; 599119917Swpaul 600119917Swpaul rx_header = mtod(m, struct bfe_rxheader *); 601119917Swpaul rx_header->len = 0; 602119917Swpaul rx_header->flags = 0; 603119917Swpaul 604119917Swpaul /* Map the mbuf into DMA */ 605119917Swpaul sc->bfe_rx_cnt = c; 606119917Swpaul d = &sc->bfe_rx_list[c]; 607119917Swpaul r = &sc->bfe_rx_ring[c]; 608119917Swpaul bus_dmamap_load(sc->bfe_tag, r->bfe_map, mtod(m, void *), 609119917Swpaul MCLBYTES, bfe_dma_map_desc, d, 0); 610119917Swpaul bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_PREWRITE); 611119917Swpaul 612119917Swpaul ctrl = ETHER_MAX_LEN + 32; 613119917Swpaul 614119917Swpaul if(c == BFE_RX_LIST_CNT - 1) 615119917Swpaul ctrl |= BFE_DESC_EOT; 616119917Swpaul 617119917Swpaul d->bfe_ctrl = ctrl; 618119917Swpaul r->bfe_mbuf = m; 619119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 620119917Swpaul return(0); 621119917Swpaul} 622119917Swpaul 623119917Swpaulstatic void 624119917Swpaulbfe_get_config(struct bfe_softc *sc) 625119917Swpaul{ 626119917Swpaul u_int8_t eeprom[128]; 627119917Swpaul 628119917Swpaul bfe_read_eeprom(sc, eeprom); 629119917Swpaul 630119917Swpaul sc->arpcom.ac_enaddr[0] = eeprom[79]; 631119917Swpaul sc->arpcom.ac_enaddr[1] = eeprom[78]; 632119917Swpaul sc->arpcom.ac_enaddr[2] = eeprom[81]; 633119917Swpaul sc->arpcom.ac_enaddr[3] = eeprom[80]; 634119917Swpaul sc->arpcom.ac_enaddr[4] = eeprom[83]; 635119917Swpaul sc->arpcom.ac_enaddr[5] = eeprom[82]; 636119917Swpaul 637119917Swpaul sc->bfe_phyaddr = eeprom[90] & 0x1f; 638119917Swpaul sc->bfe_mdc_port = (eeprom[90] >> 14) & 0x1; 639119917Swpaul 640119917Swpaul sc->bfe_core_unit = 0; 641119917Swpaul sc->bfe_dma_offset = BFE_PCI_DMA; 642119917Swpaul} 643119917Swpaul 644119917Swpaulstatic void 645119917Swpaulbfe_pci_setup(struct bfe_softc *sc, u_int32_t cores) 646119917Swpaul{ 647119917Swpaul u_int32_t bar_orig, pci_rev, val; 648119917Swpaul 649119917Swpaul bar_orig = pci_read_config(sc->bfe_dev, BFE_BAR0_WIN, 4); 650119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, BFE_REG_PCI, 4); 651119917Swpaul pci_rev = CSR_READ_4(sc, BFE_SBIDHIGH) & BFE_RC_MASK; 652119917Swpaul 653119917Swpaul val = CSR_READ_4(sc, BFE_SBINTVEC); 654119917Swpaul val |= cores; 655119917Swpaul CSR_WRITE_4(sc, BFE_SBINTVEC, val); 656119917Swpaul 657119917Swpaul val = CSR_READ_4(sc, BFE_SSB_PCI_TRANS_2); 658119917Swpaul val |= BFE_SSB_PCI_PREF | BFE_SSB_PCI_BURST; 659119917Swpaul CSR_WRITE_4(sc, BFE_SSB_PCI_TRANS_2, val); 660119917Swpaul 661119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, bar_orig, 4); 662119917Swpaul} 663119917Swpaul 664119917Swpaulstatic void 665119917Swpaulbfe_clear_stats(struct bfe_softc *sc) 666119917Swpaul{ 667119917Swpaul u_long reg; 668119917Swpaul 669119917Swpaul BFE_LOCK(sc); 670119917Swpaul 671119917Swpaul CSR_WRITE_4(sc, BFE_MIB_CTRL, BFE_MIB_CLR_ON_READ); 672119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) 673119917Swpaul CSR_READ_4(sc, reg); 674119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) 675119917Swpaul CSR_READ_4(sc, reg); 676119917Swpaul 677119917Swpaul BFE_UNLOCK(sc); 678119917Swpaul} 679119917Swpaul 680119917Swpaulstatic int 681119917Swpaulbfe_resetphy(struct bfe_softc *sc) 682119917Swpaul{ 683119917Swpaul u_int32_t val; 684119917Swpaul 685119917Swpaul BFE_LOCK(sc); 686119917Swpaul bfe_writephy(sc, 0, BMCR_RESET); 687119917Swpaul DELAY(100); 688119917Swpaul bfe_readphy(sc, 0, &val); 689119917Swpaul if (val & BMCR_RESET) { 690119917Swpaul printf("bfe%d: PHY Reset would not complete.\n", sc->bfe_unit); 691119917Swpaul BFE_UNLOCK(sc); 692119917Swpaul return ENXIO; 693119917Swpaul } 694119917Swpaul BFE_UNLOCK(sc); 695119917Swpaul return 0; 696119917Swpaul} 697119917Swpaul 698119917Swpaulstatic void 699119917Swpaulbfe_chip_halt(struct bfe_softc *sc) 700119917Swpaul{ 701119917Swpaul BFE_LOCK(sc); 702119917Swpaul /* disable interrupts - not that it actually does..*/ 703119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, 0); 704119917Swpaul CSR_READ_4(sc, BFE_IMASK); 705119917Swpaul 706119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 707119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 200, 1); 708119917Swpaul 709119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 710119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 711119917Swpaul DELAY(10); 712119917Swpaul 713119917Swpaul BFE_UNLOCK(sc); 714119917Swpaul} 715119917Swpaul 716119917Swpaulstatic void 717119917Swpaulbfe_chip_reset(struct bfe_softc *sc) 718119917Swpaul{ 719126470Sjulian u_int32_t val; 720119917Swpaul 721119917Swpaul BFE_LOCK(sc); 722119917Swpaul 723119917Swpaul /* Set the interrupt vector for the enet core */ 724119917Swpaul bfe_pci_setup(sc, BFE_INTVEC_ENET0); 725119917Swpaul 726119917Swpaul /* is core up? */ 727126470Sjulian val = CSR_READ_4(sc, BFE_SBTMSLOW) & 728126470Sjulian (BFE_RESET | BFE_REJECT | BFE_CLOCK); 729119917Swpaul if (val == BFE_CLOCK) { 730119917Swpaul /* It is, so shut it down */ 731119917Swpaul CSR_WRITE_4(sc, BFE_RCV_LAZY, 0); 732119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 733119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 100, 1); 734119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 735119917Swpaul sc->bfe_tx_cnt = sc->bfe_tx_prod = sc->bfe_tx_cons = 0; 736119917Swpaul if (CSR_READ_4(sc, BFE_DMARX_STAT) & BFE_STAT_EMASK) 737126470Sjulian bfe_wait_bit(sc, BFE_DMARX_STAT, BFE_STAT_SIDLE, 738126470Sjulian 100, 0); 739119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 740119917Swpaul sc->bfe_rx_prod = sc->bfe_rx_cons = 0; 741119917Swpaul } 742119917Swpaul 743119917Swpaul bfe_core_reset(sc); 744119917Swpaul bfe_clear_stats(sc); 745119917Swpaul 746119917Swpaul /* 747119917Swpaul * We want the phy registers to be accessible even when 748119917Swpaul * the driver is "downed" so initialize MDC preamble, frequency, 749119917Swpaul * and whether internal or external phy here. 750119917Swpaul */ 751119917Swpaul 752119917Swpaul /* 4402 has 62.5Mhz SB clock and internal phy */ 753119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_CTRL, 0x8d); 754119917Swpaul 755119917Swpaul /* Internal or external PHY? */ 756119917Swpaul val = CSR_READ_4(sc, BFE_DEVCTRL); 757119917Swpaul if(!(val & BFE_IPP)) 758119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_EPSEL); 759119917Swpaul else if(CSR_READ_4(sc, BFE_DEVCTRL) & BFE_EPR) { 760119917Swpaul BFE_AND(sc, BFE_DEVCTRL, ~BFE_EPR); 761119917Swpaul DELAY(100); 762119917Swpaul } 763119917Swpaul 764119917Swpaul BFE_OR(sc, BFE_MAC_CTRL, BFE_CTRL_CRC32_ENAB); 765119917Swpaul CSR_WRITE_4(sc, BFE_RCV_LAZY, ((1 << BFE_LAZY_FC_SHIFT) & 766119917Swpaul BFE_LAZY_FC_MASK)); 767119917Swpaul 768119917Swpaul /* 769126470Sjulian * We don't want lazy interrupts, so just send them at 770126470Sjulian * the end of a frame, please 771119917Swpaul */ 772119917Swpaul BFE_OR(sc, BFE_RCV_LAZY, 0); 773119917Swpaul 774119917Swpaul /* Set max lengths, accounting for VLAN tags */ 775119917Swpaul CSR_WRITE_4(sc, BFE_RXMAXLEN, ETHER_MAX_LEN+32); 776119917Swpaul CSR_WRITE_4(sc, BFE_TXMAXLEN, ETHER_MAX_LEN+32); 777119917Swpaul 778119917Swpaul /* Set watermark XXX - magic */ 779119917Swpaul CSR_WRITE_4(sc, BFE_TX_WMARK, 56); 780119917Swpaul 781119917Swpaul /* 782126470Sjulian * Initialise DMA channels 783126470Sjulian * - not forgetting dma addresses need to be added to BFE_PCI_DMA 784119917Swpaul */ 785119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, BFE_TX_CTRL_ENABLE); 786119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_ADDR, sc->bfe_tx_dma + BFE_PCI_DMA); 787119917Swpaul 788119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, (BFE_RX_OFFSET << BFE_RX_CTRL_ROSHIFT) | 789119917Swpaul BFE_RX_CTRL_ENABLE); 790119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_ADDR, sc->bfe_rx_dma + BFE_PCI_DMA); 791119917Swpaul 792119917Swpaul bfe_resetphy(sc); 793119917Swpaul bfe_setupphy(sc); 794119917Swpaul 795119917Swpaul BFE_UNLOCK(sc); 796119917Swpaul} 797119917Swpaul 798119917Swpaulstatic void 799119917Swpaulbfe_core_disable(struct bfe_softc *sc) 800119917Swpaul{ 801119917Swpaul if((CSR_READ_4(sc, BFE_SBTMSLOW)) & BFE_RESET) 802119917Swpaul return; 803119917Swpaul 804119917Swpaul /* 805126470Sjulian * Set reject, wait for it set, then wait for the core to stop 806126470Sjulian * being busy, then set reset and reject and enable the clocks. 807119917Swpaul */ 808119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_CLOCK)); 809119917Swpaul bfe_wait_bit(sc, BFE_SBTMSLOW, BFE_REJECT, 1000, 0); 810119917Swpaul bfe_wait_bit(sc, BFE_SBTMSHIGH, BFE_BUSY, 1000, 1); 811119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_FGC | BFE_CLOCK | BFE_REJECT | 812119917Swpaul BFE_RESET)); 813119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 814119917Swpaul DELAY(10); 815119917Swpaul /* Leave reset and reject set */ 816119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_RESET)); 817119917Swpaul DELAY(10); 818119917Swpaul} 819119917Swpaul 820119917Swpaulstatic void 821119917Swpaulbfe_core_reset(struct bfe_softc *sc) 822119917Swpaul{ 823119917Swpaul u_int32_t val; 824119917Swpaul 825119917Swpaul /* Disable the core */ 826119917Swpaul bfe_core_disable(sc); 827119917Swpaul 828119917Swpaul /* and bring it back up */ 829119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_RESET | BFE_CLOCK | BFE_FGC)); 830119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 831119917Swpaul DELAY(10); 832119917Swpaul 833119917Swpaul /* Chip bug, clear SERR, IB and TO if they are set. */ 834119917Swpaul if (CSR_READ_4(sc, BFE_SBTMSHIGH) & BFE_SERR) 835119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSHIGH, 0); 836119917Swpaul val = CSR_READ_4(sc, BFE_SBIMSTATE); 837119917Swpaul if (val & (BFE_IBE | BFE_TO)) 838119917Swpaul CSR_WRITE_4(sc, BFE_SBIMSTATE, val & ~(BFE_IBE | BFE_TO)); 839119917Swpaul 840119917Swpaul /* Clear reset and allow it to move through the core */ 841119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_CLOCK | BFE_FGC)); 842119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 843119917Swpaul DELAY(10); 844119917Swpaul 845119917Swpaul /* Leave the clock set */ 846119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, BFE_CLOCK); 847119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 848119917Swpaul DELAY(10); 849119917Swpaul} 850119917Swpaul 851119917Swpaulstatic void 852119917Swpaulbfe_cam_write(struct bfe_softc *sc, u_char *data, int index) 853119917Swpaul{ 854119917Swpaul u_int32_t val; 855119917Swpaul 856119917Swpaul val = ((u_int32_t) data[2]) << 24; 857119917Swpaul val |= ((u_int32_t) data[3]) << 16; 858119917Swpaul val |= ((u_int32_t) data[4]) << 8; 859119917Swpaul val |= ((u_int32_t) data[5]); 860119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_LO, val); 861119917Swpaul val = (BFE_CAM_HI_VALID | 862119917Swpaul (((u_int32_t) data[0]) << 8) | 863119917Swpaul (((u_int32_t) data[1]))); 864119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_HI, val); 865119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, (BFE_CAM_WRITE | 866119917Swpaul (index << BFE_CAM_INDEX_SHIFT))); 867119917Swpaul bfe_wait_bit(sc, BFE_CAM_CTRL, BFE_CAM_BUSY, 10000, 1); 868119917Swpaul} 869119917Swpaul 870119917Swpaulstatic void 871119917Swpaulbfe_set_rx_mode(struct bfe_softc *sc) 872119917Swpaul{ 873119917Swpaul struct ifnet *ifp = &sc->arpcom.ac_if; 874119917Swpaul struct ifmultiaddr *ifma; 875119917Swpaul u_int32_t val; 876119917Swpaul int i = 0; 877119917Swpaul 878119917Swpaul val = CSR_READ_4(sc, BFE_RXCONF); 879119917Swpaul 880119917Swpaul if (ifp->if_flags & IFF_PROMISC) 881119917Swpaul val |= BFE_RXCONF_PROMISC; 882119917Swpaul else 883119917Swpaul val &= ~BFE_RXCONF_PROMISC; 884119917Swpaul 885119917Swpaul if (ifp->if_flags & IFF_BROADCAST) 886119917Swpaul val &= ~BFE_RXCONF_DBCAST; 887119917Swpaul else 888119917Swpaul val |= BFE_RXCONF_DBCAST; 889119917Swpaul 890119917Swpaul 891119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, 0); 892119917Swpaul bfe_cam_write(sc, sc->arpcom.ac_enaddr, i++); 893119917Swpaul 894119917Swpaul if (ifp->if_flags & IFF_ALLMULTI) 895119917Swpaul val |= BFE_RXCONF_ALLMULTI; 896119917Swpaul else { 897119917Swpaul val &= ~BFE_RXCONF_ALLMULTI; 898119917Swpaul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 899119917Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 900119917Swpaul continue; 901126470Sjulian bfe_cam_write(sc, 902126470Sjulian LLADDR((struct sockaddr_dl *)ifma->ifma_addr), i++); 903119917Swpaul } 904119917Swpaul } 905119917Swpaul 906119917Swpaul CSR_WRITE_4(sc, BFE_RXCONF, val); 907119917Swpaul BFE_OR(sc, BFE_CAM_CTRL, BFE_CAM_ENABLE); 908119917Swpaul} 909119917Swpaul 910119917Swpaulstatic void 911119917Swpaulbfe_dma_map(void *arg, bus_dma_segment_t *segs, int nseg, int error) 912119917Swpaul{ 913119917Swpaul u_int32_t *ptr; 914119917Swpaul 915119917Swpaul ptr = arg; 916119917Swpaul *ptr = segs->ds_addr; 917119917Swpaul} 918119917Swpaul 919119917Swpaulstatic void 920119917Swpaulbfe_dma_map_desc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 921119917Swpaul{ 922119917Swpaul struct bfe_desc *d; 923119917Swpaul 924119917Swpaul d = arg; 925119917Swpaul /* The chip needs all addresses to be added to BFE_PCI_DMA */ 926119917Swpaul d->bfe_addr = segs->ds_addr + BFE_PCI_DMA; 927119917Swpaul} 928119917Swpaul 929119917Swpaulstatic void 930119917Swpaulbfe_release_resources(struct bfe_softc *sc) 931119917Swpaul{ 932119917Swpaul device_t dev; 933119917Swpaul int i; 934119917Swpaul 935119917Swpaul dev = sc->bfe_dev; 936119917Swpaul 937119917Swpaul if (sc->bfe_vpd_prodname != NULL) 938119917Swpaul free(sc->bfe_vpd_prodname, M_DEVBUF); 939119917Swpaul 940119917Swpaul if (sc->bfe_vpd_readonly != NULL) 941119917Swpaul free(sc->bfe_vpd_readonly, M_DEVBUF); 942119917Swpaul 943119917Swpaul if (sc->bfe_intrhand != NULL) 944119917Swpaul bus_teardown_intr(dev, sc->bfe_irq, sc->bfe_intrhand); 945119917Swpaul 946119917Swpaul if (sc->bfe_irq != NULL) 947119917Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->bfe_irq); 948119917Swpaul 949119917Swpaul if (sc->bfe_res != NULL) 950119917Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 0x10, sc->bfe_res); 951119917Swpaul 952119917Swpaul if(sc->bfe_tx_tag != NULL) { 953119917Swpaul bus_dmamap_unload(sc->bfe_tx_tag, sc->bfe_tx_map); 954126470Sjulian bus_dmamem_free(sc->bfe_tx_tag, sc->bfe_tx_list, 955126470Sjulian sc->bfe_tx_map); 956119917Swpaul bus_dma_tag_destroy(sc->bfe_tx_tag); 957119917Swpaul sc->bfe_tx_tag = NULL; 958119917Swpaul } 959119917Swpaul 960119917Swpaul if(sc->bfe_rx_tag != NULL) { 961119917Swpaul bus_dmamap_unload(sc->bfe_rx_tag, sc->bfe_rx_map); 962126470Sjulian bus_dmamem_free(sc->bfe_rx_tag, sc->bfe_rx_list, 963126470Sjulian sc->bfe_rx_map); 964119917Swpaul bus_dma_tag_destroy(sc->bfe_rx_tag); 965119917Swpaul sc->bfe_rx_tag = NULL; 966119917Swpaul } 967119917Swpaul 968119917Swpaul if(sc->bfe_tag != NULL) { 969119917Swpaul for(i = 0; i < BFE_TX_LIST_CNT; i++) { 970126470Sjulian bus_dmamap_destroy(sc->bfe_tag, 971126470Sjulian sc->bfe_tx_ring[i].bfe_map); 972119917Swpaul } 973119917Swpaul bus_dma_tag_destroy(sc->bfe_tag); 974126470Sjulian sc->bfe_tag = NULL; 975119917Swpaul } 976119917Swpaul 977119917Swpaul if(sc->bfe_parent_tag != NULL) 978119917Swpaul bus_dma_tag_destroy(sc->bfe_parent_tag); 979119917Swpaul 980119917Swpaul return; 981119917Swpaul} 982119917Swpaul 983119917Swpaulstatic void 984119917Swpaulbfe_read_eeprom(struct bfe_softc *sc, u_int8_t *data) 985119917Swpaul{ 986119917Swpaul long i; 987119917Swpaul u_int16_t *ptr = (u_int16_t *)data; 988119917Swpaul 989119917Swpaul for(i = 0; i < 128; i += 2) 990119917Swpaul ptr[i/2] = CSR_READ_4(sc, 4096 + i); 991119917Swpaul} 992119917Swpaul 993119917Swpaulstatic int 994119917Swpaulbfe_wait_bit(struct bfe_softc *sc, u_int32_t reg, u_int32_t bit, 995119917Swpaul u_long timeout, const int clear) 996119917Swpaul{ 997119917Swpaul u_long i; 998119917Swpaul 999119917Swpaul for (i = 0; i < timeout; i++) { 1000119917Swpaul u_int32_t val = CSR_READ_4(sc, reg); 1001119917Swpaul 1002119917Swpaul if (clear && !(val & bit)) 1003119917Swpaul break; 1004119917Swpaul if (!clear && (val & bit)) 1005119917Swpaul break; 1006119917Swpaul DELAY(10); 1007119917Swpaul } 1008119917Swpaul if (i == timeout) { 1009119917Swpaul printf("bfe%d: BUG! Timeout waiting for bit %08x of register " 1010119917Swpaul "%x to %s.\n", sc->bfe_unit, bit, reg, 1011119917Swpaul (clear ? "clear" : "set")); 1012119917Swpaul return -1; 1013119917Swpaul } 1014119917Swpaul return 0; 1015119917Swpaul} 1016119917Swpaul 1017119917Swpaulstatic int 1018119917Swpaulbfe_readphy(struct bfe_softc *sc, u_int32_t reg, u_int32_t *val) 1019119917Swpaul{ 1020119917Swpaul int err; 1021119917Swpaul 1022119917Swpaul BFE_LOCK(sc); 1023119917Swpaul /* Clear MII ISR */ 1024119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1025119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1026119917Swpaul (BFE_MDIO_OP_READ << BFE_MDIO_OP_SHIFT) | 1027119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1028119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1029119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT))); 1030119917Swpaul err = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1031119917Swpaul *val = CSR_READ_4(sc, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA; 1032119917Swpaul 1033119917Swpaul BFE_UNLOCK(sc); 1034119917Swpaul return err; 1035119917Swpaul} 1036119917Swpaul 1037119917Swpaulstatic int 1038119917Swpaulbfe_writephy(struct bfe_softc *sc, u_int32_t reg, u_int32_t val) 1039119917Swpaul{ 1040119917Swpaul int status; 1041119917Swpaul 1042119917Swpaul BFE_LOCK(sc); 1043119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1044119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1045119917Swpaul (BFE_MDIO_OP_WRITE << BFE_MDIO_OP_SHIFT) | 1046119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1047119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1048119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT) | 1049119917Swpaul (val & BFE_MDIO_DATA_DATA))); 1050119917Swpaul status = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1051119917Swpaul BFE_UNLOCK(sc); 1052119917Swpaul 1053119917Swpaul return status; 1054119917Swpaul} 1055119917Swpaul 1056119917Swpaul/* 1057119917Swpaul * XXX - I think this is handled by the PHY driver, but it can't hurt to do it 1058119917Swpaul * twice 1059119917Swpaul */ 1060119917Swpaulstatic int 1061119917Swpaulbfe_setupphy(struct bfe_softc *sc) 1062119917Swpaul{ 1063119917Swpaul u_int32_t val; 1064119917Swpaul BFE_LOCK(sc); 1065119917Swpaul 1066119917Swpaul /* Enable activity LED */ 1067119917Swpaul bfe_readphy(sc, 26, &val); 1068119917Swpaul bfe_writephy(sc, 26, val & 0x7fff); 1069119917Swpaul bfe_readphy(sc, 26, &val); 1070119917Swpaul 1071119917Swpaul /* Enable traffic meter LED mode */ 1072119917Swpaul bfe_readphy(sc, 27, &val); 1073119917Swpaul bfe_writephy(sc, 27, val | (1 << 6)); 1074119917Swpaul 1075119917Swpaul BFE_UNLOCK(sc); 1076119917Swpaul return 0; 1077119917Swpaul} 1078119917Swpaul 1079119917Swpaulstatic void 1080119917Swpaulbfe_stats_update(struct bfe_softc *sc) 1081119917Swpaul{ 1082119917Swpaul u_long reg; 1083119917Swpaul u_int32_t *val; 1084119917Swpaul 1085119917Swpaul val = &sc->bfe_hwstats.tx_good_octets; 1086119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) { 1087119917Swpaul *val++ += CSR_READ_4(sc, reg); 1088119917Swpaul } 1089119917Swpaul val = &sc->bfe_hwstats.rx_good_octets; 1090119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) { 1091119917Swpaul *val++ += CSR_READ_4(sc, reg); 1092119917Swpaul } 1093119917Swpaul} 1094119917Swpaul 1095119917Swpaulstatic void 1096119917Swpaulbfe_txeof(struct bfe_softc *sc) 1097119917Swpaul{ 1098119917Swpaul struct ifnet *ifp; 1099119917Swpaul int i, chipidx; 1100119917Swpaul 1101119917Swpaul BFE_LOCK(sc); 1102119917Swpaul 1103119917Swpaul ifp = &sc->arpcom.ac_if; 1104119917Swpaul 1105119917Swpaul chipidx = CSR_READ_4(sc, BFE_DMATX_STAT) & BFE_STAT_CDMASK; 1106119917Swpaul chipidx /= sizeof(struct bfe_desc); 1107119917Swpaul 1108126470Sjulian i = sc->bfe_tx_cons; 1109119917Swpaul /* Go through the mbufs and free those that have been transmitted */ 1110126470Sjulian while(i != chipidx) { 1111119917Swpaul struct bfe_data *r = &sc->bfe_tx_ring[i]; 1112119917Swpaul if(r->bfe_mbuf != NULL) { 1113119917Swpaul ifp->if_opackets++; 1114119917Swpaul m_freem(r->bfe_mbuf); 1115119917Swpaul r->bfe_mbuf = NULL; 1116119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1117119917Swpaul } 1118126470Sjulian sc->bfe_tx_cnt--; 1119126470Sjulian BFE_INC(i, BFE_TX_LIST_CNT); 1120119917Swpaul } 1121119917Swpaul 1122119917Swpaul if(i != sc->bfe_tx_cons) { 1123119917Swpaul /* we freed up some mbufs */ 1124119917Swpaul sc->bfe_tx_cons = i; 1125119917Swpaul ifp->if_flags &= ~IFF_OACTIVE; 1126119917Swpaul } 1127119917Swpaul if(sc->bfe_tx_cnt == 0) 1128119917Swpaul ifp->if_timer = 0; 1129119917Swpaul else 1130119917Swpaul ifp->if_timer = 5; 1131119917Swpaul 1132119917Swpaul BFE_UNLOCK(sc); 1133119917Swpaul} 1134119917Swpaul 1135119917Swpaul/* Pass a received packet up the stack */ 1136119917Swpaulstatic void 1137119917Swpaulbfe_rxeof(struct bfe_softc *sc) 1138119917Swpaul{ 1139119917Swpaul struct mbuf *m; 1140119917Swpaul struct ifnet *ifp; 1141119917Swpaul struct bfe_rxheader *rxheader; 1142119917Swpaul struct bfe_data *r; 1143119917Swpaul int cons; 1144119917Swpaul u_int32_t status, current, len, flags; 1145119917Swpaul 1146119917Swpaul BFE_LOCK(sc); 1147119917Swpaul cons = sc->bfe_rx_cons; 1148119917Swpaul status = CSR_READ_4(sc, BFE_DMARX_STAT); 1149119917Swpaul current = (status & BFE_STAT_CDMASK) / sizeof(struct bfe_desc); 1150119917Swpaul 1151119917Swpaul ifp = &sc->arpcom.ac_if; 1152119917Swpaul 1153119917Swpaul while(current != cons) { 1154119917Swpaul r = &sc->bfe_rx_ring[cons]; 1155119917Swpaul m = r->bfe_mbuf; 1156119917Swpaul rxheader = mtod(m, struct bfe_rxheader*); 1157119917Swpaul bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_POSTWRITE); 1158119917Swpaul len = rxheader->len; 1159119917Swpaul r->bfe_mbuf = NULL; 1160119917Swpaul 1161119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1162119917Swpaul flags = rxheader->flags; 1163119917Swpaul 1164119917Swpaul len -= ETHER_CRC_LEN; 1165119917Swpaul 1166119917Swpaul /* flag an error and try again */ 1167119917Swpaul if ((len > ETHER_MAX_LEN+32) || (flags & BFE_RX_FLAG_ERRORS)) { 1168119917Swpaul ifp->if_ierrors++; 1169119917Swpaul if (flags & BFE_RX_FLAG_SERR) 1170119917Swpaul ifp->if_collisions++; 1171119917Swpaul bfe_list_newbuf(sc, cons, m); 1172126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1173119917Swpaul continue; 1174119917Swpaul } 1175119917Swpaul 1176119917Swpaul /* Go past the rx header */ 1177119917Swpaul if (bfe_list_newbuf(sc, cons, NULL) == 0) { 1178119917Swpaul m_adj(m, BFE_RX_OFFSET); 1179119917Swpaul m->m_len = m->m_pkthdr.len = len; 1180119917Swpaul } else { 1181119917Swpaul bfe_list_newbuf(sc, cons, m); 1182119917Swpaul ifp->if_ierrors++; 1183126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1184119917Swpaul continue; 1185119917Swpaul } 1186119917Swpaul 1187119917Swpaul ifp->if_ipackets++; 1188119917Swpaul m->m_pkthdr.rcvif = ifp; 1189122689Ssam BFE_UNLOCK(sc); 1190119917Swpaul (*ifp->if_input)(ifp, m); 1191122689Ssam BFE_LOCK(sc); 1192119917Swpaul 1193126470Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1194119917Swpaul } 1195119917Swpaul sc->bfe_rx_cons = cons; 1196119917Swpaul BFE_UNLOCK(sc); 1197119917Swpaul} 1198119917Swpaul 1199119917Swpaulstatic void 1200119917Swpaulbfe_intr(void *xsc) 1201119917Swpaul{ 1202119917Swpaul struct bfe_softc *sc = xsc; 1203119917Swpaul struct ifnet *ifp; 1204119917Swpaul u_int32_t istat, imask, flag; 1205119917Swpaul 1206119917Swpaul ifp = &sc->arpcom.ac_if; 1207119917Swpaul 1208119917Swpaul BFE_LOCK(sc); 1209119917Swpaul 1210119917Swpaul istat = CSR_READ_4(sc, BFE_ISTAT); 1211119917Swpaul imask = CSR_READ_4(sc, BFE_IMASK); 1212119917Swpaul 1213119917Swpaul /* 1214119917Swpaul * Defer unsolicited interrupts - This is necessary because setting the 1215119917Swpaul * chips interrupt mask register to 0 doesn't actually stop the 1216119917Swpaul * interrupts 1217119917Swpaul */ 1218119917Swpaul istat &= imask; 1219119917Swpaul CSR_WRITE_4(sc, BFE_ISTAT, istat); 1220119917Swpaul CSR_READ_4(sc, BFE_ISTAT); 1221119917Swpaul 1222119917Swpaul /* not expecting this interrupt, disregard it */ 1223119917Swpaul if(istat == 0) { 1224119917Swpaul BFE_UNLOCK(sc); 1225119917Swpaul return; 1226119917Swpaul } 1227119917Swpaul 1228119917Swpaul if(istat & BFE_ISTAT_ERRORS) { 1229119917Swpaul flag = CSR_READ_4(sc, BFE_DMATX_STAT); 1230119917Swpaul if(flag & BFE_STAT_EMASK) 1231119917Swpaul ifp->if_oerrors++; 1232119917Swpaul 1233119917Swpaul flag = CSR_READ_4(sc, BFE_DMARX_STAT); 1234119917Swpaul if(flag & BFE_RX_FLAG_ERRORS) 1235119917Swpaul ifp->if_ierrors++; 1236119917Swpaul 1237119917Swpaul ifp->if_flags &= ~IFF_RUNNING; 1238119917Swpaul bfe_init(sc); 1239119917Swpaul } 1240119917Swpaul 1241119917Swpaul /* A packet was received */ 1242119917Swpaul if(istat & BFE_ISTAT_RX) 1243119917Swpaul bfe_rxeof(sc); 1244119917Swpaul 1245119917Swpaul /* A packet was sent */ 1246119917Swpaul if(istat & BFE_ISTAT_TX) 1247119917Swpaul bfe_txeof(sc); 1248119917Swpaul 1249119917Swpaul /* We have packets pending, fire them out */ 1250119917Swpaul if (ifp->if_flags & IFF_RUNNING && ifp->if_snd.ifq_head != NULL) 1251119917Swpaul bfe_start(ifp); 1252119917Swpaul 1253119917Swpaul BFE_UNLOCK(sc); 1254119917Swpaul} 1255119917Swpaul 1256119917Swpaulstatic int 1257119917Swpaulbfe_encap(struct bfe_softc *sc, struct mbuf *m_head, u_int32_t *txidx) 1258119917Swpaul{ 1259119917Swpaul struct bfe_desc *d = NULL; 1260119917Swpaul struct bfe_data *r = NULL; 1261126470Sjulian struct mbuf *m; 1262126470Sjulian u_int32_t frag, cur, cnt = 0; 1263119917Swpaul int chainlen = 0; 1264119917Swpaul 1265119917Swpaul if(BFE_TX_LIST_CNT - sc->bfe_tx_cnt < 2) 1266119917Swpaul return(ENOBUFS); 1267119917Swpaul 1268119917Swpaul /* 1269119917Swpaul * Count the number of frags in this chain to see if 1270119917Swpaul * we need to m_defrag. Since the descriptor list is shared 1271119917Swpaul * by all packets, we'll m_defrag long chains so that they 1272119917Swpaul * do not use up the entire list, even if they would fit. 1273119917Swpaul */ 1274119917Swpaul for(m = m_head; m != NULL; m = m->m_next) 1275119917Swpaul chainlen++; 1276119917Swpaul 1277119917Swpaul 1278119917Swpaul if ((chainlen > BFE_TX_LIST_CNT / 4) || 1279119917Swpaul ((BFE_TX_LIST_CNT - (chainlen + sc->bfe_tx_cnt)) < 2)) { 1280119917Swpaul m = m_defrag(m_head, M_DONTWAIT); 1281119917Swpaul if (m == NULL) 1282119917Swpaul return(ENOBUFS); 1283119917Swpaul m_head = m; 1284119917Swpaul } 1285119917Swpaul 1286119917Swpaul /* 1287119917Swpaul * Start packing the mbufs in this chain into 1288119917Swpaul * the fragment pointers. Stop when we run out 1289119917Swpaul * of fragments or hit the end of the mbuf chain. 1290119917Swpaul */ 1291119917Swpaul m = m_head; 1292119917Swpaul cur = frag = *txidx; 1293119917Swpaul cnt = 0; 1294119917Swpaul 1295119917Swpaul for(m = m_head; m != NULL; m = m->m_next) { 1296119917Swpaul if(m->m_len != 0) { 1297119917Swpaul if((BFE_TX_LIST_CNT - (sc->bfe_tx_cnt + cnt)) < 2) 1298119917Swpaul return(ENOBUFS); 1299119917Swpaul 1300119917Swpaul d = &sc->bfe_tx_list[cur]; 1301119917Swpaul r = &sc->bfe_tx_ring[cur]; 1302119917Swpaul d->bfe_ctrl = BFE_DESC_LEN & m->m_len; 1303119917Swpaul /* always intterupt on completion */ 1304119917Swpaul d->bfe_ctrl |= BFE_DESC_IOC; 1305119917Swpaul if(cnt == 0) 1306119917Swpaul /* Set start of frame */ 1307119917Swpaul d->bfe_ctrl |= BFE_DESC_SOF; 1308119917Swpaul if(cur == BFE_TX_LIST_CNT - 1) 1309126470Sjulian /* 1310126470Sjulian * Tell the chip to wrap to the start of 1311126470Sjulian * the descriptor list 1312126470Sjulian */ 1313119917Swpaul d->bfe_ctrl |= BFE_DESC_EOT; 1314119917Swpaul 1315126470Sjulian bus_dmamap_load(sc->bfe_tag, 1316126470Sjulian r->bfe_map, mtod(m, void*), m->m_len, 1317126470Sjulian bfe_dma_map_desc, d, 0); 1318126470Sjulian bus_dmamap_sync(sc->bfe_tag, r->bfe_map, 1319126470Sjulian BUS_DMASYNC_PREREAD); 1320119917Swpaul 1321119917Swpaul frag = cur; 1322126470Sjulian BFE_INC(cur, BFE_TX_LIST_CNT); 1323119917Swpaul cnt++; 1324119917Swpaul } 1325119917Swpaul } 1326119917Swpaul 1327119917Swpaul if (m != NULL) 1328119917Swpaul return(ENOBUFS); 1329119917Swpaul 1330119917Swpaul sc->bfe_tx_list[frag].bfe_ctrl |= BFE_DESC_EOF; 1331119917Swpaul sc->bfe_tx_ring[frag].bfe_mbuf = m_head; 1332119917Swpaul bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 1333119917Swpaul 1334119917Swpaul *txidx = cur; 1335119917Swpaul sc->bfe_tx_cnt += cnt; 1336119917Swpaul return (0); 1337119917Swpaul} 1338119917Swpaul 1339119917Swpaul/* 1340119917Swpaul * Set up to transmit a packet 1341119917Swpaul */ 1342119917Swpaulstatic void 1343119917Swpaulbfe_start(struct ifnet *ifp) 1344119917Swpaul{ 1345119917Swpaul struct bfe_softc *sc; 1346119917Swpaul struct mbuf *m_head = NULL; 1347119917Swpaul int idx; 1348119917Swpaul 1349119917Swpaul sc = ifp->if_softc; 1350119917Swpaul idx = sc->bfe_tx_prod; 1351119917Swpaul 1352119917Swpaul BFE_LOCK(sc); 1353119917Swpaul 1354119917Swpaul /* 1355126470Sjulian * Not much point trying to send if the link is down 1356126470Sjulian * or we have nothing to send. 1357119917Swpaul */ 1358119917Swpaul if (!sc->bfe_link && ifp->if_snd.ifq_len < 10) { 1359119917Swpaul BFE_UNLOCK(sc); 1360119917Swpaul return; 1361119917Swpaul } 1362119917Swpaul 1363119917Swpaul if (ifp->if_flags & IFF_OACTIVE) { 1364119917Swpaul BFE_UNLOCK(sc); 1365119917Swpaul return; 1366119917Swpaul } 1367119917Swpaul 1368119917Swpaul while(sc->bfe_tx_ring[idx].bfe_mbuf == NULL) { 1369119917Swpaul IF_DEQUEUE(&ifp->if_snd, m_head); 1370119917Swpaul if(m_head == NULL) 1371119917Swpaul break; 1372119917Swpaul 1373119917Swpaul /* 1374126470Sjulian * Pack the data into the tx ring. If we dont have 1375126470Sjulian * enough room, let the chip drain the ring. 1376119917Swpaul */ 1377119917Swpaul if(bfe_encap(sc, m_head, &idx)) { 1378119917Swpaul IF_PREPEND(&ifp->if_snd, m_head); 1379119917Swpaul ifp->if_flags |= IFF_OACTIVE; 1380119917Swpaul break; 1381119917Swpaul } 1382119917Swpaul 1383119917Swpaul /* 1384119917Swpaul * If there's a BPF listener, bounce a copy of this frame 1385119917Swpaul * to him. 1386119917Swpaul */ 1387119917Swpaul BPF_MTAP(ifp, m_head); 1388119917Swpaul } 1389119917Swpaul 1390119917Swpaul sc->bfe_tx_prod = idx; 1391119917Swpaul /* Transmit - twice due to apparent hardware bug */ 1392119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1393119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1394119917Swpaul 1395119917Swpaul /* 1396119917Swpaul * Set a timeout in case the chip goes out to lunch. 1397119917Swpaul */ 1398119917Swpaul ifp->if_timer = 5; 1399119917Swpaul BFE_UNLOCK(sc); 1400119917Swpaul} 1401119917Swpaul 1402119917Swpaulstatic void 1403119917Swpaulbfe_init(void *xsc) 1404119917Swpaul{ 1405119917Swpaul struct bfe_softc *sc = (struct bfe_softc*)xsc; 1406119917Swpaul struct ifnet *ifp = &sc->arpcom.ac_if; 1407119917Swpaul 1408119917Swpaul BFE_LOCK(sc); 1409119917Swpaul 1410119917Swpaul if (ifp->if_flags & IFF_RUNNING) { 1411119917Swpaul BFE_UNLOCK(sc); 1412119917Swpaul return; 1413119917Swpaul } 1414119917Swpaul 1415119917Swpaul bfe_stop(sc); 1416119917Swpaul bfe_chip_reset(sc); 1417119917Swpaul 1418119917Swpaul if (bfe_list_rx_init(sc) == ENOBUFS) { 1419126470Sjulian printf("bfe%d: bfe_init: Not enough memory for list buffers\n", 1420126470Sjulian sc->bfe_unit); 1421119917Swpaul bfe_stop(sc); 1422119917Swpaul return; 1423119917Swpaul } 1424119917Swpaul 1425119917Swpaul bfe_set_rx_mode(sc); 1426119917Swpaul 1427119917Swpaul /* Enable the chip and core */ 1428119917Swpaul BFE_OR(sc, BFE_ENET_CTRL, BFE_ENET_ENABLE); 1429119917Swpaul /* Enable interrupts */ 1430119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, BFE_IMASK_DEF); 1431119917Swpaul 1432119917Swpaul bfe_ifmedia_upd(ifp); 1433119917Swpaul ifp->if_flags |= IFF_RUNNING; 1434119917Swpaul ifp->if_flags &= ~IFF_OACTIVE; 1435119917Swpaul 1436119917Swpaul sc->bfe_stat_ch = timeout(bfe_tick, sc, hz); 1437119917Swpaul BFE_UNLOCK(sc); 1438119917Swpaul} 1439119917Swpaul 1440119917Swpaul/* 1441119917Swpaul * Set media options. 1442119917Swpaul */ 1443119917Swpaulstatic int 1444119917Swpaulbfe_ifmedia_upd(struct ifnet *ifp) 1445119917Swpaul{ 1446119917Swpaul struct bfe_softc *sc; 1447119917Swpaul struct mii_data *mii; 1448119917Swpaul 1449119917Swpaul sc = ifp->if_softc; 1450119917Swpaul 1451119917Swpaul BFE_LOCK(sc); 1452119917Swpaul 1453119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1454119917Swpaul sc->bfe_link = 0; 1455119917Swpaul if (mii->mii_instance) { 1456119917Swpaul struct mii_softc *miisc; 1457119917Swpaul for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 1458119917Swpaul miisc = LIST_NEXT(miisc, mii_list)) 1459119917Swpaul mii_phy_reset(miisc); 1460119917Swpaul } 1461119917Swpaul mii_mediachg(mii); 1462119917Swpaul 1463119917Swpaul BFE_UNLOCK(sc); 1464119917Swpaul return(0); 1465119917Swpaul} 1466119917Swpaul 1467119917Swpaul/* 1468119917Swpaul * Report current media status. 1469119917Swpaul */ 1470119917Swpaulstatic void 1471119917Swpaulbfe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1472119917Swpaul{ 1473119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1474119917Swpaul struct mii_data *mii; 1475119917Swpaul 1476119917Swpaul BFE_LOCK(sc); 1477119917Swpaul 1478119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1479119917Swpaul mii_pollstat(mii); 1480119917Swpaul ifmr->ifm_active = mii->mii_media_active; 1481119917Swpaul ifmr->ifm_status = mii->mii_media_status; 1482119917Swpaul 1483119917Swpaul BFE_UNLOCK(sc); 1484119917Swpaul} 1485119917Swpaul 1486119917Swpaulstatic int 1487119917Swpaulbfe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1488119917Swpaul{ 1489119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1490119917Swpaul struct ifreq *ifr = (struct ifreq *) data; 1491119917Swpaul struct mii_data *mii; 1492119917Swpaul int error = 0; 1493119917Swpaul 1494119917Swpaul BFE_LOCK(sc); 1495119917Swpaul 1496119917Swpaul switch(command) { 1497119917Swpaul case SIOCSIFFLAGS: 1498119917Swpaul if(ifp->if_flags & IFF_UP) 1499119917Swpaul if(ifp->if_flags & IFF_RUNNING) 1500119917Swpaul bfe_set_rx_mode(sc); 1501119917Swpaul else 1502119917Swpaul bfe_init(sc); 1503119917Swpaul else if(ifp->if_flags & IFF_RUNNING) 1504119917Swpaul bfe_stop(sc); 1505119917Swpaul break; 1506119917Swpaul case SIOCADDMULTI: 1507119917Swpaul case SIOCDELMULTI: 1508119917Swpaul if(ifp->if_flags & IFF_RUNNING) 1509119917Swpaul bfe_set_rx_mode(sc); 1510119917Swpaul break; 1511119917Swpaul case SIOCGIFMEDIA: 1512119917Swpaul case SIOCSIFMEDIA: 1513119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1514126470Sjulian error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, 1515126470Sjulian command); 1516119917Swpaul break; 1517119917Swpaul default: 1518119917Swpaul error = ether_ioctl(ifp, command, data); 1519119917Swpaul break; 1520119917Swpaul } 1521119917Swpaul 1522119917Swpaul BFE_UNLOCK(sc); 1523119917Swpaul return error; 1524119917Swpaul} 1525119917Swpaul 1526119917Swpaulstatic void 1527119917Swpaulbfe_watchdog(struct ifnet *ifp) 1528119917Swpaul{ 1529119917Swpaul struct bfe_softc *sc; 1530119917Swpaul 1531119917Swpaul sc = ifp->if_softc; 1532119917Swpaul 1533119917Swpaul BFE_LOCK(sc); 1534119917Swpaul 1535119917Swpaul printf("bfe%d: watchdog timeout -- resetting\n", sc->bfe_unit); 1536119917Swpaul 1537119917Swpaul ifp->if_flags &= ~IFF_RUNNING; 1538119917Swpaul bfe_init(sc); 1539119917Swpaul 1540119917Swpaul ifp->if_oerrors++; 1541119917Swpaul 1542119917Swpaul BFE_UNLOCK(sc); 1543119917Swpaul} 1544119917Swpaul 1545119917Swpaulstatic void 1546119917Swpaulbfe_tick(void *xsc) 1547119917Swpaul{ 1548119917Swpaul struct bfe_softc *sc = xsc; 1549119917Swpaul struct mii_data *mii; 1550119917Swpaul 1551119917Swpaul if (sc == NULL) 1552119917Swpaul return; 1553119917Swpaul 1554119917Swpaul BFE_LOCK(sc); 1555119917Swpaul 1556119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1557119917Swpaul 1558119917Swpaul bfe_stats_update(sc); 1559119917Swpaul sc->bfe_stat_ch = timeout(bfe_tick, sc, hz); 1560119917Swpaul 1561119917Swpaul if(sc->bfe_link) { 1562119917Swpaul BFE_UNLOCK(sc); 1563119917Swpaul return; 1564119917Swpaul } 1565119917Swpaul 1566119917Swpaul mii_tick(mii); 1567119917Swpaul if (!sc->bfe_link && mii->mii_media_status & IFM_ACTIVE && 1568119917Swpaul IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) 1569119917Swpaul sc->bfe_link++; 1570119917Swpaul 1571119917Swpaul BFE_UNLOCK(sc); 1572119917Swpaul} 1573119917Swpaul 1574119917Swpaul/* 1575119917Swpaul * Stop the adapter and free any mbufs allocated to the 1576119917Swpaul * RX and TX lists. 1577119917Swpaul */ 1578119917Swpaulstatic void 1579119917Swpaulbfe_stop(struct bfe_softc *sc) 1580119917Swpaul{ 1581119917Swpaul struct ifnet *ifp; 1582119917Swpaul 1583119917Swpaul BFE_LOCK(sc); 1584119917Swpaul 1585119917Swpaul untimeout(bfe_tick, sc, sc->bfe_stat_ch); 1586119917Swpaul 1587119917Swpaul ifp = &sc->arpcom.ac_if; 1588119917Swpaul 1589119917Swpaul bfe_chip_halt(sc); 1590126470Sjulian bfe_tx_ring_free(sc); 1591119917Swpaul bfe_rx_ring_free(sc); 1592119917Swpaul 1593119917Swpaul ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1594119917Swpaul 1595119917Swpaul BFE_UNLOCK(sc); 1596119917Swpaul} 1597