amrr.h revision 139530
155682Smarkm/*- 272445Sassar * Copyright (c) 2004 INRIA 355682Smarkm * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 455682Smarkm * All rights reserved. 555682Smarkm * 655682Smarkm * Redistribution and use in source and binary forms, with or without 755682Smarkm * modification, are permitted provided that the following conditions 855682Smarkm * are met: 955682Smarkm * 1. Redistributions of source code must retain the above copyright 1055682Smarkm * notice, this list of conditions and the following disclaimer, 1155682Smarkm without modification. 1255682Smarkm * 2. Redistributions in binary form must reproduce at minimum a disclaimer 1355682Smarkm * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 1455682Smarkm * redistribution must be conditioned upon including a substantially 1555682Smarkm * similar Disclaimer requirement for further binary redistribution. 1655682Smarkm * 3. Neither the names of the above-listed copyright holders nor the names 1755682Smarkm * of any contributors may be used to endorse or promote products derived 1855682Smarkm * from this software without specific prior written permission. 1955682Smarkm * 2055682Smarkm * Alternatively, this software may be distributed under the terms of the 2155682Smarkm * GNU General Public License ("GPL") version 2 as published by the Free 2255682Smarkm * Software Foundation. 2355682Smarkm * 2455682Smarkm * NO WARRANTY 2555682Smarkm * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2655682Smarkm * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2755682Smarkm * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 2855682Smarkm * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 2955682Smarkm * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 3055682Smarkm * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3155682Smarkm * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3255682Smarkm * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 3355682Smarkm * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3455682Smarkm * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 3555682Smarkm * THE POSSIBILITY OF SUCH DAMAGES. 3672445Sassar * 3755682Smarkm * $FreeBSD: head/sys/dev/ath/ath_rate/amrr/amrr.h 139530 2004-12-31 22:42:38Z sam $ 3872445Sassar */ 3972445Sassar 4072445Sassar#ifndef _DEV_ATH_RATE_AMRR_H 4172445Sassar#define _DEV_ATH_RATE_AMRR_H 4272445Sassar 4372445Sassar/* per-device state */ 4472445Sassarstruct amrr_softc { 4572445Sassar struct ath_ratectrl arc; /* base state */ 4672445Sassar struct callout timer; /* periodic timer */ 4772445Sassar}; 4855682Smarkm 4955682Smarkm/* per-node state */ 5055682Smarkmstruct amrr_node { 5172445Sassar /* AMRR statistics for this node */ 5255682Smarkm u_int amn_tx_try0_cnt; 5355682Smarkm u_int amn_tx_try1_cnt; 5455682Smarkm u_int amn_tx_try2_cnt; 5555682Smarkm u_int amn_tx_try3_cnt; 5655682Smarkm u_int amn_tx_failure_cnt; 5755682Smarkm /* AMRR algorithm state for this node */ 5872445Sassar u_int amn_success_threshold; 5972445Sassar u_int amn_success; 6072445Sassar u_int amn_recovery; 6155682Smarkm /* rate index et al. */ 6255682Smarkm u_int8_t amn_tx_rix0; /* series 0 rate index */ 6355682Smarkm u_int8_t amn_tx_rate0; /* series 0 h/w rate */ 6455682Smarkm u_int8_t amn_tx_rate1; /* series 1 h/w rate */ 6555682Smarkm u_int8_t amn_tx_rate2; /* series 2 h/w rate */ 6655682Smarkm u_int8_t amn_tx_rate3; /* series 3 h/w rate */ 6755682Smarkm u_int8_t amn_tx_rate0sp; /* series 0 short preamble h/w rate */ 6855682Smarkm u_int8_t amn_tx_rate1sp; /* series 1 short preamble h/w rate */ 6955682Smarkm u_int8_t amn_tx_rate2sp; /* series 2 short preamble h/w rate */ 7072445Sassar u_int8_t amn_tx_rate3sp; /* series 3 short preamble h/w rate */ 7172445Sassar u_int8_t amn_tx_try0; /* series 0 try count */ 7272445Sassar u_int amn_tx_try1; /* series 1 try count */ 7355682Smarkm u_int amn_tx_try2; /* series 2 try count */ 7455682Smarkm u_int amn_tx_try3; /* series 3 try count */ 7555682Smarkm}; 7672445Sassar#define ATH_NODE_AMRR(an) ((struct amrr_node *)&an[1]) 7772445Sassar#endif /* _DEV_ATH_RATE_AMRR_H */ 7872445Sassar