ar5416_attach.c revision 188970
1/* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c 188970 2009-02-23 23:48:17Z sam $ 18 */ 19#include "opt_ah.h" 20 21#include "ah.h" 22#include "ah_internal.h" 23#include "ah_devid.h" 24 25#include "ar5416/ar5416.h" 26#include "ar5416/ar5416reg.h" 27#include "ar5416/ar5416phy.h" 28 29#include "ar5416/ar5416.ini" 30 31static void 32ar5416AniSetup(struct ath_hal *ah) 33{ 34 static const struct ar5212AniParams aniparams = { 35 .maxNoiseImmunityLevel = 4, /* levels 0..4 */ 36 .totalSizeDesired = { -55, -55, -55, -55, -62 }, 37 .coarseHigh = { -14, -14, -14, -14, -12 }, 38 .coarseLow = { -64, -64, -64, -64, -70 }, 39 .firpwr = { -78, -78, -78, -78, -80 }, 40 .maxSpurImmunityLevel = 2, 41 .cycPwrThr1 = { 2, 4, 6 }, 42 .maxFirstepLevel = 2, /* levels 0..2 */ 43 .firstep = { 0, 4, 8 }, 44 .ofdmTrigHigh = 500, 45 .ofdmTrigLow = 200, 46 .cckTrigHigh = 200, 47 .cckTrigLow = 100, 48 .rssiThrHigh = 40, 49 .rssiThrLow = 7, 50 .period = 100, 51 }; 52 /* NB: ANI is not enabled yet */ 53 ar5212AniAttach(ah, &aniparams, &aniparams, AH_FALSE); 54} 55 56/* 57 * Attach for an AR5416 part. 58 */ 59void 60ar5416InitState(struct ath_hal_5416 *ahp5416, uint16_t devid, HAL_SOFTC sc, 61 HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status) 62{ 63 struct ath_hal_5212 *ahp; 64 struct ath_hal *ah; 65 66 ahp = &ahp5416->ah_5212; 67 ar5212InitState(ahp, devid, sc, st, sh, status); 68 ah = &ahp->ah_priv.h; 69 70 /* override 5212 methods for our needs */ 71 ah->ah_magic = AR5416_MAGIC; 72 ah->ah_getRateTable = ar5416GetRateTable; 73 ah->ah_detach = ar5416Detach; 74 75 /* Reset functions */ 76 ah->ah_reset = ar5416Reset; 77 ah->ah_phyDisable = ar5416PhyDisable; 78 ah->ah_disable = ar5416Disable; 79 ah->ah_perCalibration = ar5416PerCalibration; 80 ah->ah_perCalibrationN = ar5416PerCalibrationN, 81 ah->ah_resetCalValid = ar5416ResetCalValid, 82 ah->ah_setTxPowerLimit = ar5416SetTxPowerLimit; 83 84 /* Transmit functions */ 85 ah->ah_stopTxDma = ar5416StopTxDma; 86 ah->ah_setupTxDesc = ar5416SetupTxDesc; 87 ah->ah_setupXTxDesc = ar5416SetupXTxDesc; 88 ah->ah_fillTxDesc = ar5416FillTxDesc; 89 ah->ah_procTxDesc = ar5416ProcTxDesc; 90 91 /* Receive Functions */ 92 ah->ah_startPcuReceive = ar5416StartPcuReceive; 93 ah->ah_stopPcuReceive = ar5416StopPcuReceive; 94 ah->ah_setupRxDesc = ar5416SetupRxDesc; 95 ah->ah_procRxDesc = ar5416ProcRxDesc; 96 ah->ah_rxMonitor = ar5416AniPoll, 97 ah->ah_procMibEvent = ar5416ProcessMibIntr, 98 99 /* Misc Functions */ 100 ah->ah_getDiagState = ar5416GetDiagState; 101 ah->ah_setLedState = ar5416SetLedState; 102 ah->ah_gpioCfgOutput = ar5416GpioCfgOutput; 103 ah->ah_gpioCfgInput = ar5416GpioCfgInput; 104 ah->ah_gpioGet = ar5416GpioGet; 105 ah->ah_gpioSet = ar5416GpioSet; 106 ah->ah_gpioSetIntr = ar5416GpioSetIntr; 107 ah->ah_resetTsf = ar5416ResetTsf; 108 ah->ah_getRfGain = ar5416GetRfgain; 109 ah->ah_setAntennaSwitch = ar5416SetAntennaSwitch; 110 ah->ah_setDecompMask = ar5416SetDecompMask; 111 ah->ah_setCoverageClass = ar5416SetCoverageClass; 112 113 ah->ah_resetKeyCacheEntry = ar5416ResetKeyCacheEntry; 114 ah->ah_setKeyCacheEntry = ar5416SetKeyCacheEntry; 115 116 /* Power Management Functions */ 117 ah->ah_setPowerMode = ar5416SetPowerMode; 118 119 /* Beacon Management Functions */ 120 ah->ah_setBeaconTimers = ar5416SetBeaconTimers; 121 ah->ah_beaconInit = ar5416BeaconInit; 122 ah->ah_setStationBeaconTimers = ar5416SetStaBeaconTimers; 123 ah->ah_resetStationBeaconTimers = ar5416ResetStaBeaconTimers; 124 125 /* XXX 802.11n Functions */ 126#if 0 127 ah->ah_chainTxDesc = ar5416ChainTxDesc; 128 ah->ah_setupFirstTxDesc = ar5416SetupFirstTxDesc; 129 ah->ah_setupLastTxDesc = ar5416SetupLastTxDesc; 130 ah->ah_set11nRateScenario = ar5416Set11nRateScenario; 131 ah->ah_set11nAggrMiddle = ar5416Set11nAggrMiddle; 132 ah->ah_clr11nAggr = ar5416Clr11nAggr; 133 ah->ah_set11nBurstDuration = ar5416Set11nBurstDuration; 134 ah->ah_get11nExtBusy = ar5416Get11nExtBusy; 135 ah->ah_set11nMac2040 = ar5416Set11nMac2040; 136 ah->ah_get11nRxClear = ar5416Get11nRxClear; 137 ah->ah_set11nRxClear = ar5416Set11nRxClear; 138#endif 139 140 /* Interrupt functions */ 141 ah->ah_isInterruptPending = ar5416IsInterruptPending; 142 ah->ah_getPendingInterrupts = ar5416GetPendingInterrupts; 143 ah->ah_setInterrupts = ar5416SetInterrupts; 144 145 ahp->ah_priv.ah_getWirelessModes= ar5416GetWirelessModes; 146 ahp->ah_priv.ah_eepromRead = ar5416EepromRead; 147#ifdef AH_SUPPORT_WRITE_EEPROM 148 ahp->ah_priv.ah_eepromWrite = ar5416EepromWrite; 149#endif 150 ahp->ah_priv.ah_getChipPowerLimits = ar5416GetChipPowerLimits; 151 152 /* 153 * Start by setting all Owl devices to 2x2 154 */ 155 AH5416(ah)->ah_rx_chainmask = AR5416_DEFAULT_RXCHAINMASK; 156 AH5416(ah)->ah_tx_chainmask = AR5416_DEFAULT_TXCHAINMASK; 157} 158 159/* 160 * Attach for an AR5416 part. 161 */ 162struct ath_hal * 163ar5416Attach(uint16_t devid, HAL_SOFTC sc, 164 HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status) 165{ 166 struct ath_hal_5416 *ahp5416; 167 struct ath_hal_5212 *ahp; 168 struct ath_hal *ah; 169 uint32_t val; 170 HAL_STATUS ecode; 171 HAL_BOOL rfStatus; 172 173 HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", 174 __func__, sc, (void*) st, (void*) sh); 175 176 /* NB: memory is returned zero'd */ 177 ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416) + 178 /* extra space for Owl 2.1/2.2 WAR */ 179 sizeof(ar5416Addac) 180 ); 181 if (ahp5416 == AH_NULL) { 182 HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 183 "%s: cannot allocate memory for state block\n", __func__); 184 *status = HAL_ENOMEM; 185 return AH_NULL; 186 } 187 ar5416InitState(ahp5416, devid, sc, st, sh, status); 188 ahp = &ahp5416->ah_5212; 189 ah = &ahp->ah_priv.h; 190 191 if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) { 192 /* reset chip */ 193 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n", __func__); 194 ecode = HAL_EIO; 195 goto bad; 196 } 197 198 if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { 199 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n", __func__); 200 ecode = HAL_EIO; 201 goto bad; 202 } 203 /* Read Revisions from Chips before taking out of reset */ 204 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID; 205 AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S; 206 AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION; 207 208 /* setup common ini data; rf backends handle remainder */ 209 HAL_INI_INIT(&ahp->ah_ini_modes, ar5416Modes, 6); 210 HAL_INI_INIT(&ahp->ah_ini_common, ar5416Common, 2); 211 212 HAL_INI_INIT(&AH5416(ah)->ah_ini_bb_rfgain, ar5416BB_RfGain, 3); 213 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank0, ar5416Bank0, 2); 214 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank1, ar5416Bank1, 2); 215 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank2, ar5416Bank2, 2); 216 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank3, ar5416Bank3, 3); 217 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank6, ar5416Bank6, 3); 218 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank7, ar5416Bank7, 2); 219 HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar5416Addac, 2); 220 221 if (!IS_5416V2_2(ah)) { /* Owl 2.1/2.0 */ 222 struct ini { 223 uint32_t *data; /* NB: !const */ 224 int rows, cols; 225 }; 226 /* override CLKDRV value */ 227 OS_MEMCPY(&AH5416(ah)[1], ar5416Addac, sizeof(ar5416Addac)); 228 AH5416(ah)->ah_ini_addac.data = (uint32_t *) &AH5416(ah)[1]; 229 HAL_INI_VAL((struct ini *)&AH5416(ah)->ah_ini_addac, 31, 1) = 0; 230 } 231 232 if (!ar5416ChipReset(ah, AH_NULL)) { /* reset chip */ 233 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", 234 __func__); 235 ecode = HAL_EIO; 236 goto bad; 237 } 238 239 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); 240 241 if (!ar5212ChipTest(ah)) { 242 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", 243 __func__); 244 ecode = HAL_ESELFTEST; 245 goto bad; 246 } 247 248 /* 249 * Set correct Baseband to analog shift 250 * setting to access analog chips. 251 */ 252 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); 253 254 /* Read Radio Chip Rev Extract */ 255 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5212GetRadioRev(ah); 256 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { 257 case AR_RAD5122_SREV_MAJOR: /* Fowl: 5G/2x2 */ 258 case AR_RAD2122_SREV_MAJOR: /* Fowl: 2+5G/2x2 */ 259 case AR_RAD2133_SREV_MAJOR: /* Fowl: 2G/3x3 */ 260 case AR_RAD5133_SREV_MAJOR: /* Fowl: 2+5G/3x3 */ 261 break; 262 default: 263 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) { 264 /* 265 * When RF_Silen is used the analog chip is reset. 266 * So when the system boots with radio switch off 267 * the RF chip rev reads back as zero and we need 268 * to use the mac+phy revs to set the radio rev. 269 */ 270 AH_PRIVATE(ah)->ah_analog5GhzRev = 271 AR_RAD5133_SREV_MAJOR; 272 break; 273 } 274 /* NB: silently accept anything in release code per Atheros */ 275#ifdef AH_DEBUG 276 HALDEBUG(ah, HAL_DEBUG_ANY, 277 "%s: 5G Radio Chip Rev 0x%02X is not supported by " 278 "this driver\n", __func__, 279 AH_PRIVATE(ah)->ah_analog5GhzRev); 280 ecode = HAL_ENOTSUPP; 281 goto bad; 282#endif 283 } 284 285 ecode = ath_hal_v14EepromAttach(ah); 286 if (ecode != HAL_OK) 287 goto bad; 288 289 /* 290 * Got everything we need now to setup the capabilities. 291 */ 292 if (!ar5416FillCapabilityInfo(ah)) { 293 ecode = HAL_EEREAD; 294 goto bad; 295 } 296 297 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 298 if (ecode != HAL_OK) { 299 HALDEBUG(ah, HAL_DEBUG_ANY, 300 "%s: error getting mac address from EEPROM\n", __func__); 301 goto bad; 302 } 303 /* XXX How about the serial number ? */ 304 /* Read Reg Domain */ 305 AH_PRIVATE(ah)->ah_currentRD = 306 ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL); 307 308 /* 309 * ah_miscMode is populated by ar5416FillCapabilityInfo() 310 * starting from griffin. Set here to make sure that 311 * AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is 312 * placed into hardware. 313 */ 314 if (ahp->ah_miscMode != 0) 315 OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode); 316 317 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: Attaching AR2133 radio\n", 318 __func__); 319 rfStatus = ar2133RfAttach(ah, &ecode); 320 if (!rfStatus) { 321 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n", 322 __func__, ecode); 323 goto bad; 324 } 325 326 ar5416AniSetup(ah); /* Anti Noise Immunity */ 327 ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist); 328 329 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 330 331 return ah; 332bad: 333 if (ahp) 334 ar5416Detach((struct ath_hal *) ahp); 335 if (status) 336 *status = ecode; 337 return AH_NULL; 338} 339 340void 341ar5416Detach(struct ath_hal *ah) 342{ 343 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__); 344 345 HALASSERT(ah != AH_NULL); 346 HALASSERT(ah->ah_magic == AR5416_MAGIC); 347 348 ar5416AniDetach(ah); 349 ar5212RfDetach(ah); 350 ah->ah_disable(ah); 351 ar5416SetPowerMode(ah, HAL_PM_FULL_SLEEP, AH_TRUE); 352 ath_hal_eepromDetach(ah); 353 ath_hal_free(ah); 354} 355 356/* 357 * Fill all software cached or static hardware state information. 358 * Return failure if capabilities are to come from EEPROM and 359 * cannot be read. 360 */ 361HAL_BOOL 362ar5416FillCapabilityInfo(struct ath_hal *ah) 363{ 364 struct ath_hal_private *ahpriv = AH_PRIVATE(ah); 365 HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; 366 uint16_t val; 367 368 /* Construct wireless mode from EEPROM */ 369 pCap->halWirelessModes = 0; 370 if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) { 371 pCap->halWirelessModes |= HAL_MODE_11A 372 | HAL_MODE_11NA_HT20 373 | HAL_MODE_11NA_HT40PLUS 374 | HAL_MODE_11NA_HT40MINUS 375 ; 376 } 377 if (ath_hal_eepromGetFlag(ah, AR_EEP_GMODE)) { 378 pCap->halWirelessModes |= HAL_MODE_11G 379 | HAL_MODE_11NG_HT20 380 | HAL_MODE_11NG_HT40PLUS 381 | HAL_MODE_11NG_HT40MINUS 382 ; 383 pCap->halWirelessModes |= HAL_MODE_11A 384 | HAL_MODE_11NA_HT20 385 | HAL_MODE_11NA_HT40PLUS 386 | HAL_MODE_11NA_HT40MINUS 387 ; 388 } 389 390 pCap->halLow2GhzChan = 2312; 391 pCap->halHigh2GhzChan = 2732; 392 393 pCap->halLow5GhzChan = 4915; 394 pCap->halHigh5GhzChan = 6100; 395 396 pCap->halCipherCkipSupport = AH_FALSE; 397 pCap->halCipherTkipSupport = AH_TRUE; 398 pCap->halCipherAesCcmSupport = ath_hal_eepromGetFlag(ah, AR_EEP_AES); 399 400 pCap->halMicCkipSupport = AH_FALSE; 401 pCap->halMicTkipSupport = AH_TRUE; 402 pCap->halMicAesCcmSupport = ath_hal_eepromGetFlag(ah, AR_EEP_AES); 403 /* 404 * Starting with Griffin TX+RX mic keys can be combined 405 * in one key cache slot. 406 */ 407 pCap->halTkipMicTxRxKeySupport = AH_TRUE; 408 pCap->halChanSpreadSupport = AH_TRUE; 409 pCap->halSleepAfterBeaconBroken = AH_TRUE; 410 411 pCap->halCompressSupport = AH_FALSE; 412 pCap->halBurstSupport = AH_TRUE; 413 pCap->halFastFramesSupport = AH_FALSE; /* XXX? */ 414 pCap->halChapTuningSupport = AH_TRUE; 415 pCap->halTurboPrimeSupport = AH_TRUE; 416 417 pCap->halTurboGSupport = pCap->halWirelessModes & HAL_MODE_108G; 418 419 pCap->halPSPollBroken = AH_TRUE; /* XXX fixed in later revs? */ 420 pCap->halVEOLSupport = AH_TRUE; 421 pCap->halBssIdMaskSupport = AH_TRUE; 422 pCap->halMcastKeySrchSupport = AH_FALSE; 423 pCap->halTsfAddSupport = AH_TRUE; 424 425 if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK) 426 pCap->halTotalQueues = val; 427 else 428 pCap->halTotalQueues = HAL_NUM_TX_QUEUES; 429 430 if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK) 431 pCap->halKeyCacheSize = val; 432 else 433 pCap->halKeyCacheSize = AR5416_KEYTABLE_SIZE; 434 435 /* XXX not needed */ 436 pCap->halChanHalfRate = AH_FALSE; /* XXX ? */ 437 pCap->halChanQuarterRate = AH_FALSE; /* XXX ? */ 438 439 pCap->halTstampPrecision = 32; 440 pCap->halHwPhyCounterSupport = AH_TRUE; 441 442 pCap->halFastCCSupport = AH_TRUE; 443 pCap->halNumGpioPins = 6; 444 pCap->halWowSupport = AH_FALSE; 445 pCap->halWowMatchPatternExact = AH_FALSE; 446 pCap->halBtCoexSupport = AH_FALSE; /* XXX need support */ 447 pCap->halAutoSleepSupport = AH_FALSE; 448#if 0 /* XXX not yet */ 449 pCap->halNumAntCfg2GHz = ar5416GetNumAntConfig(ahp, HAL_FREQ_BAND_2GHZ); 450 pCap->halNumAntCfg5GHz = ar5416GetNumAntConfig(ahp, HAL_FREQ_BAND_5GHZ); 451#endif 452 pCap->halHTSupport = AH_TRUE; 453 pCap->halTxChainMask = ath_hal_eepromGet(ah, AR_EEP_TXMASK, AH_NULL); 454 /* XXX CB71 uses GPIO 0 to indicate 3 rx chains */ 455 pCap->halRxChainMask = ath_hal_eepromGet(ah, AR_EEP_RXMASK, AH_NULL); 456 pCap->halRtsAggrLimit = 8*1024; /* Owl 2.0 limit */ 457 pCap->halMbssidAggrSupport = AH_TRUE; 458 pCap->halForcePpmSupport = AH_TRUE; 459 pCap->halEnhancedPmSupport = AH_TRUE; 460 461 if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) && 462 ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) { 463 /* NB: enabled by default */ 464 ahpriv->ah_rfkillEnabled = AH_TRUE; 465 pCap->halRfSilentSupport = AH_TRUE; 466 } 467 468 ahpriv->ah_rxornIsFatal = AH_FALSE; 469 470 return AH_TRUE; 471} 472 473static const char* 474ar5416Probe(uint16_t vendorid, uint16_t devid) 475{ 476 if (vendorid == ATHEROS_VENDOR_ID && 477 (devid == AR5416_DEVID_PCI || devid == AR5416_DEVID_PCIE)) 478 return "Atheros 5416"; 479 return AH_NULL; 480} 481AH_CHIP(AR5416, ar5416Probe, ar5416Attach); 482