1183724Ssos/*- 2230132Suqs * Copyright (c) 1998 - 2008 S��ren Schmidt <sos@FreeBSD.org> 3183724Ssos * All rights reserved. 4183724Ssos * 5183724Ssos * Redistribution and use in source and binary forms, with or without 6183724Ssos * modification, are permitted provided that the following conditions 7183724Ssos * are met: 8183724Ssos * 1. Redistributions of source code must retain the above copyright 9183724Ssos * notice, this list of conditions and the following disclaimer, 10183724Ssos * without modification, immediately at the beginning of the file. 11183724Ssos * 2. Redistributions in binary form must reproduce the above copyright 12183724Ssos * notice, this list of conditions and the following disclaimer in the 13183724Ssos * documentation and/or other materials provided with the distribution. 14183724Ssos * 15183724Ssos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16183724Ssos * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17183724Ssos * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18183724Ssos * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19183724Ssos * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20183724Ssos * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21183724Ssos * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22183724Ssos * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23183724Ssos * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24183724Ssos * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25183724Ssos */ 26183724Ssos 27183724Ssos#include <sys/cdefs.h> 28183724Ssos__FBSDID("$FreeBSD$"); 29183724Ssos 30183724Ssos#include <sys/param.h> 31183724Ssos#include <sys/module.h> 32183724Ssos#include <sys/systm.h> 33183724Ssos#include <sys/kernel.h> 34183724Ssos#include <sys/ata.h> 35183724Ssos#include <sys/bus.h> 36183724Ssos#include <sys/endian.h> 37183724Ssos#include <sys/malloc.h> 38183724Ssos#include <sys/lock.h> 39183724Ssos#include <sys/mutex.h> 40183724Ssos#include <sys/sema.h> 41183724Ssos#include <sys/taskqueue.h> 42183724Ssos#include <vm/uma.h> 43183724Ssos#include <machine/stdarg.h> 44183724Ssos#include <machine/resource.h> 45183724Ssos#include <machine/bus.h> 46183724Ssos#include <sys/rman.h> 47183724Ssos#include <dev/pci/pcivar.h> 48183724Ssos#include <dev/pci/pcireg.h> 49183724Ssos#include <dev/ata/ata-all.h> 50183724Ssos#include <dev/ata/ata-pci.h> 51183724Ssos#include <ata_if.h> 52183724Ssos 53183724Ssos/* local prototypes */ 54183724Ssosstatic int ata_ali_chipinit(device_t dev); 55224270Smavstatic int ata_ali_chipdeinit(device_t dev); 56188765Smavstatic int ata_ali_ch_attach(device_t dev); 57188765Smavstatic int ata_ali_sata_ch_attach(device_t dev); 58183724Ssosstatic void ata_ali_reset(device_t dev); 59200171Smavstatic int ata_ali_setmode(device_t dev, int target, int mode); 60183724Ssos 61183724Ssos/* misc defines */ 62183724Ssos#define ALI_OLD 0x01 63183724Ssos#define ALI_NEW 0x02 64183724Ssos#define ALI_SATA 0x04 65183724Ssos 66193918Sjhbstruct ali_sata_resources { 67193918Sjhb struct resource *bars[4]; 68193918Sjhb}; 69183724Ssos 70183724Ssos/* 71183724Ssos * Acer Labs Inc (ALI) chipset support functions 72183724Ssos */ 73183724Ssosstatic int 74183724Ssosata_ali_probe(device_t dev) 75183724Ssos{ 76183724Ssos struct ata_pci_controller *ctlr = device_get_softc(dev); 77242625Sdim static const struct ata_chip_id ids[] = 78183724Ssos {{ ATA_ALI_5289, 0x00, 2, ALI_SATA, ATA_SA150, "M5289" }, 79183724Ssos { ATA_ALI_5288, 0x00, 4, ALI_SATA, ATA_SA300, "M5288" }, 80183724Ssos { ATA_ALI_5287, 0x00, 4, ALI_SATA, ATA_SA150, "M5287" }, 81183724Ssos { ATA_ALI_5281, 0x00, 2, ALI_SATA, ATA_SA150, "M5281" }, 82204509Smav { ATA_ALI_5228, 0xc5, 0, ALI_NEW, ATA_UDMA6, "M5228" }, 83183724Ssos { ATA_ALI_5229, 0xc5, 0, ALI_NEW, ATA_UDMA6, "M5229" }, 84183724Ssos { ATA_ALI_5229, 0xc4, 0, ALI_NEW, ATA_UDMA5, "M5229" }, 85183724Ssos { ATA_ALI_5229, 0xc2, 0, ALI_NEW, ATA_UDMA4, "M5229" }, 86183724Ssos { ATA_ALI_5229, 0x20, 0, ALI_OLD, ATA_UDMA2, "M5229" }, 87183724Ssos { ATA_ALI_5229, 0x00, 0, ALI_OLD, ATA_WDMA2, "M5229" }, 88183724Ssos { 0, 0, 0, 0, 0, 0}}; 89183724Ssos 90183724Ssos if (pci_get_vendor(dev) != ATA_ACER_LABS_ID) 91183724Ssos return ENXIO; 92183724Ssos 93183724Ssos if (!(ctlr->chip = ata_match_chip(dev, ids))) 94183724Ssos return ENXIO; 95183724Ssos 96183724Ssos ata_set_desc(dev); 97183724Ssos ctlr->chipinit = ata_ali_chipinit; 98224270Smav ctlr->chipdeinit = ata_ali_chipdeinit; 99281140Smav return (BUS_PROBE_LOW_PRIORITY); 100183724Ssos} 101183724Ssos 102183724Ssosstatic int 103183724Ssosata_ali_chipinit(device_t dev) 104183724Ssos{ 105183724Ssos struct ata_pci_controller *ctlr = device_get_softc(dev); 106193918Sjhb struct ali_sata_resources *res; 107193918Sjhb int i, rid; 108183724Ssos 109183724Ssos if (ata_setup_interrupt(dev, ata_generic_intr)) 110183724Ssos return ENXIO; 111183724Ssos 112183724Ssos switch (ctlr->chip->cfg2) { 113183724Ssos case ALI_SATA: 114183724Ssos ctlr->channels = ctlr->chip->cfg1; 115188765Smav ctlr->ch_attach = ata_ali_sata_ch_attach; 116188769Smav ctlr->ch_detach = ata_pci_ch_detach; 117183724Ssos ctlr->setmode = ata_sata_setmode; 118200171Smav ctlr->getrev = ata_sata_getrev; 119183724Ssos 120193918Sjhb /* Allocate resources for later use by channel attach routines. */ 121224270Smav res = malloc(sizeof(struct ali_sata_resources), M_ATAPCI, M_WAITOK); 122193918Sjhb for (i = 0; i < 4; i++) { 123193918Sjhb rid = PCIR_BAR(i); 124193918Sjhb res->bars[i] = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, 125193918Sjhb RF_ACTIVE); 126193918Sjhb if (res->bars[i] == NULL) { 127193918Sjhb device_printf(dev, "Failed to allocate BAR %d\n", i); 128193918Sjhb for (i--; i >=0; i--) 129193918Sjhb bus_release_resource(dev, SYS_RES_IOPORT, 130193918Sjhb PCIR_BAR(i), res->bars[i]); 131251945Smav free(res, M_ATAPCI); 132208820Smav return ENXIO; 133193918Sjhb } 134193918Sjhb } 135193918Sjhb ctlr->chipset_data = res; 136183724Ssos break; 137183724Ssos 138183724Ssos case ALI_NEW: 139183724Ssos /* use device interrupt as byte count end */ 140183724Ssos pci_write_config(dev, 0x4a, pci_read_config(dev, 0x4a, 1) | 0x20, 1); 141183724Ssos 142200482Smarius /* enable cable detection and UDMA support on revisions < 0xc7 */ 143200482Smarius if (ctlr->chip->chiprev < 0xc7) 144200482Smarius pci_write_config(dev, 0x4b, pci_read_config(dev, 0x4b, 1) | 145200482Smarius 0x09, 1); 146183724Ssos 147200482Smarius /* enable ATAPI UDMA mode (even if we are going to do PIO) */ 148200482Smarius pci_write_config(dev, 0x53, pci_read_config(dev, 0x53, 1) | 149200482Smarius (ctlr->chip->chiprev >= 0xc7 ? 0x03 : 0x01), 1); 150183724Ssos 151183724Ssos /* only chips with revision > 0xc4 can do 48bit DMA */ 152183724Ssos if (ctlr->chip->chiprev <= 0xc4) 153183724Ssos device_printf(dev, 154183724Ssos "using PIO transfers above 137GB as workaround for " 155183724Ssos "48bit DMA access bug, expect reduced performance\n"); 156188765Smav ctlr->ch_attach = ata_ali_ch_attach; 157188769Smav ctlr->ch_detach = ata_pci_ch_detach; 158183724Ssos ctlr->reset = ata_ali_reset; 159183724Ssos ctlr->setmode = ata_ali_setmode; 160183724Ssos break; 161183724Ssos 162183724Ssos case ALI_OLD: 163183724Ssos /* deactivate the ATAPI FIFO and enable ATAPI UDMA */ 164183724Ssos pci_write_config(dev, 0x53, pci_read_config(dev, 0x53, 1) | 0x03, 1); 165183724Ssos ctlr->setmode = ata_ali_setmode; 166183724Ssos break; 167183724Ssos } 168183724Ssos return 0; 169183724Ssos} 170183724Ssos 171183724Ssosstatic int 172224270Smavata_ali_chipdeinit(device_t dev) 173224270Smav{ 174224270Smav struct ata_pci_controller *ctlr = device_get_softc(dev); 175224270Smav struct ali_sata_resources *res; 176224270Smav int i; 177224270Smav 178224270Smav if (ctlr->chip->cfg2 == ALI_SATA) { 179224270Smav res = ctlr->chipset_data; 180224270Smav for (i = 0; i < 4; i++) { 181224270Smav if (res->bars[i] != NULL) { 182224270Smav bus_release_resource(dev, SYS_RES_IOPORT, 183224270Smav PCIR_BAR(i), res->bars[i]); 184224270Smav } 185224270Smav } 186224270Smav free(res, M_ATAPCI); 187224270Smav ctlr->chipset_data = NULL; 188224270Smav } 189224270Smav return (0); 190224270Smav} 191224270Smav 192224270Smavstatic int 193188765Smavata_ali_ch_attach(device_t dev) 194183724Ssos{ 195183724Ssos struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 196183724Ssos struct ata_channel *ch = device_get_softc(dev); 197183724Ssos 198183724Ssos /* setup the usual register normal pci style */ 199188765Smav if (ata_pci_ch_attach(dev)) 200183724Ssos return ENXIO; 201183724Ssos 202200485Smarius if (ctlr->chip->cfg2 & ALI_NEW && ctlr->chip->chiprev < 0xc7) 203200485Smarius ch->flags |= ATA_CHECKS_CABLE; 204183724Ssos /* older chips can't do 48bit DMA transfers */ 205206604Smav if (ctlr->chip->chiprev <= 0xc4) { 206183724Ssos ch->flags |= ATA_NO_48BIT_DMA; 207206604Smav if (ch->dma.max_iosize > 256 * 512) 208206604Smav ch->dma.max_iosize = 256 * 512; 209206604Smav } 210230627Smarius if (ctlr->chip->cfg2 & ALI_NEW) 211230627Smarius ch->flags |= ATA_NO_ATAPI_DMA; 212183724Ssos 213183724Ssos return 0; 214183724Ssos} 215183724Ssos 216183724Ssosstatic int 217188765Smavata_ali_sata_ch_attach(device_t dev) 218183724Ssos{ 219183724Ssos device_t parent = device_get_parent(dev); 220183724Ssos struct ata_pci_controller *ctlr = device_get_softc(parent); 221183724Ssos struct ata_channel *ch = device_get_softc(dev); 222193918Sjhb struct ali_sata_resources *res; 223183724Ssos struct resource *io = NULL, *ctlio = NULL; 224183724Ssos int unit01 = (ch->unit & 1), unit10 = (ch->unit & 2); 225193918Sjhb int i; 226183724Ssos 227193918Sjhb res = ctlr->chipset_data; 228193918Sjhb if (unit01) { 229193918Sjhb io = res->bars[2]; 230193918Sjhb ctlio = res->bars[3]; 231193918Sjhb } else { 232193918Sjhb io = res->bars[0]; 233193918Sjhb ctlio = res->bars[1]; 234183724Ssos } 235204509Smav ata_pci_dmainit(dev); 236183724Ssos for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { 237183724Ssos ch->r_io[i].res = io; 238183724Ssos ch->r_io[i].offset = i + (unit10 ? 8 : 0); 239183724Ssos } 240183724Ssos ch->r_io[ATA_CONTROL].res = ctlio; 241183724Ssos ch->r_io[ATA_CONTROL].offset = 2 + (unit10 ? 4 : 0); 242183724Ssos ch->r_io[ATA_IDX_ADDR].res = io; 243183724Ssos ata_default_registers(dev); 244183724Ssos if (ctlr->r_res1) { 245183724Ssos for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 246183724Ssos ch->r_io[i].res = ctlr->r_res1; 247183724Ssos ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE); 248183724Ssos } 249183724Ssos } 250183724Ssos ch->flags |= ATA_NO_SLAVE; 251200171Smav ch->flags |= ATA_SATA; 252183724Ssos 253183724Ssos /* XXX SOS PHY handling awkward in ALI chip not supported yet */ 254183724Ssos ata_pci_hw(dev); 255183724Ssos return 0; 256183724Ssos} 257183724Ssos 258183724Ssosstatic void 259183724Ssosata_ali_reset(device_t dev) 260183724Ssos{ 261183724Ssos struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 262183724Ssos struct ata_channel *ch = device_get_softc(dev); 263183724Ssos device_t *children; 264183724Ssos int nchildren, i; 265183724Ssos 266183724Ssos ata_generic_reset(dev); 267183724Ssos 268183724Ssos /* 269183724Ssos * workaround for datacorruption bug found on at least SUN Blade-100 270183724Ssos * find the ISA function on the southbridge and disable then enable 271183724Ssos * the ATA channel tristate buffer 272183724Ssos */ 273183724Ssos if (ctlr->chip->chiprev == 0xc3 || ctlr->chip->chiprev == 0xc2) { 274183724Ssos if (!device_get_children(GRANDPARENT(dev), &children, &nchildren)) { 275183724Ssos for (i = 0; i < nchildren; i++) { 276183724Ssos if (pci_get_devid(children[i]) == ATA_ALI_1533) { 277183724Ssos pci_write_config(children[i], 0x58, 278183724Ssos pci_read_config(children[i], 0x58, 1) & 279183724Ssos ~(0x04 << ch->unit), 1); 280183724Ssos pci_write_config(children[i], 0x58, 281183724Ssos pci_read_config(children[i], 0x58, 1) | 282183724Ssos (0x04 << ch->unit), 1); 283183724Ssos break; 284183724Ssos } 285183724Ssos } 286183724Ssos free(children, M_TEMP); 287183724Ssos } 288183724Ssos } 289183724Ssos} 290183724Ssos 291200171Smavstatic int 292200171Smavata_ali_setmode(device_t dev, int target, int mode) 293183724Ssos{ 294200171Smav device_t parent = device_get_parent(dev); 295200171Smav struct ata_pci_controller *ctlr = device_get_softc(parent); 296200171Smav struct ata_channel *ch = device_get_softc(dev); 297200171Smav int devno = (ch->unit << 1) + target; 298200171Smav int piomode; 299233282Smarius static const uint32_t piotimings[] = 300200171Smav { 0x006d0003, 0x00580002, 0x00440001, 0x00330001, 301200171Smav 0x00310001, 0x006d0003, 0x00330001, 0x00310001 }; 302233282Smarius static const uint8_t udma[] = {0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x0f, 303233282Smarius 0x0d}; 304233282Smarius uint32_t word54; 305183724Ssos 306200171Smav mode = min(mode, ctlr->chip->max_dma); 307183724Ssos 308200482Smarius if (ctlr->chip->cfg2 & ALI_NEW && ctlr->chip->chiprev < 0xc7) { 309209872Smav if (ata_dma_check_80pin && mode > ATA_UDMA2 && 310200171Smav pci_read_config(parent, 0x4a, 1) & (1 << ch->unit)) { 311200171Smav ata_print_cable(dev, "controller"); 312200171Smav mode = ATA_UDMA2; 313200171Smav } 314183724Ssos } 315200171Smav if (ctlr->chip->cfg2 & ALI_OLD) { 316200171Smav /* doesn't support ATAPI DMA on write */ 317200171Smav ch->flags |= ATA_ATAPI_DMA_RO; 318200171Smav if (ch->devices & ATA_ATAPI_MASTER && 319200171Smav ch->devices & ATA_ATAPI_SLAVE) { 320200171Smav /* doesn't support ATAPI DMA on two ATAPI devices */ 321200171Smav device_printf(dev, "two atapi devices on this channel," 322200171Smav " no DMA\n"); 323200171Smav mode = min(mode, ATA_PIO_MAX); 324200171Smav } 325183724Ssos } 326200171Smav /* Set UDMA mode */ 327200171Smav word54 = pci_read_config(parent, 0x54, 4); 328183724Ssos if (mode >= ATA_UDMA0) { 329183724Ssos word54 &= ~(0x000f000f << (devno << 2)); 330183724Ssos word54 |= (((udma[mode&ATA_MODE_MASK]<<16)|0x05)<<(devno<<2)); 331200171Smav piomode = ATA_PIO4; 332183724Ssos } 333183724Ssos else { 334200171Smav word54 &= ~(0x0008000f << (devno << 2)); 335200171Smav piomode = mode; 336183724Ssos } 337200171Smav pci_write_config(parent, 0x54, word54, 4); 338200171Smav /* Set PIO/WDMA mode */ 339200171Smav pci_write_config(parent, 0x58 + (ch->unit << 2), 340200171Smav piotimings[ata_mode2idx(piomode)], 4); 341200171Smav return (mode); 342183724Ssos} 343183724Ssos 344183724SsosATA_DECLARE_DRIVER(ata_ali); 345