ahc_pci.c revision 119418
1/*
2 * FreeBSD, PCI product support functions
3 *
4 * Copyright (c) 1995-2001 Justin T. Gibbs
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions, and the following disclaimer,
12 *    without modification, immediately at the beginning of the file.
13 * 2. The name of the author may not be used to endorse or promote products
14 *    derived from this software without specific prior written permission.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU Public License ("GPL").
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $Id: ahc_pci.c,v 1.53 2003/05/03 23:27:57 gibbs Exp $
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: head/sys/dev/aic7xxx/ahc_pci.c 119418 2003-08-24 17:55:58Z obrien $");
36
37#include <dev/aic7xxx/aic7xxx_osm.h>
38
39#define	AHC_PCI_IOADDR  PCIR_MAPS	/* I/O Address */
40#define	AHC_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
41
42static int ahc_pci_probe(device_t dev);
43static int ahc_pci_attach(device_t dev);
44
45static device_method_t ahc_pci_device_methods[] = {
46	/* Device interface */
47	DEVMETHOD(device_probe,		ahc_pci_probe),
48	DEVMETHOD(device_attach,	ahc_pci_attach),
49	DEVMETHOD(device_detach,	ahc_detach),
50	{ 0, 0 }
51};
52
53static driver_t ahc_pci_driver = {
54	"ahc",
55	ahc_pci_device_methods,
56	sizeof(struct ahc_softc)
57};
58
59DRIVER_MODULE(ahc_pci, pci, ahc_pci_driver, ahc_devclass, 0, 0);
60DRIVER_MODULE(ahc_pci, cardbus, ahc_pci_driver, ahc_devclass, 0, 0);
61MODULE_DEPEND(ahc_pci, ahc, 1, 1, 1);
62MODULE_VERSION(ahc_pci, 1);
63
64static int
65ahc_pci_probe(device_t dev)
66{
67	struct	ahc_pci_identity *entry;
68
69	entry = ahc_find_pci_device(dev);
70	if (entry != NULL) {
71		device_set_desc(dev, entry->name);
72		return (0);
73	}
74	return (ENXIO);
75}
76
77static int
78ahc_pci_attach(device_t dev)
79{
80	struct	 ahc_pci_identity *entry;
81	struct	 ahc_softc *ahc;
82	char	*name;
83	int	 error;
84
85	entry = ahc_find_pci_device(dev);
86	if (entry == NULL)
87		return (ENXIO);
88
89	/*
90	 * Allocate a softc for this card and
91	 * set it up for attachment by our
92	 * common detect routine.
93	 */
94	name = malloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_NOWAIT);
95	if (name == NULL)
96		return (ENOMEM);
97	strcpy(name, device_get_nameunit(dev));
98	ahc = ahc_alloc(dev, name);
99	if (ahc == NULL)
100		return (ENOMEM);
101
102	ahc_set_unit(ahc, device_get_unit(dev));
103
104	/*
105	 * Should we bother disabling 39Bit addressing
106	 * based on installed memory?
107	 */
108	if (sizeof(bus_addr_t) > 4)
109                ahc->flags |= AHC_39BIT_ADDRESSING;
110
111	/* Allocate a dmatag for our SCB DMA maps */
112	/* XXX Should be a child of the PCI bus dma tag */
113	error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1,
114				   /*boundary*/0,
115				   (ahc->flags & AHC_39BIT_ADDRESSING)
116				   ? 0x7FFFFFFFFF
117				   : BUS_SPACE_MAXADDR_32BIT,
118				   /*highaddr*/BUS_SPACE_MAXADDR,
119				   /*filter*/NULL, /*filterarg*/NULL,
120				   /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
121				   /*nsegments*/AHC_NSEG,
122				   /*maxsegsz*/AHC_MAXTRANSFER_SIZE,
123				   /*flags*/0,
124				   /*lockfunc*/busdma_lock_mutex,
125				   /*lockarg*/&Giant,
126				   &ahc->parent_dmat);
127
128	if (error != 0) {
129		printf("ahc_pci_attach: Could not allocate DMA tag "
130		       "- error %d\n", error);
131		ahc_free(ahc);
132		return (ENOMEM);
133	}
134	ahc->dev_softc = dev;
135	error = ahc_pci_config(ahc, entry);
136	if (error != 0) {
137		ahc_free(ahc);
138		return (error);
139	}
140
141	ahc_attach(ahc);
142	return (0);
143}
144
145int
146ahc_pci_map_registers(struct ahc_softc *ahc)
147{
148	struct	resource *regs;
149	u_int	command;
150	int	regs_type;
151	int	regs_id;
152	int	allow_memio;
153
154	command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, /*bytes*/1);
155	regs = NULL;
156	regs_type = 0;
157	regs_id = 0;
158
159	/* Retrieve the per-device 'allow_memio' hint */
160	if (resource_int_value(device_get_name(ahc->dev_softc),
161			       device_get_unit(ahc->dev_softc),
162			       "allow_memio", &allow_memio) != 0) {
163		if (bootverbose)
164			device_printf(ahc->dev_softc, "Defaulting to MEMIO ");
165#ifdef AHC_ALLOW_MEMIO
166		if (bootverbose)
167			printf("on\n");
168		allow_memio = 1;
169#else
170		if (bootverbose)
171			printf("off\n");
172		allow_memio = 0;
173#endif
174	}
175
176	if ((allow_memio != 0) && (command & PCIM_CMD_MEMEN) != 0) {
177
178		regs_type = SYS_RES_MEMORY;
179		regs_id = AHC_PCI_MEMADDR;
180		regs = bus_alloc_resource(ahc->dev_softc, regs_type,
181					  &regs_id, 0, ~0, 1, RF_ACTIVE);
182		if (regs != NULL) {
183			ahc->tag = rman_get_bustag(regs);
184			ahc->bsh = rman_get_bushandle(regs);
185
186			/*
187			 * Do a quick test to see if memory mapped
188			 * I/O is functioning correctly.
189			 */
190			if (ahc_pci_test_register_access(ahc) != 0) {
191				device_printf(ahc->dev_softc,
192				       "PCI Device %d:%d:%d failed memory "
193				       "mapped test.  Using PIO.\n",
194				       ahc_get_pci_bus(ahc->dev_softc),
195				       ahc_get_pci_slot(ahc->dev_softc),
196				       ahc_get_pci_function(ahc->dev_softc));
197				bus_release_resource(ahc->dev_softc, regs_type,
198						     regs_id, regs);
199				regs = NULL;
200			} else {
201				command &= ~PCIM_CMD_PORTEN;
202				ahc_pci_write_config(ahc->dev_softc,
203						     PCIR_COMMAND,
204						     command, /*bytes*/1);
205			}
206		}
207	}
208
209	if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
210		regs_type = SYS_RES_IOPORT;
211		regs_id = AHC_PCI_IOADDR;
212		regs = bus_alloc_resource(ahc->dev_softc, regs_type,
213					  &regs_id, 0, ~0, 1, RF_ACTIVE);
214		if (regs != NULL) {
215			ahc->tag = rman_get_bustag(regs);
216			ahc->bsh = rman_get_bushandle(regs);
217			command &= ~PCIM_CMD_MEMEN;
218			ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
219					     command, /*bytes*/1);
220		}
221	}
222	if (regs == NULL) {
223		device_printf(ahc->dev_softc,
224			      "can't allocate register resources\n");
225		return (ENOMEM);
226	}
227	ahc->platform_data->regs_res_type = regs_type;
228	ahc->platform_data->regs_res_id = regs_id;
229	ahc->platform_data->regs = regs;
230	return (0);
231}
232
233int
234ahc_pci_map_int(struct ahc_softc *ahc)
235{
236	int zero;
237
238	zero = 0;
239	ahc->platform_data->irq =
240	    bus_alloc_resource(ahc->dev_softc, SYS_RES_IRQ, &zero,
241			       0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
242	if (ahc->platform_data->irq == NULL) {
243		device_printf(ahc->dev_softc,
244			      "bus_alloc_resource() failed to allocate IRQ\n");
245		return (ENOMEM);
246	}
247	ahc->platform_data->irq_res_type = SYS_RES_IRQ;
248	return (ahc_map_int(ahc));
249}
250
251void
252ahc_power_state_change(struct ahc_softc *ahc, ahc_power_state new_state)
253{
254	uint32_t cap;
255	u_int cap_offset;
256
257	/*
258	 * Traverse the capability list looking for
259	 * the power management capability.
260	 */
261	cap = 0;
262	cap_offset = ahc_pci_read_config(ahc->dev_softc,
263					 PCIR_CAP_PTR, /*bytes*/1);
264	while (cap_offset != 0) {
265
266		cap = ahc_pci_read_config(ahc->dev_softc,
267					  cap_offset, /*bytes*/4);
268		if ((cap & 0xFF) == 1
269		 && ((cap >> 16) & 0x3) > 0) {
270			uint32_t pm_control;
271
272			pm_control = ahc_pci_read_config(ahc->dev_softc,
273							 cap_offset + 4,
274							 /*bytes*/2);
275			pm_control &= ~0x3;
276			pm_control |= new_state;
277			ahc_pci_write_config(ahc->dev_softc,
278					     cap_offset + 4,
279					     pm_control, /*bytes*/2);
280			break;
281		}
282		cap_offset = (cap >> 8) & 0xFF;
283	}
284}
285