lv1call.S revision 217044
1/*- 2 * Copyright (C) 2010 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * 25 * $FreeBSD: head/sys/boot/powerpc/ps3/lv1call.S 217044 2011-01-06 04:12:29Z nwhitehorn $ 26 */ 27 28/* Hypercall stubs. Note: this is all a hack and should die. */ 29 30#define hc .long 0x44000022 31 32#define LD64_IM(r, highest, higher, high, low) \ 33 lis r,highest; \ 34 addi r,r,higher; \ 35 sldi r,r,32; \ 36 addis r,r,high; \ 37 addi r,r,low; 38 39#define SIMPLE_HVCALL(x, c) \ 40.global x; \ 41x: \ 42 mflr %r0; \ 43 stw %r0,4(%r1); \ 44 clrldi %r3,%r3,32; \ 45 clrldi %r4,%r4,32; \ 46 clrldi %r5,%r5,32; \ 47 clrldi %r6,%r6,32; \ 48 clrldi %r7,%r7,32; \ 49 clrldi %r8,%r8,32; \ 50 clrldi %r9,%r9,32; \ 51 clrldi %r10,%r10,32; \ 52 li %r11,c; \ 53 hc; \ 54 extsw %r3,%r3; \ 55 lwz %r0,4(%r1); \ 56 mtlr %r0; \ 57 blr 58 59SIMPLE_HVCALL(lv1_open_device, 170) 60SIMPLE_HVCALL(lv1_close_device, 171) 61SIMPLE_HVCALL(lv1_gpu_open, 210) 62SIMPLE_HVCALL(lv1_gpu_context_attribute, 225) 63SIMPLE_HVCALL(lv1_panic, 255) 64SIMPLE_HVCALL(lv1_net_start_tx_dma, 187) 65SIMPLE_HVCALL(lv1_net_stop_tx_dma, 188) 66SIMPLE_HVCALL(lv1_net_start_rx_dma, 189) 67SIMPLE_HVCALL(lv1_net_stop_rx_dma, 190) 68 69.global lv1_get_physmem 70lv1_get_physmem: 71 mflr %r0 72 stw %r0,4(%r1) 73 stw %r3,-8(%r1) /* Address for maxmem */ 74 75 li %r11,69 /* Get PU ID */ 76 hc 77 std %r4,-16(%r1) 78 79 li %r11,74 /* Get LPAR ID */ 80 hc 81 std %r4,-24(%r1) 82 83 ld %r3,-24(%r1) 84 LD64_IM(%r4,0x0000,0x0000,0x6269,0x0000 /* "bi" */) 85 LD64_IM(%r5,0x7075,0x0000,0x0000,0x0000 /* "pu" */) 86 ld %r6,-16(%r1) 87 LD64_IM(%r7,0x726d,0x5f73,0x697a,0x6500 /* "rm_size" */) 88 li %r11,91 89 hc 90 extsw %r3,%r3 91 92 lwz %r5,-8(%r1) 93 std %r4,0(%r5) 94 95 lwz %r0,4(%r1) 96 mtlr %r0 97 blr 98 99.global lv1_setup_address_space 100lv1_setup_address_space: 101 mflr %r0 102 stw %r0,4(%r1) 103 104 stw %r3,-4(%r1) 105 stw %r4,-8(%r1) 106 107 li %r3,18 /* PT size: log2(256 KB) */ 108 li %r4,2 /* Two page sizes */ 109 li %r5,24 /* Page sizes: (24 << 56) | (16 << 48) */ 110 sldi %r5,%r5,24 111 li %r6,16 112 sldi %r6,%r6,16 113 or %r5,%r5,%r6 114 sldi %r5,%r5,32 115 116 li %r11,2 /* lv1_construct_virtual_address_space */ 117 hc 118 119 lwz %r6,-4(%r1) 120 lwz %r7,-8(%r1) 121 std %r4,0(%r6) 122 std %r5,0(%r7) 123 124 /* AS_ID in r4 */ 125 mr %r3,%r4 126 li %r11,7 /* lv1_select_virtual_address_space */ 127 hc 128 extsw %r3,%r3 129 130 lwz %r0,4(%r1) 131 mtlr %r0 132 blr 133 134.global lv1_insert_pte 135lv1_insert_pte: 136 mflr %r0 137 stw %r0,4(%r1) 138 139 mr %r11,%r4 /* Save R4 */ 140 141 clrldi %r3,%r3,32 142 clrldi %r7,%r5,32 143 144 sldi %r4,%r3,3 /* Convert ptegidx into base PTE slot */ 145 li %r3,0 /* Current address space */ 146 ld %r5,0(%r11) 147 ld %r6,8(%r11) 148 li %r8,0 /* No other flags */ 149 150 li %r11,158 151 hc 152 extsw %r3,%r3 153 154 lwz %r0,4(%r1) 155 mtlr %r0 156 blr 157 158.global lv1_gpu_context_allocate 159lv1_gpu_context_allocate: 160 mflr %r0 161 stw %r0,4(%r1) 162 stw %r7,-4(%r1) 163 164 sldi %r3,%r3,32 165 clrldi %r4,%r4,32 166 ori %r3,%r3,%r4 167 clrldi %r4,%r5,32 168 clrldi %r5,%r6,32 169 170 li %r11,217 171 hc 172 extsw %r3,%r3 173 174 lwz %r7,-4(%r1) 175 std %r4,0(%r7) 176 177 lwz %r0,4(%r1) 178 mtlr %r0 179 blr 180 181.global lv1_gpu_memory_allocate 182lv1_gpu_memory_allocate: 183 mflr %r0 184 stw %r0,4(%r1) 185 stw %r8,-4(%r1) 186 stw %r9,-8(%r1) 187 188 li %r11,214 189 hc 190 extsw %r3,%r3 191 192 lwz %r8,-4(%r1) 193 lwz %r9,-8(%r1) 194 std %r4,0(%r8) 195 std %r5,0(%r9) 196 197 lwz %r0,4(%r1) 198 mtlr %r0 199 blr 200 201.global lv1_net_control 202lv1_net_control: 203 mflr %r0 204 stw %r0,4(%r1) 205 stw %r9,-4(%r1) 206 207 li %r11,194 208 hc 209 extsw %r3,%r3 210 211 lwz %r8,-4(%r1) 212 std %r4,0(%r8) 213 214 lwz %r0,4(%r1) 215 mtlr %r0 216 blr 217 218.global lv1_setup_dma 219lv1_setup_dma: 220 mflr %r0 221 stw %r0,4(%r1) 222 stw %r3,-4(%r1) 223 stw %r4,-8(%r1) 224 stw %r5,-12(%r1) 225 226 lwz %r3,-4(%r1) 227 lwz %r4,-8(%r1) 228 lis %r5,0x0800 /* 128 MB */ 229 li %r6,24 /* log2(IO_PAGESIZE) */ 230 li %r7,0 /* flags */ 231 li %r11,174 /* lv1_allocate_device_dma_region */ 232 hc 233 extsw %r3,%r3 234 cmpdi %r3,0 235 bne 1f 236 std %r4,-24(%r1) 237 238 lwz %r3,-4(%r1) 239 lwz %r4,-8(%r1) 240 li %r5,0 241 ld %r6,-24(%r1) 242 lis %r7,0x0800 /* 128 MB */ 243 lis %r8,0xf800 /* flags */ 244 sldi %r8,%r8,32 245 li %r11,176 /* lv1_map_device_dma_region */ 246 hc 247 extsw %r3,%r3 248 249 lwz %r9,-12(%r1) 250 ld %r6,-24(%r1) 251 std %r6,0(%r9) 252 2531: lwz %r0,4(%r1) 254 mtlr %r0 255 blr 256 257