rk3188.dtsi revision 266251
1/*- 2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/rk3188.dtsi 266251 2014-05-16 15:56:34Z ian $ 27 */ 28 29/ { 30 compatible = "rockchip,rk3188"; 31 #address-cells = <1>; 32 #size-cells = <1>; 33 34 aliases { 35 soc = &SOC; 36 }; 37 38 SOC: rk3188 { 39 #address-cells = <1>; 40 #size-cells = <1>; 41 compatible = "simple-bus"; 42 ranges; 43 bus-frequency = <0>; 44 45 GIC: interrupt-controller@1013d000 { 46 compatible = "arm,gic"; 47 reg = <0x1013d000 0x1000>, /* Distributor Registers */ 48 <0x1013c100 0x0100>; /* CPU Interface Registers */ 49 interrupt-controller; 50 #interrupt-cells = <1>; 51 }; 52 53 pmu@20004000 { 54 compatible = "rockchip,rk30xx-pmu"; 55 #address-cells = <1>; 56 #size-cells = <1>; 57 reg = <0x20004000 0x100>; 58 }; 59 60 grf@20008000 { 61 compatible = "rockchip,rk30xx-grf"; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 reg = < 0x20008000 0x2000 >; 65 }; 66 67 mp_tmr@1013c600 { 68 compatible = "arm,mpcore-timers"; 69 #address-cells = <1>; 70 #size-cells = <0>; 71 clock-frequency = < 148500000 >; 72 reg = <0x1013c200 0x100>, /* Global Timer Regs */ 73 <0x1013c600 0x20>; /* Private Timer Regs */ 74 interrupts = < 27 29 >; 75 interrupt-parent = <&GIC>; 76 }; 77 78 timer@20038000 { 79 compatible = "rockchip,rk30xx-timer"; 80 reg = <0x20038000 0x20>; 81 interrupts = <76>; 82 clock-frequency = <24000000>; 83 status = "disabled"; 84 }; 85 86 timer@20038020 { 87 compatible = "rockchip,rk30xx-timer"; 88 reg = <0x20038020 0x20>; 89 interrupts = <77>; 90 clock-frequency = <24000000>; 91 status = "disabled"; 92 }; 93 94 timer@20038060 { 95 compatible = "rockchip,rk30xx-timer"; 96 reg = <0x20038060 0x20>; 97 interrupts = <91>; 98 clock-frequency = <24000000>; 99 status = "disabled"; 100 }; 101 102 timer@20038080 { 103 compatible = "rockchip,rk30xx-timer"; 104 reg = <0x20038080 0x20>; 105 interrupts = <92>; 106 clock-frequency = <24000000>; 107 status = "disabled"; 108 }; 109 110 timer@200380a0 { 111 compatible = "rockchip,rk30xx-timer"; 112 reg = <0x200380a0 0x20>; 113 interrupts = <96>; 114 clock-frequency = <24000000>; 115 status = "disabled"; 116 }; 117 118 watchdog@2004c000 { 119 compatible = "rockchip,rk30xx-wdt"; 120 reg = <0x2004c000 0x100>; 121 clock-frequency = < 66000000 >; 122 }; 123 124 gpio0: gpio@2000a000 { 125 compatible = "rockchip,rk30xx-gpio"; 126 gpio-controller; 127 #gpio-cells = <2>; 128 reg = <0x2000a000 0x100>; 129 interrupts = <86>; 130 interrupt-parent = <&GIC>; 131 }; 132 133 gpio1: gpio@2003c000 { 134 compatible = "rockchip,rk30xx-gpio"; 135 gpio-controller; 136 #gpio-cells = <2>; 137 reg = <0x2003c000 0x100>; 138 interrupts = <87>; 139 interrupt-parent = <&GIC>; 140 }; 141 142 gpio2: gpio@2003e000 { 143 compatible = "rockchip,rk30xx-gpio"; 144 gpio-controller; 145 #gpio-cells = <2>; 146 reg = <0x2003e000 0x100>; 147 interrupts = <88>; 148 interrupt-parent = <&GIC>; 149 }; 150 151 gpio3: gpio@20080000 { 152 compatible = "rockchip,rk30xx-gpio"; 153 gpio-controller; 154 #gpio-cells = <2>; 155 reg = <0x20080000 0x100>; 156 interrupts = <89>; 157 interrupt-parent = <&GIC>; 158 }; 159 160 usb0: usb@10180000 { 161 compatible = "synopsys,designware-hs-otg2"; 162 reg = <0x10180000 0x40000>; 163 interrupts = <48>; 164 interrupt-parent = <&GIC>; 165 #address-cells = <1>; 166 #size-cells = <0>; 167 }; 168 169 usb1: usb@101c0000 { 170 compatible = "synopsys,designware-hs-otg2"; 171 reg = <0x101c0000 0x40000>; 172 interrupts = < 49 >; 173 interrupt-parent = <&GIC>; 174 #address-cells = <1>; 175 #size-cells = <0>; 176 gpios = <&gpio0 3 2 2>; 177 }; 178 179 uart0: serial@10124000 { 180 compatible = "ns16550"; 181 reg = <0x10124000 0x400>; 182 reg-shift = <2>; 183 interrupts = <66>; 184 interrupt-parent = <&GIC>; 185 current-speed = <115200>; 186 clock-frequency = < 24000000 >; 187 busy-detect = <1>; 188 broken-txfifo = <1>; 189 status = "disabled"; 190 }; 191 192 uart1: serial@10126000 { 193 compatible = "ns16550"; 194 reg = <0x10126000 0x400>; 195 reg-shift = <2>; 196 interrupts = <67>; 197 interrupt-parent = <&GIC>; 198 current-speed = <115200>; 199 clock-frequency = < 24000000 >; 200 busy-detect = <1>; 201 broken-txfifo = <1>; 202 status = "disabled"; 203 }; 204 205 uart2: serial@20064000 { 206 compatible = "ns16550"; 207 reg = <0x20064000 0x400>; 208 reg-shift = <2>; 209 interrupts = <68>; 210 interrupt-parent = <&GIC>; 211 current-speed = <115200>; 212 clock-frequency = < 24000000 >; 213 busy-detect = <1>; 214 broken-txfifo = <1>; 215 status = "disabled"; 216 }; 217 218 uart3: serial@20068000 { 219 compatible = "ns16550"; 220 reg = <0x20068000 0x400>; 221 reg-shift = <2>; 222 interrupts = <69>; 223 interrupt-parent = <&GIC>; 224 current-speed = <115200>; 225 clock-frequency = < 24000000 >; 226 busy-detect = <1>; 227 broken-txfifo = <1>; 228 status = "disabled"; 229 }; 230 231 mmc@10214000 { 232 compatible = "rockchip,rk30xx-mmc"; 233 reg = <0x10214000 0x1000>; 234 interrupts = <55>; 235 #address-cells = <1>; 236 #size-cells = <0>; 237 clock-frequency = <24000000>; /* TODO: verify freq */ 238 status = "disabled"; 239 }; 240 241 mmc@10218000 { 242 compatible = "rockchip,rk30xx-mmc"; 243 reg = <0x10218000 0x1000>; 244 interrupts = <56>; 245 #address-cells = <1>; 246 #size-cells = <0>; 247 clock-frequency = <24000000>; /* TODO: verify freq */ 248 status = "disabled"; 249 }; 250 }; 251}; 252 253