i80321_intr.h revision 161592
1/* $NetBSD: i80321_intr.h,v 1.5 2004/01/12 10:25:06 scw Exp $ */ 2 3/*- 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 * 37 * $FreeBSD: head/sys/arm/xscale/i80321/i80321_intr.h 161592 2006-08-24 23:51:28Z cognet $ 38 * 39 */ 40 41#ifndef _I80321_INTR_H_ 42#define _I80321_INTR_H_ 43 44#define ARM_IRQ_HANDLER _C_LABEL(i80321_intr_dispatch) 45 46#ifndef _LOCORE 47 48#include <machine/armreg.h> 49#include <machine/cpufunc.h> 50 51#include <arm/xscale/i80321/i80321reg.h> 52 53void i80321_do_pending(void); 54 55extern __volatile uint32_t intr_enabled; 56extern uint32_t intr_steer; 57 58static __inline void __attribute__((__unused__)) 59i80321_set_intrmask(void) 60{ 61 62 __asm __volatile("mcr p6, 0, %0, c0, c0, 0" 63 : 64 : "r" (intr_enabled & ICU_INT_HWMASK)); 65} 66 67static __inline void 68i80321_set_intrsteer(void) 69{ 70 71 __asm __volatile("mcr p6, 0, %0, c4, c0, 0" 72 : 73 : "r" (intr_steer & ICU_INT_HWMASK)); 74} 75 76#if defined ( CPU_XSCALE_80219 ) 77#define INT_SWMASK \ 78 ((1U << ICU_INT_bit26) | \ 79 (1U << ICU_INT_bit25) | \ 80 (1U << ICU_INT_bit23) | \ 81 (1U << ICU_INT_bit22) | \ 82 (1U << ICU_INT_bit7) | \ 83 (1U << ICU_INT_bit6) | \ 84 (1U << ICU_INT_bit5) | \ 85 (1U << ICU_INT_bit4)) 86#else 87#define INT_SWMASK \ 88 ((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) | \ 89 (1U << ICU_INT_bit5) | (1U << ICU_INT_bit4)) 90#endif 91 92#if 0 93static __inline void __attribute__((__unused__)) 94i80321_splx(int new) 95{ 96 extern __volatile uint32_t intr_enabled; 97 extern __volatile int current_spl_level; 98 extern __volatile int i80321_ipending; 99 extern void i80321_do_pending(void); 100 int oldirqstate, hwpend; 101 102 /* Don't let the compiler re-order this code with preceding code */ 103 __insn_barrier(); 104 105 current_spl_level = new; 106 107 hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~new; 108 if (hwpend != 0) { 109 oldirqstate = disable_interrupts(I32_bit); 110 intr_enabled |= hwpend; 111 i80321_set_intrmask(); 112 restore_interrupts(oldirqstate); 113 } 114 115 if ((i80321_ipending & INT_SWMASK) & ~new) 116 i80321_do_pending(); 117} 118 119static __inline int __attribute__((__unused__)) 120i80321_splraise(int ipl) 121{ 122 extern __volatile int current_spl_level; 123 extern int i80321_imask[]; 124 int old; 125 126 old = current_spl_level; 127 current_spl_level |= i80321_imask[ipl]; 128 129 /* Don't let the compiler re-order this code with subsequent code */ 130 __insn_barrier(); 131 132 return (old); 133} 134 135static __inline int __attribute__((__unused__)) 136i80321_spllower(int ipl) 137{ 138 extern __volatile int current_spl_level; 139 extern int i80321_imask[]; 140 int old = current_spl_level; 141 142 i80321_splx(i80321_imask[ipl]); 143 return(old); 144} 145 146#endif 147#if !defined(EVBARM_SPL_NOINLINE) 148 149#define splx(new) i80321_splx(new) 150#define _spllower(ipl) i80321_spllower(ipl) 151#define _splraise(ipl) i80321_splraise(ipl) 152void _setsoftintr(int); 153 154#else 155 156int _splraise(int); 157int _spllower(int); 158void splx(int); 159void _setsoftintr(int); 160 161#endif /* ! EVBARM_SPL_NOINLINE */ 162 163#endif /* _LOCORE */ 164 165#endif /* _I80321_INTR_H_ */ 166