imx6_pl310.c revision 266384
1/*- 2 * Copyright (c) 2012 Olivier Houchard. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26#include <sys/cdefs.h> 27__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/imx/imx6_pl310.c 266384 2014-05-18 00:26:42Z ian $"); 28 29/* 30 * The machine-dependent part of the arm/pl310 driver for imx6 SoCs. 31 */ 32 33#include <sys/types.h> 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bus.h> 37#include <sys/rman.h> 38#include <sys/lock.h> 39#include <sys/mutex.h> 40 41#include <machine/bus.h> 42#include <machine/pl310.h> 43 44void 45platform_pl310_init(struct pl310_softc *sc) 46{ 47 uint32_t reg; 48 49 /* 50 * Enable power saving modes: 51 * - Dynamic Gating stops the clock when the controller is idle. 52 * - Standby stops the clock when the cores are in WFI mode. 53 */ 54 reg = pl310_read4(sc, PL310_POWER_CTRL); 55 reg |= POWER_CTRL_ENABLE_GATING | POWER_CTRL_ENABLE_STANDBY; 56 pl310_write4(sc, PL310_POWER_CTRL, reg); 57 58 pl310_set_ram_latency(sc, PL310_TAG_RAM_CTRL, 4, 2, 3); 59 pl310_set_ram_latency(sc, PL310_DATA_RAM_CTRL, 4, 2, 3); 60} 61 62void 63platform_pl310_write_ctrl(struct pl310_softc *sc, uint32_t val) 64{ 65 66 pl310_write4(sc, PL310_CTRL, val); 67} 68 69void 70platform_pl310_write_debug(struct pl310_softc *sc, uint32_t val) 71{ 72 73 pl310_write4(sc, PL310_DEBUG_CTRL, val); 74} 75 76