1275963Srpaulo/*-
2275963Srpaulo * Copyright (C) 2013-2014 Daisuke Aoyama <aoyama@peach.ne.jp>
3275963Srpaulo * All rights reserved.
4275963Srpaulo *
5275963Srpaulo * Redistribution and use in source and binary forms, with or without
6275963Srpaulo * modification, are permitted provided that the following conditions
7275963Srpaulo * are met:
8275963Srpaulo * 1. Redistributions of source code must retain the above copyright
9275963Srpaulo *    notice, this list of conditions and the following disclaimer.
10275963Srpaulo * 2. Redistributions in binary form must reproduce the above copyright
11275963Srpaulo *    notice, this list of conditions and the following disclaimer in the
12275963Srpaulo *    documentation and/or other materials provided with the distribution.
13275963Srpaulo *
14275963Srpaulo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15275963Srpaulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16275963Srpaulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17275963Srpaulo * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18275963Srpaulo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19275963Srpaulo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20275963Srpaulo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21275963Srpaulo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22275963Srpaulo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23275963Srpaulo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24275963Srpaulo * SUCH DAMAGE.
25275963Srpaulo *
26275963Srpaulo * $FreeBSD: stable/10/sys/arm/broadcom/bcm2835/bcm2835_mbox_prop.h 322724 2017-08-20 16:52:27Z marius $
27275963Srpaulo */
28275963Srpaulo
29275963Srpaulo#ifndef _BCM2835_MBOX_PROP_H_
30275963Srpaulo#define _BCM2835_MBOX_PROP_H_
31275963Srpaulo
32275963Srpaulo#include <sys/cdefs.h>
33275963Srpaulo#include <sys/types.h>
34275963Srpaulo
35275963Srpaulo/*
36275963Srpaulo * Mailbox property interface:
37275963Srpaulo * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
38275963Srpaulo */
39275963Srpaulo#define BCM2835_MBOX_CODE_REQ			0
40275963Srpaulo#define BCM2835_MBOX_CODE_RESP_SUCCESS		0x80000000
41275963Srpaulo#define BCM2835_MBOX_CODE_RESP_ERROR		0x80000001
42275963Srpaulo#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE	0x80000000
43275963Srpaulo
44275963Srpaulostruct bcm2835_mbox_hdr {
45275963Srpaulo	uint32_t	buf_size;
46275963Srpaulo	uint32_t	code;
47275963Srpaulo};
48275963Srpaulo
49275963Srpaulostruct bcm2835_mbox_tag_hdr {
50275963Srpaulo	uint32_t	tag;
51275963Srpaulo	uint32_t	val_buf_size;
52275963Srpaulo	uint32_t	val_len;
53275963Srpaulo};
54275963Srpaulo
55322724Smarius#define	BCM2835_MBOX_INIT_TAG(tag_, tagid_) do {		\
56322724Smarius	(tag_)->tag_hdr.tag = BCM2835_MBOX_TAG_##tagid_;	\
57322724Smarius	(tag_)->tag_hdr.val_buf_size = sizeof((tag_)->body);	\
58322724Smarius	(tag_)->tag_hdr.val_len = sizeof((tag_)->body.req);	\
59322724Smarius} while (0)
60322724Smarius
61322724Smarius#define BCM2835_MBOX_POWER_ID_EMMC		0x00000000
62322724Smarius#define BCM2835_MBOX_POWER_ID_UART0		0x00000001
63322724Smarius#define BCM2835_MBOX_POWER_ID_UART1		0x00000002
64322724Smarius#define BCM2835_MBOX_POWER_ID_USB_HCD		0x00000003
65322724Smarius#define BCM2835_MBOX_POWER_ID_I2C0		0x00000004
66322724Smarius#define BCM2835_MBOX_POWER_ID_I2C1		0x00000005
67322724Smarius#define BCM2835_MBOX_POWER_ID_I2C2		0x00000006
68322724Smarius#define BCM2835_MBOX_POWER_ID_SPI		0x00000007
69322724Smarius#define BCM2835_MBOX_POWER_ID_CCP2TX		0x00000008
70322724Smarius
71322724Smarius#define BCM2835_MBOX_POWER_ON			(1 << 0)
72322724Smarius#define BCM2835_MBOX_POWER_WAIT			(1 << 1)
73322724Smarius
74322724Smarius#define BCM2835_MBOX_TAG_GET_POWER_STATE	0x00020001
75322724Smarius#define BCM2835_MBOX_TAG_SET_POWER_STATE	0x00028001
76322724Smarius
77322724Smariusstruct msg_get_power_state {
78322724Smarius	struct bcm2835_mbox_hdr hdr;
79322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
80322724Smarius	union {
81322724Smarius		struct {
82322724Smarius			uint32_t device_id;
83322724Smarius		} req;
84322724Smarius		struct {
85322724Smarius			uint32_t device_id;
86322724Smarius			uint32_t state;
87322724Smarius		} resp;
88322724Smarius	} body;
89322724Smarius	uint32_t end_tag;
90322724Smarius};
91322724Smarius
92322724Smariusstruct msg_set_power_state {
93322724Smarius	struct bcm2835_mbox_hdr hdr;
94322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
95322724Smarius	union {
96322724Smarius		struct {
97322724Smarius			uint32_t device_id;
98322724Smarius			uint32_t state;
99322724Smarius		} req;
100322724Smarius		struct {
101322724Smarius			uint32_t device_id;
102322724Smarius			uint32_t state;
103322724Smarius		} resp;
104322724Smarius	} body;
105322724Smarius	uint32_t end_tag;
106322724Smarius};
107322724Smarius
108322724Smarius/* Sets the power state for a given device */
109322724Smariusint bcm2835_mbox_set_power_state(uint32_t, boolean_t);
110322724Smarius
111275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_EMMC		0x00000001
112275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_UART		0x00000002
113275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_ARM		0x00000003
114275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_CORE		0x00000004
115275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_V3D		0x00000005
116275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_H264		0x00000006
117275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_ISP		0x00000007
118275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_SDRAM		0x00000008
119275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_PIXEL		0x00000009
120275963Srpaulo#define BCM2835_MBOX_CLOCK_ID_PWM		0x0000000a
121275963Srpaulo
122275963Srpaulo#define BCM2835_MBOX_TAG_GET_CLOCK_RATE		0x00030002
123275963Srpaulo#define BCM2835_MBOX_TAG_SET_CLOCK_RATE		0x00038002
124275963Srpaulo#define BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE	0x00030004
125275963Srpaulo#define BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE	0x00030007
126275963Srpaulo
127275963Srpaulostruct msg_get_clock_rate {
128275963Srpaulo	struct bcm2835_mbox_hdr hdr;
129275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
130275963Srpaulo	union {
131275963Srpaulo		struct {
132275963Srpaulo			uint32_t clock_id;
133275963Srpaulo		} req;
134275963Srpaulo		struct {
135275963Srpaulo			uint32_t clock_id;
136275963Srpaulo			uint32_t rate_hz;
137275963Srpaulo		} resp;
138275963Srpaulo	} body;
139275963Srpaulo	uint32_t end_tag;
140275963Srpaulo};
141275963Srpaulo
142275963Srpaulostruct msg_set_clock_rate {
143275963Srpaulo	struct bcm2835_mbox_hdr hdr;
144275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
145275963Srpaulo	union {
146275963Srpaulo		struct {
147275963Srpaulo			uint32_t clock_id;
148275963Srpaulo			uint32_t rate_hz;
149275963Srpaulo		} req;
150275963Srpaulo		struct {
151275963Srpaulo			uint32_t clock_id;
152275963Srpaulo			uint32_t rate_hz;
153275963Srpaulo		} resp;
154275963Srpaulo	} body;
155275963Srpaulo	uint32_t end_tag;
156275963Srpaulo};
157275963Srpaulo
158275963Srpaulostruct msg_get_max_clock_rate {
159275963Srpaulo	struct bcm2835_mbox_hdr hdr;
160275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
161275963Srpaulo	union {
162275963Srpaulo		struct {
163275963Srpaulo			uint32_t clock_id;
164275963Srpaulo		} req;
165275963Srpaulo		struct {
166275963Srpaulo			uint32_t clock_id;
167275963Srpaulo			uint32_t rate_hz;
168275963Srpaulo		} resp;
169275963Srpaulo	} body;
170275963Srpaulo	uint32_t end_tag;
171275963Srpaulo};
172275963Srpaulo
173275963Srpaulostruct msg_get_min_clock_rate {
174275963Srpaulo	struct bcm2835_mbox_hdr hdr;
175275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
176275963Srpaulo	union {
177275963Srpaulo		struct {
178275963Srpaulo			uint32_t clock_id;
179275963Srpaulo		} req;
180275963Srpaulo		struct {
181275963Srpaulo			uint32_t clock_id;
182275963Srpaulo			uint32_t rate_hz;
183275963Srpaulo		} resp;
184275963Srpaulo	} body;
185275963Srpaulo	uint32_t end_tag;
186275963Srpaulo};
187275963Srpaulo
188322724Smariusint bcm2835_mbox_get_clock_rate(uint32_t, uint32_t *);
189322724Smarius
190275963Srpaulo#define BCM2835_MBOX_TURBO_ON			1
191275963Srpaulo#define BCM2835_MBOX_TURBO_OFF			0
192275963Srpaulo
193275963Srpaulo#define BCM2835_MBOX_TAG_GET_TURBO		0x00030009
194275963Srpaulo#define BCM2835_MBOX_TAG_SET_TURBO		0x00038009
195275963Srpaulo
196275963Srpaulostruct msg_get_turbo {
197275963Srpaulo	struct bcm2835_mbox_hdr hdr;
198275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
199275963Srpaulo	union {
200275963Srpaulo		struct {
201275963Srpaulo			uint32_t id;
202275963Srpaulo		} req;
203275963Srpaulo		struct {
204275963Srpaulo			uint32_t id;
205275963Srpaulo			uint32_t level;
206275963Srpaulo		} resp;
207275963Srpaulo	} body;
208275963Srpaulo	uint32_t end_tag;
209275963Srpaulo};
210275963Srpaulo
211275963Srpaulostruct msg_set_turbo {
212275963Srpaulo	struct bcm2835_mbox_hdr hdr;
213275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
214275963Srpaulo	union {
215275963Srpaulo		struct {
216275963Srpaulo			uint32_t id;
217275963Srpaulo			uint32_t level;
218275963Srpaulo		} req;
219275963Srpaulo		struct {
220275963Srpaulo			uint32_t id;
221275963Srpaulo			uint32_t level;
222275963Srpaulo		} resp;
223275963Srpaulo	} body;
224275963Srpaulo	uint32_t end_tag;
225275963Srpaulo};
226275963Srpaulo
227275963Srpaulo#define BCM2835_MBOX_VOLTAGE_ID_CORE		0x00000001
228275963Srpaulo#define BCM2835_MBOX_VOLTAGE_ID_SDRAM_C		0x00000002
229275963Srpaulo#define BCM2835_MBOX_VOLTAGE_ID_SDRAM_P		0x00000003
230275963Srpaulo#define BCM2835_MBOX_VOLTAGE_ID_SDRAM_I		0x00000004
231275963Srpaulo
232275963Srpaulo#define BCM2835_MBOX_TAG_GET_VOLTAGE		0x00030003
233275963Srpaulo#define BCM2835_MBOX_TAG_SET_VOLTAGE		0x00038003
234275963Srpaulo#define BCM2835_MBOX_TAG_GET_MAX_VOLTAGE	0x00030005
235275963Srpaulo#define BCM2835_MBOX_TAG_GET_MIN_VOLTAGE	0x00030008
236275963Srpaulo
237275963Srpaulostruct msg_get_voltage {
238275963Srpaulo	struct bcm2835_mbox_hdr hdr;
239275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
240275963Srpaulo	union {
241275963Srpaulo		struct {
242275963Srpaulo			uint32_t voltage_id;
243275963Srpaulo		} req;
244275963Srpaulo		struct {
245275963Srpaulo			uint32_t voltage_id;
246275963Srpaulo			uint32_t value;
247275963Srpaulo		} resp;
248275963Srpaulo	} body;
249275963Srpaulo	uint32_t end_tag;
250275963Srpaulo};
251275963Srpaulo
252275963Srpaulostruct msg_set_voltage {
253275963Srpaulo	struct bcm2835_mbox_hdr hdr;
254275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
255275963Srpaulo	union {
256275963Srpaulo		struct {
257275963Srpaulo			uint32_t voltage_id;
258275963Srpaulo			uint32_t value;
259275963Srpaulo		} req;
260275963Srpaulo		struct {
261275963Srpaulo			uint32_t voltage_id;
262275963Srpaulo			uint32_t value;
263275963Srpaulo		} resp;
264275963Srpaulo	} body;
265275963Srpaulo	uint32_t end_tag;
266275963Srpaulo};
267275963Srpaulo
268275963Srpaulostruct msg_get_max_voltage {
269275963Srpaulo	struct bcm2835_mbox_hdr hdr;
270275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
271275963Srpaulo	union {
272275963Srpaulo		struct {
273275963Srpaulo			uint32_t voltage_id;
274275963Srpaulo		} req;
275275963Srpaulo		struct {
276275963Srpaulo			uint32_t voltage_id;
277275963Srpaulo			uint32_t value;
278275963Srpaulo		} resp;
279275963Srpaulo	} body;
280275963Srpaulo	uint32_t end_tag;
281275963Srpaulo};
282275963Srpaulo
283275963Srpaulostruct msg_get_min_voltage {
284275963Srpaulo	struct bcm2835_mbox_hdr hdr;
285275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
286275963Srpaulo	union {
287275963Srpaulo		struct {
288275963Srpaulo			uint32_t voltage_id;
289275963Srpaulo		} req;
290275963Srpaulo		struct {
291275963Srpaulo			uint32_t voltage_id;
292275963Srpaulo			uint32_t value;
293275963Srpaulo		} resp;
294275963Srpaulo	} body;
295275963Srpaulo	uint32_t end_tag;
296275963Srpaulo};
297275963Srpaulo
298275963Srpaulo#define BCM2835_MBOX_TAG_GET_TEMPERATURE	0x00030006
299275963Srpaulo#define BCM2835_MBOX_TAG_GET_MAX_TEMPERATURE	0x0003000a
300275963Srpaulo
301275963Srpaulostruct msg_get_temperature {
302275963Srpaulo	struct bcm2835_mbox_hdr hdr;
303275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
304275963Srpaulo	union {
305275963Srpaulo		struct {
306275963Srpaulo			uint32_t temperature_id;
307275963Srpaulo		} req;
308275963Srpaulo		struct {
309275963Srpaulo			uint32_t temperature_id;
310275963Srpaulo			uint32_t value;
311275963Srpaulo		} resp;
312275963Srpaulo	} body;
313275963Srpaulo	uint32_t end_tag;
314275963Srpaulo};
315275963Srpaulo
316275963Srpaulostruct msg_get_max_temperature {
317275963Srpaulo	struct bcm2835_mbox_hdr hdr;
318275963Srpaulo	struct bcm2835_mbox_tag_hdr tag_hdr;
319275963Srpaulo	union {
320275963Srpaulo		struct {
321275963Srpaulo			uint32_t temperature_id;
322275963Srpaulo		} req;
323275963Srpaulo		struct {
324275963Srpaulo			uint32_t temperature_id;
325275963Srpaulo			uint32_t value;
326275963Srpaulo		} resp;
327275963Srpaulo	} body;
328275963Srpaulo	uint32_t end_tag;
329275963Srpaulo};
330275963Srpaulo
331322724Smarius#define	BCM2835_MBOX_TAG_GET_PHYSICAL_W_H	0x00040003
332322724Smarius#define	BCM2835_MBOX_TAG_SET_PHYSICAL_W_H	0x00048003
333322724Smarius#define	BCM2835_MBOX_TAG_GET_VIRTUAL_W_H	0x00040004
334322724Smarius#define	BCM2835_MBOX_TAG_SET_VIRTUAL_W_H	0x00048004
335322724Smarius
336322724Smariusstruct bcm2835_mbox_tag_fb_w_h {
337322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
338322724Smarius	union {
339322724Smarius		struct {
340322724Smarius			uint32_t width;
341322724Smarius			uint32_t height;
342322724Smarius		} req;
343322724Smarius		struct {
344322724Smarius			uint32_t width;
345322724Smarius			uint32_t height;
346322724Smarius		} resp;
347322724Smarius	} body;
348322724Smarius};
349322724Smarius
350322724Smarius#define	BCM2835_MBOX_TAG_GET_DEPTH		0x00040005
351322724Smarius#define	BCM2835_MBOX_TAG_SET_DEPTH		0x00048005
352322724Smarius
353322724Smariusstruct bcm2835_mbox_tag_depth {
354322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
355322724Smarius	union {
356322724Smarius		struct {
357322724Smarius			uint32_t bpp;
358322724Smarius		} req;
359322724Smarius		struct {
360322724Smarius			uint32_t bpp;
361322724Smarius		} resp;
362322724Smarius	} body;
363322724Smarius};
364322724Smarius
365322724Smarius#define	BCM2835_MBOX_TAG_GET_ALPHA_MODE		0x00040007
366322724Smarius#define	BCM2835_MBOX_TAG_SET_ALPHA_MODE		0x00048007
367322724Smarius
368322724Smarius#define	BCM2835_MBOX_ALPHA_MODE_0_OPAQUE	0
369322724Smarius#define	BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT	1
370322724Smarius#define	BCM2835_MBOX_ALPHA_MODE_IGNORED		2
371322724Smarius
372322724Smariusstruct bcm2835_mbox_tag_alpha_mode {
373322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
374322724Smarius	union {
375322724Smarius		struct {
376322724Smarius			uint32_t alpha;
377322724Smarius		} req;
378322724Smarius		struct {
379322724Smarius			uint32_t alpha;
380322724Smarius		} resp;
381322724Smarius	} body;
382322724Smarius};
383322724Smarius
384322724Smarius#define	BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET	0x00040009
385322724Smarius#define	BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET	0x00048009
386322724Smarius
387322724Smariusstruct bcm2835_mbox_tag_virtual_offset {
388322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
389322724Smarius	union {
390322724Smarius		struct {
391322724Smarius			uint32_t x;
392322724Smarius			uint32_t y;
393322724Smarius		} req;
394322724Smarius		struct {
395322724Smarius			uint32_t x;
396322724Smarius			uint32_t y;
397322724Smarius		} resp;
398322724Smarius	} body;
399322724Smarius};
400322724Smarius
401322724Smarius#define	BCM2835_MBOX_TAG_GET_PITCH		0x00040008
402322724Smarius
403322724Smariusstruct bcm2835_mbox_tag_pitch {
404322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
405322724Smarius	union {
406322724Smarius		struct {
407322724Smarius		} req;
408322724Smarius		struct {
409322724Smarius			uint32_t pitch;
410322724Smarius		} resp;
411322724Smarius	} body;
412322724Smarius};
413322724Smarius
414322724Smarius#define	BCM2835_MBOX_TAG_ALLOCATE_BUFFER	0x00040001
415322724Smarius
416322724Smariusstruct bcm2835_mbox_tag_allocate_buffer {
417322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
418322724Smarius	union {
419322724Smarius		struct {
420322724Smarius			uint32_t alignment;
421322724Smarius		} req;
422322724Smarius		struct {
423322724Smarius			uint32_t fb_address;
424322724Smarius			uint32_t fb_size;
425322724Smarius		} resp;
426322724Smarius	} body;
427322724Smarius};
428322724Smarius
429322724Smarius#define	BCM2835_MBOX_TAG_RELEASE_BUFFER		0x00048001
430322724Smarius
431322724Smariusstruct bcm2835_mbox_tag_release_buffer {
432322724Smarius	struct bcm2835_mbox_tag_hdr tag_hdr;
433322724Smarius	union {
434322724Smarius		struct {
435322724Smarius		} req;
436322724Smarius		struct {
437322724Smarius		} resp;
438322724Smarius	} body;
439322724Smarius};
440322724Smarius
441322724Smariusstruct bcm2835_fb_config {
442322724Smarius	uint32_t xres;
443322724Smarius	uint32_t yres;
444322724Smarius	uint32_t vxres;
445322724Smarius	uint32_t vyres;
446322724Smarius	uint32_t xoffset;
447322724Smarius	uint32_t yoffset;
448322724Smarius	uint32_t bpp;
449322724Smarius	uint32_t pitch;
450322724Smarius	uint32_t base;
451322724Smarius	uint32_t size;
452322724Smarius};
453322724Smarius
454322724Smariusstruct msg_fb_get_w_h {
455322724Smarius	struct bcm2835_mbox_hdr hdr;
456322724Smarius	struct bcm2835_mbox_tag_fb_w_h physical_w_h;
457322724Smarius	uint32_t end_tag;
458322724Smarius};
459322724Smarius
460322724Smariusint bcm2835_mbox_fb_get_w_h(struct bcm2835_fb_config *);
461322724Smarius
462322724Smariusstruct msg_fb_setup {
463322724Smarius	struct bcm2835_mbox_hdr hdr;
464322724Smarius	struct bcm2835_mbox_tag_fb_w_h physical_w_h;
465322724Smarius	struct bcm2835_mbox_tag_fb_w_h virtual_w_h;
466322724Smarius	struct bcm2835_mbox_tag_virtual_offset offset;
467322724Smarius	struct bcm2835_mbox_tag_depth depth;
468322724Smarius	struct bcm2835_mbox_tag_alpha_mode alpha;
469322724Smarius	struct bcm2835_mbox_tag_allocate_buffer buffer;
470322724Smarius	struct bcm2835_mbox_tag_pitch pitch;
471322724Smarius	uint32_t end_tag;
472322724Smarius};
473322724Smarius
474322724Smariusint bcm2835_mbox_fb_init(struct bcm2835_fb_config *);
475322724Smarius
476322724Smariusint bcm2835_mbox_property(void *, size_t);
477322724Smarius
478275963Srpaulo#endif /* _BCM2835_MBOX_PROP_H_ */
479