1256959Sloos/*- 2256959Sloos * Copyright (c) 2001 Tsubai Masanari. 3256959Sloos * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org> 4256959Sloos * Copyright (c) 2013 Luiz Otavio O Souza <loos@freebsd.org> 5256959Sloos * All rights reserved. 6256959Sloos * 7256959Sloos * Redistribution and use in source and binary forms, with or without 8256959Sloos * modification, are permitted provided that the following conditions 9256959Sloos * are met: 10256959Sloos * 1. Redistributions of source code must retain the above copyright 11256959Sloos * notice, this list of conditions and the following disclaimer. 12256959Sloos * 2. Redistributions in binary form must reproduce the above copyright 13256959Sloos * notice, this list of conditions and the following disclaimer in the 14256959Sloos * documentation and/or other materials provided with the distribution. 15256959Sloos * 16256959Sloos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17256959Sloos * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18256959Sloos * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19256959Sloos * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20256959Sloos * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21256959Sloos * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22256959Sloos * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23256959Sloos * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24256959Sloos * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25256959Sloos * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26256959Sloos * SUCH DAMAGE. 27256959Sloos * 28256959Sloos */ 29256959Sloos#include <sys/cdefs.h> 30256959Sloos__FBSDID("$FreeBSD: stable/10/sys/arm/broadcom/bcm2835/bcm2835_bsc.c 322724 2017-08-20 16:52:27Z marius $"); 31256959Sloos 32256959Sloos#include <sys/param.h> 33256959Sloos#include <sys/systm.h> 34256959Sloos#include <sys/kernel.h> 35256959Sloos#include <sys/lock.h> 36256959Sloos#include <sys/module.h> 37256959Sloos#include <sys/mutex.h> 38256959Sloos#include <sys/bus.h> 39256959Sloos#include <machine/resource.h> 40256959Sloos#include <machine/bus.h> 41256959Sloos#include <sys/rman.h> 42256959Sloos#include <sys/sysctl.h> 43256959Sloos 44256959Sloos#include <dev/iicbus/iicbus.h> 45256959Sloos#include <dev/iicbus/iiconf.h> 46256959Sloos#include <dev/ofw/ofw_bus.h> 47256959Sloos#include <dev/ofw/ofw_bus_subr.h> 48256959Sloos 49256959Sloos#include <arm/broadcom/bcm2835/bcm2835_gpio.h> 50256959Sloos#include <arm/broadcom/bcm2835/bcm2835_bscreg.h> 51256959Sloos#include <arm/broadcom/bcm2835/bcm2835_bscvar.h> 52256959Sloos 53256959Sloos#include "iicbus_if.h" 54256959Sloos 55322724Smariusstatic struct ofw_compat_data compat_data[] = { 56322724Smarius {"broadcom,bcm2835-bsc", 1}, 57322724Smarius {"brcm,bcm2708-i2c", 1}, 58322724Smarius {"brcm,bcm2835-i2c", 1}, 59322724Smarius {NULL, 0} 60322724Smarius}; 61322724Smarius 62256959Sloosstatic void bcm_bsc_intr(void *); 63276872Sloosstatic int bcm_bsc_detach(device_t); 64256959Sloos 65256959Sloosstatic void 66256959Sloosbcm_bsc_modifyreg(struct bcm_bsc_softc *sc, uint32_t off, uint32_t mask, 67256959Sloos uint32_t value) 68256959Sloos{ 69256959Sloos uint32_t reg; 70256959Sloos 71256959Sloos mtx_assert(&sc->sc_mtx, MA_OWNED); 72256959Sloos reg = BCM_BSC_READ(sc, off); 73256959Sloos reg &= ~mask; 74256959Sloos reg |= value; 75256959Sloos BCM_BSC_WRITE(sc, off, reg); 76256959Sloos} 77256959Sloos 78256959Sloosstatic int 79256959Sloosbcm_bsc_clock_proc(SYSCTL_HANDLER_ARGS) 80256959Sloos{ 81256959Sloos struct bcm_bsc_softc *sc; 82256959Sloos uint32_t clk; 83256959Sloos 84256959Sloos sc = (struct bcm_bsc_softc *)arg1; 85256959Sloos BCM_BSC_LOCK(sc); 86256959Sloos clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK); 87256959Sloos BCM_BSC_UNLOCK(sc); 88256959Sloos clk &= 0xffff; 89256959Sloos if (clk == 0) 90256959Sloos clk = 32768; 91256959Sloos clk = BCM_BSC_CORE_CLK / clk; 92256959Sloos 93276872Sloos return (sysctl_handle_int(oidp, &clk, 0, req)); 94256959Sloos} 95256959Sloos 96256959Sloosstatic int 97256959Sloosbcm_bsc_clkt_proc(SYSCTL_HANDLER_ARGS) 98256959Sloos{ 99256959Sloos struct bcm_bsc_softc *sc; 100256959Sloos uint32_t clkt; 101256959Sloos int error; 102256959Sloos 103256959Sloos sc = (struct bcm_bsc_softc *)arg1; 104256959Sloos 105256959Sloos BCM_BSC_LOCK(sc); 106256959Sloos clkt = BCM_BSC_READ(sc, BCM_BSC_CLKT); 107256959Sloos BCM_BSC_UNLOCK(sc); 108256959Sloos clkt &= 0xffff; 109256959Sloos error = sysctl_handle_int(oidp, &clkt, sizeof(clkt), req); 110256959Sloos if (error != 0 || req->newptr == NULL) 111256959Sloos return (error); 112256959Sloos 113256959Sloos BCM_BSC_LOCK(sc); 114256959Sloos BCM_BSC_WRITE(sc, BCM_BSC_CLKT, clkt & 0xffff); 115256959Sloos BCM_BSC_UNLOCK(sc); 116256959Sloos 117256959Sloos return (0); 118256959Sloos} 119256959Sloos 120256959Sloosstatic int 121256959Sloosbcm_bsc_fall_proc(SYSCTL_HANDLER_ARGS) 122256959Sloos{ 123256959Sloos struct bcm_bsc_softc *sc; 124256959Sloos uint32_t clk, reg; 125256959Sloos int error; 126256959Sloos 127256959Sloos sc = (struct bcm_bsc_softc *)arg1; 128256959Sloos 129256959Sloos BCM_BSC_LOCK(sc); 130256959Sloos reg = BCM_BSC_READ(sc, BCM_BSC_DELAY); 131256959Sloos BCM_BSC_UNLOCK(sc); 132256959Sloos reg >>= 16; 133256959Sloos error = sysctl_handle_int(oidp, ®, sizeof(reg), req); 134256959Sloos if (error != 0 || req->newptr == NULL) 135256959Sloos return (error); 136256959Sloos 137256959Sloos BCM_BSC_LOCK(sc); 138256959Sloos clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK); 139256959Sloos clk = BCM_BSC_CORE_CLK / clk; 140256959Sloos if (reg > clk / 2) 141256959Sloos reg = clk / 2 - 1; 142256959Sloos bcm_bsc_modifyreg(sc, BCM_BSC_DELAY, 0xffff0000, reg << 16); 143256959Sloos BCM_BSC_UNLOCK(sc); 144256959Sloos 145256959Sloos return (0); 146256959Sloos} 147256959Sloos 148256959Sloosstatic int 149256959Sloosbcm_bsc_rise_proc(SYSCTL_HANDLER_ARGS) 150256959Sloos{ 151256959Sloos struct bcm_bsc_softc *sc; 152256959Sloos uint32_t clk, reg; 153256959Sloos int error; 154256959Sloos 155256959Sloos sc = (struct bcm_bsc_softc *)arg1; 156256959Sloos 157256959Sloos BCM_BSC_LOCK(sc); 158256959Sloos reg = BCM_BSC_READ(sc, BCM_BSC_DELAY); 159256959Sloos BCM_BSC_UNLOCK(sc); 160256959Sloos reg &= 0xffff; 161256959Sloos error = sysctl_handle_int(oidp, ®, sizeof(reg), req); 162256959Sloos if (error != 0 || req->newptr == NULL) 163256959Sloos return (error); 164256959Sloos 165256959Sloos BCM_BSC_LOCK(sc); 166256959Sloos clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK); 167256959Sloos clk = BCM_BSC_CORE_CLK / clk; 168256959Sloos if (reg > clk / 2) 169256959Sloos reg = clk / 2 - 1; 170256959Sloos bcm_bsc_modifyreg(sc, BCM_BSC_DELAY, 0xffff, reg); 171256959Sloos BCM_BSC_UNLOCK(sc); 172256959Sloos 173256959Sloos return (0); 174256959Sloos} 175256959Sloos 176256959Sloosstatic void 177256959Sloosbcm_bsc_sysctl_init(struct bcm_bsc_softc *sc) 178256959Sloos{ 179256959Sloos struct sysctl_ctx_list *ctx; 180256959Sloos struct sysctl_oid *tree_node; 181256959Sloos struct sysctl_oid_list *tree; 182256959Sloos 183256959Sloos /* 184256959Sloos * Add system sysctl tree/handlers. 185256959Sloos */ 186256959Sloos ctx = device_get_sysctl_ctx(sc->sc_dev); 187256959Sloos tree_node = device_get_sysctl_tree(sc->sc_dev); 188256959Sloos tree = SYSCTL_CHILDREN(tree_node); 189276872Sloos SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "frequency", 190256959Sloos CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), 191256959Sloos bcm_bsc_clock_proc, "IU", "I2C BUS clock frequency"); 192256959Sloos SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "clock_stretch", 193256959Sloos CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), 194256959Sloos bcm_bsc_clkt_proc, "IU", "I2C BUS clock stretch timeout"); 195256959Sloos SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "fall_edge_delay", 196256959Sloos CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), 197256959Sloos bcm_bsc_fall_proc, "IU", "I2C BUS falling edge delay"); 198256959Sloos SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "rise_edge_delay", 199256959Sloos CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), 200256959Sloos bcm_bsc_rise_proc, "IU", "I2C BUS rising edge delay"); 201256959Sloos} 202256959Sloos 203256959Sloosstatic void 204256959Sloosbcm_bsc_reset(struct bcm_bsc_softc *sc) 205256959Sloos{ 206256959Sloos 207276869Sloos /* Enable the BSC Controller, disable interrupts. */ 208276869Sloos BCM_BSC_WRITE(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_I2CEN); 209256959Sloos /* Clear pending interrupts. */ 210256959Sloos BCM_BSC_WRITE(sc, BCM_BSC_STATUS, BCM_BSC_STATUS_CLKT | 211256959Sloos BCM_BSC_STATUS_ERR | BCM_BSC_STATUS_DONE); 212256959Sloos /* Clear the FIFO. */ 213256959Sloos bcm_bsc_modifyreg(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_CLEAR0, 214256959Sloos BCM_BSC_CTRL_CLEAR0); 215256959Sloos} 216256959Sloos 217256959Sloosstatic int 218256959Sloosbcm_bsc_probe(device_t dev) 219256959Sloos{ 220256959Sloos 221266152Sian if (!ofw_bus_status_okay(dev)) 222266152Sian return (ENXIO); 223266152Sian 224322724Smarius if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 225256959Sloos return (ENXIO); 226256959Sloos 227256959Sloos device_set_desc(dev, "BCM2708/2835 BSC controller"); 228256959Sloos 229256959Sloos return (BUS_PROBE_DEFAULT); 230256959Sloos} 231256959Sloos 232256959Sloosstatic int 233256959Sloosbcm_bsc_attach(device_t dev) 234256959Sloos{ 235256959Sloos struct bcm_bsc_softc *sc; 236261078Sloos unsigned long start; 237256959Sloos device_t gpio; 238261078Sloos int i, rid; 239256959Sloos 240261078Sloos sc = device_get_softc(dev); 241261078Sloos sc->sc_dev = dev; 242261078Sloos 243261078Sloos rid = 0; 244261078Sloos sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 245261078Sloos RF_ACTIVE); 246261078Sloos if (!sc->sc_mem_res) { 247261078Sloos device_printf(dev, "cannot allocate memory window\n"); 248261078Sloos return (ENXIO); 249261078Sloos } 250261078Sloos 251261078Sloos sc->sc_bst = rman_get_bustag(sc->sc_mem_res); 252261078Sloos sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); 253261078Sloos 254261078Sloos /* Check the unit we are attaching by its base address. */ 255261078Sloos start = rman_get_start(sc->sc_mem_res); 256261078Sloos for (i = 0; i < nitems(bcm_bsc_pins); i++) { 257322724Smarius if (bcm_bsc_pins[i].start == (start & BCM_BSC_BASE_MASK)) 258261078Sloos break; 259261078Sloos } 260261078Sloos if (i == nitems(bcm_bsc_pins)) { 261256959Sloos device_printf(dev, "only bsc0 and bsc1 are supported\n"); 262278072Sloos bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 263256959Sloos return (ENXIO); 264256959Sloos } 265256959Sloos 266256959Sloos /* 267256959Sloos * Configure the GPIO pins to ALT0 function to enable BSC control 268256959Sloos * over the pins. 269256959Sloos */ 270256959Sloos gpio = devclass_get_device(devclass_find("gpio"), 0); 271256959Sloos if (!gpio) { 272256959Sloos device_printf(dev, "cannot find gpio0\n"); 273278072Sloos bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 274256959Sloos return (ENXIO); 275256959Sloos } 276261078Sloos bcm_gpio_set_alternate(gpio, bcm_bsc_pins[i].sda, BCM_GPIO_ALT0); 277261078Sloos bcm_gpio_set_alternate(gpio, bcm_bsc_pins[i].scl, BCM_GPIO_ALT0); 278256959Sloos 279256959Sloos rid = 0; 280256959Sloos sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 281256959Sloos RF_ACTIVE | RF_SHAREABLE); 282256959Sloos if (!sc->sc_irq_res) { 283256959Sloos bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 284256959Sloos device_printf(dev, "cannot allocate interrupt\n"); 285256959Sloos return (ENXIO); 286256959Sloos } 287256959Sloos 288256959Sloos /* Hook up our interrupt handler. */ 289256959Sloos if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 290256959Sloos NULL, bcm_bsc_intr, sc, &sc->sc_intrhand)) { 291256959Sloos bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); 292256959Sloos bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 293256959Sloos device_printf(dev, "cannot setup the interrupt handler\n"); 294256959Sloos return (ENXIO); 295256959Sloos } 296256959Sloos 297256959Sloos mtx_init(&sc->sc_mtx, "bcm_bsc", NULL, MTX_DEF); 298256959Sloos 299256959Sloos bcm_bsc_sysctl_init(sc); 300256959Sloos 301256959Sloos /* Enable the BSC controller. Flush the FIFO. */ 302256959Sloos BCM_BSC_LOCK(sc); 303256959Sloos bcm_bsc_reset(sc); 304256959Sloos BCM_BSC_UNLOCK(sc); 305256959Sloos 306276872Sloos sc->sc_iicbus = device_add_child(dev, "iicbus", -1); 307276872Sloos if (sc->sc_iicbus == NULL) { 308276872Sloos bcm_bsc_detach(dev); 309276872Sloos return (ENXIO); 310276872Sloos } 311256959Sloos 312256959Sloos return (bus_generic_attach(dev)); 313256959Sloos} 314256959Sloos 315256959Sloosstatic int 316256959Sloosbcm_bsc_detach(device_t dev) 317256959Sloos{ 318256959Sloos struct bcm_bsc_softc *sc; 319256959Sloos 320256959Sloos bus_generic_detach(dev); 321256959Sloos 322256959Sloos sc = device_get_softc(dev); 323256959Sloos mtx_destroy(&sc->sc_mtx); 324256959Sloos if (sc->sc_intrhand) 325256959Sloos bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand); 326256959Sloos if (sc->sc_irq_res) 327256959Sloos bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); 328256959Sloos if (sc->sc_mem_res) 329256959Sloos bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 330256959Sloos 331256959Sloos return (0); 332256959Sloos} 333256959Sloos 334256959Sloosstatic void 335256959Sloosbcm_bsc_intr(void *arg) 336256959Sloos{ 337256959Sloos struct bcm_bsc_softc *sc; 338256959Sloos uint32_t status; 339256959Sloos 340256959Sloos sc = (struct bcm_bsc_softc *)arg; 341256959Sloos 342256959Sloos BCM_BSC_LOCK(sc); 343256959Sloos 344256959Sloos /* The I2C interrupt is shared among all the BSC controllers. */ 345256959Sloos if ((sc->sc_flags & BCM_I2C_BUSY) == 0) { 346256959Sloos BCM_BSC_UNLOCK(sc); 347256959Sloos return; 348256959Sloos } 349256959Sloos 350256959Sloos status = BCM_BSC_READ(sc, BCM_BSC_STATUS); 351256959Sloos 352256959Sloos /* Check for errors. */ 353256959Sloos if (status & (BCM_BSC_STATUS_CLKT | BCM_BSC_STATUS_ERR)) { 354256959Sloos /* Disable interrupts. */ 355276869Sloos bcm_bsc_reset(sc); 356256959Sloos sc->sc_flags |= BCM_I2C_ERROR; 357256959Sloos wakeup(sc->sc_dev); 358256959Sloos BCM_BSC_UNLOCK(sc); 359256959Sloos return; 360256959Sloos } 361256959Sloos 362256959Sloos if (sc->sc_flags & BCM_I2C_READ) { 363256959Sloos while (sc->sc_resid > 0 && (status & BCM_BSC_STATUS_RXD)) { 364256959Sloos *sc->sc_data++ = BCM_BSC_READ(sc, BCM_BSC_DATA); 365256959Sloos sc->sc_resid--; 366256959Sloos status = BCM_BSC_READ(sc, BCM_BSC_STATUS); 367256959Sloos } 368256959Sloos } else { 369256959Sloos while (sc->sc_resid > 0 && (status & BCM_BSC_STATUS_TXD)) { 370256959Sloos BCM_BSC_WRITE(sc, BCM_BSC_DATA, *sc->sc_data++); 371256959Sloos sc->sc_resid--; 372256959Sloos status = BCM_BSC_READ(sc, BCM_BSC_STATUS); 373256959Sloos } 374256959Sloos } 375256959Sloos 376256959Sloos if (status & BCM_BSC_STATUS_DONE) { 377256959Sloos /* Disable interrupts. */ 378256959Sloos bcm_bsc_reset(sc); 379256959Sloos wakeup(sc->sc_dev); 380256959Sloos } 381256959Sloos 382256959Sloos BCM_BSC_UNLOCK(sc); 383256959Sloos} 384256959Sloos 385256959Sloosstatic int 386256959Sloosbcm_bsc_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) 387256959Sloos{ 388256959Sloos struct bcm_bsc_softc *sc; 389256959Sloos uint32_t intr, read, status; 390256959Sloos int i, err; 391256959Sloos 392256959Sloos sc = device_get_softc(dev); 393256959Sloos BCM_BSC_LOCK(sc); 394256959Sloos 395256959Sloos /* If the controller is busy wait until it is available. */ 396256959Sloos while (sc->sc_flags & BCM_I2C_BUSY) 397276868Sloos mtx_sleep(dev, &sc->sc_mtx, 0, "bscbusw", 0); 398256959Sloos 399256959Sloos /* Now we have control over the BSC controller. */ 400256959Sloos sc->sc_flags = BCM_I2C_BUSY; 401256959Sloos 402256959Sloos /* Clear the FIFO and the pending interrupts. */ 403256959Sloos bcm_bsc_reset(sc); 404256959Sloos 405256959Sloos err = 0; 406256959Sloos for (i = 0; i < nmsgs; i++) { 407256959Sloos 408256959Sloos /* Write the slave address. */ 409270243Sloos BCM_BSC_WRITE(sc, BCM_BSC_SLAVE, msgs[i].slave >> 1); 410256959Sloos 411256959Sloos /* Write the data length. */ 412256959Sloos BCM_BSC_WRITE(sc, BCM_BSC_DLEN, msgs[i].len); 413256959Sloos 414256959Sloos sc->sc_data = msgs[i].buf; 415256959Sloos sc->sc_resid = msgs[i].len; 416256959Sloos if ((msgs[i].flags & IIC_M_RD) == 0) { 417256959Sloos /* Fill up the TX FIFO. */ 418256959Sloos status = BCM_BSC_READ(sc, BCM_BSC_STATUS); 419256959Sloos while (sc->sc_resid > 0 && 420256959Sloos (status & BCM_BSC_STATUS_TXD)) { 421256959Sloos BCM_BSC_WRITE(sc, BCM_BSC_DATA, *sc->sc_data); 422256959Sloos sc->sc_data++; 423256959Sloos sc->sc_resid--; 424256959Sloos status = BCM_BSC_READ(sc, BCM_BSC_STATUS); 425256959Sloos } 426256959Sloos read = 0; 427256959Sloos intr = BCM_BSC_CTRL_INTT; 428256959Sloos sc->sc_flags &= ~BCM_I2C_READ; 429256959Sloos } else { 430256959Sloos sc->sc_flags |= BCM_I2C_READ; 431256959Sloos read = BCM_BSC_CTRL_READ; 432256959Sloos intr = BCM_BSC_CTRL_INTR; 433256959Sloos } 434256959Sloos intr |= BCM_BSC_CTRL_INTD; 435256959Sloos 436256959Sloos /* Start the transfer. */ 437256959Sloos BCM_BSC_WRITE(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_I2CEN | 438256959Sloos BCM_BSC_CTRL_ST | read | intr); 439256959Sloos 440256959Sloos /* Wait for the transaction to complete. */ 441276868Sloos err = mtx_sleep(dev, &sc->sc_mtx, 0, "bsciow", hz); 442256959Sloos 443276868Sloos /* Check for errors. */ 444276868Sloos if (err == 0 && (sc->sc_flags & BCM_I2C_ERROR)) 445256959Sloos err = EIO; 446276868Sloos if (err != 0) 447256959Sloos break; 448256959Sloos } 449256959Sloos 450256959Sloos /* Clean the controller flags. */ 451256959Sloos sc->sc_flags = 0; 452256959Sloos 453276868Sloos /* Wake up the threads waiting for bus. */ 454276868Sloos wakeup(dev); 455276868Sloos 456256959Sloos BCM_BSC_UNLOCK(sc); 457256959Sloos 458256959Sloos return (err); 459256959Sloos} 460256959Sloos 461276869Sloosstatic int 462276869Sloosbcm_bsc_iicbus_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr) 463276869Sloos{ 464276869Sloos struct bcm_bsc_softc *sc; 465276872Sloos uint32_t busfreq; 466276872Sloos 467276869Sloos sc = device_get_softc(dev); 468276869Sloos BCM_BSC_LOCK(sc); 469276869Sloos bcm_bsc_reset(sc); 470276872Sloos if (sc->sc_iicbus == NULL) 471276872Sloos busfreq = 100000; 472276872Sloos else 473276872Sloos busfreq = IICBUS_GET_FREQUENCY(sc->sc_iicbus, speed); 474276872Sloos BCM_BSC_WRITE(sc, BCM_BSC_CLOCK, BCM_BSC_CORE_CLK / busfreq); 475276869Sloos BCM_BSC_UNLOCK(sc); 476276869Sloos 477276869Sloos return (IIC_ENOADDR); 478276869Sloos} 479276869Sloos 480256959Sloosstatic phandle_t 481256959Sloosbcm_bsc_get_node(device_t bus, device_t dev) 482256959Sloos{ 483256959Sloos 484256959Sloos /* We only have one child, the I2C bus, which needs our own node. */ 485256959Sloos return (ofw_bus_get_node(bus)); 486256959Sloos} 487256959Sloos 488256959Sloosstatic device_method_t bcm_bsc_methods[] = { 489256959Sloos /* Device interface */ 490256959Sloos DEVMETHOD(device_probe, bcm_bsc_probe), 491256959Sloos DEVMETHOD(device_attach, bcm_bsc_attach), 492256959Sloos DEVMETHOD(device_detach, bcm_bsc_detach), 493256959Sloos 494256959Sloos /* iicbus interface */ 495276869Sloos DEVMETHOD(iicbus_reset, bcm_bsc_iicbus_reset), 496256959Sloos DEVMETHOD(iicbus_callback, iicbus_null_callback), 497256959Sloos DEVMETHOD(iicbus_transfer, bcm_bsc_transfer), 498256959Sloos 499256959Sloos /* ofw_bus interface */ 500256959Sloos DEVMETHOD(ofw_bus_get_node, bcm_bsc_get_node), 501256959Sloos 502256959Sloos DEVMETHOD_END 503256959Sloos}; 504256959Sloos 505256959Sloosstatic devclass_t bcm_bsc_devclass; 506256959Sloos 507256959Sloosstatic driver_t bcm_bsc_driver = { 508256959Sloos "iichb", 509256959Sloos bcm_bsc_methods, 510256959Sloos sizeof(struct bcm_bsc_softc), 511256959Sloos}; 512256959Sloos 513256959SloosDRIVER_MODULE(iicbus, bcm2835_bsc, iicbus_driver, iicbus_devclass, 0, 0); 514256959SloosDRIVER_MODULE(bcm2835_bsc, simplebus, bcm_bsc_driver, bcm_bsc_devclass, 0, 0); 515