at91var.h revision 238334
175584Sru/*-
2104862Sru * Copyright (c) 2005 Olivier Houchard.  All rights reserved.
375584Sru *
475584Sru * Redistribution and use in source and binary forms, with or without
575584Sru * modification, are permitted provided that the following conditions
675584Sru * are met:
775584Sru * 1. Redistributions of source code must retain the above copyright
875584Sru *    notice, this list of conditions and the following disclaimer.
975584Sru * 2. Redistributions in binary form must reproduce the above copyright
1075584Sru *    notice, this list of conditions and the following disclaimer in the
1175584Sru *    documentation and/or other materials provided with the distribution.
1275584Sru *
1375584Sru * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1475584Sru * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1575584Sru * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1675584Sru * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
1775584Sru * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
1875584Sru * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
1975584Sru * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2075584Sru * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2175584Sru * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22104862Sru * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2375584Sru * SUCH DAMAGE.
2475584Sru */
2575584Sru
26104862Sru/* $FreeBSD: head/sys/arm/at91/at91var.h 238334 2012-07-10 04:17:49Z imp $ */
2775584Sru
2875584Sru#ifndef _AT91VAR_H_
2975584Sru#define _AT91VAR_H_
3075584Sru
3175584Sru#include <sys/bus.h>
3275584Sru#include <sys/rman.h>
3375584Sru
3475584Sru#include <arm/at91/at91reg.h>
3575584Sru
36104862Srustruct at91_softc {
3775584Sru	device_t dev;
3875584Sru	bus_space_tag_t sc_st;
3975584Sru	bus_space_handle_t sc_sh;
4075584Sru	bus_space_handle_t sc_aic_sh;
4175584Sru	struct rman sc_irq_rman;
4275584Sru	struct rman sc_mem_rman;
4375584Sru	uint32_t sc_irq_system;
4475584Sru};
4575584Sru
4675584Srustruct at91_ivar {
4775584Sru	struct resource_list resources;
48};
49
50struct cpu_devs
51{
52	const char *name;
53	int unit;
54	bus_addr_t mem_base;
55	bus_size_t mem_len;
56	int irq0;
57	int irq1;
58	int irq2;
59	const char *parent_clk;
60};
61
62enum at91_soc_type {
63	AT91_T_NONE = 0,
64	AT91_T_CAP9,
65	AT91_T_RM9200,
66	AT91_T_SAM9260,
67	AT91_T_SAM9261,
68	AT91_T_SAM9263,
69	AT91_T_SAM9G10,
70	AT91_T_SAM9G20,
71	AT91_T_SAM9G45,
72	AT91_T_SAM9N12,
73	AT91_T_SAM9RL,
74	AT91_T_SAM9X5,
75};
76
77enum at91_soc_subtype {
78	AT91_ST_NONE = 0,
79	/* AT91RM9200 */
80	AT91_ST_RM9200_BGA,
81	AT91_ST_RM9200_PQFP,
82	/* AT91SAM9260 */
83	AT91_ST_SAM9XE,
84	/* AT91SAM9G45 */
85	AT91_ST_SAM9G45,
86	AT91_ST_SAM9M10,
87	AT91_ST_SAM9G46,
88	AT91_ST_SAM9M11,
89	/* AT91SAM9X5 */
90	AT91_ST_SAM9G15,
91	AT91_ST_SAM9G25,
92	AT91_ST_SAM9G35,
93	AT91_ST_SAM9X25,
94	AT91_ST_SAM9X35,
95};
96
97enum at91_soc_family {
98	AT91_FAMILY_SAM9 = 0x19,
99	AT91_FAMILY_SAM9XE = 0x29,
100	AT91_FAMILY_RM92 = 0x92,
101};
102
103#define AT91_SOC_NAME_MAX 50
104
105typedef void (*DELAY_t)(int);
106typedef void (*cpu_reset_t)(void);
107
108struct at91_soc_info {
109	enum at91_soc_type type;
110	enum at91_soc_subtype subtype;
111	enum at91_soc_family family;
112	uint32_t cidr;
113	uint32_t exid;
114	char name[AT91_SOC_NAME_MAX];
115	DELAY_t delay;
116	cpu_reset_t reset;
117};
118
119extern struct at91_soc_info soc_data;
120
121static inline int at91_is_rm92(void);
122static inline int at91_is_sam9(void);
123static inline int at91_is_sam9xe(void);
124static inline int at91_cpu_is(u_int cpu);
125
126static inline int
127at91_is_rm92(void)
128{
129
130	return (soc_data.type == AT91_T_RM9200);
131}
132
133static inline int
134at91_is_sam9(void)
135{
136
137	return (soc_data.family == AT91_FAMILY_SAM9);
138}
139
140static inline int
141at91_is_sam9xe(void)
142{
143
144	return (soc_data.family == AT91_FAMILY_SAM9XE);
145}
146
147static inline int
148at91_cpu_is(u_int cpu)
149{
150
151	return (soc_data.type == cpu);
152}
153
154void at91_add_child(device_t dev, int prio, const char *name, int unit,
155    bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2);
156
157extern uint32_t at91_irq_system;
158extern uint32_t at91_master_clock;
159void at91_pmc_init_clock(void);
160
161#endif /* _AT91VAR_H_ */
162