intr_machdep.h revision 187880
1121982Sjhb/*- 2121982Sjhb * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3121982Sjhb * All rights reserved. 4121982Sjhb * 5121982Sjhb * Redistribution and use in source and binary forms, with or without 6121982Sjhb * modification, are permitted provided that the following conditions 7121982Sjhb * are met: 8121982Sjhb * 1. Redistributions of source code must retain the above copyright 9121982Sjhb * notice, this list of conditions and the following disclaimer. 10121982Sjhb * 2. Redistributions in binary form must reproduce the above copyright 11121982Sjhb * notice, this list of conditions and the following disclaimer in the 12121982Sjhb * documentation and/or other materials provided with the distribution. 13121982Sjhb * 14121982Sjhb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15121982Sjhb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16121982Sjhb * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17121982Sjhb * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18121982Sjhb * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19121982Sjhb * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20121982Sjhb * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21121982Sjhb * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22121982Sjhb * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23121982Sjhb * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24121982Sjhb * SUCH DAMAGE. 25121982Sjhb * 26121982Sjhb * $FreeBSD: head/sys/amd64/include/intr_machdep.h 187880 2009-01-29 09:22:56Z jeff $ 27121982Sjhb */ 28121982Sjhb 29121982Sjhb#ifndef __MACHINE_INTR_MACHDEP_H__ 30121982Sjhb#define __MACHINE_INTR_MACHDEP_H__ 31121982Sjhb 32121982Sjhb#ifdef _KERNEL 33121982Sjhb 34151979Sjhb/* 35151979Sjhb * The maximum number of I/O interrupts we allow. This number is rather 36151979Sjhb * arbitrary as it is just the maximum IRQ resource value. The interrupt 37151979Sjhb * source for a given IRQ maps that I/O interrupt to device interrupt 38151979Sjhb * source whether it be a pin on an interrupt controller or an MSI interrupt. 39151979Sjhb * The 16 ISA IRQs are assigned fixed IDT vectors, but all other device 40151979Sjhb * interrupts allocate IDT vectors on demand. Currently we have 191 IDT 41151979Sjhb * vectors available for device interrupts. On many systems with I/O APICs, 42151979Sjhb * a lot of the IRQs are not used, so this number can be much larger than 43151979Sjhb * 191 and still be safe since only interrupt sources in actual use will 44151979Sjhb * allocate IDT vectors. 45151979Sjhb * 46164265Sjhb * The first 255 IRQs (0 - 254) are reserved for ISA IRQs and PCI intline IRQs. 47164265Sjhb * IRQ values beyond 256 are used by MSI. We leave 255 unused to avoid 48164265Sjhb * confusion since 255 is used in PCI to indicate an invalid IRQ. 49151979Sjhb */ 50187880Sjeff#define NUM_MSI_INTS 512 51164265Sjhb#define FIRST_MSI_INT 256 52164265Sjhb#define NUM_IO_INTS (FIRST_MSI_INT + NUM_MSI_INTS) 53121982Sjhb 54151979Sjhb/* 55164265Sjhb * Default base address for MSI messages on x86 platforms. 56164265Sjhb */ 57164265Sjhb#define MSI_INTEL_ADDR_BASE 0xfee00000 58164265Sjhb 59164265Sjhb/* 60151979Sjhb * - 1 ??? dummy counter. 61151979Sjhb * - 2 counters for each I/O interrupt. 62151979Sjhb * - 1 counter for each CPU for lapic timer. 63151979Sjhb * - 7 counters for each CPU for IPI counters for SMP. 64151979Sjhb */ 65151979Sjhb#ifdef SMP 66163212Sjhb#define INTRCNT_COUNT (1 + NUM_IO_INTS * 2 + (1 + 7) * MAXCPU) 67163212Sjhb#else 68151979Sjhb#define INTRCNT_COUNT (1 + NUM_IO_INTS * 2 + 1) 69151979Sjhb#endif 70151979Sjhb 71121982Sjhb#ifndef LOCORE 72121982Sjhb 73121982Sjhbtypedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss); 74121982Sjhb 75121982Sjhb#define IDTVEC(name) __CONCAT(X,name) 76121982Sjhb 77121982Sjhbstruct intsrc; 78121982Sjhb 79121982Sjhb/* 80121982Sjhb * Methods that a PIC provides to mask/unmask a given interrupt source, 81121982Sjhb * "turn on" the interrupt on the CPU side by setting up an IDT entry, and 82121982Sjhb * return the vector associated with this source. 83121982Sjhb */ 84121982Sjhbstruct pic { 85121982Sjhb void (*pic_enable_source)(struct intsrc *); 86133907Speter void (*pic_disable_source)(struct intsrc *, int); 87121982Sjhb void (*pic_eoi_source)(struct intsrc *); 88121982Sjhb void (*pic_enable_intr)(struct intsrc *); 89169391Sjhb void (*pic_disable_intr)(struct intsrc *); 90121982Sjhb int (*pic_vector)(struct intsrc *); 91121982Sjhb int (*pic_source_pending)(struct intsrc *); 92163219Sjhb void (*pic_suspend)(struct pic *); 93163219Sjhb void (*pic_resume)(struct pic *); 94129284Speter int (*pic_config_intr)(struct intsrc *, enum intr_trigger, 95129284Speter enum intr_polarity); 96156124Sjhb void (*pic_assign_cpu)(struct intsrc *, u_int apic_id); 97163219Sjhb STAILQ_ENTRY(pic) pics; 98121982Sjhb}; 99121982Sjhb 100133907Speter/* Flags for pic_disable_source() */ 101133907Speterenum { 102133907Speter PIC_EOI, 103133907Speter PIC_NO_EOI, 104133907Speter}; 105133907Speter 106121982Sjhb/* 107121982Sjhb * An interrupt source. The upper-layer code uses the PIC methods to 108121982Sjhb * control a given source. The lower-layer PIC drivers can store additional 109121982Sjhb * private data in a given interrupt source such as an interrupt pin number 110121982Sjhb * or an I/O APIC pointer. 111121982Sjhb */ 112121982Sjhbstruct intsrc { 113121982Sjhb struct pic *is_pic; 114151658Sjhb struct intr_event *is_event; 115121982Sjhb u_long *is_count; 116121982Sjhb u_long *is_straycount; 117121982Sjhb u_int is_index; 118169391Sjhb u_int is_handlers; 119121982Sjhb}; 120121982Sjhb 121153241Sjhbstruct trapframe; 122121982Sjhb 123121982Sjhbextern struct mtx icu_lock; 124140555Speterextern int elcr_found; 125121982Sjhb 126163219Sjhb#ifndef DEV_ATPIC 127163219Sjhbvoid atpic_reset(void); 128163219Sjhb#endif 129129284Speter/* XXX: The elcr_* prototypes probably belong somewhere else. */ 130129284Speterint elcr_probe(void); 131129284Speterenum intr_trigger elcr_read_trigger(u_int irq); 132129284Spetervoid elcr_resume(void); 133129284Spetervoid elcr_write_trigger(u_int irq, enum intr_trigger trigger); 134156124Sjhb#ifdef SMP 135167273Sjhbvoid intr_add_cpu(u_int cpu); 136156124Sjhb#endif 137166901Spisoint intr_add_handler(const char *name, int vector, driver_filter_t filter, 138166901Spiso driver_intr_t handler, void *arg, enum intr_type flags, 139166901Spiso void **cookiep); 140177181Sjhb#ifdef SMP 141177181Sjhbint intr_bind(u_int vector, u_char cpu); 142177181Sjhb#endif 143129284Speterint intr_config_intr(int vector, enum intr_trigger trig, 144129284Speter enum intr_polarity pol); 145153241Sjhbvoid intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame); 146121982Sjhbstruct intsrc *intr_lookup_source(int vector); 147163219Sjhbint intr_register_pic(struct pic *pic); 148121982Sjhbint intr_register_source(struct intsrc *isrc); 149121982Sjhbint intr_remove_handler(void *cookie); 150121982Sjhbvoid intr_resume(void); 151121982Sjhbvoid intr_suspend(void); 152140555Spetervoid intrcnt_add(const char *name, u_long **countp); 153169391Sjhbvoid nexus_add_irq(u_long irq); 154169391Sjhbint msi_alloc(device_t dev, int count, int maxcount, int *irqs); 155165127Sjhbvoid msi_init(void); 156169221Sjhbint msi_map(int irq, uint64_t *addr, uint32_t *data); 157164265Sjhbint msi_release(int *irqs, int count); 158169391Sjhbint msix_alloc(device_t dev, int *irq); 159164265Sjhbint msix_release(int irq); 160121982Sjhb 161121982Sjhb#endif /* !LOCORE */ 162121982Sjhb#endif /* _KERNEL */ 163121982Sjhb#endif /* !__MACHINE_INTR_MACHDEP_H__ */ 164