intr_machdep.h revision 140555 
1/*-
2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/amd64/include/intr_machdep.h 140555 2005-01-21 06:01:20Z peter $
27 */
28
29#ifndef __MACHINE_INTR_MACHDEP_H__
30#define	__MACHINE_INTR_MACHDEP_H__
31
32#ifdef _KERNEL
33
34/* With I/O APIC's we can have up to 191 interrupts. */
35#define	NUM_IO_INTS	191
36#define	INTRCNT_COUNT	(1 + NUM_IO_INTS * 2)
37
38#ifndef LOCORE
39
40typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
41
42#define	IDTVEC(name)	__CONCAT(X,name)
43
44struct intsrc;
45
46/*
47 * Methods that a PIC provides to mask/unmask a given interrupt source,
48 * "turn on" the interrupt on the CPU side by setting up an IDT entry, and
49 * return the vector associated with this source.
50 */
51struct pic {
52	void (*pic_enable_source)(struct intsrc *);
53	void (*pic_disable_source)(struct intsrc *, int);
54	void (*pic_eoi_source)(struct intsrc *);
55	void (*pic_enable_intr)(struct intsrc *);
56	int (*pic_vector)(struct intsrc *);
57	int (*pic_source_pending)(struct intsrc *);
58	void (*pic_suspend)(struct intsrc *);
59	void (*pic_resume)(struct intsrc *);
60	int (*pic_config_intr)(struct intsrc *, enum intr_trigger,
61	    enum intr_polarity);
62};
63
64/* Flags for pic_disable_source() */
65enum {
66	PIC_EOI,
67	PIC_NO_EOI,
68};
69
70/*
71 * An interrupt source.  The upper-layer code uses the PIC methods to
72 * control a given source.  The lower-layer PIC drivers can store additional
73 * private data in a given interrupt source such as an interrupt pin number
74 * or an I/O APIC pointer.
75 */
76struct intsrc {
77	struct pic *is_pic;
78	struct ithd *is_ithread;
79	u_long *is_count;
80	u_long *is_straycount;
81	u_int is_index;
82};
83
84struct intrframe;
85
86extern struct mtx icu_lock;
87extern int elcr_found;
88
89/* XXX: The elcr_* prototypes probably belong somewhere else. */
90int	elcr_probe(void);
91enum intr_trigger elcr_read_trigger(u_int irq);
92void	elcr_resume(void);
93void	elcr_write_trigger(u_int irq, enum intr_trigger trigger);
94int	intr_add_handler(const char *name, int vector, driver_intr_t handler,
95    void *arg, enum intr_type flags, void **cookiep);
96int	intr_config_intr(int vector, enum intr_trigger trig,
97    enum intr_polarity pol);
98void	intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe);
99struct intsrc *intr_lookup_source(int vector);
100int	intr_register_source(struct intsrc *isrc);
101int	intr_remove_handler(void *cookie);
102void	intr_resume(void);
103void	intr_suspend(void);
104void	intrcnt_add(const char *name, u_long **countp);
105
106#endif	/* !LOCORE */
107#endif	/* _KERNEL */
108#endif	/* !__MACHINE_INTR_MACHDEP_H__ */
109