vmmapi.c revision 295124
1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: stable/10/lib/libvmmapi/vmmapi.c 295124 2016-02-01 14:56:11Z grehan $ 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: stable/10/lib/libvmmapi/vmmapi.c 295124 2016-02-01 14:56:11Z grehan $"); 31 32#include <sys/param.h> 33#include <sys/sysctl.h> 34#include <sys/ioctl.h> 35#include <sys/mman.h> 36#include <sys/_iovec.h> 37#include <sys/cpuset.h> 38 39#include <x86/segments.h> 40#include <machine/specialreg.h> 41#include <machine/param.h> 42 43#include <errno.h> 44#include <stdio.h> 45#include <stdlib.h> 46#include <assert.h> 47#include <string.h> 48#include <fcntl.h> 49#include <unistd.h> 50 51#include <libutil.h> 52 53#include <machine/vmm.h> 54#include <machine/vmm_dev.h> 55 56#include "vmmapi.h" 57 58#define MB (1024 * 1024UL) 59#define GB (1024 * 1024 * 1024UL) 60 61/* 62 * Size of the guard region before and after the virtual address space 63 * mapping the guest physical memory. This must be a multiple of the 64 * superpage size for performance reasons. 65 */ 66#define VM_MMAP_GUARD_SIZE (4 * MB) 67 68#define PROT_RW (PROT_READ | PROT_WRITE) 69#define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC) 70 71struct vmctx { 72 int fd; 73 uint32_t lowmem_limit; 74 int memflags; 75 size_t lowmem; 76 size_t highmem; 77 char *baseaddr; 78 char *name; 79}; 80 81#define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x))) 82#define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x))) 83 84static int 85vm_device_open(const char *name) 86{ 87 int fd, len; 88 char *vmfile; 89 90 len = strlen("/dev/vmm/") + strlen(name) + 1; 91 vmfile = malloc(len); 92 assert(vmfile != NULL); 93 snprintf(vmfile, len, "/dev/vmm/%s", name); 94 95 /* Open the device file */ 96 fd = open(vmfile, O_RDWR, 0); 97 98 free(vmfile); 99 return (fd); 100} 101 102int 103vm_create(const char *name) 104{ 105 106 return (CREATE((char *)name)); 107} 108 109struct vmctx * 110vm_open(const char *name) 111{ 112 struct vmctx *vm; 113 114 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1); 115 assert(vm != NULL); 116 117 vm->fd = -1; 118 vm->memflags = 0; 119 vm->lowmem_limit = 3 * GB; 120 vm->name = (char *)(vm + 1); 121 strcpy(vm->name, name); 122 123 if ((vm->fd = vm_device_open(vm->name)) < 0) 124 goto err; 125 126 return (vm); 127err: 128 vm_destroy(vm); 129 return (NULL); 130} 131 132void 133vm_destroy(struct vmctx *vm) 134{ 135 assert(vm != NULL); 136 137 if (vm->fd >= 0) 138 close(vm->fd); 139 DESTROY(vm->name); 140 141 free(vm); 142} 143 144int 145vm_parse_memsize(const char *optarg, size_t *ret_memsize) 146{ 147 char *endptr; 148 size_t optval; 149 int error; 150 151 optval = strtoul(optarg, &endptr, 0); 152 if (*optarg != '\0' && *endptr == '\0') { 153 /* 154 * For the sake of backward compatibility if the memory size 155 * specified on the command line is less than a megabyte then 156 * it is interpreted as being in units of MB. 157 */ 158 if (optval < MB) 159 optval *= MB; 160 *ret_memsize = optval; 161 error = 0; 162 } else 163 error = expand_number(optarg, ret_memsize); 164 165 return (error); 166} 167 168uint32_t 169vm_get_lowmem_limit(struct vmctx *ctx) 170{ 171 172 return (ctx->lowmem_limit); 173} 174 175void 176vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit) 177{ 178 179 ctx->lowmem_limit = limit; 180} 181 182void 183vm_set_memflags(struct vmctx *ctx, int flags) 184{ 185 186 ctx->memflags = flags; 187} 188 189int 190vm_get_memflags(struct vmctx *ctx) 191{ 192 193 return (ctx->memflags); 194} 195 196/* 197 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len). 198 */ 199int 200vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off, 201 size_t len, int prot) 202{ 203 struct vm_memmap memmap; 204 int error, flags; 205 206 memmap.gpa = gpa; 207 memmap.segid = segid; 208 memmap.segoff = off; 209 memmap.len = len; 210 memmap.prot = prot; 211 memmap.flags = 0; 212 213 if (ctx->memflags & VM_MEM_F_WIRED) 214 memmap.flags |= VM_MEMMAP_F_WIRED; 215 216 /* 217 * If this mapping already exists then don't create it again. This 218 * is the common case for SYSMEM mappings created by bhyveload(8). 219 */ 220 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags); 221 if (error == 0 && gpa == memmap.gpa) { 222 if (segid != memmap.segid || off != memmap.segoff || 223 prot != memmap.prot || flags != memmap.flags) { 224 errno = EEXIST; 225 return (-1); 226 } else { 227 return (0); 228 } 229 } 230 231 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap); 232 return (error); 233} 234 235int 236vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid, 237 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags) 238{ 239 struct vm_memmap memmap; 240 int error; 241 242 bzero(&memmap, sizeof(struct vm_memmap)); 243 memmap.gpa = *gpa; 244 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap); 245 if (error == 0) { 246 *gpa = memmap.gpa; 247 *segid = memmap.segid; 248 *segoff = memmap.segoff; 249 *len = memmap.len; 250 *prot = memmap.prot; 251 *flags = memmap.flags; 252 } 253 return (error); 254} 255 256/* 257 * Return 0 if the segments are identical and non-zero otherwise. 258 * 259 * This is slightly complicated by the fact that only device memory segments 260 * are named. 261 */ 262static int 263cmpseg(size_t len, const char *str, size_t len2, const char *str2) 264{ 265 266 if (len == len2) { 267 if ((!str && !str2) || (str && str2 && !strcmp(str, str2))) 268 return (0); 269 } 270 return (-1); 271} 272 273static int 274vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name) 275{ 276 struct vm_memseg memseg; 277 size_t n; 278 int error; 279 280 /* 281 * If the memory segment has already been created then just return. 282 * This is the usual case for the SYSMEM segment created by userspace 283 * loaders like bhyveload(8). 284 */ 285 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name, 286 sizeof(memseg.name)); 287 if (error) 288 return (error); 289 290 if (memseg.len != 0) { 291 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) { 292 errno = EINVAL; 293 return (-1); 294 } else { 295 return (0); 296 } 297 } 298 299 bzero(&memseg, sizeof(struct vm_memseg)); 300 memseg.segid = segid; 301 memseg.len = len; 302 if (name != NULL) { 303 n = strlcpy(memseg.name, name, sizeof(memseg.name)); 304 if (n >= sizeof(memseg.name)) { 305 errno = ENAMETOOLONG; 306 return (-1); 307 } 308 } 309 310 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg); 311 return (error); 312} 313 314int 315vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf, 316 size_t bufsize) 317{ 318 struct vm_memseg memseg; 319 size_t n; 320 int error; 321 322 memseg.segid = segid; 323 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg); 324 if (error == 0) { 325 *lenp = memseg.len; 326 n = strlcpy(namebuf, memseg.name, bufsize); 327 if (n >= bufsize) { 328 errno = ENAMETOOLONG; 329 error = -1; 330 } 331 } 332 return (error); 333} 334 335static int 336setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base) 337{ 338 char *ptr; 339 int error, flags; 340 341 /* Map 'len' bytes starting at 'gpa' in the guest address space */ 342 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL); 343 if (error) 344 return (error); 345 346 flags = MAP_SHARED | MAP_FIXED; 347 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 348 flags |= MAP_NOCORE; 349 350 /* mmap into the process address space on the host */ 351 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa); 352 if (ptr == MAP_FAILED) 353 return (-1); 354 355 return (0); 356} 357 358int 359vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms) 360{ 361 size_t objsize, len; 362 vm_paddr_t gpa; 363 char *baseaddr, *ptr; 364 int error, flags; 365 366 assert(vms == VM_MMAP_ALL); 367 368 /* 369 * If 'memsize' cannot fit entirely in the 'lowmem' segment then 370 * create another 'highmem' segment above 4GB for the remainder. 371 */ 372 if (memsize > ctx->lowmem_limit) { 373 ctx->lowmem = ctx->lowmem_limit; 374 ctx->highmem = memsize - ctx->lowmem_limit; 375 objsize = 4*GB + ctx->highmem; 376 } else { 377 ctx->lowmem = memsize; 378 ctx->highmem = 0; 379 objsize = ctx->lowmem; 380 } 381 382 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL); 383 if (error) 384 return (error); 385 386 /* 387 * Stake out a contiguous region covering the guest physical memory 388 * and the adjoining guard regions. 389 */ 390 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE; 391 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER; 392 ptr = mmap(NULL, len, PROT_NONE, flags, -1, 0); 393 if (ptr == MAP_FAILED) 394 return (-1); 395 396 baseaddr = ptr + VM_MMAP_GUARD_SIZE; 397 if (ctx->highmem > 0) { 398 gpa = 4*GB; 399 len = ctx->highmem; 400 error = setup_memory_segment(ctx, gpa, len, baseaddr); 401 if (error) 402 return (error); 403 } 404 405 if (ctx->lowmem > 0) { 406 gpa = 0; 407 len = ctx->lowmem; 408 error = setup_memory_segment(ctx, gpa, len, baseaddr); 409 if (error) 410 return (error); 411 } 412 413 ctx->baseaddr = baseaddr; 414 415 return (0); 416} 417 418/* 419 * Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in 420 * the lowmem or highmem regions. 421 * 422 * In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region. 423 * The instruction emulation code depends on this behavior. 424 */ 425void * 426vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len) 427{ 428 429 if (ctx->lowmem > 0) { 430 if (gaddr < ctx->lowmem && gaddr + len <= ctx->lowmem) 431 return (ctx->baseaddr + gaddr); 432 } 433 434 if (ctx->highmem > 0) { 435 if (gaddr >= 4*GB && gaddr + len <= 4*GB + ctx->highmem) 436 return (ctx->baseaddr + gaddr); 437 } 438 439 return (NULL); 440} 441 442size_t 443vm_get_lowmem_size(struct vmctx *ctx) 444{ 445 446 return (ctx->lowmem); 447} 448 449size_t 450vm_get_highmem_size(struct vmctx *ctx) 451{ 452 453 return (ctx->highmem); 454} 455 456void * 457vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len) 458{ 459 char pathname[MAXPATHLEN]; 460 size_t len2; 461 char *base, *ptr; 462 int fd, error, flags; 463 464 fd = -1; 465 ptr = MAP_FAILED; 466 if (name == NULL || strlen(name) == 0) { 467 errno = EINVAL; 468 goto done; 469 } 470 471 error = vm_alloc_memseg(ctx, segid, len, name); 472 if (error) 473 goto done; 474 475 strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname)); 476 strlcat(pathname, ctx->name, sizeof(pathname)); 477 strlcat(pathname, ".", sizeof(pathname)); 478 strlcat(pathname, name, sizeof(pathname)); 479 480 fd = open(pathname, O_RDWR); 481 if (fd < 0) 482 goto done; 483 484 /* 485 * Stake out a contiguous region covering the device memory and the 486 * adjoining guard regions. 487 */ 488 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE; 489 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER; 490 base = mmap(NULL, len2, PROT_NONE, flags, -1, 0); 491 if (base == MAP_FAILED) 492 goto done; 493 494 flags = MAP_SHARED | MAP_FIXED; 495 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 496 flags |= MAP_NOCORE; 497 498 /* mmap the devmem region in the host address space */ 499 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0); 500done: 501 if (fd >= 0) 502 close(fd); 503 return (ptr); 504} 505 506int 507vm_set_desc(struct vmctx *ctx, int vcpu, int reg, 508 uint64_t base, uint32_t limit, uint32_t access) 509{ 510 int error; 511 struct vm_seg_desc vmsegdesc; 512 513 bzero(&vmsegdesc, sizeof(vmsegdesc)); 514 vmsegdesc.cpuid = vcpu; 515 vmsegdesc.regnum = reg; 516 vmsegdesc.desc.base = base; 517 vmsegdesc.desc.limit = limit; 518 vmsegdesc.desc.access = access; 519 520 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc); 521 return (error); 522} 523 524int 525vm_get_desc(struct vmctx *ctx, int vcpu, int reg, 526 uint64_t *base, uint32_t *limit, uint32_t *access) 527{ 528 int error; 529 struct vm_seg_desc vmsegdesc; 530 531 bzero(&vmsegdesc, sizeof(vmsegdesc)); 532 vmsegdesc.cpuid = vcpu; 533 vmsegdesc.regnum = reg; 534 535 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc); 536 if (error == 0) { 537 *base = vmsegdesc.desc.base; 538 *limit = vmsegdesc.desc.limit; 539 *access = vmsegdesc.desc.access; 540 } 541 return (error); 542} 543 544int 545vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc) 546{ 547 int error; 548 549 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit, 550 &seg_desc->access); 551 return (error); 552} 553 554int 555vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val) 556{ 557 int error; 558 struct vm_register vmreg; 559 560 bzero(&vmreg, sizeof(vmreg)); 561 vmreg.cpuid = vcpu; 562 vmreg.regnum = reg; 563 vmreg.regval = val; 564 565 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg); 566 return (error); 567} 568 569int 570vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val) 571{ 572 int error; 573 struct vm_register vmreg; 574 575 bzero(&vmreg, sizeof(vmreg)); 576 vmreg.cpuid = vcpu; 577 vmreg.regnum = reg; 578 579 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg); 580 *ret_val = vmreg.regval; 581 return (error); 582} 583 584int 585vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit) 586{ 587 int error; 588 struct vm_run vmrun; 589 590 bzero(&vmrun, sizeof(vmrun)); 591 vmrun.cpuid = vcpu; 592 593 error = ioctl(ctx->fd, VM_RUN, &vmrun); 594 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit)); 595 return (error); 596} 597 598int 599vm_suspend(struct vmctx *ctx, enum vm_suspend_how how) 600{ 601 struct vm_suspend vmsuspend; 602 603 bzero(&vmsuspend, sizeof(vmsuspend)); 604 vmsuspend.how = how; 605 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend)); 606} 607 608int 609vm_reinit(struct vmctx *ctx) 610{ 611 612 return (ioctl(ctx->fd, VM_REINIT, 0)); 613} 614 615int 616vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid, 617 uint32_t errcode, int restart_instruction) 618{ 619 struct vm_exception exc; 620 621 exc.cpuid = vcpu; 622 exc.vector = vector; 623 exc.error_code = errcode; 624 exc.error_code_valid = errcode_valid; 625 exc.restart_instruction = restart_instruction; 626 627 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc)); 628} 629 630int 631vm_apicid2vcpu(struct vmctx *ctx, int apicid) 632{ 633 /* 634 * The apic id associated with the 'vcpu' has the same numerical value 635 * as the 'vcpu' itself. 636 */ 637 return (apicid); 638} 639 640int 641vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector) 642{ 643 struct vm_lapic_irq vmirq; 644 645 bzero(&vmirq, sizeof(vmirq)); 646 vmirq.cpuid = vcpu; 647 vmirq.vector = vector; 648 649 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq)); 650} 651 652int 653vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector) 654{ 655 struct vm_lapic_irq vmirq; 656 657 bzero(&vmirq, sizeof(vmirq)); 658 vmirq.cpuid = vcpu; 659 vmirq.vector = vector; 660 661 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq)); 662} 663 664int 665vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg) 666{ 667 struct vm_lapic_msi vmmsi; 668 669 bzero(&vmmsi, sizeof(vmmsi)); 670 vmmsi.addr = addr; 671 vmmsi.msg = msg; 672 673 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi)); 674} 675 676int 677vm_ioapic_assert_irq(struct vmctx *ctx, int irq) 678{ 679 struct vm_ioapic_irq ioapic_irq; 680 681 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 682 ioapic_irq.irq = irq; 683 684 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq)); 685} 686 687int 688vm_ioapic_deassert_irq(struct vmctx *ctx, int irq) 689{ 690 struct vm_ioapic_irq ioapic_irq; 691 692 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 693 ioapic_irq.irq = irq; 694 695 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq)); 696} 697 698int 699vm_ioapic_pulse_irq(struct vmctx *ctx, int irq) 700{ 701 struct vm_ioapic_irq ioapic_irq; 702 703 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 704 ioapic_irq.irq = irq; 705 706 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq)); 707} 708 709int 710vm_ioapic_pincount(struct vmctx *ctx, int *pincount) 711{ 712 713 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount)); 714} 715 716int 717vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 718{ 719 struct vm_isa_irq isa_irq; 720 721 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 722 isa_irq.atpic_irq = atpic_irq; 723 isa_irq.ioapic_irq = ioapic_irq; 724 725 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq)); 726} 727 728int 729vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 730{ 731 struct vm_isa_irq isa_irq; 732 733 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 734 isa_irq.atpic_irq = atpic_irq; 735 isa_irq.ioapic_irq = ioapic_irq; 736 737 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq)); 738} 739 740int 741vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 742{ 743 struct vm_isa_irq isa_irq; 744 745 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 746 isa_irq.atpic_irq = atpic_irq; 747 isa_irq.ioapic_irq = ioapic_irq; 748 749 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq)); 750} 751 752int 753vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq, 754 enum vm_intr_trigger trigger) 755{ 756 struct vm_isa_irq_trigger isa_irq_trigger; 757 758 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger)); 759 isa_irq_trigger.atpic_irq = atpic_irq; 760 isa_irq_trigger.trigger = trigger; 761 762 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger)); 763} 764 765int 766vm_inject_nmi(struct vmctx *ctx, int vcpu) 767{ 768 struct vm_nmi vmnmi; 769 770 bzero(&vmnmi, sizeof(vmnmi)); 771 vmnmi.cpuid = vcpu; 772 773 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi)); 774} 775 776static struct { 777 const char *name; 778 int type; 779} capstrmap[] = { 780 { "hlt_exit", VM_CAP_HALT_EXIT }, 781 { "mtrap_exit", VM_CAP_MTRAP_EXIT }, 782 { "pause_exit", VM_CAP_PAUSE_EXIT }, 783 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST }, 784 { "enable_invpcid", VM_CAP_ENABLE_INVPCID }, 785 { 0 } 786}; 787 788int 789vm_capability_name2type(const char *capname) 790{ 791 int i; 792 793 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) { 794 if (strcmp(capstrmap[i].name, capname) == 0) 795 return (capstrmap[i].type); 796 } 797 798 return (-1); 799} 800 801const char * 802vm_capability_type2name(int type) 803{ 804 int i; 805 806 for (i = 0; capstrmap[i].name != NULL; i++) { 807 if (capstrmap[i].type == type) 808 return (capstrmap[i].name); 809 } 810 811 return (NULL); 812} 813 814int 815vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, 816 int *retval) 817{ 818 int error; 819 struct vm_capability vmcap; 820 821 bzero(&vmcap, sizeof(vmcap)); 822 vmcap.cpuid = vcpu; 823 vmcap.captype = cap; 824 825 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap); 826 *retval = vmcap.capval; 827 return (error); 828} 829 830int 831vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val) 832{ 833 struct vm_capability vmcap; 834 835 bzero(&vmcap, sizeof(vmcap)); 836 vmcap.cpuid = vcpu; 837 vmcap.captype = cap; 838 vmcap.capval = val; 839 840 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap)); 841} 842 843int 844vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 845{ 846 struct vm_pptdev pptdev; 847 848 bzero(&pptdev, sizeof(pptdev)); 849 pptdev.bus = bus; 850 pptdev.slot = slot; 851 pptdev.func = func; 852 853 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev)); 854} 855 856int 857vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 858{ 859 struct vm_pptdev pptdev; 860 861 bzero(&pptdev, sizeof(pptdev)); 862 pptdev.bus = bus; 863 pptdev.slot = slot; 864 pptdev.func = func; 865 866 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev)); 867} 868 869int 870vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func, 871 vm_paddr_t gpa, size_t len, vm_paddr_t hpa) 872{ 873 struct vm_pptdev_mmio pptmmio; 874 875 bzero(&pptmmio, sizeof(pptmmio)); 876 pptmmio.bus = bus; 877 pptmmio.slot = slot; 878 pptmmio.func = func; 879 pptmmio.gpa = gpa; 880 pptmmio.len = len; 881 pptmmio.hpa = hpa; 882 883 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio)); 884} 885 886int 887vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 888 uint64_t addr, uint64_t msg, int numvec) 889{ 890 struct vm_pptdev_msi pptmsi; 891 892 bzero(&pptmsi, sizeof(pptmsi)); 893 pptmsi.vcpu = vcpu; 894 pptmsi.bus = bus; 895 pptmsi.slot = slot; 896 pptmsi.func = func; 897 pptmsi.msg = msg; 898 pptmsi.addr = addr; 899 pptmsi.numvec = numvec; 900 901 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi)); 902} 903 904int 905vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 906 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control) 907{ 908 struct vm_pptdev_msix pptmsix; 909 910 bzero(&pptmsix, sizeof(pptmsix)); 911 pptmsix.vcpu = vcpu; 912 pptmsix.bus = bus; 913 pptmsix.slot = slot; 914 pptmsix.func = func; 915 pptmsix.idx = idx; 916 pptmsix.msg = msg; 917 pptmsix.addr = addr; 918 pptmsix.vector_control = vector_control; 919 920 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix); 921} 922 923uint64_t * 924vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv, 925 int *ret_entries) 926{ 927 int error; 928 929 static struct vm_stats vmstats; 930 931 vmstats.cpuid = vcpu; 932 933 error = ioctl(ctx->fd, VM_STATS, &vmstats); 934 if (error == 0) { 935 if (ret_entries) 936 *ret_entries = vmstats.num_entries; 937 if (ret_tv) 938 *ret_tv = vmstats.tv; 939 return (vmstats.statbuf); 940 } else 941 return (NULL); 942} 943 944const char * 945vm_get_stat_desc(struct vmctx *ctx, int index) 946{ 947 static struct vm_stat_desc statdesc; 948 949 statdesc.index = index; 950 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0) 951 return (statdesc.desc); 952 else 953 return (NULL); 954} 955 956int 957vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state) 958{ 959 int error; 960 struct vm_x2apic x2apic; 961 962 bzero(&x2apic, sizeof(x2apic)); 963 x2apic.cpuid = vcpu; 964 965 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic); 966 *state = x2apic.state; 967 return (error); 968} 969 970int 971vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state) 972{ 973 int error; 974 struct vm_x2apic x2apic; 975 976 bzero(&x2apic, sizeof(x2apic)); 977 x2apic.cpuid = vcpu; 978 x2apic.state = state; 979 980 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic); 981 982 return (error); 983} 984 985/* 986 * From Intel Vol 3a: 987 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT 988 */ 989int 990vcpu_reset(struct vmctx *vmctx, int vcpu) 991{ 992 int error; 993 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx; 994 uint32_t desc_access, desc_limit; 995 uint16_t sel; 996 997 zero = 0; 998 999 rflags = 0x2; 1000 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags); 1001 if (error) 1002 goto done; 1003 1004 rip = 0xfff0; 1005 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0) 1006 goto done; 1007 1008 cr0 = CR0_NE; 1009 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0) 1010 goto done; 1011 1012 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0) 1013 goto done; 1014 1015 cr4 = 0; 1016 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0) 1017 goto done; 1018 1019 /* 1020 * CS: present, r/w, accessed, 16-bit, byte granularity, usable 1021 */ 1022 desc_base = 0xffff0000; 1023 desc_limit = 0xffff; 1024 desc_access = 0x0093; 1025 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS, 1026 desc_base, desc_limit, desc_access); 1027 if (error) 1028 goto done; 1029 1030 sel = 0xf000; 1031 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0) 1032 goto done; 1033 1034 /* 1035 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity 1036 */ 1037 desc_base = 0; 1038 desc_limit = 0xffff; 1039 desc_access = 0x0093; 1040 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS, 1041 desc_base, desc_limit, desc_access); 1042 if (error) 1043 goto done; 1044 1045 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS, 1046 desc_base, desc_limit, desc_access); 1047 if (error) 1048 goto done; 1049 1050 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES, 1051 desc_base, desc_limit, desc_access); 1052 if (error) 1053 goto done; 1054 1055 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS, 1056 desc_base, desc_limit, desc_access); 1057 if (error) 1058 goto done; 1059 1060 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS, 1061 desc_base, desc_limit, desc_access); 1062 if (error) 1063 goto done; 1064 1065 sel = 0; 1066 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0) 1067 goto done; 1068 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0) 1069 goto done; 1070 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0) 1071 goto done; 1072 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0) 1073 goto done; 1074 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0) 1075 goto done; 1076 1077 /* General purpose registers */ 1078 rdx = 0xf00; 1079 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0) 1080 goto done; 1081 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0) 1082 goto done; 1083 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0) 1084 goto done; 1085 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0) 1086 goto done; 1087 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0) 1088 goto done; 1089 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0) 1090 goto done; 1091 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0) 1092 goto done; 1093 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0) 1094 goto done; 1095 1096 /* GDTR, IDTR */ 1097 desc_base = 0; 1098 desc_limit = 0xffff; 1099 desc_access = 0; 1100 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR, 1101 desc_base, desc_limit, desc_access); 1102 if (error != 0) 1103 goto done; 1104 1105 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR, 1106 desc_base, desc_limit, desc_access); 1107 if (error != 0) 1108 goto done; 1109 1110 /* TR */ 1111 desc_base = 0; 1112 desc_limit = 0xffff; 1113 desc_access = 0x0000008b; 1114 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access); 1115 if (error) 1116 goto done; 1117 1118 sel = 0; 1119 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0) 1120 goto done; 1121 1122 /* LDTR */ 1123 desc_base = 0; 1124 desc_limit = 0xffff; 1125 desc_access = 0x00000082; 1126 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base, 1127 desc_limit, desc_access); 1128 if (error) 1129 goto done; 1130 1131 sel = 0; 1132 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0) 1133 goto done; 1134 1135 /* XXX cr2, debug registers */ 1136 1137 error = 0; 1138done: 1139 return (error); 1140} 1141 1142int 1143vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num) 1144{ 1145 int error, i; 1146 struct vm_gpa_pte gpapte; 1147 1148 bzero(&gpapte, sizeof(gpapte)); 1149 gpapte.gpa = gpa; 1150 1151 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte); 1152 1153 if (error == 0) { 1154 *num = gpapte.ptenum; 1155 for (i = 0; i < gpapte.ptenum; i++) 1156 pte[i] = gpapte.pte[i]; 1157 } 1158 1159 return (error); 1160} 1161 1162int 1163vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities) 1164{ 1165 int error; 1166 struct vm_hpet_cap cap; 1167 1168 bzero(&cap, sizeof(struct vm_hpet_cap)); 1169 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap); 1170 if (capabilities != NULL) 1171 *capabilities = cap.capabilities; 1172 return (error); 1173} 1174 1175int 1176vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1177 uint64_t gla, int prot, uint64_t *gpa, int *fault) 1178{ 1179 struct vm_gla2gpa gg; 1180 int error; 1181 1182 bzero(&gg, sizeof(struct vm_gla2gpa)); 1183 gg.vcpuid = vcpu; 1184 gg.prot = prot; 1185 gg.gla = gla; 1186 gg.paging = *paging; 1187 1188 error = ioctl(ctx->fd, VM_GLA2GPA, &gg); 1189 if (error == 0) { 1190 *fault = gg.fault; 1191 *gpa = gg.gpa; 1192 } 1193 return (error); 1194} 1195 1196#ifndef min 1197#define min(a,b) (((a) < (b)) ? (a) : (b)) 1198#endif 1199 1200int 1201vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1202 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt, 1203 int *fault) 1204{ 1205 void *va; 1206 uint64_t gpa; 1207 int error, i, n, off; 1208 1209 for (i = 0; i < iovcnt; i++) { 1210 iov[i].iov_base = 0; 1211 iov[i].iov_len = 0; 1212 } 1213 1214 while (len) { 1215 assert(iovcnt > 0); 1216 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault); 1217 if (error || *fault) 1218 return (error); 1219 1220 off = gpa & PAGE_MASK; 1221 n = min(len, PAGE_SIZE - off); 1222 1223 va = vm_map_gpa(ctx, gpa, n); 1224 if (va == NULL) 1225 return (EFAULT); 1226 1227 iov->iov_base = va; 1228 iov->iov_len = n; 1229 iov++; 1230 iovcnt--; 1231 1232 gla += n; 1233 len -= n; 1234 } 1235 return (0); 1236} 1237 1238void 1239vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt) 1240{ 1241 1242 return; 1243} 1244 1245void 1246vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len) 1247{ 1248 const char *src; 1249 char *dst; 1250 size_t n; 1251 1252 dst = vp; 1253 while (len) { 1254 assert(iov->iov_len); 1255 n = min(len, iov->iov_len); 1256 src = iov->iov_base; 1257 bcopy(src, dst, n); 1258 1259 iov++; 1260 dst += n; 1261 len -= n; 1262 } 1263} 1264 1265void 1266vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov, 1267 size_t len) 1268{ 1269 const char *src; 1270 char *dst; 1271 size_t n; 1272 1273 src = vp; 1274 while (len) { 1275 assert(iov->iov_len); 1276 n = min(len, iov->iov_len); 1277 dst = iov->iov_base; 1278 bcopy(src, dst, n); 1279 1280 iov++; 1281 src += n; 1282 len -= n; 1283 } 1284} 1285 1286static int 1287vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus) 1288{ 1289 struct vm_cpuset vm_cpuset; 1290 int error; 1291 1292 bzero(&vm_cpuset, sizeof(struct vm_cpuset)); 1293 vm_cpuset.which = which; 1294 vm_cpuset.cpusetsize = sizeof(cpuset_t); 1295 vm_cpuset.cpus = cpus; 1296 1297 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset); 1298 return (error); 1299} 1300 1301int 1302vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus) 1303{ 1304 1305 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus)); 1306} 1307 1308int 1309vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus) 1310{ 1311 1312 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus)); 1313} 1314 1315int 1316vm_activate_cpu(struct vmctx *ctx, int vcpu) 1317{ 1318 struct vm_activate_cpu ac; 1319 int error; 1320 1321 bzero(&ac, sizeof(struct vm_activate_cpu)); 1322 ac.vcpuid = vcpu; 1323 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac); 1324 return (error); 1325} 1326 1327int 1328vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2) 1329{ 1330 struct vm_intinfo vmii; 1331 int error; 1332 1333 bzero(&vmii, sizeof(struct vm_intinfo)); 1334 vmii.vcpuid = vcpu; 1335 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii); 1336 if (error == 0) { 1337 *info1 = vmii.info1; 1338 *info2 = vmii.info2; 1339 } 1340 return (error); 1341} 1342 1343int 1344vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1) 1345{ 1346 struct vm_intinfo vmii; 1347 int error; 1348 1349 bzero(&vmii, sizeof(struct vm_intinfo)); 1350 vmii.vcpuid = vcpu; 1351 vmii.info1 = info1; 1352 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii); 1353 return (error); 1354} 1355 1356int 1357vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value) 1358{ 1359 struct vm_rtc_data rtcdata; 1360 int error; 1361 1362 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1363 rtcdata.offset = offset; 1364 rtcdata.value = value; 1365 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata); 1366 return (error); 1367} 1368 1369int 1370vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval) 1371{ 1372 struct vm_rtc_data rtcdata; 1373 int error; 1374 1375 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1376 rtcdata.offset = offset; 1377 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata); 1378 if (error == 0) 1379 *retval = rtcdata.value; 1380 return (error); 1381} 1382 1383int 1384vm_rtc_settime(struct vmctx *ctx, time_t secs) 1385{ 1386 struct vm_rtc_time rtctime; 1387 int error; 1388 1389 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1390 rtctime.secs = secs; 1391 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime); 1392 return (error); 1393} 1394 1395int 1396vm_rtc_gettime(struct vmctx *ctx, time_t *secs) 1397{ 1398 struct vm_rtc_time rtctime; 1399 int error; 1400 1401 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1402 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime); 1403 if (error == 0) 1404 *secs = rtctime.secs; 1405 return (error); 1406} 1407 1408int 1409vm_restart_instruction(void *arg, int vcpu) 1410{ 1411 struct vmctx *ctx = arg; 1412 1413 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu)); 1414} 1415