1132451Sroberto<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> 2132451Sroberto<html> 3285612Sdelphij<head> 4285612Sdelphij<meta http-equiv="content-type" content="text/html;charset=iso-8859-1"> 5285612Sdelphij<meta name="generator" content="HTML Tidy, see www.w3.org"> 6285612Sdelphij<title>PPS Clock Discipline</title> 7285612Sdelphij<!-- Changed by: Harlan &, 31-Mar-2014 --> 8285612Sdelphij<link href="scripts/style.css" type="text/css" rel="stylesheet"> 9285612Sdelphij</head> 10285612Sdelphij<body> 11285612Sdelphij<h3>PPS Clock Discipline</h3> 12285612Sdelphij<p>Author: David L. Mills (mills@udel.edu)<br> 13285612Sdelphij Last change: 14285612Sdelphij <!-- #BeginDate format:En2m -->31-Mar-2014 07:46<!-- #EndDate --> 15285612Sdelphij UTC</p> 16285612Sdelphij <hr> 17285612Sdelphij<h4>Synopsis</h4> 18285612Sdelphij<p>Address: 127.127.22.<i>u</i><br> 19285612Sdelphij Reference ID: <tt>PPS</tt><br> 20285612Sdelphij Driver ID: <tt>PPS</tt><br> 21285612Sdelphij Serial or Parallel Port: <tt>/dev/pps<i>u</i></tt><br> 22285612Sdelphij Requires: PPSAPI signal interface for PPS signal processing.</p> 23285612Sdelphij<p>Note: This driver supersedes an older one of the same name. The older driver operated with several somewhat archaic signal interface devices, required intricate configuration and was poorly documented. This driver requires the Pulse per Second API (PPSAPI)<sup>1</sup>. Note also that the <tt>pps</tt> configuration command has been obsoleted by this driver.</p> 24285612Sdelphij<h4>Description</h4> 25285612Sdelphij<p>This driver furnishes an interface for the pulse-per-second (PPS) signal produced by a cesium clock, radio clock or related devices. It can be used to augment the serial timecode generated by a GPS receiver, for example. It can be used to remove accumulated jitter and re-time a secondary server when synchronized to a primary server over a congested, wide-area network and before redistributing the time to local clients. The driver includes extensive signal sanity checks and grooming algorithms. A range gate and frequency discriminator reject noise and signals with incorrect frequency. A multiple-stage median filter rejects jitter due to hardware interrupt and operating system latencies. A trimmed-mean algorithm determines the best time samples. With typical workstations and processing loads, the incidental jitter can be reduced to a few microseconds.</p> 26285612Sdelphij<p>While this driver can discipline the time and frequency relative to the PPS source, it cannot number the seconds. For this purpose an auxiliary source is required, ordinarily a radio clock operated as a primary reference (stratum 1) source; however, another NTP time server can be used as well. For this purpose, the auxiliary source should be specified as the prefer peer, as described in the <a href="../prefer.html">Mitigation Rules and the <tt>prefer</tt> Keyword</a> page.</p> 27285612Sdelphij<p>The driver requires the PPSAPI interface<sup>1</sup>, which is a proposed IETF standard. The interface consists of the <tt>timepps.h</tt> header file and associated kernel support. Support for this interface is included in current versions of Solaris, FreeBSD and Linux and proprietary versions of Tru64 (Alpha) and SunOS. See the <a href="../pps.html">Pulse-per-second (PPS) Signal Interfacing</a> page for further information.</p> 28285612Sdelphij<p>The PPS source can be connected via a serial or parallel port, depending on the hardware and operating system. A serial port can be dedicated to the PPS source or shared with another device; however, if dedicated the data leads should not be connected, as noise or unexpected signals can cause <tt>ntpd</tt> to exit.</p> 29285612Sdelphij<p>A radio clock is usually connected via a serial port and the PPS source 30285612Sdelphij connected via a level converter to the data carrier detect (DCD) 31285612Sdelphij pin (DB-9 pin 1, DB-25 pin 8) of the same connector. In some systems 32285612Sdelphij where a parallel port and driver are available, the PPS signal can 33285612Sdelphij be connected directly to the ACK pin (DB25 pin 10) of the connector. 34285612Sdelphij Whether the PPS signal is connected via a dedicated port or shared with another 35285612Sdelphij device, the driver opens the device <tt>/dev/pps%d</tt>, 36285612Sdelphij where <tt>%d</tt> is the unit number. As with other drivers, links can be 37285612Sdelphij used to redirect the logical name to the actual physical device.</p> 38285612Sdelphij<p>The driver normally operates like any other driver and uses the same mitigation 39285612Sdelphij algorithms and PLL/FLL clock discipline incorporated in the daemon. 40285612Sdelphij If kernel PLL/FLL support is available, the kernel PLL/FLL clock 41285612Sdelphij discipline can be used instead. The default behavior is not to use 42285612Sdelphij the kernel PPS clock discipline, even if present. This driver incorporates 43285612Sdelphij a good deal of signal processing to reduce jitter using the median 44285612Sdelphij filter algorithm in the driver. As the result, performance 45285612Sdelphij with <tt>minpoll</tt> configured at 4 (16s) is generally 46285612Sdelphij better than the kernel PPS discipline. However, fudge flag 3 can 47285612Sdelphij be used to enable the kernel PPS discipline if necessary.</p> 48285612Sdelphij<p>This driver 49285612Sdelphij is enabled only under one of two conditions (a) a prefer peer other than 50285612Sdelphij this driver is among the survivors of the mitigation algorithms or (b) 51285612Sdelphij there are no survivors and the <tt>minsane</tt> option 52285612Sdelphij of the <tt>tos</tt> command is 0. The prefer peer designates another source 53285612Sdelphij that can reliably number the seconds when available . However, if no 54285612Sdelphij sources are available, the system clock continues to be disciplined by 55285612Sdelphij the PPS driver on an indefinite basis.</p> 56285612Sdelphij<p>A scenario where the latter behavior can be most useful is a planetary orbiter 57285612Sdelphij fleet, for instance in the vicinity of Mars, where contact between orbiters 58285612Sdelphij and Earth only one or two times per Sol (Mars day). These orbiters have a 59285612Sdelphij precise timing reference based on an Ultra Stable Oscillator (USO) with accuracy 60285612Sdelphij in the order of a Cesium oscillator. A PPS signal is derived from the USO 61285612Sdelphij and can be disciplined from Earth on rare occasion or from another orbiter 62285612Sdelphij via NTP. In the above scenario the PPS signal disciplines the spacecraft clock 63285612Sdelphij between NTP updates.</p> 64285612Sdelphij<p>In a similar scenario a PPS signal can be used to discipline the clock between 65285612Sdelphij updates produced by the modem driver. This would provide precise synchronization 66285612Sdelphij without needing the Internet at all.</p> 67285612Sdelphij<h4>Fudge Factors</h4> 68285612Sdelphij<dl> 69285612Sdelphij <dt><tt>time1 <i>time</i></tt></dt> 70285612Sdelphij <dd>Specifies the time offset calibration factor, in seconds and fraction, with default 0.0.</dd> 71285612Sdelphij <dt><tt>time2 <i>time</i></tt></dt> 72285612Sdelphij <dd>Not used by this driver.</dd> 73285612Sdelphij <dt><tt>stratum <i>number</i></tt></dt> 74285612Sdelphij <dd>Specifies the driver stratum, in decimal from 0 to 15, with default 0.</dd> 75285612Sdelphij <dt><tt>refid <i>string</i></tt></dt> 76285612Sdelphij <dd>Specifies the driver reference identifier, an ASCII string from one to four characters, with default <tt>PPS</tt>.</dd> 77285612Sdelphij <dt><tt>flag1 0 | 1</tt></dt> 78285612Sdelphij <dd>Not used by this driver.</dd> 79285612Sdelphij <dt><tt>flag2 0 | 1</tt></dt> 80285612Sdelphij <dd>Specifies PPS capture on the rising (assert) pulse edge if 0 (default) or falling 81285612Sdelphij (clear) pulse edge if 1. Not used under Windows - if the special <tt>serialpps.sys</tt> serial port driver is installed then the leading edge will <i>always</i> be used.</dd> 82285612Sdelphij <dt><tt>flag3 0 | 1</tt></dt> 83285612Sdelphij <dd>Controls the kernel PPS discipline: 0 for disable (default), 1 for enable. Not used under Windows - if the special <tt>serialpps.sys</tt> serial port driver is used then kernel PPS will be available and used.</dd> 84285612Sdelphij <dt><tt>flag4 0 | 1</tt></dt> 85285612Sdelphij <dd>Record a timestamp once for each second if 1. Useful for constructing 86285612Sdelphij Allan deviation plots.</dd> 87285612Sdelphij . 88285612Sdelphij</dl> 89285612Sdelphij<h4>Additional Information</h4> 90285612Sdelphij<p><a href="../refclock.html">Reference Clock Drivers</a></p> 91285612Sdelphij<p>Reference</p> 92285612Sdelphij<ol> 93285612Sdelphij <li>Mogul, J., D. Mills, J. Brittenson, J. Stone and U. Windl. Pulse-per-second API for Unix-like operating systems, version 1. Request for Comments RFC-2783, Internet Engineering Task Force, March 2000, 31 pp.</li> 94285612Sdelphij</ol> 95285612Sdelphij<hr> 96285612Sdelphij<script type="text/javascript" language="javascript" src="scripts/footer.txt"></script> 97285612Sdelphij</body> 98285612Sdelphij</html> 99